CN104538401A - Tft基板结构 - Google Patents
Tft基板结构 Download PDFInfo
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- CN104538401A CN104538401A CN201410814177.5A CN201410814177A CN104538401A CN 104538401 A CN104538401 A CN 104538401A CN 201410814177 A CN201410814177 A CN 201410814177A CN 104538401 A CN104538401 A CN 104538401A
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- 239000000758 substrate Substances 0.000 title claims abstract description 106
- 239000000463 material Substances 0.000 claims abstract description 19
- 229910052751 metal Inorganic materials 0.000 claims description 132
- 239000002184 metal Substances 0.000 claims description 132
- 230000004888 barrier function Effects 0.000 claims description 114
- 238000002161 passivation Methods 0.000 claims description 31
- 239000004065 semiconductor Substances 0.000 claims description 23
- 229910044991 metal oxide Inorganic materials 0.000 claims description 20
- 150000004706 metal oxides Chemical class 0.000 claims description 20
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 14
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 7
- 238000002360 preparation method Methods 0.000 claims description 3
- 238000001259 photo etching Methods 0.000 abstract description 4
- 230000008021 deposition Effects 0.000 abstract description 3
- 239000010409 thin film Substances 0.000 description 14
- 238000000034 method Methods 0.000 description 8
- 238000000151 deposition Methods 0.000 description 5
- 230000004069 differentiation Effects 0.000 description 5
- 230000037230 mobility Effects 0.000 description 5
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 229920001621 AMOLED Polymers 0.000 description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical group [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000012795 verification Methods 0.000 description 2
- 239000011787 zinc oxide Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000036632 reaction speed Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
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Abstract
本发明提供一种TFT基板结构,包括一开关TFT与一驱动TFT,所述开关TFT具有第一有源层,所述驱动TFT具有第二有源层,所述第一与第二有源层采用相同或不同的材料制备,所述开关TFT与驱动TFT的电性能不同。本发明根据不同TFT所实现功能的不同,将开关TFT与驱动TFT采用不同的工作结构分别进行沉积和光刻,并对开关TFT与驱动TFT的有源层采用不同的材料,实现TFT基板中不同TFT的电性能差异化,从而以最低的成本实现OLED的精确控制。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种TFT基板结构。
背景技术
有源阵列有机发光二极管(AMOLED)被称为下一代显示技术,是因为AMOLED相对于传统TFT-LCD面板,具有反应速度快,视角广,对比度高等优点。由于OLED的驱动需要背板TFT具有较高的迁移率,目前较为成熟的非晶硅(a-Si)迁移率仅能达到0.5~0.8cm2/Vs,不能满足OLED的正常驱动。迁移率较高的低温多晶硅(LTPS)和金属氧化物半导体(如IGZO)作为有源层的薄膜晶体管(TFT)得以成为研究热点。
AMOLED中OLED由背板中的薄膜晶体管(TFT)来驱动,在背板TFT中,又可以分为开关薄膜晶体管(Switching TFT)和驱动薄膜晶体管(Driving TFT)。其中开关薄膜晶体管(Switching TFT)仅仅实现开关的功能,所以可以采用价格低廉制程稳定的TFT,而驱动薄膜晶体管(DrivingTFT)需要足够的迁移率才能实现OLED的驱动,因此可以采用迁移率较大的TFT。
按照目前传统OLED背板的制程,开关薄膜晶体管(Switching TFT)和驱动薄膜晶体管(Driving TFT)采用相同的结构和制程顺序,决定了有源层仅仅采用一种材料(金属氧化物半导体或LTPS),不易实现功能不同的两种TFT的差异化。另一方面,一个像素中的驱动薄膜晶体管(Driving TFT)和驱动薄膜晶体管(Driving TFT)以及电容相互独立,不利于开口率的增加。
常见驱动OLED的2T1C(2个TFT和一个存储电容)结构如图1所示:其中两个TFT101、102均为蚀刻阻挡型(ESL)结构,有源层201、202采用一种材料(金属氧化物半导体或LTPS),做到钝化层600一共需要5道光罩。同时,经过相同的制程后,TFT101、102具有相同的电性能。
发明内容
本发明的目的在于提供一种TFT基板结构,根据不同TFT所实现功能的不同,将开关TFT与驱动TFT采用不同的工作结构分别进行沉积和光刻,并对开关TFT与驱动TFT的有源层采用不同的材料,实现TFT基板中不同TFT的电性能差异化,从而以最低的成本实现OLED的精确控制。
为实现上述目的,本发明提供一种TFT基板结构,包括一开关TFT与一驱动TFT,所述开关TFT具有第一有源层,所述驱动TFT具有第二有源层,所述第一与第二有源层采用相同或不同的材料制备,所述开关TFT与驱动TFT的电性能不同。
所述TFT基板包括基板、形成于基板上的第一有源层、形成于基板及第一有源层上的第一金属层、形成于第一有源层及第一金属层上并覆盖基板的第一绝缘层、形成于第一绝缘层上的第二有源层、形成于第一绝缘层上的第二金属层、形成于第二有源层及第一绝缘层上的第三金属层、形成于第二有源层及第二金属层上并覆盖第一绝缘层的钝化层、及形成于钝化层上并与第三金属层相接触的像素电极层。
所述TFT基板包括基板、形成于基板上的第一金属层、形成于第一金属层上并覆盖基板与第一金属层的第一绝缘层、形成于第一绝缘层上的第一有源层、形成于第一有源层及第一绝缘层上的第二金属层、形成于第二金属层及第一有源层上并覆盖第一绝缘层的第二绝缘层、形成于第二绝缘层上的第二有源层、形成于第二有源层及第二绝缘层上的第三金属层、形成于第二有源层及第三金属层上并覆盖第二绝缘层的钝化层、及形成于钝化层上并与第三金属层相接触的像素电极层。
所述TFT基板包括基板、形成于基板上的第一金属层、形成于第一金属层上并覆盖基板及第一金属层的第一绝缘层、形成于第一绝缘层上的第二金属层、形成第二金属层上并与第一绝缘层相接触的第一有源层、形成于第一有源层及第二金属层上并覆盖第一绝缘层的第二绝缘层、形成于第二绝缘层上的第二有源层、形成于第二有源层及第二绝缘层上的第三金属层、形成于第二有源层与第三金属层上并覆盖第二绝缘层的钝化层、及形成于钝化层上并与第三金属层相接触的像素电极层。
所述TFT基板包括基板、形成于基板上的第一金属层、形成于第一金属层上并覆盖基板与第一金属层的第一绝缘层、形成于第一绝缘层上的第一有源层、形成于第一有源层上的蚀刻阻挡层、形成于第一绝缘层及蚀刻阻挡层上并覆盖第一有源层的第二金属层、形成于第二金属层上并覆盖第一绝缘层的第二绝缘层、形成于第二绝缘层上的第二有源层、形成于第二绝缘层上并覆盖第二有源层两端的第三金属层、形成于第三金属层与第二有源层上并覆盖第二绝缘层的钝化层、及形成于钝化层上并与第三金属层相接触的像素电极层。
所述第一有源层与第二有源层的材料分别为非晶硅与金属氧化物半导体、或低温多晶硅与非晶硅、或低温多晶硅与金属氧化物半导体、或均为金属氧化物半导体。
所述TFT基板包括基板、形成于基板上的第一金属层、形成于第一金属层上并覆盖基板与第一金属层的第一绝缘层、形成于第一绝缘层上的第一有源层、形成于第一有源层两端及第一绝缘层上的第二金属层、形成于第一有源层及第二金属层上并覆盖第一绝缘层的第二绝缘层、形成于第二绝缘层上的第三金属层、形成于第三金属层上并与第二绝缘层相接触的第二有源层、形成于第三金属层及第二有源层上并覆盖第二绝缘层的钝化层、及形成于钝化层上并与第三金属层相接触的像素电极层;所述第一有源层与第二有源层位于基板的同一侧。
所述第一有源层与第二有源层的材料分别为非晶硅与金属氧化物半导体、或均为金属氧化物半导体。
本发明的有益效果:本发明提供一种TFT基板结构,根据不同TFT所实现功能的不同,将开关TFT与驱动TFT采用不同的工作结构分别进行沉积和光刻,并对开关TFT与驱动TFT的有源层采用不同的材料,实现TFT基板中不同TFT的电性能差异化,从而以最低的成本实现OLED的精确控制,制程简便,生产成本低,并将不同功能的TFT进行叠加沉积,增加了开口率。
附图说明
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其他有益效果显而易见。
附图中,
图1为一种现有TFT基板的结构示意图;
图2为本发明TFT基板结构第一实施例的结构示意图;
图3为本发明TFT基板结构第二实施例的结构示意图;
图4为本发明TFT基板结构第三实施例的结构示意图;
图5为本发明TFT基板结构第四实施例的结构示意图;
图6为本发明TFT基板结构第五实施例的结构示意图;
图7为本发明TFT基板结构不同金属氧化物半导体TFT的电性曲线图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
本发明提供的TFT基板结构,包括一开关TFT与一驱动TFT,所述开关TFT具有第一有源层,所述驱动TFT具有第二有源层,所述第一与第二有源层采用相同或不同的材料制备,所述开关TFT与驱动TFT的电性能不同。
请参阅图2,本发明TFT基板结构的第一实施例为顶栅型(Top Gate)结构与背沟道蚀刻型(BCE)结构相结合的形式。具体地,包括基板1、形成于基板1上的第一有源层21、形成于基板1及第一有源层21上的第一金属层31、形成于第一有源层21及第一金属层31上并覆盖基板1的第一绝缘层41、形成于第一绝缘层41上的第二有源层22、形成于第一绝缘层41上的第二金属层32,形成于第二有源层22及第一绝缘层41上的第三金属层33、形成于第二有源层22及第二金属层32上并覆盖第一绝缘层41的钝化层6、及形成于钝化层6上并与第三金属层33相接触的像素电极层7。
需要指出的是,在该结构中,第一金属层31的左侧为TFT11的源/漏极,右侧为TFT12的栅极,即TFT12的栅极与TFT11的漏极相连接。第二金属层32为TFT11的栅极,第三金属层33为TFT12的源/漏极。
请参阅图3,本发明TFT基板结构的第二实施例为两个背沟道蚀刻型(BCE)结构相结合的形式。具体地,所述TFT基板包括基板1、形成于基板1上的第一金属层31、形成于第一金属层31上并覆盖基板1与第一金属层31的第一绝缘层41、形成于第一绝缘层41上的第一有源层21、形成于第一有源层21及第一绝缘层41上的第二金属层32、形成第二金属层32与第一有源层21上并覆盖第一绝缘层41的第二绝缘层42、形成于第二绝缘层42上的第二有源层22、形成于第二有源层22上的第三金属层33、形成于第二有源层22与第三金属层33上并覆盖第二绝缘层42的钝化层6、及形成于钝化层6上并与第三金属层33相接触的像素电极层7。
需要指出的是,在该结构中,第一金属层31为TFT11的栅极,第二金属层32为的左侧为TFT11的源/漏极,右侧为TFT12的栅极,即TFT12的栅极与TFT11的漏极相连接。第三金属层33为TFT12的源/漏极。
请参阅图4,本发明TFT基板结构的第三实施例为反转共平面型(Co-planar)结构与背沟道蚀刻型(BCE)结构相结合的形式。具体地,所述TFT基板包括基板1、形成于基板1上的第一金属层31、形成于第一金属层31上并覆盖基板1与第一金属层31的第一绝缘层41、形成于第一绝缘层41上的第二金属层32、形成于第二金属层32上并与第一绝缘层41相接触的第一有源层21、形成于第一有源层21与第二金属层32上并覆盖第一绝缘层41的第二绝缘层42、形成于第二绝缘层42上的第二有源层22、形成于第二有源层22及第二绝缘层42上的第三金属层33、形成于第二有源层22与第三金属层33上并覆盖第二绝缘层42的钝化层6、及形成于钝化层6上并与第三金属层33相接触的像素电极层7。
需要指出的是,在该结构中,第一金属层31为TFT11的栅极,第二金属层32为的左侧为TFT11的源/漏极,右侧为TFT12的栅极,即TFT12的栅极与TFT11的漏极相连接。第三金属层33为TFT12的源/漏极。
值得一提的是,图4所示的TFT基板中,第一TFT11采用反转共平面型(Co-planar)结构,第二TFT12采用背沟道蚀刻型(BCE)结构的形式,同样地,也可以是第一TFT11采用背沟道蚀刻型(BCE)结构,第二TFT12采用反转共平面型(Co-planar)结构的形式。
请参阅图5,本发明TFT基板结构的第四实施例为蚀刻阻挡型(ESL)结构与背沟道蚀刻型(BCE)结构相结合的形式。具体地,所述TFT基板包括基板1、形成于基板1上的第一金属层31、形成于第一金属层31上并覆盖基板1与第一金属层31的第一绝缘层41、形成于第一绝缘层41上的第一有源层21、形成于第一有源层21上的蚀刻阻挡层5、形成于第一绝缘层41及蚀刻阻挡层5上并覆盖第一有源层21的第二金属层32、形成于第二金属层32上并覆盖第一绝缘层41的第二绝缘层42、形成于第二绝缘层42上的第二有源层22、形成于第二绝缘层42上并覆盖第二有源层22两端的第三金属层33、形成于第三金属层33与第二有源层22上并覆盖第二绝缘层42的钝化层6、及形成于钝化层6上并与第三金属层33相接触的像素电极层7。
需要指出的是,在该结构中,第一金属层31为TFT11的栅极,第二金属层32为的左侧为TFT11的源/漏极,右侧为TFT12的栅极,即TFT12的栅极与TFT11的漏极相连接。第三金属层33为TFT12的源/漏极。
值得一提的是,图5所示的TFT基板中,第一TFT11采用蚀刻阻挡型(ESL)结构,第二TFT12采用背沟道蚀刻型(BCE)结构的形式,同样地,也可以是第一TFT11采用背沟道蚀刻型(BCE)结构,第二TFT12采用蚀刻阻挡型(ESL)结构的形式。
进一步地,在上述第一至第四实施例的TFT基板中,所述第一有源层21与第二有源层22的材料分别为非晶硅(a-Si)与金属氧化物半导体、或低温多晶硅(LTPS)与非晶硅(a-Si)、或均为金属氧化物半导体。此外,在上述第一实施例中,所述第一有源层21与第二有源层22的材料还可以分别为低温多晶硅(LTPS)与金属氧化物半导体。
优选的,所述氧化物半导体为铟镓锌氧化物(IGZO)。
图6所示为本发明TFT基板的第五实施例的结构示意图,该TFT基板为反转共平面型(Co-planar)结构与背沟道蚀刻型(BCE)结构相结合的形式。具体地,包括基板1、形成于所述基板1上的第一金属层31、形成于所述第一金属层31上并覆盖基板1与第一金属层31的第一绝缘层41、形成于所述第一绝缘层41上的第一有源层21、形成于第一有源层21两端及第一绝缘层41上的第二金属层32、形成于第一有源层21及第二金属层32上并覆盖第一绝缘层41的第二绝缘层42、形成于第二绝缘层42上的第三金属层33、形成于第三金属层33上并与第二绝缘层42相接触的第二有源层22、形成于第三金属层33与第二有源层22上并覆盖第二绝缘层42的钝化层6、及形成于钝化层6上并与第三金属层33相接触的像素电极层7。其中,所述第一有源层21与第二有源层22位于基板1的同一侧,即实现不同功能的两个TFT相互叠加,减少了TFT的占用面积,从而增加开口率。
进一步地,所述第一有源层21与第二有源层22的材料分别为非晶硅(a-Si)与金属氧化物半导体、或均为金属氧化物半导体。优选的,所述氧化物半导体为铟镓锌氧化物(IGZO)。
图7为本发明TFT基板结构不同金属氧化物半导体TFT的电性曲线图,其验证了本发明TFT基板的开关薄膜晶体管(Switching TFT)和驱动薄膜晶体管(Driving TFT)存在差异化。
在该试验验证中,开关薄膜晶体管(Switching TFT)和驱动薄膜晶体管(Driving TFT)的有源层均采用氧化物半导体材料,通过改变实验条件参数,最终实现了二者电性的差异化。具体地,如图7所示,(a)和(b)可以实现S.S的差异化;(a)和(c)可以实现Vth的差异化(同样的Vg可以实现一个TFT开,一个TFT关),亦可用于其它电路中;(a)和(d)可以实现Ion的差异化。因此,本发明的TFT基板结构可以实现不同功能TFT的电性差异化。
综上所述,本发明提供一种TFT基板结构,根据不同TFT所实现功能的不同,将开关TFT与驱动TFT采用不同的工作结构分别进行沉积和光刻,并对开关TFT与驱动TFT的有源层采用不同的材料,实现TFT基板中不同TFT的电性能差异化,从而以最低的成本实现OLED的精确控制,制程简便,生产成本低,并将不同功能的TFT进行叠加沉积,增加了开口率。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。
Claims (8)
1.一种TFT基板结构,其特征在于,包括一开关TFT与一驱动TFT,所述开关TFT具有第一有源层,所述驱动TFT具有第二有源层,所述第一与第二有源层采用相同或不同的材料制备,所述开关TFT与驱动TFT的电性能不同。
2.如权利要求1所述的TFT基板结构,其特征在于,所述TFT基板包括基板(1)、形成于基板(1)上的第一有源层(21)、形成于基板(1)及第一有源层(21)上的第一金属层(31)、形成于第一有源层(21)及第一金属层(31)上并覆盖基板(1)的第一绝缘层(41)、形成于第一绝缘层(41)上的第二有源层(22)、形成于第一绝缘层(41)上的第二金属层(32)、形成于第二有源层(22)及第一绝缘层(41)上的第三金属层(33)、形成于第二有源层(22)及第二金属层(32)上并覆盖第一绝缘层(41)的钝化层(6)、及形成于钝化层(6)上并与第三金属层(33)相接触的像素电极层(7)。
3.如权利要求1所述的TFT基板结构,其特征在于,所述TFT基板包括基板(1)、形成于基板(1)上的第一金属层(31)、形成于第一金属层(31)上并覆盖基板(1)与第一金属层(31)的第一绝缘层(41)、形成于第一绝缘层(41)上的第一有源层(21)、形成于第一有源层(21)及第一绝缘层(41)上的第二金属层(32)、形成于第二金属层(32)及第一有源层(21)上并覆盖第一绝缘层(41)的第二绝缘层(42)、形成于第二绝缘层(42)上的第二有源层(22)、形成于第二有源层(22)及第二绝缘层(42)上的第三金属层(33)、形成于第二有源层(22)及第三金属层(33)上并覆盖第二绝缘层(42)的钝化层(6)、及形成于钝化层(6)上并与第三金属层(33)相接触的像素电极层(7)。
4.如权利要求1所述的TFT基板结构,其特征在于,所述TFT基板包括基板(1)、形成于基板(1)上的第一金属层(31)、形成于第一金属层(31)上并覆盖基板(1)及第一金属层(31)的第一绝缘层(41)、形成于第一绝缘层(41)上的第二金属层(32)、形成第二金属层(32)上并与第一绝缘层(41)相接触的第一有源层(21)、形成于第一有源层(21)及第二金属层(32)上并覆盖第一绝缘层(41)的第二绝缘层(42)、形成于第二绝缘层(42)上的第二有源层(22)、形成于第二有源层(22)及第二绝缘层(42)上的第三金属层(33)、形成于第二有源层(22)与第三金属层(33)上并覆盖第二绝缘层(42)的钝化层(6)、及形成于钝化层(6)上并与第三金属层(33)相接触的像素电极层(7)。
5.如权利要求1所述的TFT基板结构,其特征在于,所述TFT基板包括基板(1)、形成于基板(1)上的第一金属层(31)、形成于第一金属层(31)上并覆盖基板(1)与第一金属层(31)的第一绝缘层(41)、形成于第一绝缘层(41)上的第一有源层(21)、形成于第一有源层(21)上的蚀刻阻挡层(5)、形成于第一绝缘层(41)及蚀刻阻挡层(5)上并覆盖第一有源层(21)的第二金属层(32)、形成于第二金属层(32)上并覆盖第一绝缘层(41)的第二绝缘层(42)、形成于第二绝缘层(42)上的第二有源层(22)、形成于第二绝缘层(42)上并覆盖第二有源层(22)两端的第三金属层(33)、形成于第三金属层(33)与第二有源层(22)上并覆盖第二绝缘层(42)的钝化层(6)、及形成于钝化层(6)上并与第三金属层(33)相接触的像素电极层(7)。
6.如权利要求1所述的TFT基板结构,其特征在于,所述第一有源层与第二有源层的材料分别为非晶硅与金属氧化物半导体、或低温多晶硅与非晶硅、或低温多晶硅与金属氧化物半导体、或均为金属氧化物半导体。
7.如权利要求1所述的TFT基板结构,其特征在于,所述TFT基板包括基板(1)、形成于基板(1)上的第一金属层(31)、形成于第一金属层(31)上并覆盖基板(1)与第一金属层(31)的第一绝缘层(41)、形成于第一绝缘层(41)上的第一有源层(21)、形成于第一有源层(21)两端及第一绝缘层(41)上的第二金属层(32)、形成于第一有源层(21)及第二金属层(32)上并覆盖第一绝缘层(41)的第二绝缘层(42)、形成于第二绝缘层(42)上的第三金属层(33)、形成于第三金属层(33)上并与第二绝缘层(42)相接触的第二有源层(22)、形成于第三金属层(33)及第二有源层(22)上并覆盖第二绝缘层(42)的钝化层(6)、及形成于钝化层(6)上并与第三金属层(33)相接触的像素电极层(7);所述第一有源层(21)与第二有源层(22)位于基板(1)的同一侧。
8.如权利要求7所述的TFT基板结构,其特征在于,所述第一有源层(21)与第二有源层(22)的材料分别为非晶硅与金属氧化物半导体、或均为金属氧化物半导体。
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US9728560B2 (en) | 2017-08-08 |
US20170110486A1 (en) | 2017-04-20 |
US20160343737A1 (en) | 2016-11-24 |
US20170110484A1 (en) | 2017-04-20 |
US20170110485A1 (en) | 2017-04-20 |
US20170110483A1 (en) | 2017-04-20 |
US9786691B2 (en) | 2017-10-10 |
CN104538401B (zh) | 2017-05-03 |
US9704887B2 (en) | 2017-07-11 |
US9786695B2 (en) | 2017-10-10 |
WO2016101389A1 (zh) | 2016-06-30 |
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