CN104157701B - 氧化物半导体tft基板的制作方法及结构 - Google Patents
氧化物半导体tft基板的制作方法及结构 Download PDFInfo
- Publication number
- CN104157701B CN104157701B CN201410444172.8A CN201410444172A CN104157701B CN 104157701 B CN104157701 B CN 104157701B CN 201410444172 A CN201410444172 A CN 201410444172A CN 104157701 B CN104157701 B CN 104157701B
- Authority
- CN
- China
- Prior art keywords
- oxide semiconductor
- oxide
- substrate
- layer
- conductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 101
- 239000000758 substrate Substances 0.000 title claims abstract description 90
- 238000002360 preparation method Methods 0.000 title claims abstract description 22
- 239000004020 conductor Substances 0.000 claims abstract description 61
- 238000000034 method Methods 0.000 claims abstract description 14
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 6
- 150000001875 compounds Chemical class 0.000 claims abstract description 6
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 6
- 239000001301 oxygen Substances 0.000 claims abstract description 6
- 239000012212 insulator Substances 0.000 claims description 32
- 229910052751 metal Inorganic materials 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 14
- 239000011521 glass Substances 0.000 claims description 6
- 238000000059 patterning Methods 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- 150000002927 oxygen compounds Chemical class 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 7
- 238000012545 processing Methods 0.000 abstract description 7
- 230000009194 climbing Effects 0.000 abstract description 5
- 229910021645 metal ion Inorganic materials 0.000 abstract description 5
- 239000000203 mixture Substances 0.000 abstract description 5
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical group O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 11
- 238000005516 engineering process Methods 0.000 description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 description 4
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000006378 damage Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000001962 electrophoresis Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
Abstract
本发明提供一种氧化物半导体TFT基板的制作方法及结构,通过采用氧化物导体层来定义氧化物半导体TFT基板的沟道及源极,由于该氧化物导体层较薄,与现有技术相比,所述沟道的宽度可以制作得较小,并且沟道宽度可以得到准确控制,因此降低了氧化物半导体TFT基板的制程难度,提升了氧化物半导体TFT基板的性能,提高生产良率。本发明制得的氧化物半导体TFT基板结构中,由于氧化物导体层与氧化物半导体层结构组成类似,因此可形成良好的欧姆接触;氧化物半导体层具有较好的爬坡,且氧化物导体层不会给氧化物半导体层造成金属离子污染;由于氧化物导体层是透明的,因此可提高开口率。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种氧化物半导体TFT基板的制作方法及其结构。
背景技术
平板显示装置具有机身薄、省电、无辐射等众多优点,得到了广泛的应用。现有的平板显示装置主要包括液晶显示装置(Liquid Crystal Display,LCD)及有机电致发光显示装置(Organic Light Emitting Display,OLED)。
基于有机发光二极管的OLED显示技术同成熟的LCD相比,OLED是主动发光的显示器,具有自发光、高对比度、宽视角(达170°)、快速响应、高发光效率、低操作电压(3~10V)、超轻薄(厚度小于2mm)等优势,具有更优异的彩色显示画质、更宽广的观看范围和更大的设计灵活性。
薄膜晶体管(Thin Film Transistor,TFT)是平板显示装置的重要组成部分,可形成在玻璃基板或塑料基板上,通常作为开光装置和驱动装置用在诸如LCD、OLED、电泳显示装置(EPD)上。
氧化物半导体TFT技术是当前的热门技术。氧化物半导体由于具有较高的电子迁移率(氧化物半导体迁移率>10cm2/Vs,a-Si迁移率仅0.5~0.8cm2/Vs),而且相比LTPS(低温多晶硅),氧化物半导体制程简单,与a-Si制程相容性较高,可应用于LCD(液晶显示)、有机电致发光(OLED)、柔性显示(Flexible)等等,可应用于大小尺寸显示,具有良好的应用发展前景,为当前业界研究热门。
但氧化物半导体的应用及开发仍面临很多问题。
图1所示为一种现有BCE(背沟道刻蚀)结构TFT,结构简单,生产工序少,在a-SiTFT生产中,良率较高,最为成熟。因此,开发具有优良性能的BCE结构氧化物半导体TFT,也为当前研究热门。传统的BCE结构氧化物半导体TFT中,包括基板100、栅极200、栅极绝缘层300、及位于栅极绝缘层300上的氧化物半导体层600,在氧化物半导体层600制作完成后,需制作金属源漏电极400,金属电极的湿蚀刻制程使用强酸及其混合物(HNO3/H3PO4/CH3COOH等)易造成背沟道处氧化物半导体破坏,生产难度较大。源漏电极400一般较厚,图形化时线宽较难控制,沟道宽度易产生偏差。
如图2所示为一种现有ESL(刻蚀阻挡层)结构TFT,包括基板100、栅极200、栅极绝缘层300、位于栅极绝缘层300上的IGZO600、及金属源漏电极400,IGZO600沟道上方具有保护层700,保护IGZO600免受破坏,但需额外一道ESL700的制程,且沟道的宽度变大,TFT尺寸增大,使得设计空间变小。
图3所示为一种现有反转共平面(Coplanar)结构TFT,包括基板100、栅极200、栅极绝缘层300,先制作源漏电极400,再制作IGZO600,由于源漏电极400的厚度,IGZO600在沟道边缘爬坡处易发生不良,影响性能,此外,源漏电极400断面处的金属离子容易扩散至IGZO600,污染IGZO600。源漏电极400一般较厚,图形化时线宽较难控制,沟道宽度易产生偏差。
发明内容
本发明的目的在于提供一种氧化物半导体TFT基板的制作方法,其降低了现有氧化物半导体TFT基板的制程难度,提升基板性能,提高生产良率,通过采用氧化物导体来定义氧化物半导体TFT基板的沟道及形成源极,使得沟道宽度可以制作得更小,从而减小TFT的尺寸,且沟道宽度更准确。
本发明的另一目的在于提供一种氧化物半导体TFT基板结构,采用氧化物导体定义TFT基板的沟道及形成源极,由于氧化物导体与氧化物半导体结构组成类似,因此可形成良好的欧姆接触;氧化物半导体层具有较好的爬坡,且氧化物导体不会给氧化物半导体层造成金属离子污染;由于氧化物导体是透明的,因此可提高开口率。
为实现上述目的,本发明提供一种氧化物半导体TFT基板的制作方法,包括如下步骤:
步骤1、提供一基板,在该基板上沉积并图案化第一金属层,形成栅极;
步骤2、在所述栅极与基板上沉积栅极绝缘层;
步骤3、在所述栅极绝缘层上形成漏极、源极及氧化物半导体层。
所述步骤3的具体操作为:
步骤31、在所述栅极绝缘层上沉积并图案化第二金属层,形成漏极4;
步骤32、在所述漏极与栅极绝缘层上沉积并图案化氧化物导体层,形成沟道及源极,所述漏极与氧化物导体层搭接;
步骤33、在所述漏极与源极上沉积并图案化氧化物半导体层,得到氧化物半导体层。
所述步骤3的具体操作为:
步骤311、在栅极绝缘层上沉积并图案化氧化物导体层,形成沟道及源极;
步骤312、在所述氧化物导体层和栅极绝缘层上沉积并图案化第二金属层,形成漏极,所述漏极与氧化物导体层搭接;
步骤313、在漏极与源极上沉积并图案化氧化物半导体层,得到氧化物半导体层。
所述图案化通过黄光与蚀刻制程实现。
所述基板为玻璃基板,所述氧化物半导体层为IGZO。
所述氧化物导体层为ITO或IZO,所述氧化物导体层的厚度小于漏极的厚度。
所述源极同时作为像素电极。
本发明还提供一种氧化物半导体TFT基板结构,包括:基板、位于基板上的栅极、位于基板和栅极上的栅极绝缘层、位于栅极绝缘层上的漏极与源极、所述漏极与源极之间的沟道、及位于漏极与源极上的氧化物半导体层。
所述沟道与源极由氧化物导体层定义而成。
所述氧化物导体层为ITO或IZO;所述氧化物导体层的厚度小于漏极的厚度;所述氧化物半导体层为IGZO;所述源极同时作为像素电极。
本发明的有益效果:本发明提供的氧化物半导体TFT基板的制作方法及结构,通过采用氧化物导体层来定义氧化物半导体TFT基板的沟道及源极,由于该氧化物导体层较薄,与现有技术相比,所述沟道的宽度可以制作得较小,并且沟道宽度可以得到准确控制,因此降低了氧化物半导体TFT基板的制程难度,提升了氧化物半导体TFT基板的性能,提高生产良率。本发明制得的氧化物半导体TFT基板结构中,由于氧化物导体层与氧化物半导体层结构组成类似,因此可形成良好的欧姆接触;氧化物半导体层具有较好的爬坡,且氧化物导体层不会给氧化物半导体层造成金属离子污染;由于氧化物导体层是透明的,因此可提高开口率。
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图说明
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其他有益效果显而易见。
附图中,
图1为一种现有氧化物半导体TFT基板结构的剖面示意图;
图2为另一种现有氧化物半导体TFT基板结构的剖面示意图;
图3为又一种现有氧化物半导体TFT基板结构的剖面示意图;
图4为本发明氧化物半导体TFT基板制作方法的示意流程图;
图5为本发明氧化物半导体TFT基板结构第一实施例的剖面示意图;
图6为本发明氧化物半导体TFT基板结构第二实施例的剖面示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请同时参阅图4与图5,为本发明氧化物半导体TFT基板的制作方法第一实施例,包括如下步骤:
步骤1、提供一基板1,在该基板1上沉积并图案化第一金属层,形成栅极2。
优选的,所述基板1为玻璃基板。
步骤2、在所述栅极2与基板1上沉积栅极绝缘层3。
所述栅极绝缘层3完全覆盖述栅极2与基板1。
步骤3、在所述栅极绝缘层3上沉积并图案化第二金属层,形成漏极4。
步骤4、在所述漏极4与栅极绝缘层3上沉积并图案化氧化物导体层,形成沟道51与源极5。
所述漏极4与氧化物导体层搭接。
所述氧化物导体层的厚度小于漏极4的厚度。所述氧化物导体层为ITO(氧化铟锡)或IZO(氧化铟锌)。优选的,所述氧化物导体层为ITO。所述源极5同时作为像素电极。
步骤5、在所述漏极4与源极5上沉积并图案化氧化物半导体层,得到氧化物半导体层6。
优选的,所述氧化物半导体层6为IGZO(铟镓锌氧化物)。
所述图案化通过黄光与蚀刻制程实现。
如图5所示,基于上述第一实施例的制作方法,本发明还提供一种氧化物半导体TFT基板结构,包括:基板1,位于基板1上的栅极2,位于基板1和栅极2上的栅极绝缘层3,位于栅极绝缘层3上的漏极4与源极5、所述漏极4与源极5之间的沟道51、及位于漏极4与源极5上的氧化物半导体层6。所述氧化物半导体层6填充该沟道51。
所述沟道51与源极4由氧化物导体层定义而成。
所述氧化物导体层的厚度小于漏极4的厚度。所述氧化物导体层为ITO或IZO。优选的,所述氧化物导体层为ITO。所述氧化物半导体层6为IGZO。所述源极5同时作为像素电极。
请同时参阅图4与图6,为本发明氧化物半导体TFT基板制作方法第二实施例,包括如下步骤:
步骤1、提供一基板1,在该基板1上沉积并图案化第一金属层,形成栅极2。
优选的,所述基板1为玻璃基板。
步骤2、在所述栅极2与基板1上沉积栅极绝缘层3。
步骤3、在栅极绝缘层3上沉积并图案化氧化物导体层,形成源极5与沟道51。
所述氧化物导体层为ITO或IZO。优选的,所述氧化物导体层为ITO。所述源极5同时作为像素电极。
步骤4、在所述氧化物导体层和栅极绝缘层3上沉积并图案化第二金属层,形成漏极4。
所述漏极4与氧化物导体层搭接。
所述氧化物导体层的厚度小于漏极4的厚度。
步骤5、在漏极4与源极5上沉积并图案化氧化物半导体层,得到氧化物半导体层6。
优选的,所述氧化物半导体层6为IGZO。
所述图案化通过黄光与蚀刻制程实现。
如图6所示,基于上述第二实施例的制作方法,本发明还提供一种氧化物半导体TFT基板结构,包括:基板1、位于基板1上的栅极2、位于基板1和栅极2上的栅极绝缘层3、位于栅极绝缘层3上的漏极4与源极5、所述漏极4与所述源极5之间的沟道51、及位于漏极4与源极5上的氧化物半导体层6。所述氧化物半导体层6填充该沟道51。
所述沟道51与源极4由氧化物导体层定义而成。
所述氧化物导体层的厚度小于漏极4的厚度。所述氧化物导体层为ITO或IZO。优选的,所述氧化物导体层为ITO。所述氧化物半导体层6为IGZO。所述源极5同时作为像素电极。
值得一提的是,本发明氧化物半导体TFT基板制作方法中的氧化物半导体层也可以用其他半导体代替,如a-Si,poly-Si半导体,有机半导体等。并且本发明氧化物半导体TFT基板结构可应用于LCD,OLED,EPD显示等等,并适用于非柔性或柔性显示等主动性显示应用领域,同时大中小尺寸显示器件也均可使用本发明的氧化物半导体TFT基板结构。
综上所述,本发明提供的氧化物半导体TFT基板的制作方法及结构,通过采用氧化物导体层来定义氧化物半导体TFT基板的沟道及源极,由于该氧化物导体层较薄,与现有技术相比,所述沟道的宽度可以制作得较小,并且沟道宽度可以得到准确控制,因此降低了氧化物半导体TFT基板的制程难度,提升了氧化物半导体TFT基板的性能,提高生产良率。本发明制得的氧化物半导体TFT基板结构中,由于氧化物导体层与氧化物半导体层结构组成类似,因此可形成良好的欧姆接触;氧化物半导体层具有较好的爬坡,且氧化物导体层不会给氧化物半导体层造成金属离子污染;由于氧化物导体层是透明的,因此可提高开口率。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。
Claims (9)
1.一种氧化物半导体TFT基板的制作方法,其特征在于,包括如下步骤:
步骤1、提供一基板(1),在该基板(1)上沉积并图案化第一金属层,形成栅极(2);
步骤2、在所述栅极(2)与基板(1)上沉积栅极绝缘层(3);
步骤3、在所述栅极绝缘层(3)上形成漏极(4)、源极(5)及氧化物半导体层(6);
所述步骤3的具体操作为:
步骤31、在所述栅极绝缘层(3)上沉积并图案化第二金属层,形成漏极(4);
步骤32、在所述漏极(4)与栅极绝缘层(3)上沉积并图案化氧化物导体层,形成沟道(51)及源极(5),所述漏极(4)与氧化物导体层搭接;所述氧化物导体层为ITO或IZO,所述氧化物导体层的厚度小于漏极(4)的厚度;
步骤33、在所述漏极(4)与源极(5)上沉积并图案化氧化物半导体层,得到氧化物半导体层(6)。
2.如权利要求1所述的氧化物半导体TFT基板的制作方法,其特征在于,所述图案化通过黄光与蚀刻制程实现。
3.如权利要求1所述的氧化物半导体TFT基板的制作方法,其特征在于,所述基板(1)为玻璃基板,所述氧化物半导体层(6)为IGZO。
4.如权利要求1所述的氧化物半导体TFT基板的制作方法,其特征在于,所述源极(5)同时作为像素电极。
5.一种氧化物半导体TFT基板的制作方法,其特征在于,包括如下步骤:
步骤1、提供一基板(1),在该基板(1)上沉积并图案化第一金属层,形成栅极(2);
步骤2、在所述栅极(2)与基板(1)上沉积栅极绝缘层(3);
步骤3、在所述栅极绝缘层(3)上形成漏极(4)、源极(5)及氧化物半导体层(6);
所述步骤3的具体操作为:
步骤311、在栅极绝缘层(3)上沉积并图案化氧化物导体层,形成沟道(51)及源极(5);
步骤312、在所述氧化物导体层和栅极绝缘层(3)上沉积并图案化第二金属层,形成漏极(4),所述漏极(4)与氧化物导体层搭接;所述氧化物导体层为ITO或IZO,所述氧化物导体层的厚度小于漏极(4)的厚度;
步骤313、在漏极(4)与源极(5)上沉积并图案化氧化物半导体层,得到氧化物半导体层(6)。
6.如权利要求5所述的氧化物半导体TFT基板的制作方法,其特征在于,所述图案化通过黄光与蚀刻制程实现。
7.如权利要求5所述的氧化物半导体TFT基板的制作方法,其特征在于,所述基板(1)为玻璃基板,所述氧化物半导体层(6)为IGZO。
8.如权利要求5所述的氧化物半导体TFT基板的制作方法,其特征在于,所述源极(5)同时作为像素电极。
9.一种氧化物半导体TFT基板结构,其特征在于,包括:基板(1)、位于基板(1)上的栅极(2)、位于基板(1)和栅极(2)上的栅极绝缘层(3)、位于栅极绝缘层(3)上的漏极(4)与源极(5)、所述漏极(4)与源极(5)之间的沟道(51)、及位于漏极(4)与源极(5)上的氧化物半导体层(6),所述沟道(51)与源极(5)由氧化物导体层定义而成;
所述氧化物导体层为ITO或IZO;所述氧化物导体层的厚度小于漏极(4)的厚度;所述氧化物半导体层(6)为IGZO;所述源极(5)同时作为像素电极。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410444172.8A CN104157701B (zh) | 2014-09-02 | 2014-09-02 | 氧化物半导体tft基板的制作方法及结构 |
PCT/CN2014/086884 WO2016033838A1 (zh) | 2014-09-02 | 2014-09-19 | 氧化物半导体tft基板的制作方法及结构 |
US14/426,989 US9793411B2 (en) | 2014-09-02 | 2014-09-19 | Manufacturing method and structure of oxide semiconductor TFT substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410444172.8A CN104157701B (zh) | 2014-09-02 | 2014-09-02 | 氧化物半导体tft基板的制作方法及结构 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104157701A CN104157701A (zh) | 2014-11-19 |
CN104157701B true CN104157701B (zh) | 2017-09-01 |
Family
ID=51883158
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410444172.8A Active CN104157701B (zh) | 2014-09-02 | 2014-09-02 | 氧化物半导体tft基板的制作方法及结构 |
Country Status (3)
Country | Link |
---|---|
US (1) | US9793411B2 (zh) |
CN (1) | CN104157701B (zh) |
WO (1) | WO2016033838A1 (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102629580B1 (ko) * | 2016-01-08 | 2024-01-26 | 삼성디스플레이 주식회사 | 플렉서블 터치 스크린 패널 및 플렉서블 터치 스크린 패널의 제조 방법 |
CN113451414B (zh) * | 2020-06-18 | 2022-07-29 | 重庆康佳光电技术研究院有限公司 | 一种薄膜晶体管器件及其制备方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103094354A (zh) * | 2013-01-28 | 2013-05-08 | 合肥京东方光电科技有限公司 | 阵列基板及其制造方法、显示装置 |
CN103413833A (zh) * | 2013-07-09 | 2013-11-27 | 复旦大学 | 一种柔性ZnO基薄膜晶体管及其制备方法 |
CN103984171A (zh) * | 2013-02-22 | 2014-08-13 | 上海天马微电子有限公司 | 一种阵列基板及其制造方法、液晶显示器 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100743101B1 (ko) * | 2001-05-07 | 2007-07-27 | 엘지.필립스 엘시디 주식회사 | 액정표시장치 및 그 제조방법과 이를 이용한 화소리페어방법 |
KR100647710B1 (ko) * | 2005-10-21 | 2006-11-23 | 삼성에스디아이 주식회사 | 박막 트랜지스터, 이의 제조 방법 및 이를 구비한 평판표시 장치 |
KR20080066150A (ko) * | 2007-01-11 | 2008-07-16 | 엘지전자 주식회사 | 투명산화물 박막트랜지스터 제조방법 |
WO2011027649A1 (en) * | 2009-09-02 | 2011-03-10 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device including a transistor, and manufacturing method of semiconductor device |
TWI476931B (zh) * | 2010-10-21 | 2015-03-11 | Au Optronics Corp | 薄膜電晶體與具有此薄膜電晶體的畫素結構 |
US8486284B2 (en) * | 2010-11-17 | 2013-07-16 | Kai-Ti Yang | Method for forming a touch sensing pattern and signal wires |
CN102157563B (zh) * | 2011-01-18 | 2012-09-19 | 上海交通大学 | 金属氧化物薄膜晶体管制备方法 |
CN103268918B (zh) * | 2012-06-29 | 2016-06-29 | 上海天马微电子有限公司 | 双极性薄膜晶体管及其制造方法 |
EP2905768A4 (en) * | 2012-10-02 | 2015-10-14 | Sharp Kk | SEMICONDUCTOR DEVICE AND DISPLAY DEVICE |
JP6034980B2 (ja) * | 2013-11-18 | 2016-11-30 | シャープ株式会社 | 半導体装置 |
CN103779427B (zh) * | 2014-02-26 | 2016-06-29 | 华南理工大学 | 一种氧化物薄膜晶体管及其制备方法 |
-
2014
- 2014-09-02 CN CN201410444172.8A patent/CN104157701B/zh active Active
- 2014-09-19 WO PCT/CN2014/086884 patent/WO2016033838A1/zh active Application Filing
- 2014-09-19 US US14/426,989 patent/US9793411B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103094354A (zh) * | 2013-01-28 | 2013-05-08 | 合肥京东方光电科技有限公司 | 阵列基板及其制造方法、显示装置 |
CN103984171A (zh) * | 2013-02-22 | 2014-08-13 | 上海天马微电子有限公司 | 一种阵列基板及其制造方法、液晶显示器 |
CN103413833A (zh) * | 2013-07-09 | 2013-11-27 | 复旦大学 | 一种柔性ZnO基薄膜晶体管及其制备方法 |
Also Published As
Publication number | Publication date |
---|---|
WO2016033838A1 (zh) | 2016-03-10 |
US20160247926A1 (en) | 2016-08-25 |
US9793411B2 (en) | 2017-10-17 |
CN104157701A (zh) | 2014-11-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10403757B2 (en) | Top-gate self-aligned metal oxide semiconductor TFT and method of making the same | |
CN104241298B (zh) | Tft背板结构及其制作方法 | |
CN104241299B (zh) | 氧化物半导体tft基板的制作方法及结构 | |
US9768202B2 (en) | TFT backplate structure comprising transistors having gate isolation layers of different thicknesses and manufacture method thereof | |
US9401418B2 (en) | Method of manufacturing thin film transistor and organic light emitting diode display | |
CN107978607B (zh) | 背沟道蚀刻型氧化物半导体tft基板的制作方法 | |
US20160240687A1 (en) | Manufacturing method and structure of oxide thin film transistor | |
US20160240567A1 (en) | Manufacturing method of thin film transistor substrate | |
WO2016026178A1 (zh) | 氧化物半导体tft基板的制作方法及其结构 | |
CN104157701B (zh) | 氧化物半导体tft基板的制作方法及结构 | |
US10714514B2 (en) | Back-channel-etched TFT substrate | |
KR101831080B1 (ko) | 박막 트랜지스터 기판의 제조 방법 및 이를 이용하여 제조된 박막 트랜지스터 기판 | |
US10109659B2 (en) | TFT backplate structure comprising transistors having gate isolation layers of different thicknesses and manufacture method thereof | |
US9614036B2 (en) | Manufacture method of TFT substrate and sturcture thereof | |
Ryu et al. | P‐41: Investigation of the Photon‐Enhanced Bias Instability of InGaZnO TFTs for the Application of Transparent AM‐OLED Displays | |
US9899421B2 (en) | Manufacture method of TFT substrate and sturcture thereof | |
KR101595309B1 (ko) | 주석 금속 타겟을 이용한 주석산화물층의 형성 방법 | |
US10109651B2 (en) | Manufacture method of TFT substrate and sturcture thereof | |
US20140203274A1 (en) | Tft structure, lcd device, and method for manufacturing tft |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |