CN103633044A - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
- Publication number
- CN103633044A CN103633044A CN201310371333.0A CN201310371333A CN103633044A CN 103633044 A CN103633044 A CN 103633044A CN 201310371333 A CN201310371333 A CN 201310371333A CN 103633044 A CN103633044 A CN 103633044A
- Authority
- CN
- China
- Prior art keywords
- semiconductor
- hole
- semiconductor subassembly
- semiconductor device
- subassembly
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 138
- 239000000758 substrate Substances 0.000 claims abstract description 23
- 239000011347 resin Substances 0.000 claims abstract description 11
- 229920005989 resin Polymers 0.000 claims abstract description 11
- 239000011810 insulating material Substances 0.000 claims description 4
- 238000009413 insulation Methods 0.000 claims description 3
- 238000007789 sealing Methods 0.000 abstract 1
- 230000000052 comparative effect Effects 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- CHPZKNULDCNCBW-UHFFFAOYSA-N gallium nitrate Chemical compound [Ga+3].[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O CHPZKNULDCNCBW-UHFFFAOYSA-N 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 206010027439 Metal poisoning Diseases 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 229940044658 gallium nitrate Drugs 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/071—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next and on each other, i.e. mixed assemblies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/074—Stacked arrangements of non-apertured devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
本发明涉及一种半导体装置。从半导体组件(1)的上表面朝向下表面设有贯通孔(8)。在该贯通孔(8)插入有电极棒(11)。在半导体组件(1)中,在绝缘衬底(2)上配置有半导体芯片(3)。电极图案(4)配置于绝缘衬底(2)上,连接于半导体芯片(3)。树脂(7)密封绝缘衬底(2)、半导体芯片(3)以及电极图案(4)。电极部(9)配置于贯通绝缘衬底(2)以及树脂(7)的贯通孔(8)的内壁,连接于电极图案(4)。插入贯通孔(8)的电极棒(11)连接于电极部(9)。从而获得布局的自由度高、耐压高且小型化的半导体装置。
Description
技术领域
本发明涉及连接多个半导体组件(package)的半导体装置。
背景技术
通过并联连接相同构造的多个半导体组件,能够根据产品而变更电容量。在现有的半导体装置中,将多个半导体组件平面地排列。
现有技术文献
专利文献
专利文献1:日本特开平4-280667号公报。
发明内容
当将多个半导体组件平面地排列时,兼用于半导体组件的固定的散热片变大。另外,由于引线配置于半导体组件的侧面,故必须采用考虑引线位置的布局。另外,由于需要固定半导体组件的端子的台、用于固定该台的空间,故装置大型化。
提案有重叠多个半导体组件并将引线插入设于它们的贯通孔的装置(例如,参照专利文献1)。然而,由于在未树脂密封的绝缘衬底存在贯通孔,故存在与其他电极的沿面距离短而耐性低的问题。
本发明为了解决如上所述的问题而完成,其目的在于获得布局的自由度高、耐压高且小型化的半导体装置。
本发明所涉及的半导体装置具备:半导体组件,从上表面朝向下表面设有贯通孔;以及电极棒,插入所述半导体组件的所述贯通孔,所述半导体组件具有:绝缘衬底;半导体芯片,配置于所述绝缘衬底上;电极图案,配置于所述绝缘衬底上并与所述半导体芯片连接;树脂,密封所述绝缘衬底、所述半导体芯片以及所述电极图案;以及电极部,配置于贯通所述绝缘衬底以及所述树脂的所述贯通孔的内壁并与所述电极图案连接,插入所述贯通孔的所述电极棒与所述电极部连接。
根据本发明,能够获得布局的自由度高、耐压高且小型化的半导体装置。
附图说明
图1是示出本发明的实施方式1所涉及的半导体组件的剖视图;
图2是示出本发明的实施方式1所涉及的半导体装置的立体图;
图3是示出本发明的实施方式1所涉及的半导体装置的剖视图;
图4是示出比较例所涉及的半导体装置的立体图;
图5是示出比较例所涉及的半导体装置的剖视图;
图6是示出本发明的实施方式2所涉及的半导体装置的剖视图;
图7是示出本发明的实施方式3所涉及的半导体装置的剖视图;
图8是示出本发明的实施方式4所涉及的半导体装置的立体图;
图9是示出本发明的实施方式4所涉及的半导体装置的剖视图;
图10是示出本发明的实施方式5所涉及的半导体装置的立体图;
图11是示出本发明的实施方式5所涉及的半导体装置的剖视图;
图12是示出本发明的实施方式6所涉及的半导体装置的立体图;
图13是示出本发明的实施方式6所涉及的半导体装置的剖视图;
图14是示出本发明的实施方式7所涉及的半导体装置的剖视图;
图15是示出本发明的实施方式8所涉及的半导体装置的剖视图;
图16是示出本发明的实施方式9所涉及的半导体装置的剖视图。
具体实施方式
参照附图说明本发明的实施方式所涉及的半导体装置。有时对相同或对应构成要素附以相同符号,省略说明的重复。
实施方式1.
图1是示出本发明的实施方式1所涉及的半导体组件的剖视图。在半导体组件1内,在绝缘衬底2上配置有IGBT(绝缘栅双极晶体管:Insulated Gate Bipolar Transistor)、二极管等半导体芯片3。电极图案4配置于绝缘衬底2上,通过导线5连接于半导体芯片3。此外,还可替代导线5使用板状的电极。在绝缘衬底2的背面配置有散热绝缘板6。树脂7密封绝缘衬底2、半导体芯片3、电极图案4以及导线5。
从半导体组件1的上表面朝向下表面设有贯通孔8。该贯通孔8贯通绝缘衬底2以及树脂7。电极部9配置于贯通孔8的内壁,连接于电极图案4。在贯通孔8的上端以及下端处在贯通孔8的周围设有绝缘材料10。
图2以及图3分别是示出本发明的实施方式1所涉及的半导体装置的立体图以及剖视图。电极棒11插入半导体组件1的贯通孔8,在半导体组件1内部连接于电极部9。散热器(heat spreader)12配置于半导体组件1的下表面。绝缘材料10配置于贯通孔8的下方,将电极棒11与散热器12绝缘。
电极棒11经由电极部9和电极图案4而连接于半导体芯片3,构成电路。能够经由该电极棒11对半导体芯片3供应电力。而且,利用电极棒11电气性、机械性接合多个半导体组件1,从而能够根据产品而变更电容量。
接下来,与比较例进行比较并说明本实施方式的效果。图4以及图5分别是示出比较例所涉及的半导体装置的立体图以及剖视图。在比较例中,由于将多个半导体组件1平面地排列,故还兼用于半导体组件1的固定的散热片13变大。另外,由于在半导体组件1的侧面配置引线14,故必须采用考虑引线位置的布局。另外,由于需要固定半导体组件1的端子15的台16、用于固定该台16的空间,故装置大型化。
相对于此,在本实施方式中,三维地组装多个半导体组件1,将电极棒11插入半导体组件1的贯通孔8并相互电气性、机械性接合。因此,能够将装置小型化,布局的自由度高。
另外,在本实施方式中,电极部9配置于贯通绝缘衬底2以及树脂7的贯通孔8的内壁。从而,与电极棒11连接的电极部9配置于半导体组件1的树脂7的内部,与其他电极的沿面距离长,耐压高。
实施方式2.
图6是示出本发明的实施方式2所涉及的半导体装置的剖视图。三个半导体组件1朝向相同方向而重合,在它们的贯通孔8插入有电极棒11。由此,为了提高容量,构成三个半导体组件1电气性、机械性接合的功率器件。
实施方式3.
图7是示出本发明的实施方式3所涉及的半导体装置的剖视图。两个半导体组件1排列于同一平面,在两个半导体组件1的贯通孔8插入有U字形的电极棒11。由此,为了提高容量,构成两个半导体组件1电气性、机械性接合的功率器件。
实施方式4.
图8以及图9分别是示出本发明的实施方式4所涉及的半导体装置的立体图以及剖视图。两个半导体组件1的上表面彼此相对。在两个半导体组件1的下表面分别配置有散热器12。在两个半导体组件1的贯通孔8插入有电极棒11。由此,为了提高容量,构成两个半导体组件1电气性、机械性接合的功率器件。
实施方式5.
图10以及图11分别是示出本发明的实施方式5所涉及的半导体装置的立体图以及剖视图。电极棒11不从装置的上下表面露出,连接于电极棒11的板状的端子15从两个半导体组件1的上表面彼此之间引出。通过该端子15,能够与其他装置电连接。另外,由于两个半导体组件1的上表面彼此紧贴而不存在组件间的空间,故能够确保左右的端子15间的电气性沿面、空间距离。
实施方式6.
图12以及图13分别是示出本发明的实施方式6所涉及的半导体装置的立体图以及剖视图。在将两个半导体组件1重叠的单元排列两个的状态下,两个单元通过端子15而连接。是通过它们的整体的构成而发挥一个功能的功率模块。
实施方式7.
图14是示出本发明的实施方式7所涉及的半导体装置的剖视图。两个半导体组件1的下表面彼此相对。在两个半导体组件1的下表面彼此之间配置了水冷片等散热片13的状态下,在两个半导体组件1的贯通孔8插入有电极棒11。由此,为了提高容量,构成两个半导体组件1电气性、机械性接合的功率器件。而且,能够将因大容量化而产生的热通过散热片13进行排热。
实施方式8.
图15是示出本发明的实施方式8所涉及的半导体装置的剖视图。在包含两个半导体组件1和散热片13的单元重叠两个的状态下,在各个单元的半导体组件1的贯通孔8插入有电极棒11。是通过它们的整体的构成而发挥一个功能的功率器件。
实施方式9.
图16是示出本发明的实施方式9所涉及的半导体装置的剖视图。在两个半导体组件1重叠的单元排列两个的状态下,两个单元通过一片散热片13而连接。是通过它们的整体的构成而发挥一个功能的功率器件。
此外,半导体芯片3不限于由硅形成的芯片,还可以是由与硅相比带隙大的宽带隙半导体形成的芯片。宽带隙半导体例如为碳化硅、氮化镓类材料、或者钻石。由此种宽带隙半导体形成的半导体芯片3由于耐电压性、容许电流密度高,故能够小型化。通过使用该小型化的元件,还能够将装入了该元件的半导体装置小型化。另外,由于元件的耐热性高,故能够将散热器12、散热片13小型化,能够将水冷部气冷化,因此能够将半导体模块进一步小型化。另外,由于元件的电力损耗低,效率高,故能够将半导体装置高效率化。
附图标记说明
1 半导体组件;2 绝缘衬底;3 半导体芯片;4 电极图案;7 树脂;8 贯通孔;9 电极部;10 绝缘材料;11 电极棒;12 散热器;13 散热片;15 端子。
Claims (10)
1. 一种半导体装置,其特征在于,具备:
半导体组件,从上表面朝向下表面设有贯通孔;以及
电极棒,插入所述半导体组件的所述贯通孔,
所述半导体组件具有:
绝缘衬底;
半导体芯片,配置于所述绝缘衬底上;
电极图案,配置于所述绝缘衬底上并与所述半导体芯片连接;
树脂,密封所述绝缘衬底、所述半导体芯片以及所述电极图案;以及
电极部,配置于贯通所述绝缘衬底以及所述树脂的所述贯通孔的内壁并与所述电极图案连接,
插入所述贯通孔的所述电极棒与所述电极部连接。
2. 如权利要求1所述的半导体装置,其特征在于,还具备:
散热器,配置于所述半导体组件的下表面;以及
绝缘材料,配置于所述贯通孔的下方,将所述电极棒与所述散热器绝缘。
3. 如权利要求1或2所述的半导体装置,其特征在于:
所述半导体组件具有重合的多个半导体组件,
在所述多个半导体组件的所述贯通孔插入有所述电极棒。
4. 如权利要求1或2所述的半导体装置,其特征在于:
所述半导体组件具有排列于同一平面的第一以及第二半导体组件,
在所述第一以及第二半导体组件的所述贯通孔插入有U字形的所述电极棒。
5. 如权利要求1所述的半导体装置,其特征在于:
所述半导体组件具有上表面彼此相对的第一以及第二半导体组件,
在所述第一以及第二半导体组件的下表面分别配置有散热器,
在所述第一以及第二半导体组件的所述贯通孔插入有所述电极棒。
6. 如权利要求5所述的半导体装置,其特征在于,还具备:
端子,连接于所述电极棒,从所述第一以及第二半导体组件的上表面彼此之间引出。
7. 如权利要求6所述的半导体装置,其特征在于:
在包含所述第一以及第二半导体组件的单元排列两个的状态下,两个单元通过所述端子而连接。
8. 如权利要求1所述的半导体装置,其特征在于:
所述半导体组件具有下表面彼此相对的第一以及第二半导体组件,
所述第一以及第二半导体组件的所述下表面彼此之间配置了散热片的状态下,在所述第一以及第二半导体组件的所述贯通孔插入有所述电极棒。
9. 如权利要求8所述的半导体装置,其特征在于:
在包含所述第一以及第二半导体组件和所述散热片的单元重叠多个的状态下,在各单元的所述第一以及第二半导体组件的所述贯通孔插入有所述电极棒。
10. 如权利要求8所述的半导体装置,其特征在于:
在包含所述第一以及第二半导体组件的单元排列两个的状态下,两个单元通过所述散热片而连接。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012-185354 | 2012-08-24 | ||
JP2012185354A JP5831401B2 (ja) | 2012-08-24 | 2012-08-24 | 半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN103633044A true CN103633044A (zh) | 2014-03-12 |
Family
ID=50069746
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201310371333.0A Pending CN103633044A (zh) | 2012-08-24 | 2013-08-23 | 半导体装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US9171772B2 (zh) |
JP (1) | JP5831401B2 (zh) |
CN (1) | CN103633044A (zh) |
DE (1) | DE102013210972B4 (zh) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106463481A (zh) * | 2015-04-28 | 2017-02-22 | 新电元工业株式会社 | 半导体模块以及半导体模块的制造方法 |
CN108701687A (zh) * | 2016-02-03 | 2018-10-23 | 新电元工业株式会社 | 半导体装置以及半导体装置的制造方法 |
CN109196637A (zh) * | 2016-06-01 | 2019-01-11 | 三菱电机株式会社 | 半导体装置 |
CN109801900A (zh) * | 2019-01-15 | 2019-05-24 | 海安市高童自动化科技有限公司 | 一种电力用逆变电路装置 |
CN109817590A (zh) * | 2017-11-22 | 2019-05-28 | 三菱电机株式会社 | 半导体装置 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2014127582A (ja) * | 2012-12-26 | 2014-07-07 | Toyota Motor Corp | 半導体モジュール |
JP6432461B2 (ja) * | 2015-07-21 | 2018-12-05 | 株式会社デンソー | 電子装置 |
JP6540324B2 (ja) * | 2015-07-23 | 2019-07-10 | 富士電機株式会社 | 半導体モジュール及び半導体モジュールの製造方法 |
WO2019087540A1 (ja) * | 2017-10-30 | 2019-05-09 | 住友電気工業株式会社 | 半導体モジュール |
CN112086413B (zh) * | 2019-06-14 | 2024-04-23 | Jmj韩国株式会社 | 半导体封装 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04280667A (ja) * | 1991-03-08 | 1992-10-06 | Hitachi Ltd | 高集積半導体装置 |
US20090250800A1 (en) * | 2007-09-28 | 2009-10-08 | Masahiko Harayama | Semiconductor device and manufacturing method therefor |
CN101599484A (zh) * | 2008-06-05 | 2009-12-09 | 三菱电机株式会社 | 树脂密封型半导体装置及其制造方法 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3129928B2 (ja) * | 1995-03-30 | 2001-01-31 | シャープ株式会社 | 樹脂封止型半導体装置 |
JP2001077301A (ja) * | 1999-08-24 | 2001-03-23 | Amkor Technology Korea Inc | 半導体パッケージ及びその製造方法 |
US6577013B1 (en) * | 2000-09-05 | 2003-06-10 | Amkor Technology, Inc. | Chip size semiconductor packages with stacked dies |
US6448506B1 (en) * | 2000-12-28 | 2002-09-10 | Amkor Technology, Inc. | Semiconductor package and circuit board for making the package |
US6476476B1 (en) | 2001-08-16 | 2002-11-05 | Amkor Technology, Inc. | Integrated circuit package including pin and barrel interconnects |
US7057269B2 (en) * | 2002-10-08 | 2006-06-06 | Chippac, Inc. | Semiconductor multi-package module having inverted land grid array (LGA) package stacked over ball grid array (BGA) package |
US7141884B2 (en) | 2003-07-03 | 2006-11-28 | Matsushita Electric Industrial Co., Ltd. | Module with a built-in semiconductor and method for producing the same |
JP2005039227A (ja) | 2003-07-03 | 2005-02-10 | Matsushita Electric Ind Co Ltd | 半導体内蔵モジュールとその製造方法 |
JP4438489B2 (ja) | 2004-04-13 | 2010-03-24 | 富士電機システムズ株式会社 | 半導体装置 |
US8389867B2 (en) * | 2005-09-30 | 2013-03-05 | Ibiden Co., Ltd. | Multilayered circuit substrate with semiconductor device incorporated therein |
JP4455488B2 (ja) | 2005-12-19 | 2010-04-21 | 三菱電機株式会社 | 半導体装置 |
US7378726B2 (en) | 2005-12-28 | 2008-05-27 | Intel Corporation | Stacked packages with interconnecting pins |
US7656031B2 (en) | 2007-02-05 | 2010-02-02 | Bridge Semiconductor Corporation | Stackable semiconductor package having metal pin within through hole of package |
KR100881400B1 (ko) * | 2007-09-10 | 2009-02-02 | 주식회사 하이닉스반도체 | 반도체 패키지 및 이의 제조 방법 |
JP4576448B2 (ja) | 2008-07-18 | 2010-11-10 | 三菱電機株式会社 | 電力用半導体装置 |
JP5260246B2 (ja) | 2008-11-28 | 2013-08-14 | 三菱電機株式会社 | 電力用半導体装置 |
KR101078737B1 (ko) * | 2009-08-10 | 2011-11-02 | 주식회사 하이닉스반도체 | 적층 반도체 패키지 |
JP5742304B2 (ja) | 2011-03-07 | 2015-07-01 | カシオ計算機株式会社 | 鍵盤楽器 |
CN102820267A (zh) | 2011-06-10 | 2012-12-12 | 钰桥半导体股份有限公司 | 插销式半导体封装堆栈结构 |
-
2012
- 2012-08-24 JP JP2012185354A patent/JP5831401B2/ja not_active Expired - Fee Related
-
2013
- 2013-03-14 US US13/827,669 patent/US9171772B2/en not_active Expired - Fee Related
- 2013-06-12 DE DE102013210972.5A patent/DE102013210972B4/de active Active
- 2013-08-23 CN CN201310371333.0A patent/CN103633044A/zh active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04280667A (ja) * | 1991-03-08 | 1992-10-06 | Hitachi Ltd | 高集積半導体装置 |
US20090250800A1 (en) * | 2007-09-28 | 2009-10-08 | Masahiko Harayama | Semiconductor device and manufacturing method therefor |
CN101599484A (zh) * | 2008-06-05 | 2009-12-09 | 三菱电机株式会社 | 树脂密封型半导体装置及其制造方法 |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106463481A (zh) * | 2015-04-28 | 2017-02-22 | 新电元工业株式会社 | 半导体模块以及半导体模块的制造方法 |
CN106463481B (zh) * | 2015-04-28 | 2019-11-08 | 新电元工业株式会社 | 半导体模块以及半导体模块的制造方法 |
CN108701687A (zh) * | 2016-02-03 | 2018-10-23 | 新电元工业株式会社 | 半导体装置以及半导体装置的制造方法 |
CN109196637A (zh) * | 2016-06-01 | 2019-01-11 | 三菱电机株式会社 | 半导体装置 |
CN109196637B (zh) * | 2016-06-01 | 2022-02-18 | 三菱电机株式会社 | 半导体装置 |
CN109817590A (zh) * | 2017-11-22 | 2019-05-28 | 三菱电机株式会社 | 半导体装置 |
CN109817590B (zh) * | 2017-11-22 | 2023-06-09 | 三菱电机株式会社 | 半导体装置 |
CN109801900A (zh) * | 2019-01-15 | 2019-05-24 | 海安市高童自动化科技有限公司 | 一种电力用逆变电路装置 |
CN109801900B (zh) * | 2019-01-15 | 2021-10-29 | 江苏双聚智能装备制造有限公司 | 一种电力用逆变电路装置 |
Also Published As
Publication number | Publication date |
---|---|
DE102013210972B4 (de) | 2019-04-18 |
JP2014045010A (ja) | 2014-03-13 |
US20140054751A1 (en) | 2014-02-27 |
US9171772B2 (en) | 2015-10-27 |
DE102013210972A1 (de) | 2014-02-27 |
JP5831401B2 (ja) | 2015-12-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103633044A (zh) | 半导体装置 | |
US9917031B2 (en) | Semiconductor device, and method for assembling semiconductor device | |
US10262948B2 (en) | Semiconductor module having outflow prevention external terminals | |
US9966344B2 (en) | Semiconductor device with separated main terminals | |
KR101443972B1 (ko) | 일체형 전력 반도체 모듈 | |
US11139297B2 (en) | Circuit arrangement, redistribution board, module and method of fabricating a half-bridge circuit | |
JP2014143373A (ja) | 半導体装置および半導体装置の製造方法 | |
US10361136B2 (en) | Semiconductor device and semiconductor module provided with same | |
CN105814682B (zh) | 半导体装置 | |
CN102201402A (zh) | 半导体装置 | |
KR102586458B1 (ko) | 반도체 서브 어셈블리 및 반도체 파워 모듈 | |
US11303222B2 (en) | Multiphase inverter apparatus | |
JP5904041B2 (ja) | 半導体装置 | |
US10950526B2 (en) | Semiconductor device | |
US20230146272A1 (en) | Semiconductor apparatus | |
CN105247675A (zh) | 半导体装置 | |
CN218647940U (zh) | 一种功率模块 | |
CN218647917U (zh) | 一种功率模块 | |
CN219497779U (zh) | 半导体功率模块、电机控制器和车辆 | |
KR102499825B1 (ko) | 패키지형 전력 반도체 장치 | |
CN212750873U (zh) | 一种智能功率模块及家用电器 | |
CN202564281U (zh) | 半导体模块 | |
CN220510011U (zh) | 智能功率模块和具有其的电子设备 | |
CN116666341B (zh) | 智能功率模块和具有其的电子设备 | |
JP2012238737A (ja) | 半導体モジュール及びその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20140312 |