CN105814682B - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN105814682B
CN105814682B CN201580003023.0A CN201580003023A CN105814682B CN 105814682 B CN105814682 B CN 105814682B CN 201580003023 A CN201580003023 A CN 201580003023A CN 105814682 B CN105814682 B CN 105814682B
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circuit board
insulating substrate
encapsulating material
pattern
semiconductor chip
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CN105814682A (zh
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西岛贵弘
香月尚
传田俊男
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Fuji Electric Co Ltd
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Abstract

半导体装置(1)具备:依次层叠金属板(3)、绝缘树脂板(4)、电路板(5)而构成的绝缘基板(2);固定于绝缘基板(2)的电路板(5)的半导体元件(6);与设置于半导体元件(6)的表面的电极或绝缘基板的电路板连接的配线部件(8);收纳绝缘基板(2)、半导体元件(6)和配线部件(8)的框体(10);以及将收纳在框体(10)内的绝缘基板(2)、半导体元件(6)和配线部件(8)密封的包含热固性树脂的封装材料(13)。绝缘基板(2)的电路板(5)是将电路用图案(5A)与封装材料密合用图案(5B)组合,并选择性地形成在绝缘树脂板上而成。

Description

半导体装置
技术领域
本发明涉及半导体装置。
背景技术
作为半导体装置,已知有将1个或2个以上的功率半导体元件(半导体芯片)内置于壳体内,并用封装材料密封壳体内而得到的功率半导体模块。对功率半导体模块的一个例子的构成进行说明,功率半导体元件搭载在绝缘基板上。绝缘基板由金属板、形成在金属板的一个表面的绝缘树脂板、和通过在该绝缘树脂板上选择性地形成有导电性金属箔,例如铜箔而形成预定的电路的电路板构成。金属板由例如导电性良好的铜箔构成。另外,绝缘树脂板由绝缘性的树脂构成。
在绝缘基板的电路板,利用焊料固定有功率半导体元件,由此将设置于功率半导体元件的一面的电极和电路板电连接。另外,利用键合线等将设置于功率半导体元件的另一面的电极、电路板、与外部连接的端子等电连接。
功率半导体芯片被收纳于框体。另外,在框体内注入有覆盖功率半导体芯片和键合线,且由热固性树脂构成的封装材料,由此对框体内的半导体芯片、键合线、电路板等进行保护和绝缘。
由热固性树脂构成的封装材料与绝缘基板的电路板的密合性比由热固性树脂构成的封装材料与绝缘树脂板的密合性低。另外,封装材料的热膨胀系数与电路板的热膨胀系数不同。因此,由于使功率半导体芯片动作时的反复发热,可能导致封装材料从与绝缘基板的电路板的界面剥离。如果封装材料从电路板的剥离扩大并到达键合线的接合部,则可能对键合线的接合状态造成影响。
已知有为了提高封装材料与绝缘基板的电路板的密合性,而在固定了半导体芯片的电路板的表面的半导体芯片搭载区域以外的部分形成了多个微小凹部的半导体装置(专利文献1)。
现有技术文献
专利文献
专利文献1:日本特开2004-186662号公报
发明内容
技术问题
然而,在电路板的表面形成多个微小凹部很繁琐,导致制造成本增加,生产效率下降。
因此,本发明的目的在于提供有利地解决上述问题,能够提高绝缘基板的电路板与包含热固性树脂的封装材料的密合性的半导体装置。
技术方案
本发明的半导体装置的实施形态具备:绝缘基板,依次层叠金属板、绝缘树脂板、电路板而构成;半导体元件,固定于上述绝缘基板的电路板;配线部件,与设置于上述半导体元件的表面的电极或上述绝缘基板的电路板连接;框体,收纳上述绝缘基板、半导体元件和配线部件;以及封装材料,将收纳于上述框体内的上述绝缘基板、半导体元件和配线部件密封并包含热固性树脂。上述绝缘基板的电路板是将电路用图案与封装材料密合用图案组合,并选择性地形成在上述绝缘树脂板上而成的。
发明效果
根据上述的实施形态,绝缘基板的电路板是通过电路用图案与封装材料密合用图案的组合而选择性地形成的,在设置有封装材料密合用图案的部分中封装材料与绝缘基板的绝缘树脂板接触,因此与同电路板接触的现有的半导体装置相比,能够提高密合性,进而能够阻止剥离扩展到键合线的接合部。
附图说明
图1是本发明的一个实施方式的半导体装置的示意性截面图。
图2是本发明的一个实施方式的半导体装置的俯视图。
图3是图2的半导体装置的绝缘基板的俯视图。
图4是针对绝缘树脂板中使用的绝缘树脂与电路板中使用的铜箔,研究与封装材料中使用的热固性树脂的密合强度而得的图表。
图5是现有的半导体装置的一个例子的俯视图。
图6是图5的半导体装置的绝缘基板的俯视图。
符号说明
1:半导体装置
2:绝缘基板
3:金属板
4:绝缘树脂板
5:电路板
5A:电路用图案
5B:封装材料密合用图案
6:半导体芯片(半导体元件)
7:焊料
8:键合线(配线部件)
10:壳体(框体)
13:封装材料
具体实施方式
以下,参照附图对本发明的半导体装置的实施方式进行具体说明。
图1是本发明的一个实施方式的半导体装置的示意性截面图,图2是本实施方式的半导体装置的俯视图,图3是图2的半导体装置的绝缘基板的俯视图。图1(a)表示由图2的IA-IA线表示的截面的示意图,图1(b)表示由图2的IB-IB线表示的截面的示意图。
本实施方式的半导体装置1具备绝缘基板2,在绝缘基板2上,利用作为接合材料的焊料7固定有半导体芯片6。绝缘基板2由金属板3、层叠在金属板3的一个表面上的绝缘树脂板4和层叠在绝缘树脂板4上的电路板5构成。
绝缘基板2的金属板3由铝、铜等热传导性良好的金属材料构成。绝缘树脂板4由绝缘树脂构成。绝缘树脂板4只要是具有绝缘性的树脂,就不特别限定材料,但为了半导体芯片6的散热,优选热传导性好的树脂。具体而言,绝缘基板2的绝缘树脂板4可以使用作为热传导性好的材料的液晶聚合物和/或与后述的封装材料13的材料相同的环氧树脂等。通过将这些树脂涂布在金属板3上,从而能够形成绝缘树脂板4。
绝缘基板2的电路板5由铜等导电性良好的金属材料构成,以构成预定的电路的方式在绝缘树脂板4的一个表面上选择性地形成有导电性金属箔,例如铜箔。在电路板5的一个表面,借由焊料7接合有半导体芯片6。在半导体芯片6的周围的电路板5侧形成有焊料7的焊脚(fillet)7a。另外,在电路板5的一个表面接合有作为配线部件的键合线8的一端。另外,在电路板5的一个表面也接合有其它电子部件,例如电容器芯片等。
半导体芯片6是例如二极管芯片、功率MOSFET芯片和/或IGBT(绝缘栅双极晶体管)芯片。不特别限定半导体芯片的种类。在绝缘基板2的电路板5上具有多个半导体芯片6的情况下,可以是相同种类的半导体芯片,也可以是不同种类的半导体芯片的组合。在半导体芯片6是纵向型的半导体元件的情况下,在对置的两个主面分别设有电极。一个主面的电极借由焊料7与电路板5电连接。在另一个主面的电极接合有键合线8的一端。应予说明,半导体芯片6不限于纵向型的半导体元件,可以是横向型的半导体元件。
图1、图2中示出的键合线8由铝、铝合金等导电性细线构成。当然配线部件不限于键合线8,例如可以是母线,另外,也可以是导电柱与配线基板(例如印刷电路基板)的组合。
绝缘基板2、半导体芯片6和键合线8被收纳于壳体10。壳体10一体地具备用于与外部电连接的引线11。在本实施方式的半导体装置1中,引线11以从壳体10的内表面侧延伸到比外表面更靠外侧的方式设置。在壳体10的内表面侧,引线11的一端接合有与半导体芯片6、绝缘基板2的电路板5接合或连接的键合线8的另一端。
壳体10由绝缘树脂等构成。壳体10的下端部通过绝缘性粘接剂12与绝缘基板2的金属板3和绝缘树脂板4的周边部接合。由此,确保绝缘基板2与壳体10的绝缘性,并且消除绝缘基板2与壳体10之间的间隙,防止封装材料13从间隙向外部漏出。
通过从壳体10的上端向中空空间填充封装材料13,从而将绝缘基板2的电路板5、半导体芯片6和键合线8密封。封装材料13由环氧树脂等热固性树脂构成,优选耐热性高且绝缘性高的封装材料。
图1(a)、图1(b)表示本实施方式的半导体装置1的截面的示意图。图2表示图1所示的本实施方式的半导体装置1的俯视图。
在图1(a)中,半导体芯片61、62被搭载于一个电路板5,电路板5与引线11(附图左侧)通过键合线8连接。接合到半导体芯片61的另一个主面的键合线8与搭载半导体芯片63的电路板5接合,另外,接合到半导体芯片62的另一个主面的键合线8与搭载半导体芯片64的电路板5接合。
在图1(b)中,半导体芯片63、64被邻接配置,并被分别搭载于电绝缘的电路板5。接合到半导体芯片63的另一个主面的键合线8与图2右侧的电路图案5A接合。另外,接合到半导体芯片64的另一个主面的键合线8同样与共用的电路图案5A接合。共用的电路图案5A与引线11(附图左侧)通过键合线8连接。另外,搭载有半导体芯片63的电路板5与引线11(附图右侧)通过键合线8连接。图1(b)为了说明该配置,将图2右侧所示的共用的电路图案5A进行些许变形而绘出。
图示的半导体装置1的壳体10具有由PPS树脂等绝缘树脂构成的中空(框状)的大致长方体形状。在壳体10的中空空间收纳有绝缘基板2、4个半导体芯片6(61、62、63、64)和键合线8。图2中示出的绝缘基板2的电路板5和键合线8成为用于使半导体芯片61、62、63、64作为开关元件动作的构成。应予说明,在图2中,为了容易理解本发明,省略了封装材料13的图示。
在图2所示的例子中,在绝缘树脂板4上邻接地配置有搭载了半导体芯片61的电路板5和搭载了半导体芯片63的大致L字状的电路板5。半导体芯片61和半导体芯片63在分别对置的两个主面设有电极(未图示)。在大致L字状的电路板5中,在搭载了半导体芯片63的区域和接合了键合线8的区域之间的封装材料密合用图案5B,沿着半导体芯片63下方的焊脚7a形成有多个孔5B1。在大致L字状的电路板5接合有2组键合线8。一组键合线8与半导体芯片61的另一个主面接合,将半导体芯片63的一个主面的电极和半导体芯片61的另一个主面电串联连接。另一组的键合线8与引线11接合,将半导体芯片63的一个主面的电极与引线11电连接。通过在连接对象不同的2组键合线8与半导体芯片63下方的焊脚7a之间形成封装材料密合用图案5B,从而能够阻止在焊脚7a产生的封装材料13的剥离向键合线8侧发展。
在绝缘基板2中,固定有半导体芯片61、62、63或64的电路板5通过预定的电路用图案5A与封装材料密合用图案5B的组合而选择性地形成在绝缘树脂板4上。电路用图案(电路部)是指形成有电路配线用的图形的导电性金属箔,封装材料密合用图案(粘接部)5B是指以孔或凹部的形式形成有封装材料密合用的图形的导电性金属箔。在图2所示的例子中,封装材料密合用图案5B是被设置于电路用图案5A内的孔5B1,和/或被设置于电路用图案5A的边缘部且朝向电路用图案5A的内侧的凹部5B2。
在设置有孔5B1和/或凹部5B2之类的封装材料密合用图案5B的部分,没有部分地形成电路板。因此,在该部分(孔5B1和/或凹部5B2的内侧),壳体10内的封装材料13与绝缘基板2的绝缘树脂板4接触,进行密合(粘接)。绝缘树脂板4与封装材料13的密合性比电路板5与封装材料13的密合性高。因此,在设置有封装材料密合用图案5B的部分,能够提高与封装材料13的密合性。
在图3中示出绝缘基板2的俯视图。孔5B1、凹部5B2之类的封装材料密合用图案5B被设置在形成有电路板5的区域中的由虚线包围的区域E1、E2、E3、E4和E5的区域。这些区域E1、E2、E3、E4和E5是利用焊料7固定半导体芯片的区域的附近的区域。
封装材料13从电路板5的剥离从固定有半导体芯片的区域的周围,例如以焊料7的焊脚7a为起点而产生,并且逐渐扩大。优选以阻止封装材料13的剥离不到达键合线8的一端的接合部的方式将设置有封装材料密合用图案5B的区域E1、E2、E3、E4和E5设置在固定半导体芯片6的区域与键合线8的接合部之间。为了防止封装材料13的剥离扩大,更优选将区域E1、E2、E3、E4和E5设置在固定半导体芯片6的区域与键合线8的与电路板5接合的接合部之间的靠近半导体芯片6的位置。进一步地,优选孔5B1和/或凹部5B2是沿着半导体芯片6的端部或焊脚7a而形成的。多个孔5B1的配置除了配置成一列以外,还可以是多列或之字形。
但是,如果孔5B1和/或凹部5B2之类的封装材料密合用图案5B过于靠近半导体芯片6,则将半导体芯片6固定于电路板5的焊料7的焊脚在组装时流入孔5B1和/或凹部5B2,其结果,可能降低密合性提高的效果。作为一个例子,焊料7的焊脚可能流至焊料7的厚度的8倍左右,具体而言,厚度为100μm左右时,从半导体芯片6的端部开始流至0.8mm左右。因此,优选孔5B1和/或凹部5B2从半导体芯片6的端部起算至少分开1.0mm左右,或分开焊料7的厚度的10倍左右。
在绝缘基板2的电路板5上利用焊料7固定地设置有半导体芯片6以外的电子部件,例如电容器芯片的情况下,在该电子部件的附近也可以设置上述的孔5B1和/或凹部5B2之类的封装材料密合用图案5B。此时,优选孔5B1和/或凹部5B2从电子部件的端部起算至少分开1.0mm左右,或分开焊料7的厚度的10倍左右。
在区域E1、E4、E5中,设置有1个孔5B1或大致等间隔地设置有多个孔5B1。在半导体芯片6与键合线8的接合部之间未隔开间隔地设置了多个孔5B1的情况下,和/或连结各孔5B1而设置了线状的孔的情况下,可得到封装材料13的密合性提高的效果。另一方面,从半导体芯片6通过电路板5而流过键合线8的电流,或反向的电流的路径绕过该孔。其结果,可能增加电阻或电感。因此,在半导体芯片6与键合线8的接合部之间并列地设置孔5B1的情况下,优选隔开间隔而设置多个。但是,如果孔5B1的间隔过大,则阻止从半导体芯片的部分扩大的剥离的效果降低。因此,作为一个例子,优选孔5B1的间隔为2mm以下程度。
孔5B1的大小、形状没有特别限定。在图2、图3所示的本实施方式中,孔5B1是椭圆形或者是以将长方形的各个短边换成半圆的方式连接而成的形状,长边方向为2mm左右,短边方向为1mm左右的大小,孔的间隔为2mm左右。孔5B1的短边方向的大小为焊料7的厚度的10倍左右。
在区域E1、E2、E3中设置有凹部5B2。凹部5B2在电路用图案5A的边缘部提高密合性。凹部5B2单独地设置或与孔5B1一起并列地设置。优选凹部5B2与孔5B1同样地被设置于半导体芯片6或其它电子部件的附近。
本实施方式的半导体装置1的绝缘基板2的电路板5不是仅通过电路用图案5A选择性地形成,而是通过电路用图案5A与封装材料密合用图案5B的组合选择性地形成。由此,通过封装材料密合用图案5B的孔5B1和/或凹部5B2,能够在设置有封装材料密合用图案5B的部分提高与封装材料13的密合性。
在图4中,以图表的形式示出针对绝缘基板2的绝缘树脂板4中使用的绝缘树脂和电路板5中使用的铜箔,研究与封装材料中使用的热固性树脂的密合强度而得的结果。图4中的n表示试样的数目。图4的数据表示对各5个试样的测定值进行平均而得到的平均值。根据图4可知,与铜箔相比,绝缘树脂的对于封装材料的密合强度更高。因此,根据本发明,可知通过电路用图案5A与封装材料密合用图案5B的组合形成电路板5,通过孔5B1和/或凹部5B2使封装材料13与绝缘树脂板4密合,从而能够提高密合性。
为了进行比较,在图5和图6中分别示出现有的半导体装置101及其绝缘基板102的俯视图。
半导体装置101具备绝缘基板102。绝缘基板102由金属板(图中未示出)、层叠在金属板的一个表面上的绝缘树脂板104以及层叠在绝缘树脂板104上的电路板105构成。在电路板105的一个表面,借由焊料接合有半导体芯片106。在设置于半导体芯片106的一个主面的电极接合有键合线108的一端。
绝缘基板102、半导体芯片106和键合线108被收纳于壳体110。壳体110一体地具备用于与外部进行电连接的引线111。在壳体110的内表面侧,引线111的一端接合有与半导体芯片106和/或绝缘基板102的电路板105接合的键合线108的另一端。
壳体110的下端部通过未图示的绝缘性粘接剂与绝缘基板102的金属板103和绝缘树脂板104的周边部接合。在图5和图6中,省略填充到壳体110内的封装材料的图示。
图5、图6中示出的现有的半导体装置101与图1~图3中示出的本发明的实施方式的半导体装置1的不同之处在于,绝缘基板102的电路板105通过预定的电路用图案在绝缘树脂板104上选择性地形成。换言之,图6中示出的电路板105仅由电路用图案形成,没有通过图3中示出的封装材料密合用图案5B形成。因此,并未设有图3中示出的孔5B1和/或凹部5B2。与具备具有这样的电路板105的绝缘基板102的现有的半导体装置101相比,本实施方式的半导体装置1的封装材料13的密合性更优异。
以上,使用附图和实施方式具体地说明了本发明的半导体装置,但本发明的半导体装置不限于实施方式和附图的记载,可以在不脱离本发明的主旨的范围内进行各种变形。

Claims (2)

1.一种半导体装置,其特征在于,具备:
绝缘基板,依次层叠金属板、绝缘树脂板、电路板而构成;
半导体元件,通过接合材料固定于所述绝缘基板的电路板;
配线部件,与设置于所述半导体元件的表面的电极或所述绝缘基板的电路板连接;
框体,收纳所述绝缘基板、半导体元件和配线部件;以及
封装材料,包含热固性树脂,用于将收纳在所述框体内的所述绝缘基板、半导体元件和配线部件密封,
所述绝缘基板的电路板是将电路用图案与封装材料密合用图案组合,并选择性地形成在所述绝缘树脂板上而成,
所述封装材料密合用图案包括设置于所述电路板的孔,将所述封装材料密合用图案设置在固定于所述电路板的所述半导体元件与固定于所述电路板的配线部件的一端之间,且靠近所述半导体元件的位置,
所述封装材料与所述绝缘树脂板利用所述孔来密合。
2.根据权利要求1所述的半导体装置,其特征在于,所述封装材料密合用图案还包括设置于所述电路板的凹部,所述凹部在所述电路用图案的边缘部,朝向内侧设置。
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