CN103515394B - 具有金属氧化物半导体的薄膜晶体管基板及其制造方法 - Google Patents

具有金属氧化物半导体的薄膜晶体管基板及其制造方法 Download PDF

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CN103515394B
CN103515394B CN201210566973.2A CN201210566973A CN103515394B CN 103515394 B CN103515394 B CN 103515394B CN 201210566973 A CN201210566973 A CN 201210566973A CN 103515394 B CN103515394 B CN 103515394B
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grid
film transistor
active layer
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CN103515394A (zh
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曺基述
徐诚模
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LG Display Co Ltd
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Abstract

本发明公开一种具有金属氧化物半导体的薄膜晶体管基板及其制造方法。该薄膜晶体管基板包括：在基板上形成的栅极；栅极绝缘层，用于覆盖所述栅极的一些部分并且暴露所述栅极的其它部分；半导体有源层，在所述栅极绝缘层上与所述栅极的所述一些部分重叠；栅极线，用于接触所述栅极的所述其它部分并且沿所述基板的水平方向延伸；中间绝缘层，用于暴露所述半导体有源层的中间部分并且覆盖所述栅极线和所述栅极；在所述中间绝缘层上沿所述基板的垂直方向延伸的数据线；源极，从所述数据线分支并且接触所述半导体有源层的一侧；和漏极，所述漏极面对所述源极并且以预定距离与所述源极隔开，并且所述漏极接触所述半导体有源层的另一侧。

Description

具有金属氧化物半导体的薄膜晶体管基板及其制造方法
本申请要求于2012年6月26日提交的韩国专利申请No.10-2012-0068440的优先权益，在此为了所有目的通过引用将其并入本文，就好像在这里完全阐明一样。
技术领域
本发明涉及一种具有用于平板显示器的金属氧化物半导体的薄膜晶体管基板以及一种用于制造所述薄膜晶体管基板的方法，更具体地，本发明涉及这样一种具有金属氧化物半导体的薄膜晶体管以及一种用于制造所述薄膜晶体管的方法，其中通过热处理来增强沟道层的稳定性。
背景技术
现今，随着信息社会的发展，对用于呈现各种信息的显示器的要求日益增加。据此，开发了各种平板显示器以便克服阴极射线管的许多缺点（例如重量重和体积大）。平板显示设备包括液晶显示设备（LCD）、场致发射显示器（FED）、等离子体显示面板（PDP）、电致发光设备（ED）和电泳显示设备（EDD）。
平板显示器的显示面板可以包括薄膜晶体管基板，其具有在依照矩阵方式排列的像素区域的每一个中分配的薄膜晶体管。例如，液晶显示设备通过使用电场控制液晶层的光透射率来呈现视频数据。依照电场的方向，可将LCD分为两种主要类型：一种是垂直电场类型，另一种是水平电场类型。
对于垂直电场类型LCD来说，在上基板上形成的公共电极和在下基板上形成的像素电极彼此面对，以便形成其方向垂直于基板面的电场。位于上基板和下基板之间的扭曲向列（TN）液晶层借助垂直电场驱动。垂直电场类型LCD具有较高孔径比的优点，但是它具有视角较窄（大约90度）的缺点。
对于水平电场类型LCD来说，在相同的基板上平行地形成公共电极和像素电极。位于上基板和下基板之间的液晶层借助与基板面平行的电场以面内切换（）模式驱动。水平电场类型LCD比垂直电场类型LCD具有视角更宽（大于160度）并且响应速度更快的优点。然而，水平电场类型LCD可具有诸如孔径比低和背光透射率低之类的缺点。在IPS模式LCD中，例如，为了形成面内电场，在公共电极和像素电极之间的间隙可以大于在上基板和下基板之间的间隙，并且为了获得足够强度的电场，公共电极和像素电极可以包括具有确定宽度的条带图案。在IPS模式LCD的像素电极和公共电极之间，形成与基板水平的电场。然而，刚好在像素电极和公共电极上，没有任何电场。即，刚好位于像素公共电极上的分子未被驱动而是保持初始状态（初始对准方向）。因为初始状态中的液晶无法适当地控制光透射率，所以孔径比和发光性可能会恶化。
为了解决IPS模式LCD的这些缺点，已经提出由边缘电场驱动的边缘场切换（FFS）类型LCD。FFS类型LCD包括公共电极和像素电极并在它们之间具有绝缘层，并且在像素电极和公共电极之间的间隙被设置为比在上基板和下基板之间的间隙更窄。由此，在公共电极和像素电极之间以及在公共电极和像素电极上的空间中形成具有抛物线形状的边缘电场。因此，位于上基板和下基板之间的所有液晶分子都可以由此边缘场驱动。结果，可以增强孔径比和正面发光性。
图1是示出依照相关技术具有包含在边缘场类型液晶显示器中的氧化物半导体层的薄膜晶体管基板的平面图。图2是示出依照相关技术通过沿图1的线I-I’切割得到的薄膜晶体管基板的结构的剖面图。
在图1和2中示出的薄膜晶体管基板包括：在下基板SUB上形成的彼此交叉的栅极线GL和数据线DL以及在栅极线GL和数据线DL之间的栅极绝缘层GI；以及在交叉部分形成的薄膜晶体管T。借助栅极线GL和数据线DL的交叉结构，限定了像素区域。在像素区域中，设置彼此面对的像素电极PXL和公共电极COM以及在像素电极PXL和公共电极COM之间的钝化层PAS，以便形成边缘场。例如，像素电极PXL具有对应于像素区域形状的矩形形状，并且公共电极COM具有彼此平行布置的多个条带。
公共电极COM连接到与栅极线GL平行布置的公共线CL。通过公共线CL向公共电极COM提供基准电压（或公共电压）。
薄膜晶体管TFT通过对栅极线GL的栅极信号作出响应来向像素电极PXL充入像素信号电压并保持像素信号电压。为此，薄膜晶体管T包括从栅极线GL分支的栅极G、从数据线DL分支的源极S、面向源极S并且连接到像素电极PXL的漏极D、以及在栅极绝缘层GI上与栅极G重叠用于在源极S和漏极D之间形成沟道的有源层A。在有源层A和源极S之间，以及在有源层A和漏极D之间，可以进一步形成欧姆接触层。
特别地是，当有源层A由氧化物半导体材料制成时，因为它具有高电子迁移率特性，因此对于要求更大充电电容的大面积薄膜晶体管基板来说是有利的。然而，未开发氧化物半导体材料用于电气元件以使其具有状态稳定的良好特性。因此，优选在有源层A上具有蚀刻阻挡层ES以便保护氧化物半导体材料。例如，在用于借助光刻方法来图案化源极S和漏极D的步骤中，可以通过在源极S和漏极之间形成蚀刻阻挡层ES来保护有源层A免受蚀刻材料的影响。
在栅极线GL的一个端部，形成栅极焊盘GP以便从外部视频设备接收栅极信号。栅极焊盘GP通过穿透栅极绝缘层GI和钝化层PAS的栅极焊盘接触孔GPH连接到栅极焊盘端子GPT。此外，在数据线DL的一个端部，形成数据焊盘DP以便从外部视频设备接收数据信号。数据焊盘DP通过穿透钝化层PAS的数据焊盘接触孔DPH连接到数据焊盘端子DPT。
布置在栅极绝缘层GI上的像素电极PXL连接到漏极D。此外，形成公共电极COM以便与像素电极PXL重叠，其间具有用于覆盖像素电极PXL的钝化层。可以在像素电极PXL和公共电极COM之间形成电场，然后在薄膜晶体管基板和滤色器基板之间水平布置的液晶分子可以借助介电各向异性旋转。依照液晶分子的旋转状态，可以控制光通过像素区域的光透射率并且可以呈现各种灰度级。
尽管具有金属氧化物半导体材料的薄膜晶体管基板可能具有许多优点，不过直到现在也未确保氧化物半导体材料的稳定性。因此，对于使用氧化物半导体材料开发电气元件存在很多障碍。非常需要一种包含具有高可靠性和稳定性的氧化物半导体材料的薄膜晶体管基板以及用于制造所述薄膜晶体管基板的方法。
发明内容
为了克服上述缺点，本发明的目的是提出一种薄膜晶体管基板，其中金属氧化物半导体层具有增强的特性和稳定性。本发明的另一目的是提出一种用于制造薄膜晶体管基板的方法，其中对金属氧化物半导体层实施热处理并且使所述热处理对基板的损坏最小化。
为了实现以上目的，本发明提出了一种薄膜晶体管基板，包括：在基板上形成的栅极；栅极绝缘层，所述栅极绝缘层用于覆盖所述栅极的一些部分并且暴露所述栅极的其它部分；半导体有源层，所述半导体有源层在所述栅极绝缘层上与所述栅极的所述一些部分重叠；栅极线，所述栅极线用于接触所述栅极的所述其它部分并且沿所述基板的水平方向延伸；中间绝缘层，所述中间绝缘层用于暴露所述半导体有源层的中间部分并且覆盖所述栅极线和所述栅极；在所述中间绝缘层上沿所述基板的垂直方向延伸的数据线；源极，所述源极从所述数据线分支并且接触所述半导体有源层的一侧；和漏极，所述漏极面对所述源极并且以预定距离与所述源极隔开，并且所述漏极接触所述半导体有源层的另一侧。
优选地，所述薄膜晶体管基板还包括：钝化层，所述钝化层用于覆盖所述源极和所述漏极；像素接触孔，所述像素接触孔用于通过穿透所述钝化层来暴露所述漏极的一些部分；和像素电极，所述像素电极用于通过所述像素接触孔接触所述漏极。
优选地，所述薄膜晶体管基板还包括：布置在所述钝化层上以及所述像素电极的下方的滤色器层；和布置在所述像素电极的下方并用于覆盖所述滤色器层的涂覆层。
优选地，所述滤色器层填充由所述栅极线和所述数据线围绕的像素区域的内部区域，并且覆盖与包括所述半导体有源层的薄膜晶体管相对应的区域。
优选地，所述栅极线包含铜材料。
优选地，所述数据线包括具有铜的低电阻层和具有钼的保护层。
本发明还提供一种用于制造薄膜晶体管基板的方法，包括：在基板上沉积栅极金属材料、栅极绝缘材料和金属氧化物半导体材料，然后实施热处理；通过对所述栅极金属材料、所述栅极绝缘材料和所述金属氧化物半导体材料进行图案化，形成栅极、栅极绝缘层和半导体有源层；形成栅极线，所述栅极线用于接触所述栅极的一些部分并且在所述基板上沿水平方向延伸；形成中间绝缘层，所述中间绝缘层用于覆盖所述栅极线和所述栅极并且暴露所述半导体有源层的中间部分；以及形成数据线、源极和漏极，其中所述数据线在所述中间绝缘层上沿垂直方向延伸，所述源极从所述数据线分支并且接触所述半导体有源层的一侧，所述漏极面对所述源极并且以预定距离与所述源极隔开，并且所述漏极接触所述半导体有源层的另一侧。
优选地，所述方法还包括：形成钝化层，所述钝化层用于覆盖所述数据线、所述源极和所述半导体有源层并且包括用于暴露所述漏极的一些部分的像素接触孔；以及在所述钝化层上形成用于通过所述像素接触孔接触所述漏极的像素电极。
优选地，在形成所述像素电极之前，所述方法还包括：在所述钝化层上形成滤色器层，所述滤色器层填充由所述栅极线和所述数据线围绕的像素区域，并且覆盖与包括所述半导体有源层的薄膜晶体管相对应的区域；以及形成用于覆盖所述滤色器层的涂覆层。
优选地，所述栅极线包含铜材料。
优选地，通过依次地沉积具有钼的保护层和具有铜的低电阻层并且对所述保护层和所述低电阻层进行图案化来形成所述数据线、所述源极和所述漏极。
优选地，利用干蚀刻工艺来对所述具有钼的保护层进行图案化。
依照本发明，在基板的表面上沉积栅极材料、栅极绝缘材料和金属氧化物半导体材料，在高温条件下实施热处理，并且图案化栅极和有源层。因此，可以增强金属氧化物半导体沟道（有源）层的特性。依照本发明，薄膜晶体管基板不需要形成用于保护半导体沟道层的蚀刻阻挡层。并且即使在需要蚀刻阻挡层时，因为可以利用布置在栅极线和数据线之间的中间绝缘层的图案化来形成蚀刻阻挡层，所以不需要任何附加的光刻步骤。结果，可以使用较少数目的光掩模工艺来制造具有增强特性和高稳定性的薄膜晶体管基板。
附图说明
给本发明提供进一步理解并且并入到本申请中组成本申请一部分的附图图解了本发明的实施方式，并与说明书一起用于解释本发明的原理。
在附图中：
图1是示出依照相关技术具有包含在边缘场类型液晶显示器中的氧化物半导体层的薄膜晶体管基板的平面图。
图2是示出依照相关技术通过沿图1的线I-I’切割得到的薄膜晶体管基板的结构的剖面图。
图3是示出依照本发明的具有金属氧化物半导体材料的薄膜晶体管基板的结构的平面图。
图4A到4G是示出通过沿着图3中的线II-II’切割得到的、依照本发明第一实施方式用于制造具有金属氧化物半导体材料的液晶显示器的薄膜晶体管基板的方法步骤的剖面图。
图5A到5C是示出通过沿着图3中的线II-II’切割得到的、依照本发明第二实施方式用于制造具有金属氧化物半导体材料的有机发光显示器的薄膜晶体管基板的方法步骤的剖面图。
具体实施方式
现在将参照附图解释本发明的优选实施方式。在整个说明书中使用相同或相似的附图标记指代相同或相似的元件。然而，本发明不受这些实施方式的限制，而是可以在不改变技术精神的情况下被应用于各种变化或修改。在下面的实施方式中，通过考虑解释的容易性来选择元件的名称，因而它们可以不同于实际的名称。
参照包括图3和图4A到4G的附图，现在将说明依照本发明第一实施方式制造具有金属氧化物半导体材料的薄膜晶体管基板的方法。图3是示出依照本发明具有金属氧化物半导体材料的薄膜晶体管基板的结构的平面图。图4A到4G是示出通过沿着图3中的线II-II’切割得到的、依照本发明第一实施方式用于制造具有金属氧化物半导体材料的液晶显示器的薄膜晶体管基板的方法步骤的剖面图。
首先，参照图3和4G，现在将说明依照本发明第一实施方式的液晶显示器的薄膜晶体管基板。依照像素和公共电极的布置关系，液晶显示器可以被划分为垂直电场类型和水平电场类型。本发明提出一种可以应用于这两种类型的薄膜晶体管基板。因此，在图3中，未示出公共电极，并且需要时将单独解释公共电极COM的结构。
依照本发明第一实施方式的具有金属氧化物半导体的薄膜晶体管基板包括像素区域，由在基板SUB上沿水平方向延伸的栅极线GL和沿垂直方向延伸的数据线DL的交叉结构限定像素区域。在像素区域的一个角，布置有薄膜晶体管T。像素区域的大部分被由薄膜晶体管T驱动的像素电极PXL占据。薄膜晶体管T包括栅极G、在栅极绝缘层GI上与栅极G的一些部分重叠的半导体有源层A、接触有源层A的一侧的源极S、以及面向源极S并且接触有源层A的另一侧的漏极D。栅极绝缘层GI覆盖栅极G的这一些部分并暴露栅极G的其它部分，栅极线GL接触栅极G的这其它部分，后文将进一步描述。
栅极线GL具有在栅极线GL的一端布置的栅极焊盘GP，并且连接到薄膜晶体管T的栅极G。具体地，通过去除栅极绝缘层GI的一些部分而暴露的栅极G的一些部分与栅极线GL接触，以便在栅极线GL和栅极G之间形成电连接。数据线DL具有在数据线DL的一端布置的数据焊盘DP，并且连接到薄膜晶体管T的源极S。特别地是，从数据线DL直接分支出源极S。
以下，进一步参照图4A到4G，将说明依照本发明第一实施方式的用于制造具有金属氧化物半导体的薄膜晶体管基板的方法。
如图4A所示，在透明基板SUB上依次沉积用于栅极G的金属层MT、栅极绝缘层GI和金属氧化物半导体层SE。栅极绝缘层GI优选地由在制造工艺期间产生少量氢离子或氢物质的硅氧化物（SiOx）制成。金属氧化物半导体层SE可以包括IGZO（铟镓锌氧化物）或ITZO（铟锡锌氧化物）。在基板SUB上依次沉积上述三个层之后，在300℃或更高的温度条件下实施热处理。结果，可以稳定化金属氧化物半导体层SE的物理特性并且可以确保其高可靠性。
通过利用第一掩模工艺对依次沉积的层（包括用于栅极G的金属层MT、栅极绝缘层和金属氧化物半导体层SE）进行图案化，形成栅极G和半导体有源层A。在栅极G和半导体有源层A之间，夹有栅极绝缘层GI。这里，栅极G的一侧被暴露以便连接到栅极线GL。因此，应当选择性地移除在栅极G一侧上的栅极绝缘层GI和金属氧化物半导体层SE的一些部分。为此，在第一掩模工艺中，光掩模可以是半色调掩模。详细地，依照矩形形状形成栅极G，栅极绝缘层GI被形成为具有与栅极G类似的形状，其中栅极绝缘层GI覆盖栅极的除了一些端部之外的大部分。此外，半导体有源层A可以具有与栅极绝缘层GI恰好一致的形状。
因为在形成栅极G之前对沉积在基板SUB的整个表面上的金属氧化物半导体层和用于栅极G的金属层MT实施热处理，所以在整个基板上的热应力分布是均匀的，使得基板SUB可以保持在平面状态。如果在如图4B所示图案化栅极G和有源层A之后为了有源层A的稳定性而实施热处理，那么因为金属材料的栅极G未均匀分布在基板SUB上，所以基板SUB可能变形、扭曲、弯曲或损坏。
在具有栅极G和半导体有源层A的基板SUB上，沉积用于栅极线GL的金属层。如图4B所示，通过利用第二掩模工艺图案化金属层，形成沿基板SUB的水平方向延伸以连接到栅极G的栅极线GL。此外，在栅极线GL的一端，形成栅极焊盘GP。用于栅极线GL的金属层可以包括铜（Cu）或铜合金。例如，用于栅极线GL的金属层可以由双层金属材料诸如Cu/Mo-Ti（铜/钼钛）、Cu合金/Mo（铜合金/钼）或Cu合金/Mo-Ti（铜合金/钼钛）制成；或者，它可以由三层金属材料诸如Mo/Cu/Mo（钼/铜/钼）、Mo-Ti/Cu/Mo-Ti（钼钛/铜/钼钛）或Mo-Ti/Cu合金/Mo-Ti（钼钛/铜合金/钼钛）制成。
在高温处理条件下，铜材料可能变得脆弱。因此，在沉积/形成用于栅极线GL的金属层之后，优选地不暴露在超过400℃的高温处理条件下。在本发明中，在对栅极G和有源层A实施热处理之后沉积/形成栅极线GL，使得可以确保在栅极线GL中包括的铜材料的稳定性。
在具有栅极线GL和栅极焊盘GP的基板SUB上，通过沉积硅氧化物（SiOx）来形成中间绝缘层IN。使用第三掩模工艺，如图4D所示，对中间绝缘层IN进行图案化，以暴露半导体有源层A的上表面的一些部分（尤其是中间部分）以便与源极S和漏极D接触。因为借助在图4A中示出的工艺中实施的热处理已经使半导体层A稳定化并且增强了可靠性，所以即便半导体层A暴露于此图案化工艺，也不会使半导体层A的稳定性和可靠性降低。尽管在图中并未示出，根据需要，在除了与源极S和漏极D接触的区域之外的实际沟道区域上，保留中间绝缘层IN以便更强有力地保护有源层A的沟道区域。
在中间绝缘层IN暴露沟道层A的表面的情况下，在基板SUB上沉积源极-漏极金属层。通过利用第四掩模工艺对源极-漏极金属层进行图案化，形成沿基板SUB的垂直方向延伸的数据线DL、从数据线DL分支并且接触半导体有源层A一侧的源极S、以及与源极S面对并以预定距离与源极S隔开并且接触半导体有源层A另一侧的漏极D。此外，在数据线DL的一端，形成数据焊盘DP。从而，完成具有金属氧化物半导体材料的薄膜晶体管T，如图4E所示。
源极-漏极金属层可以具有双层或三层结构，其中以两层或三层交替地叠置包含钼（Mo）或钼钛（Mo-Ti）的保护层和包含铜的低电阻层。例如，源极-漏极金属层可以具有包含Mo-Ti/Cu/Mo-Ti的三层结构或者包含Cu/Mo-Ti的双层结构。利用这种包含钼的保护层与金属氧化物半导体有源层A接触的结构，当图案化源极-漏极金属层时，通过干蚀刻方法来对保护层进行图案化。借助图4A中的热处理，增强了稳定性和可靠性。另外，通过使用对源极/漏极图案化的干蚀刻方法，可以在稳定且可靠的状态下保护半导体有源层A。即，使用对有源层A的稳定性和可靠性几乎不产生影响的干蚀刻工艺，可以在没有蚀刻阻挡层的情况下保持半导体有源层A的特性。
在具有薄膜晶体管T的基板SUB的整个表面上，沉积硅氧化物（SiOx），以形成钝化层PAS。通过利用第五掩模工艺对钝化层PAS进行图案化，形成用于暴露漏极D的一些部分的像素接触孔PH。同时，形成用于暴露数据焊盘DP的数据焊盘接触孔DPH。此外，连续地对钝化层PAS和中间绝缘层IN进行图案化，以形成用于暴露栅极焊盘GP的栅极焊盘接触孔GPH，如图4F所示。
在具有接触孔PH、GPH和DPH的基板SUB上，沉积包含ITO（氧化铟锡）或IZO（氧化铟锌）的透明导电材料。通过利用第六掩模工艺对透明导电材料进行图案化，形成通过像素接触孔PH接触漏极D并且占据像素区域的大部分的像素电极PXL。此外，形成通过栅极焊盘接触孔GPH接触栅极焊盘GP的栅极焊盘端子GPT和通过数据焊盘接触孔DPH接触数据焊盘DP的数据焊盘端子DPT，如图4G所示。
尽管在图中并未示出，对于垂直电场LCD的情况，在面对图4G中所示的薄膜晶体管基板的上基板（在这两个基板之间具有液晶层）上进一步形成公共电极。相反，对于水平电场LCD的情况，在具有像素电极PXL的基板SUB上进一步形成第二钝化层，并且在第二钝化层上进一步形成公共电极。
本发明的第一实施方式说明了用于制造具有金属氧化物半导体材料的薄膜晶体管基板的方法。本发明的原理可以应用于有机发光二极管显示器的薄膜晶体管基板。在这种情况下，制造方法类似于在第一实施方式中提及的方法。以下，进一步参照图4F和图5A到5C，将说明依照本发明第二实施方式的用于制造薄膜晶体管基板的方法。图5A到5C是示出通过沿着图3中的线II-II’切割得到的、依照本发明第二实施方式用于制造具有金属氧化物半导体材料的有机发光显示器的薄膜晶体管基板的方法步骤的剖面图。
如图4F所示，形成用于覆盖薄膜晶体管T的钝化层PAS。通过利用第五掩模工艺对钝化层PAS进行图案化，形成接触孔（即，像素接触孔PH、栅极焊盘接触孔GPH和数据焊盘接触孔DPH）以分别暴露漏极D、栅极焊盘GP和数据焊盘DP。
通过在钝化层PAS上沉积颜料层并且通过利用第六掩模工艺对颜料层进行图案化，形成滤色器CF（或称为“滤色器层”）。优选地，滤色器层布置在钝化层上以及像素电极的下方，并且优选地，滤色器层填充由栅极线和数据线围绕的像素区域或像素区域的内部区域，并且覆盖与包括半导体有源层的薄膜晶体管相对应的区域。例如，滤色器CF占据由栅极线GL和数据线DL的交叉结构限定的像素区域的大部分区域。此外，通过在薄膜晶体管T上保留滤色器CF，可以保护薄膜晶体管T免受从外部环境入射的光的影响。利用此结构，可以进一步确保半导体有源层A的稳定性和可靠性。在每个像素区域，布置红色、绿色和蓝色中的一种颜色的颜料以形成滤色器CF。因此，为了完成滤色器CF，可以顺序地实施至少三道掩模工艺，如图5A所示。
为了减少掩模工艺的数目，当图案化滤色器CF时，同时图案化钝化层PAS以便形成接触孔PH、GPH和DPH。然而，当滤色器CF比钝化层PAS厚得多时，可能很难同时图案化滤色器CF和钝化层PAS。在这种情况下，首先通过图案化钝化层PAS，形成接触孔PH、GPH和DPH，之后，当图案化滤色器CF时使对应于接触孔PH、GPH和DPH的区域敞开。
在具有滤色器CF的基板SUB上，沉积涂覆材料。通过利用第七掩模工艺对涂覆材料进行图案化，形成具有用于暴露接触孔PH、GPH和DPH的开口的涂覆层OC，如图5B所示。优选地，涂覆层布置在像素电极的下方并用于覆盖滤色器层。
在具有涂覆层OC的基板SUB上，沉积诸如ITO（氧化铟锡）或IZO（氧化铟锌）的透明导电材料。通过利用第八掩模工艺对透明导电材料进行图案化，形成通过像素接触孔PH接触漏极D并且占据像素区域的大部分区域的像素电极PXL。此外，形成通过栅极焊盘接触孔GPH接触栅极焊盘GP的栅极焊盘端子GPT和通过数据焊盘接触孔DPH接触数据焊盘GP的数据焊盘端子DPT，如图5C所示。
之后，尽管在图中并未示出，通过形成堤层（banklayer）并且叠置有机发光层和第二电极层，可以完成有机发光二极管显示器。
如上所述，在本发明中，在基板的整个表面上依次地沉积栅极材料、栅极绝缘材料和金属氧化物半导体材料，实施热处理，然后形成栅极和半导体有源层。因此，可以增强半导体材料的特性并且可以有力地确保其可靠性。
虽然已经参照附图详细描述了本发明的实施方式，但是所属领域技术人员应当理解，可以在不改变本发明的技术精神或本质特征的情况下以其它具体形式来实现本发明。因此应当注意，以上实施方式在各个方面仅仅是说明性的并且不被解释为限制本发明。本发明的范围由所附的权利要求书而不是具体实施方式来限定。在权利要求书的含义和范围内作出的所有变化或修改或它们的等效方式应当被解释为落入本发明的范围内。

Claims (12)

1.一种薄膜晶体管基板，包括：
在基板上形成的栅极；
栅极绝缘层，所述栅极绝缘层用于覆盖所述栅极的一些部分并且暴露所述栅极的其它部分；
半导体有源层，所述半导体有源层在所述栅极绝缘层上与所述栅极的所述一些部分重叠；
栅极线，所述栅极线形成在暴露的所述栅极的其它部分上，用于接触所述栅极的所述其它部分并且沿所述基板的水平方向延伸；
中间绝缘层，所述中间绝缘层用于暴露所述半导体有源层的中间部分并且覆盖所述栅极线和所述栅极；
在所述中间绝缘层上沿所述基板的垂直方向延伸的数据线；
源极，所述源极从所述数据线分支并且接触所述半导体有源层的一侧；和
漏极，所述漏极面对所述源极并且以预定距离与所述源极隔开，并且所述漏极接触所述半导体有源层的另一侧。
2.如权利要求1所述的薄膜晶体管基板，还包括：
钝化层，所述钝化层用于覆盖所述源极和所述漏极；
像素接触孔，所述像素接触孔用于通过穿透所述钝化层来暴露所述漏极的一些部分；和
像素电极，所述像素电极用于通过所述像素接触孔接触所述漏极。
3.如权利要求2所述的薄膜晶体管基板，还包括：
布置在所述钝化层上以及所述像素电极的下方的滤色器层；和
布置在所述像素电极的下方并用于覆盖所述滤色器层的涂覆层。
4.如权利要求3所述的薄膜晶体管基板，其中所述滤色器层填充由所述栅极线和所述数据线围绕的像素区域的内部区域，并且覆盖与包括所述半导体有源层的薄膜晶体管相对应的区域。
5.如权利要求1所述的薄膜晶体管基板，其中所述栅极线包含铜材料。
6.如权利要求1所述的薄膜晶体管基板，其中所述数据线包括具有铜的低电阻层和具有钼的保护层。
7.一种用于制造薄膜晶体管基板的方法，包括：
在基板上沉积栅极金属材料、栅极绝缘材料和金属氧化物半导体材料，然后实施热处理；
通过对所述栅极金属材料、所述栅极绝缘材料和所述金属氧化物半导体材料进行图案化，形成栅极、栅极绝缘层和半导体有源层，其中所述栅极绝缘层覆盖所述栅极的一些部分并且暴露所述栅极的其它部分；
形成栅极线，所述栅极线形成在暴露的所述栅极的其它部分上，用于接触暴露的所述栅极的其它部分并且在所述基板上沿水平方向延伸；
形成中间绝缘层，所述中间绝缘层用于覆盖所述栅极线和所述栅极并且暴露所述半导体有源层的中间部分；以及
形成数据线、源极和漏极，其中所述数据线在所述中间绝缘层上沿垂直方向延伸，所述源极从所述数据线分支并且接触所述半导体有源层的一侧，所述漏极面对所述源极并且以预定距离与所述源极隔开，并且所述漏极接触所述半导体有源层的另一侧。
8.如权利要求7所述的方法，还包括：
形成钝化层，所述钝化层用于覆盖所述数据线、所述源极和所述半导体有源层并且包括用于暴露所述漏极的一些部分的像素接触孔；以及
在所述钝化层上形成用于通过所述像素接触孔接触所述漏极的像素电极。
9.如权利要求8所述的方法，在形成所述像素电极之前，还包括：
在所述钝化层上形成滤色器层，所述滤色器层填充由所述栅极线和所述数据线围绕的像素区域，并且覆盖与包括所述半导体有源层的薄膜晶体管相对应的区域；以及
形成用于覆盖所述滤色器层的涂覆层。
10.如权利要求7所述的方法，其中所述栅极线包含铜材料。
11.如权利要求7所述的方法，其中通过依次地沉积具有钼的保护层和具有铜的低电阻层并且对所述保护层和所述低电阻层进行图案化来形成所述数据线、所述源极和所述漏极。
12.如权利要求11所述的方法，其中利用干蚀刻工艺来对所述具有钼的保护层进行图案化。
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