CN103339713B - 用于降低soi结构的器件层中的金属含量的方法以及通过该方法制造的soi结构 - Google Patents

用于降低soi结构的器件层中的金属含量的方法以及通过该方法制造的soi结构 Download PDF

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Publication number
CN103339713B
CN103339713B CN201280007174.XA CN201280007174A CN103339713B CN 103339713 B CN103339713 B CN 103339713B CN 201280007174 A CN201280007174 A CN 201280007174A CN 103339713 B CN103339713 B CN 103339713B
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silicon
device layer
layer
silicon device
metal
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Chinese (zh)
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CN103339713A (zh
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A·格拉贝
L·P·弗兰纳里
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SUNEDISON SEMICONDUCTOR Ltd (UEN201334164H)
GlobalWafers Co Ltd
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SunEdison Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3226—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering of silicon on insulator
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Weting (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
CN201280007174.XA 2011-01-31 2012-01-27 用于降低soi结构的器件层中的金属含量的方法以及通过该方法制造的soi结构 Active CN103339713B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201161437993P 2011-01-31 2011-01-31
US61/437,993 2011-01-31
US13/354,788 2012-01-20
US13/354,788 US8796116B2 (en) 2011-01-31 2012-01-20 Methods for reducing the metal content in the device layer of SOI structures and SOI structures produced by such methods
PCT/US2012/022970 WO2012106210A2 (en) 2011-01-31 2012-01-27 Methods for reducing the metal content in the device layer of soi structures and soi structures produced by such methods

Publications (2)

Publication Number Publication Date
CN103339713A CN103339713A (zh) 2013-10-02
CN103339713B true CN103339713B (zh) 2016-06-15

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Country Status (9)

Country Link
US (3) US8796116B2 (enExample)
EP (1) EP2671247B1 (enExample)
JP (1) JP5976013B2 (enExample)
KR (1) KR101871534B1 (enExample)
CN (1) CN103339713B (enExample)
MY (1) MY166803A (enExample)
SG (1) SG191966A1 (enExample)
TW (1) TW201250838A (enExample)
WO (1) WO2012106210A2 (enExample)

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US9064789B2 (en) * 2013-08-12 2015-06-23 International Business Machines Corporation Bonded epitaxial oxide structures for compound semiconductor on silicon substrates
KR102212296B1 (ko) 2014-01-23 2021-02-04 글로벌웨이퍼스 씨오., 엘티디. 고 비저항 soi 웨이퍼 및 그 제조 방법
US9853133B2 (en) * 2014-09-04 2017-12-26 Sunedison Semiconductor Limited (Uen201334164H) Method of manufacturing high resistivity silicon-on-insulator substrate
US9899499B2 (en) 2014-09-04 2018-02-20 Sunedison Semiconductor Limited (Uen201334164H) High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss
EP3221884B1 (en) 2014-11-18 2022-06-01 GlobalWafers Co., Ltd. High resistivity semiconductor-on-insulator wafers with charge trapping layers and method of manufacturing thereof
EP3573094B1 (en) 2014-11-18 2023-01-04 GlobalWafers Co., Ltd. High resistivity semiconductor-on-insulator wafer and a method of manufacturing
US10224233B2 (en) 2014-11-18 2019-03-05 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed by He-N2 co-implantation
WO2016140850A1 (en) 2015-03-03 2016-09-09 Sunedison Semiconductor Limited Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
US9881832B2 (en) 2015-03-17 2018-01-30 Sunedison Semiconductor Limited (Uen201334164H) Handle substrate for use in manufacture of semiconductor-on-insulator structure and method of manufacturing thereof
CN107408532A (zh) 2015-03-17 2017-11-28 太阳能爱迪生半导体有限公司 用于绝缘体上半导体结构的制造的热稳定电荷捕获层
CN107667416B (zh) 2015-06-01 2021-08-31 环球晶圆股份有限公司 制造绝缘体上半导体的方法
EP3304586B1 (en) 2015-06-01 2020-10-07 GlobalWafers Co., Ltd. A method of manufacturing silicon germanium-on-insulator
US10529616B2 (en) 2015-11-20 2020-01-07 Globalwafers Co., Ltd. Manufacturing method of smoothing a semiconductor surface
US9806025B2 (en) * 2015-12-29 2017-10-31 Globalfoundries Inc. SOI wafers with buried dielectric layers to prevent Cu diffusion
US10468294B2 (en) 2016-02-19 2019-11-05 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed on a substrate with a rough surface
US9831115B2 (en) 2016-02-19 2017-11-28 Sunedison Semiconductor Limited (Uen201334164H) Process flow for manufacturing semiconductor on insulator structures in parallel
WO2017142849A1 (en) 2016-02-19 2017-08-24 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a buried high resistivity layer
EP3427293B1 (en) 2016-03-07 2021-05-05 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a low temperature flowable oxide layer and method of manufacture thereof
WO2017155804A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Method of manufacturing a semiconductor on insulator structure by a pressurized bond treatment
US10573550B2 (en) 2016-03-07 2020-02-25 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a plasma oxide layer and method of manufacture thereof
WO2017155808A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
EP3469120B1 (en) 2016-06-08 2022-02-02 GlobalWafers Co., Ltd. High resistivity single crystal silicon ingot and wafer having improved mechanical strength
US10269617B2 (en) 2016-06-22 2019-04-23 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising an isolation region
FR3057705B1 (fr) * 2016-10-13 2019-04-12 Soitec Procede de dissolution d'un oxyde enterre dans une plaquette de silicium sur isolant
JP6831911B2 (ja) 2016-10-26 2021-02-17 グローバルウェーハズ カンパニー リミテッドＧｌｏｂａｌＷａｆｅｒｓ Ｃｏ．，Ｌｔｄ． 向上した電荷捕獲効率を有する高抵抗率シリコンオンインシュレータ基板
EP4009361B1 (en) 2016-12-05 2025-02-19 GlobalWafers Co., Ltd. High resistivity silicon-on-insulator structure
WO2018125673A2 (en) * 2016-12-28 2018-07-05 Invensas Bonding Technologies, Inc Processing stacked substrates
EP3653761B1 (en) 2016-12-28 2024-02-28 Sunedison Semiconductor Limited Silicon wafers with intrinsic gettering and gate oxide integrity yield
CN117038572A (zh) 2017-07-14 2023-11-10 太阳能爱迪生半导体有限公司 绝缘体上半导体结构的制造方法
CN107946231B (zh) * 2017-11-22 2020-06-16 上海华力微电子有限公司 一种FDSOI器件SOI和bulk区域浅槽形貌优化方法
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US10943813B2 (en) * 2018-07-13 2021-03-09 Globalwafers Co., Ltd. Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability
US11798802B2 (en) * 2022-02-11 2023-10-24 Globalwafers Co., Ltd. Methods for stripping and cleaning semiconductor structures

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US20130168836A1 (en) 2013-07-04
EP2671247B1 (en) 2015-07-22
US8796116B2 (en) 2014-08-05
WO2012106210A2 (en) 2012-08-09
SG191966A1 (en) 2013-08-30
TW201250838A (en) 2012-12-16
KR101871534B1 (ko) 2018-06-26
JP2014508405A (ja) 2014-04-03
WO2012106210A3 (en) 2012-11-01
CN103339713A (zh) 2013-10-02
EP2671247A2 (en) 2013-12-11
US20120193753A1 (en) 2012-08-02
KR20140018872A (ko) 2014-02-13
JP5976013B2 (ja) 2016-08-23
MY166803A (en) 2018-07-23
US20130168802A1 (en) 2013-07-04

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Effective date of registration: 20190925

Address after: Taiwan, China Hsinchu Science Park industrial two East Road, No. 8

Patentee after: GlobalWafers Co.,Ltd.

Address before: Singapore City

Patentee before: SunEdison Semiconductor Limited (UEN201334164H)

Effective date of registration: 20190925

Address after: Singapore City

Patentee after: SunEdison Semiconductor Limited (UEN201334164H)

Address before: Missouri, USA

Patentee before: MEMC Electronic Materials, Inc.