CN103311284A - 半导体器件及其制作方法 - Google Patents

半导体器件及其制作方法 Download PDF

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CN103311284A
CN103311284A CN2013102235717A CN201310223571A CN103311284A CN 103311284 A CN103311284 A CN 103311284A CN 2013102235717 A CN2013102235717 A CN 2013102235717A CN 201310223571 A CN201310223571 A CN 201310223571A CN 103311284 A CN103311284 A CN 103311284A
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semiconductor device
electrode
course
active area
shape key
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CN103311284B (zh
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程凯
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SUZHOU JINGZHAN SEMICONDUCTOR CO Ltd
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SUZHOU JINGZHAN SEMICONDUCTOR CO Ltd
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Priority to CN201310223571.7A priority Critical patent/CN103311284B/zh
Publication of CN103311284A publication Critical patent/CN103311284A/zh
Priority to PCT/CN2014/070150 priority patent/WO2014194669A1/zh
Priority to DK14807330.7T priority patent/DK3010043T3/da
Priority to SG11201510008UA priority patent/SG11201510008UA/en
Priority to US14/896,364 priority patent/US9640624B2/en
Priority to EP14807330.7A priority patent/EP3010043B1/en
Priority to KR1020157037194A priority patent/KR101780890B1/ko
Priority to JP2016517130A priority patent/JP6195979B2/ja
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Abstract

本发明公开了一种半导体器件及其制作方法，该半导体器件包括：半导体器件有源区；位于半导体器件有源区上的电极形状控制层，电极形状控制层中含有铝元素，铝元素的含量从半导体器件有源区由下至上逐渐减少；电极形状控制层上设有电极区，电极区设有向半导体器件有源区延伸并纵向贯穿所述电极形状控制层的凹槽，凹槽的侧面全部或部分为斜坡、或向两侧凹陷的弧形坡、或向中间凸出的弧形坡；全部或部分位于电极区中凹槽内的电极，电极形状与凹槽形状对应设置，电极底部与半导体器件有源区相接触。本发明通过控制电极的形状，改变电极附近电场强度的分布，提高半导体器件的击穿电压和可靠性等性能。

Description

半导体器件及其制作方法
技术领域
本发明涉及半导体技术领域，特别是涉及一种半导体器件及其制作方法。
背景技术
在半导体器件中，为了提高器件的击穿电压，改善器件的可靠性，电场强度如何分布，如何避免局部电场强度过大，是半导体器件设计中必须要考虑的问题之一。电场的分布可以通过很多办法控制，比如说对有源区进行调制掺杂，添加场板减小电场的最大值，也可以通过控制电极的形状对电场的分布进行约束。
例如：氮化镓基高电子迁移率晶体管，属于一种平面沟道场效应晶体管，其栅极形状的控制是非常重要的器件制造工艺之一。高电子迁移率晶体管的平面结构会引起电场强度的非均匀分布，特别是在源极和漏极之间的电压较高的情况下，在靠近漏极的栅极的边缘会产生极高的电场强度。图1示出了氮化镓基高电子迁移率晶体管工作时源极和漏极之间的电场强度分布，在靠近漏极的栅极的边缘电场强度很高，一旦该峰值电场超过氮化镓材料的临界电场，器件就会被击穿。由于器件的耐受电压是栅极和漏极间电场的积分，相对于均匀分布的电场，栅极边缘的电场越高，器件承受的电压就越小。此种现象会大大降低器件的工作性能，如导致器件的击穿电压降低和器件的可靠性下降等。
对于肖特基二极管来说，在其电极边缘的电场也存在一个局部的极大值，需要构建一个场板或者在边缘处形成耗尽层，改善电场的分布。
对于平面结构的LDMOS，以及具有垂直结构的MOSFET，如UMOS，电极边缘也存在峰值电场，也需要控制电极的形状或者添加边缘处场板等方法来改善电场的分布。对于具有垂直结构的UMOS或者VDMOS，边缘处的电场也同样需要加以控制。
为了改变电场强度的分布，改善器件的工作性能，电场的分布可以通过很多办法控制，比如说对有源区进行调制掺杂，使用场板减小电场的最大值，也可以通过控制电极的形状对电场的分布进行约束。
场板是通过对平面器件有源区的垂直耗尽来扩展平面器件的水平耗尽区，从而引起平面器件电场强度分布的改变。场板的位置可以在源极、栅极或漏极处，在器件中可以采用单个或多个场板，以改变电场强度的分布，降低靠近漏极的栅极边缘处的最大电场强度。
T型栅极（T-gate）通过把栅极形状制作成T型，利用T型栅极本身的形状特征来改变栅极处的电场分布。
在制作场板和T型栅极的工艺过程中，介质层是必不可少的，最常用的介质层是氮化硅。受到制作工艺的限制，复杂形状的场板在工艺上实现起来比较困难，要么制作工艺比较复杂，要么就根本无法实现。受到制作工艺的限制，栅极的形状也一直比较单一，多种形状的栅极同样制作起来比较困难，要么制作工艺比较复杂，要么也是根本无法实现。因此，迫切需要开发新的制作工艺来实现复杂形状的场板和多种形状的栅极。
因此，针对上述技术问题，有必要提供一种半导体器件及其制作方法。
发明内容
有鉴于此，本发明的目的在于提供一种新的半导体器件及其制作方法，采用了一种新的制作工艺使多种形状的电极的实现成为了可能。
本发明揭示了一种电极形状控制层，该电极形状控制层中含有铝元素，该层中铝元素的含量是可以调节的，电极形状控制层被刻蚀时，横向和纵向的刻蚀速度是随着铝元素的含量而变化的，这样可以控制刻蚀截面的形状，设计制作出不同形状的刻蚀截面，沉积电极后就制作出了相应形状的电极，从而达到了控制电极形状的目的。
调节电极形状控制层中铝元素的含量由下至上逐渐减少，例如：当下降趋势呈线性下降时，凹槽的侧面为斜坡，刻蚀截面的形状为梯形，沉积电极后，电极截面也为梯形，分散了电场峰值的分布；当下降趋势呈减速下降时，凹槽的侧面为向两侧凹陷的弧形坡，刻蚀截面的形状为U形，沉积电极后，电极截面也为U形，电极边缘的电场分布就发生了相应的变化，平缓了电场分布；当下降趋势呈加速下降时，凹槽的侧面为向中间凸出的弧形坡，沉积电极后，电极截面也凹槽界面相同，电极边缘的电场分布就发生了相应的变化，平缓了电场分布。
为了实现上述目的，本发明实施例提供的技术方案如下：
一种半导体器件，所述半导体器件包括：
半导体器件有源区；
位于所述半导体器件有源区上的电极形状控制层，所述电极形状控制层中含有铝元素，所述全部或部分电极形状控制层中铝元素的含量从半导体器件有源区由下至上逐渐减少，所述电极形状控制层上设有电极区，所述电极区设有向半导体器件有源区延伸并纵向贯穿所述电极形状控制层的凹槽，所述凹槽的侧面全部或部分为斜坡、或向两侧凹陷的弧形坡、或向中间凸出的弧形坡；
全部或部分位于所述电极区中凹槽内的电极，所述电极形状与凹槽形状对应设置，所述电极底部与半导体器件有源区相接触。
作为本发明的进一步改进，所述电极形状控制层为半导体层、第一介质层中一种或两种的组合。
作为本发明的进一步改进，所述半导体器件有源区和电极形状控制层中的半导体层为三族氮化物、硅、锗、锗硅、III-V族化合物、氧化物中一种或多种的组合。
作为本发明的进一步改进，所述第一介质层包括SiN、SiAlN、SiAlGaN、SiAlOx、AlMgON、HfAlOx中一种或多种的组合。
作为本发明的进一步改进，所述电极形状控制层为半导体层和第一介质层时，第一介质层位于半导体层的上方，所述半导体层中任意一处铝元素的含量高于第一介质层中任意一处铝元素的含量。
作为本发明的进一步改进，所述全部或部分电极形状控制层中铝元素的含量从半导体器件有源区由下至上呈线性下降、或加速下降、或减速下降、或先线性下降再保持不变、或先减速下降再保持不变、或先加速下降再保持不变。
作为本发明的进一步改进，所述电极形状控制层中的凹槽部分延伸至半导体器件有源区中。
作为本发明的进一步改进，所述电极形状控制层中的凹槽内壁及电极形状控制层表面上全部或部分沉积有第二介质层，所述电极全部或部分位于所述第二介质层上。
作为本发明的进一步改进，所述第二介质层包括Al2O3、AlON、SiN、SiON、SiO2、HfAlOx、HfO2中一种或多种的组合。
作为本发明的进一步改进，所述半导体器件包括二极管和三极管，所述电极包括二极管的阳极和阴极以及三极管的源极、漏极和栅极。
作为本发明的进一步改进，所述半导体器件有源区包括：铝镓氮/氮化镓异质结构成的高电子迁移率晶体管、铝镓铟氮/氮化镓异质结构成的高电子迁移率晶体管、氮化铝/氮化镓异质结构成的高迁移率三极管、氮化镓MOSFET、含有铟镓氮/镓氮多量子阱结构的器件、p型氮化物构成的发光二极管、UV-LED、光电探测器、氢气产生器、太阳能电池、LDMOS、UMOSFET、肖特基二极管或者雪崩击穿二极管。
相应地，一种半导体器件制作方法，所述方法包括：
S1、提供半导体器件有源区；
S2、在所述半导体器件有源区上形成电极形状控制层，所述电极形状控制层中含有铝元素，所述全部或部分电极形状控制层中铝元素的含量从半导体器件有源区由下至上逐渐减少，所述电极形状控制层上设有电极区；
S3、在所述电极区上形成向半导体器件有源区延伸并纵向贯穿所述电极形状控制层的凹槽，所述凹槽的侧面全部或部分为斜坡、或向两侧凹陷的弧形坡、或向中间凸出的弧形坡；
S4、在所述电极区中凹槽内的形成电极，所述电极全部或部分位于电极区中凹槽内，所述电极形状与凹槽形状对应设置，所述电极底部与半导体器件有源区相接触。
作为本发明的进一步改进，所述步骤S3和S4具体为：
S31、在所述电极形状控制层上涂上第一掩膜层，进行光刻，露出电极区；
S32、刻蚀所述电极区，形成向半导体器件有源区延伸的凹槽；
S33、去除第一掩膜层；
S41、在所述电极形状控制层上涂上第二掩膜层，进行光刻，露出电极区；
S42、沉积电极，去除第二掩膜层，形成电极。
作为本发明的进一步改进，所述步骤S2中的电极形状控制层为半导体层、第一介质层中一种或两种的组合，第一介质层的生长方式包括MOCVD、PECVD、LPCVD、MBE、CVD、或GCIB。
作为本发明的进一步改进，所述步骤S4前还包括：
在所述电极形状控制层中的凹槽内壁及电极形状控制层表面上全部或部分沉积第二介质层，第二介质层包括Al2O3、AlON、SiN、SiON、SiO2、HfAlOx、HfO2中一种或多种的组合。
本发明的有益效果是：本发明半导体器件及其制作方法在半导体器件中有源区上采用了一种电极形状控制层，电极形状控制层中的铝元素的含量是随着厚度的变化而变化的，通过控制电极形状控制层中所述元素的含量变化，来控制刻蚀过程中横向和纵向刻蚀速度的比例，从而改变刻蚀过程中的刻蚀截面形状，达到控制电极形成过程中电极的形状，从工艺上实现了对多种电极形状的控制。
由于刻蚀的速度是由材料的材质来控制，无需改变刻蚀过程中的工艺参数，因此控制性、重复性好，简单易行。另外，可以实现一些特殊的形状，这是普通刻蚀工艺无法实现的。通过控制电极的形状，改变电极附近电场强度的分布，提高半导体器件的击穿电压和可靠性等性能。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明中记载的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为氮化镓基高电子迁移率晶体管工作时源极和漏极之间的电场强度分布的示意图；
图2为本发明实施例一中半导体器件的结构示意图；
图3A至图3G所示为本发明实施例一中半导体器件的制作方法的流程示意图；
图4A至图4H所示为本发明实施例二中半导体器件的制作方法的流程示意图；
图5所示为本发明实施例三中半导体器件的示意图；
图6所示为本发明实施例四中半导体器件的示意图；
图7所示为本发明实施例五中半导体器件的示意图；
图8所示为本发明实施例六中半导体器件的示意图；
图9所示为本发明实施例七中半导体器件的示意图；
图10所示为本发明实施例八中半导体器件的示意图；
图11所示为本发明实施例九中半导体器件的示意图；
图12所示为本发明实施例十中半导体器件的示意图。
具体实施方式
以下将结合附图所示的具体实施方式对本发明进行详细描述。但这些实施方式并不限制本发明，本领域的普通技术人员根据这些实施方式所做出的结构、方法、或功能上的变换均包含在本发明的保护范围内。
此外，在不同的实施例中可能使用重复的标号或标示。这些重复仅为了简单清楚地叙述本发明，不代表所讨论的不同实施例及/或结构之间具有任何关联性。
本发明实施例公开了一种半导体器件，包括：
半导体器件有源区；
位于半导体器件有源区上的电极形状控制层，电极形状控制层中含有铝元素，全部或部分电极形状控制层中铝元素的含量从半导体器件有源区由下至上逐渐减少，电极形状控制层上设有电极区，电极区设有向半导体器件有源区延伸并纵向贯穿电极形状控制层的凹槽，凹槽的侧面全部或部分为斜坡、或向两侧凹陷的弧形坡、或向中间凸出的弧形坡；
全部或部分位于电极区中凹槽内的电极，电极形状与凹槽形状对应设置，所述电极底部与半导体器件有源区相接触。
相应地，本发明还公开了一种半导体器件制作方法，包括：
S1、提供半导体器件有源区；
S2、在半导体器件有源区上形成电极形状控制层，电极形状控制层中含有铝元素，全部或部分电极形状控制层中铝元素的含量从半导体器件有源区由下至上逐渐减少，电极形状控制层上设有电极区；
S3、在电极区上形成向半导体器件有源区延伸并纵向贯穿所述电极形状控制层的凹槽，凹槽的侧面全部或部分为斜坡、或向两侧凹陷的弧形坡、或向中间凸出的弧形坡；
S4、在电极区中凹槽内的形成电极，电极全部或部分位于电极区中凹槽内，电极形状与凹槽形状对应设置，电极底部与半导体器件有源区相接触。
以下结合各种不同的实施例对本发明作进一步说明。
实施例一：
本实施例中半导体器件结构参图2所示，该半导体器件包括：
半导体器件有源区1；
在半导体器件有源区1上的电极形状控制层2，电极形状控制层中含有铝元素，铝元素的含量从半导体器件有源区由下至上逐渐减少，下降趋势是线性下降，电极形状控制层2上定义有电极区，电极区设有向半导体器件有源区延伸并纵向贯穿电极形状控制层的凹槽，凹槽为倒置的梯形，侧面为斜坡；
位于电极区中凹槽内的电极5，电极5形状与凹槽形状对应设置，电极5与半导体器件有源区1相接触，本实施例中，电极5部分在凹槽内，部分位于凹槽上方。
参图3A-3G所示，本实施方式中半导体器件的制作方法包括：
提供半导体器件有源区1，参图3A所示；
在半导体器件有源区1上形成电极形状控制层2，电极形状控制层2中的铝元素的含量是由下至上逐渐减少，下降趋势是线性下降，电极形状控制层上定义有电极区，参图3B所示；
在电极形状控制层2上涂上第一掩膜层3，经过光刻，露出电极区，参图3C所示；
刻蚀电极区，形成向半导体器件有源区延伸的凹槽，凹槽至少部分贯穿电极形状控制层，凹槽的形状随着电极形状控制层2中的铝元素的含量的变化而变化，凹槽的特征尺寸可以通过刻蚀工艺进行调节，与光刻的特征尺寸相比，凹槽的特征尺寸可以略大于或略小于光刻的特征尺寸，分别参照图3D1和图3D2所示；
去掉第一掩膜层3，参图3E所示；
涂上第二掩膜层4，经过光刻，露出电极区，参图3F所示；
沉积电极，去掉第二掩膜层4，形成电极5，参图3G所示。
本实施方式中电极形状控制层中铝元素的含量由下至上逐渐减少，下降趋势呈线性下降时，凹槽的侧面为斜坡，刻蚀截面的形状为梯形，沉积电极后，电极截面也为梯形，这样就使得电极边缘的电场分布呈线性变化，分散了电场峰值的分布。
本实施方式中电极形状控制层2可为半导体层、第一介质层中一种或两种的组合。半导体器件半导体层为三族氮化物、硅、锗、锗硅、III-V族化合物、氧化物中一种或多种的组合；第一介质层包括SiN、SiAlN、SiAlGaN、SiAlOx、AlMgON、HfAlOx中一种或多种的组合。第一介质层的生长方式可以是MOCVD、PECVD、LPCVD、MBE、CVD、或GCIB。
当电极形状控制层2为半导体层和第一介质层时，第一介质层位于半导体层的上方，半导体层中任意一处铝元素的含量高于第一介质层中任意一处铝元素的含量，整体上电极形状控制层中铝元素的含量从半导体器件有源区由下至上逐渐线性减少。
本实施方式中半导体器件有源区包括：铝镓氮/氮化镓异质结构成的高电子迁移率晶体管、铝镓铟氮/氮化镓异质结构成的高电子迁移率晶体管、氮化铝/氮化镓异质结构成的高迁移率三极管、氮化镓MOSFET、含有铟镓氮/镓氮多量子阱结构的器件、p型氮化物构成的发光二极管、UV-LED、光电探测器、氢气产生器或太阳能电池，还可以为LDMOS、UMOSFET、二极管、肖特基二极管、雪崩击穿二极管等。
进一步地，电极形状控制层2中的凹槽内壁及电极形状控制层2表面上全部或部分沉积有第二介质层，电极全部或部分位于第二介质层上。第二介质层可以为Al2O3、AlON、SiN、SiON、SiO2、HfAlOx、HfO2中一种或多种的组合，沉积的方法为PECVD、LPCVD、CVD、ALD、MOCVD或PVD。
实施例二：
图4H为实施例二所描述的半导体器件的结构示意图；其结构与实施例一所描述的半导体器件基本相同，区别之处在于：凹槽部分延伸到了半导体器件有源区中。
该实施例对应的制作方法，参图4A-4H所示，具体制作步骤如下：
提供半导体器件有源区1，参图4A所示；
在半导体器件有源区1上形成电极形状控制层2，电极形状控制层2中的铝元素的含量是由下至上逐渐减少，下降趋势是线性下降，电极形状控制层上定义有电极区，参图4B所示；
在电极形状控制层2上涂上第一掩膜层3，经过光刻，露出电极区，参图4C所示；
刻蚀电极形状控制层2上的电极区，形成贯穿了电极形状控制层2的凹槽，凹槽的形状随着电极形状控制层2中的铝元素的含量的变化而变化，凹槽的特征尺寸可以通过刻蚀工艺进行调节，与光刻的特征尺寸相比，凹槽的特征尺寸可以略大于或略小于光刻的特征尺寸，参图4D所示为略大于的情形；
刻蚀凹槽处的半导体器件有源区，形成延伸至半导体器件有源区1中的凹槽，参图4E所示；
去掉第一掩膜层3，参图4F所示；
涂上第二掩膜层4，经过光刻，露出电极区，参4G所示；
沉积电极，去掉第二掩膜层4，形成电极5，参图4H所示。
其余结构及制作方法均与实施例一相同，在此不再赘述。
实施例三：
图5所示为实施例三所描述半导体器件的示意图。
本实施方式中电极形状控制层2中的铝元素的含量是由下至上逐渐减少，下降趋势是加速下降。其余同实施例一，在此不再赘述。
本实施例中电极形状控制层中铝元素的含量由下至上逐渐减少，下降趋势呈加速下降时，凹槽的侧面为向中间凸出的弧形坡，沉积电极后，电极截面也凹槽界面相同，电极边缘的电场分布就发生了相应的变化，平缓了电场分布。
实施例四：
图6所示为实施例四所描述半导体器件的示意图。
本实施方式中电极形状控制层2中的铝元素的含量是由下至上逐渐减少，下降趋势是减速下降。其余同实施例一，在此不再赘述。
本实施例中电极形状控制层中铝元素的含量由下至上逐渐减少，下降趋势呈减速下降时，凹槽的侧面为向两侧凹陷的弧形坡，刻蚀截面的形状为U形，沉积电极后，电极截面也为U形，电极边缘的电场分布就发生了相应的变化，平缓了电场分布。
实施例五：
图7所示为实施例五所描述半导体器件的示意图。
本实施例中电极形状控制层2中的铝元素的含量是由下至上先线性减速再保持不变。其余同实施例一，在此不再赘述。
本实施例中电极形状控制层中铝元素的含量先线性减速再保持不变，凹槽在线性减速部分为梯形，保持不变的部分为长方形，刻蚀截面的形状上方为长方形，下方为梯形，沉积电极后，电极截面与刻蚀截面相同。
实施例六：
图8所示为实施例六所描述半导体器件的示意图。
本实施例中电极形状控制层2中的铝元素的含量是由下至上先减速下降再保持不变。其余同实施例一，在此不再赘述。
本实施例中电极形状控制层中铝元素的含量先减速下降再保持不变，凹槽在减速下降部分为U形，保持不变的部分为长方形，刻蚀截面的形状上方为长方形，下方为U形，沉积电极后，电极截面与刻蚀截面相同。
实施例七：
图9所示为实施例七所描述半导体器件的示意图。
本实施方式中半导体器件有源区为氮化物高电子迁移率晶体管，在任意一种基板11上生长的成核层12，在成核层12上生长的氮化物缓冲层13，在氮化物缓冲层13上生长的氮化物沟道层14，在氮化物沟道层14上生长的氮化物势垒层15，在氮化物势垒层15上生长的氮化物冒层16。
电极51为栅电极，电极52和电极53分别为欧姆接触的源极和漏极。其中，电极形状控制层2中的铝元素的含量是由下至上逐渐减少，下降趋势是加速下降。因此，电极51在电极形状控制层2中为向中间凸出的弧形结构。
实施例八：
图10所示为实施例八所描述半导体器件的示意图。
本实施例中半导体器件有源区为N沟道增强型MOSFET，P型衬底11上的两个高掺杂的N+区12和13，电极形状控制层2为介质层，其中的铝元素的含量是由下至上逐渐减少，下降趋势是线性下降；电极51为栅极，电极52为源极，电极53为漏极。
实施例九：
图11所示为实施例九所描述半导体器件的示意图。
本实施例中半导体器件有源区为普通CMOS工艺制作的肖特基二极管，P型衬底11上的N型层12，N型层12中的N+阴极层13；电极形状控制层2为介质层，其中的铝元素的含量是由下至上逐渐减少，下降趋势是线性下降；电极51为阳极，电极52为阴极。
实施例十：
图12所示为实施例十中半导体器件的示意图。
本实施例中半导体器件有源区为垂直结构的PIN二极管，衬底11上的半导体N+层12，半导体N+层12上的半导体I层13，半导体I层13上的半导体P+层14；电极形状控制层2为介质层，其中的铝元素的含量是由下至上逐渐减少，下降趋势是线性下降；电极51为阳极，电极52为阴极。
由以上实施方式可以看出，本发明半导体器件及其制作方法在半导体器件中有源区上采用了一种电极形状控制层，电极形状控制层中的铝元素的含量是随着厚度的变化而变化的，通过控制电极形状控制层中所述元素的含量变化，来控制刻蚀过程中横向和纵向刻蚀速度的比例，从而改变刻蚀过程中的刻蚀截面形状，达到控制电极形成过程中电极的形状，从工艺上实现了对多种电极形状的控制。
由于刻蚀的速度是由材料的材质来控制，无需改变刻蚀过程中的工艺参数，因此控制性、重复性好，简单易行。另外，可以实现一些特殊的形状，这是普通刻蚀工艺无法实现的。通过控制电极的形状，改变电极附近电场强度的分布，提高半导体器件的击穿电压和可靠性等性能。
对于本领域技术人员而言，显然本发明不限于上述示范性实施例的细节，而且在不背离本发明的精神或基本特征的情况下，能够以其他的具体形式实现本发明。因此，无论从哪一点来看，均应将实施例看作是示范性的，而且是非限制性的，本发明的范围由所附权利要求而不是上述说明限定，因此旨在将落在权利要求的等同要件的含义和范围内的所有变化囊括在本发明内。不应将权利要求中的任何附图标记视为限制所涉及的权利要求。
此外，应当理解，虽然本说明书按照实施方式加以描述，但并非每个实施方式仅包含一个独立的技术方案，说明书的这种叙述方式仅仅是为清楚起见，本领域技术人员应当将说明书作为一个整体，各实施例中的技术方案也可以经适当组合，形成本领域技术人员可以理解的其他实施方式。

Claims (15)

1.一种半导体器件，其特征在于，所述半导体器件包括：
半导体器件有源区；
位于所述半导体器件有源区上的电极形状控制层，所述电极形状控制层中含有铝元素，所述全部或部分电极形状控制层中铝元素的含量从半导体器件有源区由下至上逐渐减少；所述电极形状控制层上设有电极区，所述电极区设有向半导体器件有源区延伸并纵向贯穿所述电极形状控制层的凹槽，所述凹槽的侧面全部或部分为斜坡、或向两侧凹陷的弧形坡、或向中间凸出的弧形坡；
全部或部分位于所述电极区中凹槽内的电极，所述电极形状与凹槽形状对应设置，所述电极底部与半导体器件有源区相接触。
2.根据权利要求1所述的半导体器件，其特征在于，所述电极形状控制层为半导体层、第一介质层中一种或两种的组合。
3.根据权利要求2所述的半导体器件，其特征在于，所述半导体器件有源区和电极形状控制层中的半导体层为三族氮化物、硅、锗、锗硅、III-V族化合物、氧化物中一种或多种的组合。
4.根据权利要求2所述的半导体器件，其特征在于，所述第一介质层包括SiN、SiAlN、SiAlGaN、SiAlOx、AlMgON、HfAlOx中一种或多种的组合。
5.根据权利要求2所述的半导体器件，其特征在于，所述电极形状控制层为半导体层和第一介质层时，第一介质层位于半导体层的上方，所述半导体层中任意一处铝元素的含量高于第一介质层中任意一处铝元素的含量。
6.根据权利要求1所述的半导体器件，其特征在于，所述全部或部分电极形状控制层中铝元素的含量从半导体器件有源区由下至上呈线性下降、或加速下降、或减速下降、或先线性下降再保持不变、或先减速下降再保持不变、或先加速下降再保持不变。
7.根据权利要求1所述的半导体器件，其特征在于，所述电极形状控制层中的凹槽部分延伸至半导体器件有源区中。
8.根据权利要求1所述的半导体器件，其特征在于，所述电极形状控制层中的凹槽内壁及电极形状控制层表面上全部或部分沉积有第二介质层，所述电极全部或部分位于所述第二介质层上。
9.根据权利要求8所述的半导体器件，其特征在于，所述第二介质层包括Al2O3、AlON、SiN、SiON、SiO2、HfAlOx、HfO2中一种或多种的组合。
10.根据权利要求1所述的半导体器件，其特征在于，所述半导体器件包括二极管和三极管，所述电极包括二极管的阳极和阴极以及三极管的源极、漏极和栅极。
11.根据权利要求10所述的半导体器件，其特征在于，所述半导体器件有源区包括：铝镓氮/氮化镓异质结构成的高电子迁移率晶体管、铝镓铟氮/氮化镓异质结构成的高电子迁移率晶体管、氮化铝/氮化镓异质结构成的高迁移率三极管、氮化镓MOSFET、含有铟镓氮/镓氮多量子阱结构的器件、p型氮化物构成的发光二极管、UV-LED、光电探测器、氢气产生器、太阳能电池、LDMOS、UMOSFET、肖特基二极管或者雪崩击穿二极管。
12.一种如权利要求1所述的半导体器件制作方法，其特征在于，所述方法包括：
S1、提供半导体器件有源区；
S2、在所述半导体器件有源区上形成电极形状控制层，所述电极形状控制层中含有铝元素，所述全部或部分电极形状控制层中铝元素的含量从半导体器件有源区由下至上逐渐减少，所述电极形状控制层上设有电极区；
S3、在所述电极区上形成向半导体器件有源区延伸并纵向贯穿所述电极形状控制层的凹槽，所述凹槽的侧面全部或部分为斜坡、或向两侧凹陷的弧形坡、或向中间凸出的弧形坡；
S4、在所述电极区中凹槽内的形成电极，所述电极全部或部分位于电极区中凹槽内，所述电极形状与凹槽形状对应设置，所述电极底部与半导体器件有源区相接触。
13.根据权利要求12所述的半导体器件制作方法，其特征在于，所述步骤S3和S4具体为：
S31、在所述电极形状控制层上涂上第一掩膜层，进行光刻，露出电极区；
S32、刻蚀所述电极区，形成向半导体器件有源区延伸的凹槽；
S33、去除第一掩膜层；
S41、在所述电极形状控制层上涂上第二掩膜层，进行光刻，露出电极区；
S42、沉积电极，去除第二掩膜层，形成电极。
14.根据权利要求12所述的半导体器件制作方法，其特征在于，所述步骤S2中的电极形状控制层为半导体层、第一介质层中一种或两种的组合，第一介质层的生长方式包括MOCVD、PECVD、LPCVD、MBE、CVD、或GCIB。
15.根据权利要求12所述的半导体器件制作方法，其特征在于，所述步骤S4前还包括：
在所述电极形状控制层中的凹槽内壁及电极形状控制层表面上全部或部分沉积第二介质层，第二介质层包括Al2O3、AlON、SiN、SiON、SiO2、HfAlOx、HfO2中一种或多种的组合。
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