CN107564960A - 一种GaNFinFETHEMT器件 - Google Patents

一种GaNFinFETHEMT器件 Download PDF

Info

Publication number
CN107564960A
CN107564960A CN201710579176.0A CN201710579176A CN107564960A CN 107564960 A CN107564960 A CN 107564960A CN 201710579176 A CN201710579176 A CN 201710579176A CN 107564960 A CN107564960 A CN 107564960A
Authority
CN
China
Prior art keywords
gan
finfet
grid
hemt
table top
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201710579176.0A
Other languages
English (en)
Inventor
倪炜江
袁俊
李百泉
张敬伟
李明山
孙安信
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BEIJING HUAJIN CHUANGWEI ELECTRONICS Co Ltd
Original Assignee
BEIJING HUAJIN CHUANGWEI ELECTRONICS Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BEIJING HUAJIN CHUANGWEI ELECTRONICS Co Ltd filed Critical BEIJING HUAJIN CHUANGWEI ELECTRONICS Co Ltd
Priority to CN201710579176.0A priority Critical patent/CN107564960A/zh
Publication of CN107564960A publication Critical patent/CN107564960A/zh
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7789Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface the two-dimensional charge carrier gas being at least partially not parallel to a main surface of the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

本发明公开了一种GaN FinFET HEMT器件,所述GaN FinFET HEMT器件的栅结构采用了三维立体FinFET栅结构,即芯片有源区表面具有规则有序的台面和凹槽,在台面的顶部、底部和侧壁区域都具有栅结构,并且在这三个区域也都具有源、漏极。本发明利用比较成熟的衬底台面刻蚀技术,通过在衬底上规则有序的刻蚀台面结构,在台面结构表面上生长GaN外延层,再进行器件制作工艺,形成三维立体的FinFET栅结构。本发明可以有效增加单位面积的栅宽,突破当前二维栅结构下的电流密度的限制。

Description

一种GaNFinFETHEMT器件
技术领域
本发明属于半导体器件技术领域,具体涉及一种GaN FinFET HEMT器件。
背景技术
GaN作为第三代宽禁带半导体材料的典型代表之一,与传统的半导体材料 Si、GaAs相比,具有禁带宽度宽、击穿电场大、电子饱和漂移速度高、介电常数小以及良好的化学稳定性等特点。特别是基于GaN材料的AlGaN/GaN异质结高电子迁移率晶体管(HEMT)结构具有更高的电子迁移率(高于1800cm2V-1s-1) 和二维电子气(2DEG)面密度(约1013cm-2),使得基于GaN材料器件在射频领域和电力电子领域都具有非常明显的优势。
随着技术的发展,GaN HEMT器件的电流密度逐步得到了提升,主要是通过增加单位栅宽的电流和单位面积的栅宽来实现,即单栅宽电流密度和单位面积的栅宽。对于单栅宽电流密度,主要是通过减小沟道电阻,特别是栅控制沟道的电阻来实现,如优化、减少栅长,或则减少栅界面态密度提高沟道电子浓度和迁移率。而对于提高单位面积的栅宽方法,主要是通过优化减少原胞的尺寸,如优化源栅、栅漏之间的间隔来实现。
发明内容
针对现有技术中存在的问题,本发明的目的在于提供一种GaN FinFET HEMT 器件,其可以有效增加单位面积的栅宽,突破当前二维栅结构下的电流密度的限制。
为实现上述目的,本发明采用以下技术方案:
一种GaN FinFET HEMT器件,所述GaN FinFET HEMT器件的栅结构采用了三维立体FinFET栅结构,即芯片有源区表面具有规则有序的台面和凹槽,在台面的顶部、底部和侧壁区域都具有栅结构,并且在这三个区域也都具有源、漏极。
进一步,所述台面为垂直台面或倾斜台面。
进一步,所述台面的深度要大于总的外延层的厚度;总的外延层包括GaN 缓冲层和GaN沟道层。
进一步,所述GaN FinFET HEMT器件包括MES HEMT、MOS沟道HEMT和 MIS-HEMT。
本发明具有以下有益技术效果:
本发明利用比较成熟的衬底台面刻蚀技术,通过在衬底上规则有序的刻蚀台面结构,在台面结构表面上生长GaN外延层,再进行器件制作工艺,形成三维立体的FinFET栅结构。本发明可以有效增加单位面积的栅宽,突破当前二维栅结构下的电流密度的限制。
本发明可应用于各种不同的GaN HEMT截面结构的器件,通过改变垂直于截面方向的栅的结构,采用三维立体的FinFET栅结构,有效的增加了器件的总栅宽和单位芯片面积的栅宽。
附图说明
图1为MES HEMT器件结构的截面示意图;
图2为MOS沟道HEMT器件结构的截面示意图;
图3为凹槽结构HEMT器件结构的截面示意图;
图4为现有技术中平面栅结构的GaN HEMT器件;
图5为本发明三维立体的FinFET栅结构HEMT器件的结构示意图;
图6为图5中B-B’的截面结构示意图。
具体实施方式
下面,参考附图,对本发明进行更全面的说明,附图中示出了本发明的示例性实施例。然而,本发明可以体现为多种不同形式,并不应理解为局限于这里叙述的示例性实施例。而是,提供这些实施例,从而使本发明全面和完整,并将本发明的范围完全地传达给本领域的普通技术人员。
如图1-3所示,GaN HEMT器件有各种不同的结构,如MES HEMT、MOS沟道 HEMT、MIS-HEMT等多种,其均包括衬底1、AlN成核层2、GaN缓冲层3、GaN 沟道层4、AlN插入层5、AlGaN势垒层6、GaN帽层7、漏极8、源极9和栅极10,本发明可应用于各种不同的GaN HEMT截面结构的器件,通过改变垂直于截面方向的栅的结构,采用三维立体的FinFET栅结构,有效的增加了器件的总栅宽和单位芯片面积的栅宽。
如图4所示,现有技术中的GaN HEMT器件,是一种平面的栅结构,器件的所有栅沟道分布在源漏的同一个平面上,总的栅宽受到了芯片面积及源漏区域的限制。
如图5-6所示,本发明提供了一种GaN FinFET HEMT器件,该GaN FinFET HEMT器件的栅结构采用了三维立体FinFET栅结构,即芯片有源区表面具有规则有序的台面和凹槽,在台面的顶部、底部和侧壁区域都具有栅结构,并且在这三个区域也都具有源、漏极,有效的增加了在相同芯片面积下的栅宽。相比于平面栅结构,新发明结构增加了侧壁部分的栅宽,具体的增加比例与台面的深宽比有关,栅宽的增加比例可由以下公式得到:
2*Ls/(Wm+Wt)
Ls为台面侧壁长度,Wm为台面宽度,Wt为凹槽的宽度。如对于深宽比为1 的垂直台面,台面的宽度等于凹槽的宽度,同时等于深度,因此总的栅宽相比于平面结构的器件增加1倍。本发明中的台面可以是垂直台面,也可以是倾斜台面。
台面的深度要大于总的外延层的厚度;总的外延层包括GaN缓冲层和GaN 沟道层;这样生长完外延材料后就具有明显的侧壁长度。
本发明的GaN FinFET HEMT器件制作方法与常规器件类似。首先在衬底材料上通过图形化的掩膜刻蚀台面结构。刻蚀完后再根据不同的衬底材料进行不同的刻蚀后处理工艺,如对Si、SiC可以采用不用温度的高温退火和牺牲氧化方法,改善衬底的粗糙度和均匀性。
然后,在有台面微结构的衬底上,生长GaN的外延层。一般地,先生长AlN 成核层,再生长GaN缓冲层,改善衬底和外延层之间的晶格失配,以便生长高质量的外延层。然后再生长GaN外延层,一般为无故意掺杂型。再生长AlN插入层,AlGaN势垒层,及GaN帽层。由于GaN/AlGaN的异质结结构,在GaN外延层的表面将产生高浓度的二维电子气11。
接下来器件的制作方法与对应的平面栅结构器件的方法一致。
本发明的GaN器件适用于各种衬底,如SiC、Si、GaN、Al2O3等,器件结构和制作方法是类似的。并且本发明的GaN HEMT结构可以是射频(RF)器件,也可以是电力电子器件。
上面所述只是为了说明本发明,应该理解为本发明并不局限于以上实施例,符合本发明思想的各种变通形式均在本发明的保护范围之内。

Claims (4)

1.一种GaN FinFET HEMT器件,其特征在于,所述GaN FinFET HEMT器件的栅结构采用了三维立体FinFET栅结构,即芯片有源区表面具有规则有序的台面和凹槽,在台面的顶部、底部和侧壁区域都具有栅结构,并且在这三个区域也都具有源、漏极。
2.根据权利要求1所述的GaN FinFET HEMT器件,其特征在于,所述台面为垂直台面或倾斜台面。
3.根据权利要求1所述的GaN FinFET HEMT器件,其特征在于,所述台面的深度要大于总的外延层的厚度;总的外延层包括GaN缓冲层和GaN沟道层。
4.根据权利要求1所述的GaN FinFET HEMT器件,其特征在于,所述GaN FinFET HEMT器件包括MES HEMT、MOS沟道HEMT和MIS-HEMT。
CN201710579176.0A 2017-07-17 2017-07-17 一种GaNFinFETHEMT器件 Pending CN107564960A (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710579176.0A CN107564960A (zh) 2017-07-17 2017-07-17 一种GaNFinFETHEMT器件

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710579176.0A CN107564960A (zh) 2017-07-17 2017-07-17 一种GaNFinFETHEMT器件

Publications (1)

Publication Number Publication Date
CN107564960A true CN107564960A (zh) 2018-01-09

Family

ID=60973591

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710579176.0A Pending CN107564960A (zh) 2017-07-17 2017-07-17 一种GaNFinFETHEMT器件

Country Status (1)

Country Link
CN (1) CN107564960A (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111699560A (zh) * 2018-02-06 2020-09-22 日产自动车株式会社 半导体装置
CN111710650A (zh) * 2020-08-20 2020-09-25 浙江集迈科微电子有限公司 基于双沟道栅的GaN器件及其制备方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103227199A (zh) * 2013-04-19 2013-07-31 中国科学院苏州纳米技术与纳米仿生研究所 高性能半导体电子器件
US20130277683A1 (en) * 2011-12-19 2013-10-24 Han Wui Then Non-planar iii-n transistor
CN104051520A (zh) * 2013-03-15 2014-09-17 半导体元件工业有限责任公司 高电子迁移率的半导体器件及其方法
US20150255592A1 (en) * 2011-11-15 2015-09-10 Young-Jin Cho Semiconductor device including a gate electrode on a protruding group iii-v material layer and method of manufacturing the semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150255592A1 (en) * 2011-11-15 2015-09-10 Young-Jin Cho Semiconductor device including a gate electrode on a protruding group iii-v material layer and method of manufacturing the semiconductor device
US20130277683A1 (en) * 2011-12-19 2013-10-24 Han Wui Then Non-planar iii-n transistor
CN104051520A (zh) * 2013-03-15 2014-09-17 半导体元件工业有限责任公司 高电子迁移率的半导体器件及其方法
CN103227199A (zh) * 2013-04-19 2013-07-31 中国科学院苏州纳米技术与纳米仿生研究所 高性能半导体电子器件

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111699560A (zh) * 2018-02-06 2020-09-22 日产自动车株式会社 半导体装置
EP3751622A4 (en) * 2018-02-06 2021-05-26 Nissan Motor Co., Ltd. SEMICONDUCTOR DEVICE
CN111699560B (zh) * 2018-02-06 2024-04-30 日产自动车株式会社 半导体装置
US11973135B2 (en) 2018-02-06 2024-04-30 Nissan Motor Co., Ltd. Semiconductor device
CN111710650A (zh) * 2020-08-20 2020-09-25 浙江集迈科微电子有限公司 基于双沟道栅的GaN器件及其制备方法

Similar Documents

Publication Publication Date Title
CN108028273B (zh) 半导体装置和制造半导体装置的方法
US20170125571A1 (en) Semiconductor device and method for manufacturing the same
US10910480B2 (en) Transistor with multi-metal gate
US20220344485A1 (en) Gallium Nitride Device, Switching Power Transistor, Drive Circuit, and Gallium Nitride Device Production Method
CN102201442B (zh) 基于沟道阵列结构的异质结场效应晶体管
US20190333767A1 (en) Depletion mode semiconductor devices including current dependent resistance
KR101672396B1 (ko) 4원계 질화물 전력반도체소자 및 이의 제조 방법
CN105762078A (zh) GaN基纳米沟道高电子迁移率晶体管及制作方法
CN105576020B (zh) 具有纵向栅极结构的常关型hemt器件及其制备方法
CN104299999A (zh) 一种具有复合栅介质层的氮化镓基异质结场效应晶体管
CN105448962A (zh) 多沟道侧栅结构的AlGaN/GaN高电子迁移率晶体管
CN103489897B (zh) 基于iii族氮化物材料的准线性掺杂的器件结构
CN111081763B (zh) 一种场板下方具有蜂窝凹槽势垒层结构的常关型hemt器件及其制备方法
CN206116406U (zh) 一种具有复合势垒层结构的常关型iii‑v异质结场效应晶体管
CN100505304C (zh) 一种氮化镓基场效应管及其制作方法
CN107564960A (zh) 一种GaNFinFETHEMT器件
CN107093629B (zh) 增强型hfet
CN108346687B (zh) 一种氮化镓基高电子迁移率晶体管
CN107527952B (zh) 一种Nano-Fin栅结构的混合阳极二极管
CN104966732A (zh) GaAs基pHEMT器件及其制备方法
CN113725288B (zh) 一种高电子迁移率晶体管的栅结构及其制备方法
CN106373991B (zh) 一种氮面增强型氮化镓基异质结场效应管
CN109817711B (zh) 具有AlGaN/GaN异质结的氮化镓横向晶体管及其制作方法
CN109888009B (zh) 具有AlGaN/GaN异质结的横向晶体管及其制作方法
CN205881909U (zh) 一种新型常关型iii-v异质结场效应晶体管

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20180109