CN103305160B - 粘接剂组合物、粘接片及半导体装置的制造方法 - Google Patents

粘接剂组合物、粘接片及半导体装置的制造方法 Download PDF

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CN103305160B
CN103305160B CN201310084538.0A CN201310084538A CN103305160B CN 103305160 B CN103305160 B CN 103305160B CN 201310084538 A CN201310084538 A CN 201310084538A CN 103305160 B CN103305160 B CN 103305160B
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foregoing
adhesive layer
adhesive
resin
acrylate copolymer
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CN103305160A (zh
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土山佐也香
市川功
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Lintec Corp
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Lintec Corp
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Abstract

提供一种粘接剂组合物，能够于粘接剂层中将耦合剂均匀的混合，即使在多段封装的制造时对粘接剂层采用一次全部硬化工艺的情形，能够在一次全部硬化前稳定的进行打线，硬化后显示优良的粘接强度，特别是于半导体装置达成高封装信赖性。本发明的粘接剂组合物，其特征在于包含丙烯酸聚合物(A)、具有不饱和烃基的热硬化性树脂(B)以及具有反应性双键基的耦合剂(C)。

Description

粘接剂组合物、粘接片及半导体装置的制造方法
技术领域
本发明是有关于一种粘接剂组合物，特别适合使用于将硅晶片等切割且得到的半导体芯片粘接于(晶粒结着(die bonding))有机基板、导线架或其它半导体芯片的步骤，并有关于具有该粘接剂组合物所构成的粘接剂层的粘接片以及使用该粘接片的半导体装置的制造方法。
背景技术
硅、砷化镓等的半导体晶片以大直径的状态制造，此晶片被切割分离(dicing)为组件小片(半导体芯片)后，移行至作为下一步骤的安装步骤。此时，半导体晶片以预先贴附于粘接片的状态施加切割、洗净、干燥、扩展、拾取的各步骤后，移送至下个步骤的结着步骤。
于这些步骤中，为了简化拾取步骤以及结着步骤的工艺，提出有种种的同时兼具有晶片固定功能与晶粒粘接功能之切割·晶粒结着用粘接片(专利文献1等)。专利文献1所揭示的粘接片，能够进行所谓的直接晶粒结着，并能够省略晶粒粘接用粘接剂的涂布步骤。此粘接剂包含丙烯酸聚合物、含有不饱和烃基的环氧树脂以及热硬化剂，因应需要含有硅烷耦合剂等的耦合剂。
对于近年的半导体装置，所要求的物性变得非常严苛。例如是于电子组件的连接中，进行封装全体都暴露于焊料熔点以上的高温的表面封装法(回流)。而且，近年来由于移行至不含铅的焊料，封装温度上升至260℃的程度。因此，封装时的半导体封装内部所发生的应力变得比以往来的更大，产生粘接界面的剥离或封装破裂等不良状况的可能性高。此处，于前述专利文献1，作为环氧树脂使用含有不饱和烃基的环氧树脂，通过提升丙烯酸树脂与环氧树脂的相溶性，改善粘接可靠性。
而且，为了高密度封装，提出有将芯片多段层积的封装结构。此封装结构不仅必须连接基板与芯片，亦必须粘接芯片与芯片。多段封装是在芯片上 经由粘接剂层而层积芯片，并于粘接剂层硬化后进行打线(wire bonding)，进而依序进行芯片的层积、粘接剂层的硬化、打线，以将芯片层积。然而，由于此方法于每次层积芯片时进行粘接剂层的硬化，如芯片的层积数增大，制造步骤会增加，因而追求生产效率的改善。
此处，检讨在层积芯片时不进行粘接剂层的硬化，于粘接剂层未硬化或半硬化的状态进行层积或打线，在所有的芯片层积后，利用模密封步骤时长时间暴露于高温，将粘接剂层一次全部进行完全硬化。通过采用此种的一次全部硬化，能够省略进行粘接剂层的逐次硬化的时间，改善生产效率。但是，采用此制法时，于打线时粘接剂层为未硬化或半硬化的状态。因此，打线时会芯片震动、位移，特别是芯片与芯片彼此层积时，芯片间的密接性降低，有可能在打线时产生故障。为了提升芯片与芯片的密接性，在粘接剂层中调配有耦合剂被认为是有希望的。
【先前技术文献】
【专利文献】
【专利文献1】日本特开2008-133330号公报。
发明内容
【发明所要解决的课题】
但是，于粘接剂中均匀的混合耦合剂并不见得容易。如粘接剂中的耦合剂的分散性差，粘接力变得不安定，制品间的散乱变大。
而且，即使如同上述的粘接剂层采用一次全部硬化工艺的情形，由于打线时需要150℃以上的高温，粘接剂层有可能部分硬化。在此种不期望的硬化时，由于未进行加压，如果粘接剂硬化则成为仅失去粘接力，导致粘接强度的降低。粘接剂层如部分硬化，特别是对于凹凸表面的追随性降低，对于凹凸较大的基板表面或晶粒垫的粘接性显著降低。因此，于制造多段封装时，为了确实进行基板与芯片的粘接，有必要使用与芯片与芯片粘接所用的粘接剂不同的粘接剂，或是基板与芯片的粘接硬化与上述的一次全部硬化分开进行，而被认为是生产性降低的原因。
因此，本发明的目的为提供一种粘接剂组合物，能够于粘接剂层中将耦合剂均匀的混合，即使在多段封装的制造时对粘接剂层采用一次全部硬化工 艺的情形，能够在一次全部硬化前稳定的进行打线，在硬化后显示优良的粘接强度，特别是于半导体装置达成高封装可靠性。并提供具有该粘接剂组合物所构成的粘接剂层的粘接片以及使用该粘接片的半导体装置的制造方法。
【用于解决课题的手段】
为了解决上述课题的本发明包含以下的要旨。
(1)一种粘接剂组合物，包含丙烯酸聚合物(A)、具有不饱和烃基的热硬化性树脂(B)以及具有反应性双键基的耦合剂(C)。
(2)如(1)所述的粘接剂组合物，前述耦合剂(C)为具有反应性双键的硅烷耦合剂。
(3)如(1)或(2)所述的粘接剂组合物，其含有填料(G)。
(4)一种单层粘接膜，由如(1)～(3)中任一项所述的粘接剂组合物所构成。
(5)一种粘接片，将如(1)～(3)中任一项所述的粘接剂组合物所构成的粘接剂层形成于支撑体上而成。
(6)如(5)所述的粘接片，支撑体为树脂膜。
(7)如(5)所述的粘接片，支撑体为切割片。
(8)一种半导体装置的制造方法，包括下述步骤：将上述(5)～(7)中任一项所述的粘接片的粘接剂层贴附于半导体晶片；切割前述半导体晶片以及粘接剂层以形成半导体芯片；使粘接剂层固着残存于前述半导体芯片而从支撑体剥离；以及将前述半导体芯片经由前述粘接剂层粘接于晶粒垫部上或其它半导体芯片上。
【发明功效】
如依本发明，能够于粘接剂层中均匀的混合耦合剂，于未硬化或半硬化状态，芯片彼此之间或是芯片与基板互相密接。因此，即使是于多段封装的制造时采用将粘接剂层一次全部硬化工艺的情形，亦能够稳定的进行打线，并且以优良的粘接强度将半导体芯片与其它半导体芯片或基板接合，即使是在严苛的环境下，亦能够得到显示高封装可靠性的半导体装置。
具体实施方式
以下，对本发明的粘接剂组合物、粘接片以及使用该片的半导体装置的制造方法进一步具体的说明。
(粘接剂组合物)
本发明的树脂组合物，包含丙烯酸聚合物(A)(以下亦称为“(A)成分”。其它成分亦相同。)、热硬化性树脂(B)、耦合剂(C)作为必须成分，为了改良各种物性，亦可以因应需要包含其它成分。以下，对这些以各成分具体的说明。
(A)丙烯酸聚合物
作为丙烯酸聚合物(A)可使用以往公知的丙烯酸聚合物。丙烯酸聚合物(A)的重量平均分子量(Mw)较佳为1万～200万，更佳为10万～150万。若丙烯酸聚合物(A)的重量平均分子量过低，则粘接剂层与支撑体的粘接力变高而可能会产生芯片的拾取不良。若丙烯酸聚合物(A)的重量平均分子量过高，则粘接剂层有可能无法对被着体的凹凸进行追随，有可能成为空洞等的产生要因。丙烯酸聚合物(A)的重量平均分子量为使用凝胶渗透层析(GPC)法所测定的聚苯乙烯换算值。
丙烯酸聚合物(A)的玻璃转移温度(Tg)较佳为-60～70℃，更佳为-30～50℃。若丙烯酸聚合物(A)的Tg过低，则可能会因粘接剂层与支撑体的剥离力变大而产生芯片的拾取不良。若丙烯酸聚合物(A)的Tg过高，则用于固定晶片的粘接力有变得不充分的疑虑。
作为构成丙烯酸聚合物(A)的单体，例如是可举出(甲基)丙烯酸酯及其衍生物。作为具体例可举出(甲基)丙烯酸甲酯、(甲基)丙烯酸乙酯、(甲基)丙烯酸丙酯、(甲基)丙烯酸丁酯等的烷基的碳数为1～18之(甲基)丙烯酸烷基酯；(甲基)丙烯酸环烷酯、(甲基)丙烯酸苄酯、(甲基)丙烯酸异莰酯、(甲基)丙烯酸二环戊酯、(甲基)丙烯酸二环戊烯酯、(甲基)丙烯酸二环戊烯基氧基乙酯、酰亚胺(甲基)丙烯酸酯等的具有环状骨架的(甲基)丙烯酸酯；(甲基)丙烯酸酯羟基甲酯、(甲基)丙烯酸酯2-羟基乙酯、(甲基)丙烯酸酯2-羟基丙酯等含有羟基的(甲基)丙烯酸酯；丙烯酸环氧丙酯、(甲基)丙烯酸环氧丙酯等。而且，亦可以使用丙烯酸、甲基丙烯酸、亚甲基丁二酸等。这些可单独使用1种，亦可并用两种以上。
这些之中，作为构成丙烯酸聚合物(A)的单体，由得到与后述的热硬化性树脂(B)相溶性良好的丙烯酸聚合物的观点来看，较佳是使用至少含有羟基的(甲基)丙烯酸酯。于此情形，于丙烯酸聚合物(A)中，源自含有羟基的(甲基) 丙烯酸酯的构成单元，较佳是以1～20质量%的范围含有，更佳是以3～15质量%的范围含有。作为丙烯酸聚合物(A)，具体而言较佳是(甲基)丙烯酸烷基酯与含有羟基的(甲基)丙烯酸酯的共聚物。
而且，在不损及本发明的目的的范围内，亦可以与上述(甲基)丙烯酸酯及其衍生物一起而将乙酸乙烯酯、丙烯腈等作为丙烯酸聚合物(A)的原料单体使用。
在粘接剂组合物的全重量中，丙烯酸聚合物(A)较佳是以50质量%以上的比例含有。通过此构成，使用于将粘接剂层一次全部硬化工艺时成为较佳的性状。这是因为即使硬化前的粘接剂暴露于高温之际亦能够保持某程度的硬度，因而能够进行打线。亦即是，若粘接剂组合物的丙烯酸聚合物(A)的含量较多，则即使在热硬化前粘接剂层的储藏弹性模数亦能够高。因此，即使粘接剂层为未硬化或半硬化的状态，亦成为抑制打线时的芯片的振动、位移，而稳定的进行打线。依此，为了确保步骤适性而增加丙烯酸聚合物(A)的含量时，相对的热硬化性树脂(B)的量变少。因此有硬化不足的可能性，但是本发明的粘接剂组合物能够经由反应性双键将热硬化性树脂(B)与具有反应性双键基的耦合剂结合，因而能够消除此种的硬化不足的问题。在粘接剂组合物的全重量中，丙烯酸聚合物(A)更佳是以50～90质量%的比例含有，更较佳是以50～80质量%的比例含有。
(B)具有不饱和烃基的热硬化性树脂
热硬化性树脂(B)由环氧树脂以及热硬化剂所构成，本发明在环氧树脂以及热硬化剂的任一方或是两方具有不饱和烃基。作为环氧树脂为具有不饱和烃基的环氧树脂(B1)以及不具有不饱和烃基的环氧树脂(B1')，作为热硬化剂为具有不饱和烃基的热硬化剂(B2)以及不具有不饱和烃基的热硬化剂(B2')。于本发明的热硬化性树脂(B)中，须包含具有不饱和烃基的环氧树脂(B1)以及具有不饱和烃基的热硬化剂(B2)的其中之一作为必须成分。而且，包含具有不饱和烃基的环氧树脂(B1)以及不具有不饱和烃基的环氧树脂(B1')的其中之一作为必须成分，包含具有不饱和烃基的热硬化剂(B2)以及不具有不饱和烃基的热硬化剂(B2')的其中之一作为必须成分。但是，环氧树脂以及热硬化性树脂的两方不具有不饱和烃基的情形，亦即是仅由成分(B1')与成分(B2')的组合除外。
由于热硬化性树脂(B)具有不饱和烃基，与不具有不饱和烃基的热硬化性树脂相较之下，与丙烯酸聚合物(A)以及后述的耦合剂(C)的相溶性高。因此，本发明的粘接剂组合物与仅包含不具有不饱和烃基的热硬化性树脂作为热硬化性树脂之粘接剂组合物相较之下，可靠性更为提升。
不饱和烃基为具有聚合性的不饱和基，作为具体例可举出乙烯基、烯丙基、丙烯酰基、甲基丙烯酰基、丙烯酰胺基、甲基丙烯酰胺基等，较佳是可举出丙烯酰基。因此，本发明的不饱和基并不是不具有聚合性的双键。例如是，于成分(B)可含有芳香环，但芳香环的不饱和结构并不是本发明的不饱和烃基。
作为具有不饱和烃基的环氧树脂(B1)，为了提升粘接剂的热硬化后的强度或耐热性，较佳为具有芳香环的树脂。而且，作为此种具有不饱和烃基的环氧树脂(B1)，例如是可举出多官能环氧树脂的环氧基的一部分变换为包含不饱和烃基的基之化合物。此种化合物例如是可通过使丙烯酸对环氧基加成反应而合成。或者是可举出于构成环氧基的芳香环等直接键结包含不饱和烃基的基之化合物。
此处，作为具有不饱和烃基的环氧树脂(B1)，可举出下述式(1)所表示的化合物、下述式(2)所表示的化合物或是使丙烯酸对后述的不具有不饱和烃基的环氧树脂(B1')的一部分的环氧基加成反应所得的化合物等。
【化1】
〔R为H-或是CH3-，n为0～10的整数。〕
【化2】
〔X为或是
R为H-或是CH3-，n为0～10的整数。〕
而且，通过使不具有不饱和烃基的环氧树脂(B1')与丙烯酸反应所得的具有不饱和烃基的环氧树脂(B1)，具有成为未反应物与环氧基完全被消费的化合物之混合物的情形，但是于本发明中，只要是实质的包含上述化合物者即可。
作为不具有不饱和烃基的环氧树脂(B1')，可使用以往公知的环氧树脂。作为此种的环氧树脂，具体而言可举出多官能系环氧树脂、或联苯化合物、双酚A二环氧丙基醚或其氢化物、甲酚酚醛清漆型环氧树脂、二环戊二烯型环氧树脂、联苯型环氧树脂、双酚A型环氧树脂、双酚F型环氧树脂、亚苯基骨架型环氧树脂等，分子中具有2官能以上的环氧化合物。这些可单独1种或是组合2种以上使用。
环氧树脂(B1)以及(B1')的数量平均分子量并没有特别的限制，由粘接剂的硬化性或硬化后的强度或耐热性的观点来看，较佳为300～30000，更佳为400～10000，特佳为500～3000。而且，相对于该环氧树脂总量中的环氧基100摩尔，该环氧树脂的总量[(B1)+(B1')]中的不饱和基的含量期望为0.1～1000摩尔，较佳为1～500摩尔，更较佳为10～400摩尔。如为0.1摩尔以下则没有提升封装可靠性的效果，如为1000摩尔以上则有热硬化性变得不充分的疑虑。
热硬化剂是相对于环氧树脂(B1)以及(B1')作为硬化剂的功能，且于本发明，使用具有不饱和烃基的热硬化剂(B2)以及不具有不饱和烃基的热硬化剂(B2')，在环氧树脂仅使用不具有不饱和烃基的环氧树脂(B1')时，具有不饱和 烃基的热硬化剂(B2)作为必须成分使用。在环氧树脂具有不饱和烃基时，使用热硬化剂(B2)以及热硬化剂(B2')的何者皆可以。
具有不饱和烃基的热硬化剂(B2)具有聚合性的不饱和烃基，较佳可举出乙烯基、烯丙基、丙烯酰基、甲基丙烯酰基、丙烯酰胺基、甲基丙烯酰胺基等，更佳包含甲基丙烯酰基、丙烯酰胺基。而且，再更佳为在这些之外包含可与环氧基反应的官能基。作为可与环氧基反应的官能基较佳为可举出苯酚性羟基、醇性羟基、胺基、羧基以及酸酐等，这些之中更佳为苯酚性羟基、醇性羟基、胺基，特佳为苯酚性羟基。
作为具有不饱和烃基的热硬化剂(B2)，例如是可举出苯酚树脂的羟基的一部分以包含不饱和烃基的基取代而成的化合物，或者是在苯酚树脂的芳香环直接键结包含不饱和烃基的基的化合物等。此处作为苯酚性树脂，可举出下述式(化3)所示的酚醛清漆型苯酚树脂、(化4)所示的二环戊二烯型苯酚树脂、(化5)所示的多官能系苯酚树脂等，特别是较佳为酚醛清漆型苯酚树脂。因此，作为具有不饱和烃基的热硬化剂(B2)，较佳为将酚醛清漆型苯酚树脂的羟基的一部分以包含不饱和烃基的基取代而成的化合物，或者是在酚醛清漆型苯酚树脂的芳香环直接键结包含不饱和烃基的基的化合物。
【化3】
【化4】
【化5】
作为具有不饱和烃基的热硬化剂(B2)的特佳例，可举出如下述式(a)所示的在含有苯酚性羟基的重复单元的一部分中导入不饱和烃基之结构，下述式(b)或(c)所示的包含重复单元的化合物，其中重复单元具有包含不饱和烃基的基。特佳是具有不饱和烃基的热硬化剂(B2)包含下述式(a)的重复单元与下述式(b)或(c)的重复单元。
【化6】
(式中n为0或1。)
【化7】
(式中n为0或1，R1为可具有羟基的碳数1～5的烃基，X为-O-、-NR2(R2为氢或甲基)，或是R1X为单键，A为丙烯酰基或甲基丙烯酰基)
重复单元(a)所代表的苯酚性羟基为可与环氧基反应的官能基，具有作为粘接剂组合物的热硬化时与环氧树脂的环氧基反应硬化之硬化剂的功能。而且，重复单元(b)或(c)所代表的不饱和烃基，具有于粘接剂组合物的能量线硬化时聚合硬化，并使粘接剂层与支撑体的粘接力降低的作用。而且，重复单 元(b)或(c)所代表的不饱和烃基，使丙烯酸聚合物(A)与热硬化性树脂(B)的相溶性提升。依此结果，粘接剂组合物的硬化物成为更强韧的性质，依此提升作为粘接剂的可靠性。此热硬化剂(B2)的前述(a)式所示的重复单元的比例为5～95摩尔%，更佳为20～90摩尔%，特佳为40～80摩尔%，前述(b)或(c)式所示的重复单元的比例合计为5～95摩尔%，更佳为10～80摩尔%，特佳为20～60摩尔%。
作为不具有不饱和烃基的热硬化剂(B2')，可举出1分子中具有2个以上可与环氧基反应的官能基之化合物。作为此官能基可举出苯酚性羟基、醇性羟基、胺基、羧基以及酸酐等。这些之中较佳可举出苯酚性羟基、胺基、酸酐等，更佳可举出苯酚性羟基、胺基。
作为苯酚系硬化剂的具体例，可举出多官能系苯酚树脂、联苯酚、酚醛清漆型苯酚树脂、二环戊二烯系苯酚树脂、芳烷基苯酚树脂等。作为胺系硬化剂的具体例，可举出DICY(二氰二胺)。这些可单独1种或是混合使用2种以上。
上述的热硬化剂(B2)以及(B2')的数量平均分子量较佳为300～30000，更佳为400～10000，特佳为500～3000。
相对于环氧树脂[(B1)以及(B1')]100质量份，粘接剂组合物的热硬化剂[(B2)以及(B2')]的含量较佳为0.1～500质量份，更佳为1～200质量份。若热硬化剂的含量少，则可能会硬化不足而无法得到粘接性，如果过剩则有可能粘接剂层的吸湿率高而使封装的可靠性降低。而且，相对于丙烯酸聚合物(A)100质量份，热硬化剂[(B2)以及(B2')]的含量较佳为5～50质量份，更佳为10～40质量份。若热硬化剂的含量少，则可能会硬化不足而无法得到粘接性，若过剩则有可能粘接剂层的吸湿率高而使封装的可靠性降低。
于粘接剂组合物中，相对于丙烯酸聚合物(A)100质量份，热硬化性树脂(B)(环氧树脂与热硬化剂的合计)较佳为含有1～1500质量份，更佳为含有3～1200质量份。若热硬化性树脂(B)的含量未满1质量份则有可能无法得到充分的粘接性，若超过1500质量份则有可能使粘接剂层与支撑体的剥离力变高，产生拾取不良。
(C)具有反应性双键的耦合剂
具有反应性双键基的耦合剂(C)只要具有反应性双键基则没有特别的限 定。反应性双键基较佳为具有反应性的乙烯基、烯丙基、苯乙烯基或(甲基)丙烯酸基。
上述具有反应性双键基的耦合剂并没有特别的限定。作为该耦合剂，例如是适合使用具有乙烯基的耦合剂、具有苯乙烯基的耦合剂、具有(甲基)丙烯酸氧基((meth)acryloxy group)的耦合剂。由与丙烯酸树脂的相溶性的观点来看，上述耦合剂较佳为硅烷耦合剂。
作为上述耦合剂的具体例，可举出乙烯基三甲氧基硅烷、乙烯基三乙氧基硅烷、对苯乙烯基三甲氧基硅烷、3-甲基丙烯酸氧基丙基二甲氧基硅烷、3-甲基丙烯酸氧基丙基三甲氧基硅烷、3-甲基丙烯酸氧基丙基三乙氧基硅烷、3-甲基丙烯酸氧基丙基甲基二乙氧基硅烷以及3-丙烯酸氧基丙基三甲氧基硅烷等。作为这些的市售品，例如是可举出KBM-1003、KBE-1003、KBM-1403、KBM-502以及KBM-503、KBE-502、KBE-503、KBM-5103(以上均为信越硅酮公司制)。
相对于丙烯酸聚合物(A)以及热硬化性树脂(B)的合计100质量份，上述耦合剂较佳以0.001～10质量份，更佳以0.005～10质量份，特佳以0.01～5质量份的范围含有。若上述耦合剂的量过多，则有可能成为粘接剂组合物加热时耦合剂挥发而产生空洞的原因。另一方面，若耦合剂的量过少则有可能无法充分发挥添加耦合剂的效果。
若以此种范围而于粘接剂层含有耦合剂(C)，则即使粘接剂层为未硬化或半硬化的状态，芯片彼此或是芯片与基板的密接性高，且耐受打线时的震动。因此，打线时芯片不会震动、位移，而稳定的进行打线。
其它成分
粘接剂组合物除了上述成分之外，可以包含下述成分。
(D)光聚合起始剂
粘接剂组合物较佳是含有光聚合起始剂。通过含有光聚合起始剂，例如是本发明的粘接片作为切割．晶粒粘接片使用时，在贴附于晶片后，通过在切割步骤前照射紫外线，使具有反应性双键基的耦合剂以及热硬化性树脂所具有的不饱和烃基反应，而能够使其预备硬化。通过进行预备硬化，于硬化前粘接剂层为比较软化，因此对于晶片的密接性佳，而且于切割时具有适当的硬度而能够防止对切割刀的粘接剂附着等其它的不良状况。而且，支撑体 (树脂膜或切割带)与粘接剂的界面之密接性的控制等亦成为可能。而且，由于预备硬化状态比未硬化状态的硬度高，提升了打线时的稳定性。
作为光聚合起始剂(D)，具体而言可举出二苯基酮、苯乙酮、苯偶姻、苯偶姻甲醚、苯偶姻乙醚、苯偶姻异丙醚、苯偶姻异丁醚、苯偶姻安息香酸、苯偶姻安息香酸甲酯、苯偶姻二甲基缩酮、2,4-二乙基噻吨酮(2,4-diethylthioxanthone)、α-羟基环己基苯基酮、苄基二苯基硫醚(benzyl diphenyl sulfide)、四甲基硫兰单硫醚(tetramethyl thirammonosulfide)、偶氮双异丁腈、联苯甲酰、二联苯甲酰、丁二酮、1,2-二苯基甲烷、2-羟基-2-甲基-1-[4-(1-甲基乙烯基)苯基]丙酮、2,4,6-三甲基苯甲酰基二苯基膦氧化物以及β-氯蒽醌等。光聚合起始剂(D)可单独使用1种或组合2种以上使用。
使用光聚合起始剂(D)时，其调配比例只要是基于前述耦合剂(C)所具有的反应性双键基、热硬化性树脂(B)以及后述任意成分的能量线聚合性化合物(H)所具有的不饱和烃基的合计量适当设定即可。虽然并没有限定，但例如是相对于热硬化性树脂(B)、耦合剂(C)、能量线聚合性化合物(H)合计100质量份，通常为0.1～10质量份，较佳为1～5质量份。若光聚合起始剂(D)的含量低于上述范围，则光聚合不足而有可能无法得到满足的反应，若高于上述范围，则有可能生成未用于光聚合的残留物，粘接剂组合物的硬化性变得不充分。
(E)硬化促进剂
硬化促进剂(E)用于调整粘接剂组合物的硬化速度。作为硬化促进剂较佳是可举出三亚乙基二胺、苄基二甲胺、三乙醇胺、二甲基胺基乙醇、参(二甲基胺基甲基)苯酚等的三级胺类；2-甲基咪唑、2-苯基咪唑、2-苯基-4-甲基咪唑、2-苯基-4,5-二羟基甲基咪唑、2-苯基-4-甲基-5-羟基甲基咪唑等的咪唑类；三丁基膦、二苯基膦、三苯基膦等的有机膦类；四苯基鏻四苯基硼酸酯、三苯基膦四苯基硼酸酯等的四苯基硼酸盐等。可单独使用1种或组合2种以上使用。
使用硬化促进剂(E)时，相对于热硬化性树脂(B)的合计100质量份，硬化促进剂(E)较佳为含有0.01～10质量份的量，更佳为含有0.1～1质量份的量。通过使硬化促进剂(E)以上述范围的量含有，即使暴露于高温度高湿度下亦具有优良的粘接特性，即使暴露于严苛的回流条件时亦能够达成高封装可靠 性。若硬化促进剂(E)的含量少则硬化不足而无法得到充分的粘接特性，如果过剩则具有高极性的硬化促进剂在高温度高湿度下于粘接剂层中向粘接界面侧移动、分凝而导致封装的可靠性降低。
(F)交联剂
为了调节粘接剂层的初期粘接力以及凝集力，于粘接剂组合物中亦可以添加交联剂(F)。而且，在调配有交联剂时，于前述丙烯酸聚合物(A)含有与交联剂反应的官能基。作为交联剂(F)可举出有机多价异氰酸酯化合物、有机多价亚胺化合物等。
作为上述有机多价异氰酸酯化合物，可举出芳香族多价异氰酸酯化合物、脂肪族多价异氰酸酯化合物、脂环族多价异氰酸酯化合物以及这些的有机多价异氰酸酯化合物的三聚物、以及这些有机多价异氰酸酯化合物与聚醇化合物反应所得的末端异氰酸酯胺基甲酸酯预聚物等。
作为有机多价异氰酸酯化合物，例如是可举出2,4-甲亚苯基二异氰酸酯、2,6-甲亚苯基二异氰酸酯、1,3-苯二甲基二异氰酸酯、1,4-苯二甲基二异氰酸酯、二苯甲烷-4,4'-二异氰酸酯、二苯甲烷-2,4'-二异氰酸酯、3-甲基二苯基甲烷二异氰酸酯、六亚甲基二异氰酸酯、异佛尔酮二异氰酸酯、二环己基甲烷-4,4'-二异氰酸酯、二环己基甲烷-2,4'-二异氰酸酯、三羟甲基丙烷加成甲亚苯基二异氰酸酯以及赖胺酸异氰酸酯。
使用异氰酸酯系的交联剂时，作为丙烯酸聚合物(A)较佳是使用含有羟基的聚合物。如交联剂具有异氰酸酯基，且丙烯酸聚合物(A)具有羟基，则交联剂与丙烯酸聚合物(A)产生反应，能够简便地于粘接剂中导入交联结构。
作为上述有机多价亚胺化合物，可举出N,N'-二苯基甲烷-4,4'-双(1-氮丙啶羧基酰胺)、三羟甲基丙烷-三-β-氮丙啶基丙酸酯、四羟甲基丙烷-三-β-氮丙啶基丙酸酯以及N,N'-甲苯-2,4-双(1-氮丙啶羧基酰胺)三亚乙基三聚氰胺等。
使用交联剂(F)时，相对于丙烯酸聚合物(A)100质量份，交联剂(F)通常以0.01～20质量份，较佳以0.1～10质量份，更佳以0.5～5质量份的比例使用。
(G)填料
为了调整未硬化时、半硬化时以及硬化后的粘接剂层的硬度，在粘接剂组合物中亦可以含有填料。填料可为无机填充剂、有机填充剂的任一种，但由耐热性的观点来看较佳使用无机填充剂。
作为填料的材质可举出二氧化硅(silica)、氧化铝、碳酸钙、硅酸钙、氢氧化镁、氢氧化铝、氧化钛、碳黑、滑石、云母或黏土等。其中较佳为二氧化硅。
上述填料的平均粒径较佳为在0.005～2μm的范围内。上述填料的平均粒径在此较佳范围内时，能够不损及与半导体晶片的贴附性而发挥粘接性。而且，上述“平均粒径”是通过激光绕射．散射法测定所示的体积平均直径。
相对于丙烯酸树脂(A)与热硬化性树脂(B)的合计100质量份，上述填料较佳是以5～100质量份的范围含有。若上述填料的量过多，则有可能对晶片或基板的密接性变差。若上述填料粒子的量过少，则有可能无法充分发挥添加填料的效果。
若以此等的范围使粘接剂层含有填料(G)，即使粘接剂层处于未硬化或半硬化的状态，亦能够表现出能耐受打线时的震动程度的弹性模数。因此，打线时芯片不会震动、位移而稳定的进行打线。
(H)能量线聚合性化合物
于粘接剂组合物中亦可以调配有能量线聚合性化合物。能量线聚合性化合物(H)包含能量线聚合性基，受到紫外线、电子线等的能量线照射则聚合硬化。作为此种的能量线聚合性化合物(H)的具体例，可举出三羟甲基丙烷三丙烯酸酯、季戊四醇三丙烯酸酯、季戊四醇四丙烯酸酯、二季戊四醇单羟基五丙烯酸酯、二季戊四醇六丙烯酸酯或1,4-丁二醇二丙烯酸酯、1,6-己二醇二丙烯酸酯、聚乙二醇二丙烯酸酯、寡酯丙烯酸酯、胺基甲酸酯丙烯酸酯系寡聚物、环氧基改质丙烯酸酯、聚醚丙烯酸酯以及亚甲基丁二酸寡聚物等的丙烯酸酯系化合物。此种的化合物在分子内至少具有1个聚合性双键，通常重量平均分子量在100～30000、较佳在300～10000的程度。在使用能量线聚合性化合物(H)时，其调配量并没有特别的限定，较佳是相对于粘接剂组合物的固体成分总量100质量份使用1～50质量份程度的比例。
(I)热可塑性树脂
于粘接剂组合物中亦可以使用热可塑性树脂(I)。热可塑性树脂(I)是为了保持硬化后粘接剂层的可挠性而加以调配。作为热可塑性树脂(I)，重量平均分子量较佳为1000～10万，更佳为3000～8万。通过含有热可塑性树脂(I)，能够使半导体芯片的拾取步骤中的支撑体与粘接剂层的层间剥离容易进行， 进而能够使粘接剂层追随基板的凹凸而抑制空洞等的发生。
热可塑性树脂(I)的玻璃转移温度较佳为-30～150℃，更佳为-20～120℃的范围。若热可塑性树脂(I)的玻璃转移温度过低，则有可能使粘接剂层与支撑体的剥离力变大而产生芯片的拾取不良，如果过高则具有用于固定晶片的粘接力不充分的疑虑。
作为热可塑性树脂(I)，可举出聚酯树脂、胺基甲酸酯树脂、苯氧基树脂、聚丁烯、聚丁二烯、聚苯乙烯等。这些可单独1种或混合2种以上使用。
在使用热可塑性树脂(I)时，相对于丙烯酸树脂(A)与热硬化性树脂(B)的合计100质量份，其调配量较佳为1～300质量份、更佳为2～100质量份的范围。通过使热可塑性树脂(I)的含量于此范围内，能够得到上述的效果。
(J)其它的耦合剂
而且，除了前述耦合剂(C)以外，在粘接剂组合物中亦可以调配有不具有反应性双键的耦合剂。作为此种的耦合剂(J)，可举出不具有反应性双键的硅烷耦合剂。具体可举出γ-环氧丙氧基丙基三甲氧基硅烷、γ-环氧丙氧基丙基甲基二乙氧基硅烷、β-(3,4-环氧基环己基)乙基三甲氧基硅烷、γ-胺基丙基三甲氧基硅烷、N-6-(胺基乙基)-γ-胺基丙基三甲氧基硅烷、N-6-(胺基乙基)-γ-胺基丙基甲基二乙氧基硅烷、N-苯基-γ-胺基丙基三甲氧基硅烷、γ-脲基丙基三乙氧基硅烷、γ-硫醇基丙基三甲氧基硅烷、γ-硫醇基丙基甲基二甲氧基硅烷、双(3-三乙氧基硅基丙基)四硫化氢、甲基三甲氧基硅烷、甲基三乙氧基硅烷、咪唑硅烷等。这些可单独1种或混合2种以上使用。
(K)泛用添加剂
除上述之外，于粘接剂组合物中亦可以因应需要调配各种添加剂。作为各种添加剂，可举出塑化剂、抗静电剂、抗氧化剂、颜料、染料、捕获剂(gettering agent)等。
(粘接片)
由上述各成分所构成的粘接剂组合物所形成的粘接剂层，具有感压粘接性与加热硬化性，能够于未硬化状态轻按压于各种被着体而贴附。而且，由于在粘接剂层均匀分散有耦合剂(C)，芯片彼此或芯片与基板互相密接。因此，即使在多段封装的制造之际采用一次全部硬化工艺的情形，能够进行稳定的打线，并且能够以优良的粘接强度将半导体芯片与其它的半导体芯片或基板 接合，即使在严苛的环境下，亦能够得到显示出高封装可靠性的半导体装置。于含有光聚合起始剂(D)时，亦具有能量线硬化性，能够在完全硬化之前通过照射能量线而预备硬化。通过预备硬化增加粘接剂层的硬度，提升打线时的稳定性。
虽然粘接片可为由上述粘接剂组合物制膜而成之单层的粘接片，但较佳为上述粘接剂组合物所构成的粘接剂层可剥离的形成于支撑体上而成之粘接片。
以下，以粘接剂层可剥离的形成于支撑体上而成之粘接片为例，以对其较佳态样以及使用态样进行说明。在使用粘接剂层可剥离的形成于支撑体上而成之粘接片时，粘接剂层粘接于晶片、芯片等的被着体，并剥离支撑体以将粘接剂层转移于被着体。本发明的粘接片的形状，可为带状等的所有形状。粘接片可为表面不具有粘接性的树脂膜，亦可为所谓的切割片。
作为用作为粘接片的支撑体的树脂膜，例如是使用聚乙烯膜、聚丙烯膜、聚丁烯膜、聚丁二烯膜、聚甲基戊烯膜、聚氯化乙烯膜、氯化乙烯共聚物膜、聚对苯二甲酸乙二酯膜、聚萘二甲酸乙二酯膜、聚对苯二甲酸丁二酯膜、聚胺基甲酸酯膜、乙烯-醋酸乙烯基共聚物膜、多离子聚合物树脂膜、亚乙基．(甲基)丙烯酸共聚物膜、亚乙基．(甲基)丙烯酸酯共聚物膜、聚苯乙烯膜、聚碳酸酯膜、聚酰亚胺膜、氟树脂膜等的透明膜。亦或是使用这些的交联膜。进而亦可以为这些的层积膜。而且，亦可以使用将这些着色的膜、不透明膜等。
本发明的粘接片贴附于各种的被着体，对被着体施加所需要的加工后，粘接剂层以固着残存于被着体的状态由支撑体剥离。亦即是，对粘接剂层使用了包含由支撑体转移至被着体之步骤的工艺。因此，支撑体(树脂膜)的与粘接剂层接触的面之表面张力，较佳为40mN/m以下，更佳为37mN/m以下，特佳为35mN/m以下。下限值通常为25mN/m的程度。此种表面张力低的树脂膜，能通过适当选择材质而得到，亦能够通过在树脂膜表面涂布剥离剂施加剥离处理而得到。
作为树脂膜的剥离处理所使用的剥离剂，使用醇酸系、硅酮系、氟系、不饱和聚酯系、聚烯烃系、石蜡系等，特别是醇酸系、硅酮系、氟系的剥离剂具有耐热性因而较佳。
为了使用上述剥离剂以对树脂膜的表面进行剥离处理，亦可以将剥离剂 直接无溶剂，或是以溶剂稀释或乳化，并通过凹版涂布机、绕线棒涂布机、气刀涂布机、辊涂布机等进行涂布，通过常温或加热或电子线硬化，并通过湿层积或干层积、热熔融层积、熔融挤压层积、共挤压层积等以形成层积体。
支撑体亦可为切割片。切割片于如上所述的树脂膜上具有黏着剂层，在黏着剂层上可剥离地层积前述粘接剂层。因此，切割片的黏着剂层能够以具有再剥离性的公知黏着剂所构成，通过选择紫外线硬化型、加热发泡型、水膨胀型、弱黏性型等的黏着剂，能够使粘接剂层的剥离容易。
而且，粘接片亦可以预先将支撑体以及粘接剂层模切为与被着体(半导体晶片)相同形状。特别是较佳为支撑体以及粘接剂层所构成的积层体为保持于长的剥离膜上的型态。
支撑体的厚度通常为10～500μm，较佳为15～300μm，特佳为20～250μm程度。而且，粘接剂层的厚度通常为2～500μm，较佳为6～300μm，特佳为10～150μm程度。
粘接片的制造方法并没有别的限定，在支撑体为树脂膜时，亦能够以下述方法制造：在树脂膜上涂布干燥粘接剂组合物，以形成粘接剂层。亦能够以下述方法制造：将粘接剂层设置于另外的剥离膜上，然后将其转移至上述树脂膜或切割片。
而且，在粘接片的使用前为了保护粘接剂层，亦可以于粘接剂层的上面层积剥离膜。该剥离膜可使用在聚对苯二甲酸乙二酯或聚丙烯膜等的塑料材料上涂布有硅酮树脂等的剥离剂者。而且，于粘接片的表面外周部亦可以另外设置黏着剂层或黏着带，用以固定环状框架等的其它夹具。
其次对于本发明的粘接片的利用方法，以该粘接片适用于半导体装置的制造的情形为例加以说明。
(半导体装置的制造方法)
本发明的半导体装置的制造方法，包括下述步骤：将上述粘接片的粘接剂层贴附于半导体晶片；切割该半导体晶片以及粘接剂层以形成半导体芯片；使粘接剂层固着残存于该半导体芯片里面而从支撑体剥离；将该半导体芯片经由粘接剂层粘接于有机基板或导线架的晶粒垫部上或其它半导体芯片上。
以下，对本发明的半导体装置的制造方法进行详述。
于本发明的半导体装置的制造方法中，首先，准备于表面形成电路、于里面经研磨的半导体晶片。
半导体晶片可为硅晶片，亦可为镓．砷等的化合物半导体晶片。对晶片表面的电路形成，可利用包含蚀刻法、剥离法(lift off)等以往泛用的方法之各种方法以进行。其次，对半导体晶片的电路面之相反面(里面)进行研磨。研磨法并没有特别的限定，亦可以使用研磨器(grinder)等的公知手段进行研磨。在里面研磨时，为了保护表面的电路而于电路面贴附称作为表面保护片之黏着片。里面研磨是将晶片的电路面侧(亦即是表面保护片侧)以夹头座(chuck table)等固定，对未形成电路的里面侧以研磨器进行研磨。晶片的研磨后厚度并没有特别的限定，通常为20～500μm程度。
其次，将环状框架以及半导体晶片的里面侧载置于本发明的粘接片的粘接剂层上，轻轻按压以将半导体晶片固定。其次，于粘接剂层中调配有光聚合起始剂(D)时，从支撑体侧对粘接剂层照射能量线，使具有反应性双键基的耦合剂(C)以及热硬化性树脂(B)所具有的不饱和烃基反应、硬化，提升粘接剂层的凝集力，降低粘接剂层与支撑体之间的粘接力。作为照射的能量线，可举出紫外线(UV)或电子线(EB)，较佳使用紫外线。其次，使用切割机(dicing saw)等切断手段，将上述半导体晶片切断以得到半导体芯片。此时的切断深度，为半导体晶片的厚度与粘接剂层的厚度的合计再加上切割机的磨耗量之深度，粘接剂层亦与芯片同尺寸的切断。而且，能量线的照射亦可以在半导体晶片的贴附后、半导体芯片的剥离(拾取)前的任意阶段进行，例如是亦可以于切割后进行，或者亦可于下述扩展步骤之后进行。而且，能量线照射亦可以分多次进行。
其次，如因应需要进行粘接片的扩展，则半导体芯片的间隔扩张，半导体芯片的拾取变得更容易进行。此时，粘接剂层与支撑体之间产生滑动，粘接剂层与支撑体之间的粘接力减少，半导体芯片的拾取性提升。如依此进行半导体芯片的拾取，则能够使切断的粘接剂层固着残存于半导体芯片的里面而从支撑体剥离。
其次，经由粘接剂层而将半导体芯片载置于作为芯片搭载部之导线架的晶粒垫上或其它的半导体芯片(下段芯片)表面。芯片搭载部于载置半导体芯片前加热或是在刚载置后加热，以将芯片暂时粘接。加热温度通常为80～200 ℃，较佳为100～180℃，加热时间通常为0.1秒～5分钟，较佳为0.5秒～3分钟，载置时的压力通常为1kPa～200MPa。
较佳是于芯片暂时粘接的状态依次层积芯片、打线之后，利用封装制造中通常进行之树脂密封的加热，以将粘接剂层完全硬化。通过经过此等的步骤，能够将粘接剂层一次全部硬化而提升制造效率。而且，于打线时粘接剂层为预备硬化的状态，而稳定的进行打线。而且，由于粘接剂层于晶粒结着条件下为软化，即使是芯片搭载部的凹凸亦能够充分的埋入，能够防止空洞的发生而封装的可靠度变高。
本发明的粘接剂组合物以及粘接片，除了上述的使用方法之外，亦能够使用于半导体化合物、玻璃、陶瓷、金属等的粘接。
【实施例】
以下通过实施例说明本发明，但是本发明并不限定于这些实施例。而且，于以下的实施例以及比较例中，〈分散性评估〉、〈对基板的埋入性评估〉以及〈封装可靠性评估〉如下述进行。
〈分散性评估〉
将实施例以及比较例所制备的粘接剂组合物，以于剥离膜上成为20μm的厚度之方式涂布，目视确认有无发生条纹。填料的分散性差、凝集的情形会产生条纹。
〈对基板的埋入性评估〉
将实施例以及比较例所制备的粘接剂组合物，以于剥离膜上干燥后厚度成为20μm的厚度之方式涂布、干燥，以得到粘接膜。于覆铜箔层积板(三菱气体化学股份有限公司制CCL-HL830)的铜箔(18μm厚)形成电路图案，且于图案上具有抗镀剂(太阳墨水制PSR-4000AUS303)之基板(股份有限公司Chino技研制LN001E-001PCB(Au)AUS303)上，将贴附有粘接膜的玻璃芯片(8mm×8mm，厚度150μm)经由粘接膜以150℃、100gf、1秒钟的条件压着，其后，假设模密封步骤并以热封测试机(Tester产业公司制TP-701)以每一个芯片施加压力6.9MPa、175℃、2分钟以进行热压着。其后使用数字显微镜(Keyence公司制VHX-200)以倍率20倍观察玻璃芯片上面以确认埋入性。埋入性的判断如下：将包含空洞等的空气层的部分除外，若如芯片面积95%以上被埋入，则埋入性为良好。
〈封装可靠性评估〉
(半导体芯片的制造)
于干研磨精加工的硅晶片(150mm直径，厚度75μm)的研磨面，以胶带贴合机(Lintec公司制，Adwill RAD2500)进行实施例以及比较例的粘接片之贴附，固定于晶片切割用环状框架。其后，使用紫外线照射装置(Lintec公司制，Adwill RAD2000)从支撑体面照射紫外线(220mW/cm2，160mJ/cm2)。其次，使用切割装置(股份有限公司Disco制，DFD651)切割为8mm×8mm的芯片尺寸。切割时的切入量，以切入支撑体20μm的方式而设定。
(半导体封装的制造)
使用于覆铜箔层积板(三菱气体化学股份有限公司制CCL-HL830)的铜箔(18μm厚)形成电路图案，且于图案上具有抗镀剂(太阳墨水制PSR-4000AUS303)之基板(股份有限公司Chino技研制LN001E-001PCB(Au)AUS303)作为基板。将上述所得的粘接片上的芯片与粘接剂层一起由支撑体取出，经由粘接剂层以120℃、250gf、0.5秒钟的条件压着于基板上。其后，再将其它的芯片经由粘接剂层再度以120℃、250gf、0.5秒钟的条件压着于已粘接的芯片上，以2段层积半导体芯片。其后，以密封厚度成为400μm的方式而以模封树脂(京瓷化学股份有限公司制KE-1100AS3)进行密封(密封装置Apic Yamada股份有限公司制MPC-06MTriAl Press)，并以175℃、5小时使树脂硬化。接着，将已密封的基板贴附于切割带(Lintec股份有限公司制，Adwill D-510T)，使用切割装置(股份有限公司Disco制，DFD651)切割为8mm×8mm的芯片尺寸，以得到可靠性评估用的半导体封装。
(评估)
将所得的半导体封装于60℃、湿度60%RH条件下以及85℃、湿度60%RH条件下放置120小时、吸湿后，以预热160℃而最高温度成为260℃之加热时间1分钟的红外(IR)回流(回流炉：相模理工制WL-15-20DNX型)进行3次时的接合部的浮起．剥离的有无、封装破裂发生的有无，以扫瞄型超音波探伤装置(日立建机Finetec股份有限公司制Hye-Focus)以及断面研磨机(Refinetec股份有限公司制，Refine·PolisherHV)切割出断面，并使用数字显微镜(Keyence公司制VHX-100)通过观察断面以进行评估。在基板/半导体芯片接合部观察到长度0.5mm以上的剥离时则判断为剥离，并计数将封装投入27个至试验且未发生剥离的个数。
〈粘接剂组合物〉
构成粘接剂组合物的各成分如下所示。
(A)丙烯酸聚合物：日本合成化学工业公司制N-4617(含羟基)
(B)热硬化性树脂：
(B-1)丙烯酰基加成甲酚酚醛清漆型环氧树脂(日本化药股份有限公司制CNA-147)
(B-2)热硬化剂：芳烷基苯酚树脂(三井化学股份有限公司制MilexXLC-4L)
(C)耦合剂：
(C-1)具有丙烯酸基的硅烷耦合剂(信越Silicone公司制KBM-5103)
(C-2)具有环氧基的硅烷耦合剂(信越Silicone公司制KBM-402)
(C-3)具有环氧基的硅烷耦合剂(信越Silicone公司制KBM-403)
(C-4)具有硫醇基的硅烷耦合剂(信越Silicone公司制KBM-803)
尚且，耦合剂的使用量，以粘接剂组合物所含的来自耦合剂的甲氧基的摩尔数在实施例以及比较例大约相等的方式进行调整。
(D)光聚合起始剂(Ciba Specialty Chemicals股份有限公司制Irgacure184)
(E)硬化促进剂：咪唑(四国化成工业股份有限公司制Curezol2PHZ)
(F)交联剂：芳香族性多价异氰酸酯(日本Polyurethane工业股份有限公司制CoronateL)
(G)填料：日产化学工业股份有限公司制SilicasilMEK-ST平均填料粒径12nm
(实施例以及比较例)
上述各成分以表1所记载的量(质量比)调配，得到粘接剂组合物。使用所得的组合物的甲基乙基酮溶液(固体成分浓度30质量％)以评估分散性。结果如表1所示。而且，以干燥后的厚度为20μm的方式，将粘接剂组合物溶液涂布、干燥(干燥条件：以烘箱100℃、1分钟)于经硅酮剥离处理的剥离膜(Lintec股份有限公司制，SP-PET381031)的剥离处理面上，其后贴合于支撑体(聚乙烯膜，厚度100μm，表面张力33mN/m)，通过将粘接剂层转移至支撑体上以得到粘接片。使用所得的粘接片制作半导体封装，评估其可靠性。 结果如表1所示。表1中PKG可靠性表示封装可靠性，以上述评估中未发生剥离个数/27(投入试验的封装个数)而表示。
【表1】
根据上述结果，可了解通过采用本发明的构成，改善了耦合剂的分散性，芯片彼此或芯片与基板密接，且接合时的埋入性良好，打线时即使暴露于高 温亦能够维持半导体封装的可靠性。因此，通过提供本发明粘接剂组合物以及粘接片，多段堆栈的半导体封装的制造变得容易，且生产性提升。

Claims (5)

1.一种半导体装置的制造方法，将包含丙烯酸聚合物(A)、具有不饱和烃基的热硬化性树脂(B)以及具有反应性双键基的耦合剂(C)的粘接剂组合物所构成的粘接剂层形成于支撑体上而成的粘接片的粘接剂层贴附于半导体晶片，前述粘接剂组合物包括：
前述丙烯酸聚合物(A)的重量平均分子量为1万～200万；
前述丙烯酸聚合物(A)的玻璃转移温度为-60～70℃；
前述丙烯酸聚合物(A)是以在前述粘接剂组合物的全重量中50～90质量％的比例含有；
相对于前述丙烯酸聚合物(A)100质量份，前述具有不饱和烃基的热硬化性树脂(B)为含有1～1500质量份的比例；
相对于前述丙烯酸聚合物(A)以及前述具有不饱和烃基的热硬化性树脂(B)的合计100质量份，前述具有反应性双键基的耦合剂(C)为含有0.001～10质量份的比例；
切割前述半导体晶片以及前述粘接剂层以形成半导体芯片；
使前述粘接剂层固着残存于前述半导体芯片而从前述支撑体剥离；以及
将前述半导体芯片经由前述粘接剂层接着于其它半导体芯片上，通过由加热树脂密封，使粘接剂层一次硬化。
2.根据权利要求1所述的半导体装置的制造方法，前述耦合剂(C)为具有反应性双键的硅烷耦合剂。
3.根据权利要求1或2所述的半导体装置的制造方法，所述粘接剂组合物含有填料(G)。
4.根据权利要求1或2所述的半导体装置的制造方法，前述支撑体为树脂膜。
5.根据权利要求1或2所述半导体装置的制造方法，前述支撑体为切割片。
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Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5917215B2 (ja) 2012-03-16 2016-05-11 リンテック株式会社 接着剤組成物、接着シートおよび半導体装置の製造方法
SG11201509299SA (en) * 2013-05-28 2015-12-30 Lintec Corp Adhesive composition, adhesive sheet, and production method ofsemiconductor device
US10190017B2 (en) 2014-03-28 2019-01-29 Lintec Corporation Protective film-forming film and method of manufacturing semiconductor chip with protective film
JPWO2015152158A1 (ja) * 2014-03-31 2017-04-13 株式会社Ｊｏｌｅｄ 積層体および積層体の剥離方法ならびに可撓性デバイスの製造方法
CN106103633B (zh) * 2014-11-17 2023-11-17 积水化学工业株式会社 喷墨用光及热固化性粘接剂、半导体装置的制造方法及电子部件
DE102014117817A1 (de) 2014-12-03 2016-06-09 Hbpo Gmbh Luftregelsystem für Fahrzeuge mit Montageverfahren
CN108350320B (zh) * 2015-11-04 2021-11-26 昭和电工材料株式会社 粘接剂组合物和结构体
CN105798410A (zh) * 2016-05-10 2016-07-27 太仓市华盈电子材料有限公司 一种新型胶焊接工艺
JP7326102B2 (ja) 2019-10-07 2023-08-15 リンテック株式会社 保護膜形成用フィルム及び保護膜形成用複合シート
JP7326100B2 (ja) 2019-10-07 2023-08-15 リンテック株式会社 保護膜形成用フィルム及び保護膜形成用複合シート

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102179976A (zh) * 2010-01-06 2011-09-14 住友化学株式会社 光学层叠体及其制造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4459880B2 (ja) * 2005-09-15 2010-04-28 電気化学工業株式会社 エネルギー線硬化性樹脂組成物とそれを用いた接着剤
KR101370245B1 (ko) * 2006-05-23 2014-03-05 린텍 가부시키가이샤 점접착제 조성물, 점접착 시트 및 반도체장치의 제조방법
JP5005324B2 (ja) * 2006-11-27 2012-08-22 リンテック株式会社 粘接着剤組成物、粘接着シートおよび半導体装置の製造方法
KR20080047990A (ko) * 2006-11-27 2008-05-30 린텍 가부시키가이샤 점접착제 조성물, 점접착 시트 및 반도체 장치의 제조방법
EP1975702B1 (en) * 2007-03-29 2013-07-24 FUJIFILM Corporation Colored photocurable composition for solid state image pick-up device, color filter and method for production thereof, and solid state image pick-up device
JP5164252B2 (ja) * 2007-09-03 2013-03-21 サイデン化学株式会社 水性エマルション接着剤
JP5109667B2 (ja) * 2008-01-10 2012-12-26 東レ株式会社 ポリブチレンテレフタレートの製造方法
JP2009167244A (ja) * 2008-01-11 2009-07-30 Mitsubishi Rayon Co Ltd 活性エネルギー線硬化性ガラス接着用組成物及びその積層物
WO2010038574A1 (ja) * 2008-09-30 2010-04-08 ソニーケミカル＆インフォメーションデバイス株式会社 アクリル系絶縁性接着剤
JP5774322B2 (ja) * 2011-01-28 2015-09-09 リンテック株式会社 半導体用接着剤組成物、半導体用接着シートおよび半導体装置の製造方法
JP5917215B2 (ja) 2012-03-16 2016-05-11 リンテック株式会社 接着剤組成物、接着シートおよび半導体装置の製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102179976A (zh) * 2010-01-06 2011-09-14 住友化学株式会社 光学层叠体及其制造方法

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