CN103003937A - 碳化硅基板、半导体装置及soi晶圆 - Google Patents
碳化硅基板、半导体装置及soi晶圆 Download PDFInfo
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Abstract
本发明提供高频损失少,且显示优异散热性的碳化硅基板。碳化硅基板S具备:由多结晶碳化硅构成的第1碳化硅层1、及由形成于第1碳化硅层的表面上的多结晶碳化硅构成的第2碳化硅层2,第2碳化硅层2具有比第1碳化硅层1更小的高频损失,且第1碳化硅层1具有比第2碳化硅层2更大的热传导率,第2碳化硅层2的表面侧在频率20GHz的高频损失为2dB/mm以下,热传导率为200W/mK以上。
Description
技术领域
本发明涉及碳化硅基板、半导体装置及SOI晶圆,特别涉及用于搭载在高频区域操作的半导体元件的碳化硅基板及使用该碳化硅基板的半导体装置与SOI晶圆。
背景技术
以往以来,在高频区域操作的半导体元件被用于手机及各种通讯设备等电子装置,各种介电质陶瓷作为安装这种半导体元件用的基板材料被提出。
在这些介电质陶瓷中,碳化硅由于兼具高机械强度与稳定的化学特性而为公众所知,然而以往的机械零件等所使用的碳化硅在高频区域中的损失大,并不适合作为搭载高频用半导体元件的基板材料。
因此,例如专利文献1公开了通过增加热处理等使高频区域中的损失降低的由多结晶碳化硅构成的碳化硅基板。
[先前技术文献]
[专利文献]
[专利文献1]特开2009-260117号公报
发明内容
发明要解决的课题
如果使用这样一种碳化硅基板,通过在碳化硅基板的表面上搭载半导体元件,或着在碳化硅基板上通过绝缘膜形成硅层后,通过使用该硅层来形成元件,可以制作高频损失少的半导体装置。
但是,由于专利文献1公开的碳化硅基板,热传导率不高,如果搭载发热量大的半导体元件,可能无法充分地进行散热。
另外,专利文献1公开的碳化硅基板,虽然具有高绝缘性,但如上所述,其热传导率不高,在要求绝缘性及热传导性均优异的情况下,并不适合。
本发明是为了解决这种以往的问题而完成的,其目的在于提供高频损失少,且显示优异散热性的碳化硅基板。
另外,本发明的目的还在于提供显示优异的绝缘性与散热性的碳化硅基板。
进而,本发明的目的还在于提供使用这种碳化硅基板的半导体装置及SOI晶圆。
用以解决课题的手段
关于本发明的第1种碳化硅基板,具有由多结晶碳化硅构成的第1层、及由形成于第1层的表面上的多结晶碳化硅构成的第2层,第2层具有比第1层更小的高频损失,且第1层具有比第2层更大的热传导率。
优选地,第2层表面侧在频率20GHz的高频损失为2dB/mm以下、热传导率为200W/mK以上。
另外,第2层优选地具有碳化硅基板总厚度的20%以下、且10μm以上的厚度。
关于本发明的第2种碳化硅基板,具有由多结晶碳化硅构成的第1层、及由形成于第1层的表面上的多结晶碳化硅构成的第2层,第2层具有比第1层更大的比电阻,第1层具有比第2层更大的热传导率。
优选地,第2层的表面侧的比电阻为104Ωcm以上,且热传导率为200W/mK以上。
在第1种碳化硅基板及第2种碳化硅基板中,第1层可以在含有氮气的气氛中通过CVD法形成,第2层可以在不含有氮气的气氛中通过CVD法形成。
关于本发明的半导体装置,具备上述的碳化硅基板、及接合于碳化硅基板的第2层的表面上的半导体元件。
另外,关于本发明的SOI晶圆,具备上述的碳化硅基板、及形成于碳化硅基板的第2层的表面上的绝缘层、及形成于绝缘层的表面上的硅层。
发明的效果:
通过本发明,具备分别由多结晶碳化硅构成的第1层及第2层,第2层具有比第1层更小的高频损失,第1层具有比第2层更大的热传导率,可以获得高频损失少、且显示优异的散热性的碳化硅基板。
附图说明
图1为本发明的实施例1的碳化硅基板的剖面图。
图2为第2碳化硅层的厚度与碳化硅基板整体的高频损失的关系曲线图。
图3为第2碳化硅层的厚度与碳化硅基板整体的热传导率的关系曲线图。
图4为实施例2的半导体装置的剖面图。
图5为实施例3的SOI晶圆的剖面图。
附图标记
1第1碳化硅层 2第2碳化硅层 3半导体元件 4绝缘层 5硅层
S碳化硅基板
具体实施方式
以下,依据附图来说明本发明的实施例。
实施例1
图1表示实施例1的碳化硅基板S。碳化硅基板S具有由厚度D1的第1碳化硅层1、及形成于第1碳化硅层1的表面上的厚度D2的第2碳化硅层2构成的2层构造。第1碳化硅层1及第2碳化硅层2,都是由多结晶碳化硅构成,第2碳化硅层2具有比第1碳化硅层1更小的高频损失,第1碳化硅层1具有在厚度方向上比第2碳化硅层2更大的热传导率。
例如,相对于第1碳化硅层1的热传导率为260W/mK,第2碳化硅层2的热传导率为约100W/mK。
另外,频率20GHz中的高频损失,相对于第1碳化硅层1为具有约50dB/mm大的值,第2碳化硅层2具有1.4~1.5dB/mm的极小的值。
进而,第2碳化硅层2具有104Ωcm以上的比电阻。
通过形成由这些第1碳化硅层1与第2碳化硅层2构成的2层构造,碳化硅基板S在第2碳化硅层2的表面侧的高频20GHz的高频损失,具有2dB/mm以下的值,具有在厚度方向上为200W/mK以上的热传导率。另外,碳化硅基板S在第2碳化硅层2的表面侧的比电阻具有104Ωcm以上的值。
这种碳化硅基板S,可以根据以下方法制作。
首先,将石墨基材保持于CVD装置内,将CVD装置内的压力设定为例如1.3kPa,和载体气体氢气一同地,以体积比为5~20%向CVD装置内供给碳化硅的原料气体SiCl4、C3H8等,进而,供给相对于这些原料气体的体积比为0.5~2.5%的氮气,例如,通过加热至1000~1600℃的温度,在石墨基材的上面、下面及侧面只生长特定厚度的碳化硅。该碳化硅形成第1碳化硅层1。
接着,CVD装置内一旦予以排气后,除了不对CVD装置内供给氮气之外,与上述的第1碳化硅层1的形成方法相同,使碳化硅在第1碳化硅层1的表面上生长碳化硅,形成第2碳化硅层2。
使用例如钻石磨料将如此形成的第2碳化硅层2的表面予以机械研磨后,通过研磨去除形成于石墨基材的侧面上的碳化硅,于石墨基材的上面及下面分别残留第1碳化硅层1与第2碳化硅层2的2层构造,石墨基材的侧面成为露出的状态。
之后,在氧气气氛中,通过将石墨基材加热至温度900~1400℃,将石墨基材燃烧去除。藉此,获得2片的碳化硅基板S。
另外,作为碳化硅的原料气体,可以使用SiH4/CH4、SiH4/C2H4、SiH4/C3H8、SiCl4/CCl4、SiCl4/CH4、CH3SiCl3、(CH3)2SiCl2。
另外,在上述方法中,供给氮气形成第1碳化硅层1之后,不供给氮气,在第1碳化硅层1的表面上形成第2碳化硅层2,但也可以与此相反,首先,以不供给氮气的条件,形成第2碳化硅层2,之后供给氮气,于第2碳化硅层2的表面上形成第1碳化硅层1。
第1碳化硅层1的形成与第2碳化硅层2的形成,可以变更关于氮气供给的条件而连续地进行,或以分别独立的另外工序来进行。
此处,将由第1碳化硅层1与第2碳化硅层2的2层构造构成的碳化硅基板S的总厚度Dt设为500μm,使第2碳化硅层2的厚度D2有种种改变,制作复数个碳化硅基板S,对于各个碳化硅基板S测量的第2碳化硅层2的表面侧在频率20GHz的高频损失的结果如图2所示。
可以看出,第2碳化硅层2的厚度D2小于10μm时,随着厚度D2接近0,第2碳化硅层2的表面侧的高频损失值急剧增加。这可能是因为第2碳化硅层2很薄,不只是表面层的第2碳化硅层2,位于第2碳化硅层2下面的第1碳化硅层1也受到了高频的影响。
相反,第2碳化硅层2的厚度D2如在10μm以上时,第2碳化硅层2的表面侧的高频损失,显示为2dB/mm以下的小的值,即使该厚度D2大到接近500μm,第2碳化硅层2的表面侧的高频损失,也稳定在1.4~1.5dB/mm。
依据发明人的发现,在频率20GHz中,如是显示2.0dB/mm以下的高频损失的基板,在安装于高频区域操作的半导体元件,实用上没有问题。因此,第2碳化硅层2的厚度D2优选为10μm以上。
另外,图3表示了例如将第1碳化硅层1的热传导率设为264W/mK、第2碳化硅层2的热传导率设为约105W/mK,碳化硅基板S的总厚度Dt设为1650μm时,第2碳化硅层2的厚度D2与厚度方向中的碳化硅基板S整体的热传导率的关系。
碳化硅基板S全体的热传导率随着第2碳化硅层2的厚度D2的减小而增加。
发明人发现,只要基板的热传导率在200W/mK以上,即使安装在高频区域操作的半导体元件,也可以发挥足够的散热作用。
因此,由图3的曲线求得对应热传导率200W/mK的第2碳化硅层2的厚度D2约为350μm,第2碳化硅层2的厚度D2在约350μm以下时,碳化硅基板S的热传导率具有200W/mK以上的值。但是该厚度D2=约350μm,是对于碳化硅基板S的总厚度Dt=1650μm所求得的值,如果碳化硅基板S的总厚度Dt改变,对应热传导率200W/mK的第2碳化硅层2的厚度D2也改变。第1碳化硅层1与第2碳化硅层2的热传导率如果分别决定,则碳化硅基板S的热传导率,由第2碳化硅层2的厚度D2对碳化硅基板S的总厚度Dt的比率来决定。厚度D2=350μm对于总厚度Dt=1650μm的比率为约20%。
因此,为了让碳化硅基板S具有200W/mK以上的热传导率,第2碳化硅层2的厚度D2优选在碳化硅基板S的总厚度Dt的20%以下。
即如果考虑高频损失和散热性的双方,适宜将第2碳化硅层2的厚度D2设定在碳化硅基板S的总厚度Dt的20%以下且为10μm以上。
实施例2
图4表示实施例2的半导体装置的构造。该半导体装置在实施例1所示的碳化硅基板S的第2碳化硅层2的表面上接合半导体元件3。半导体元件3通过铜焊等被接合在第2碳化硅层2的表面上。另外,也可以在第2碳化硅层2的表面上形成特定的导电图案,利用焊锡在导电图案上接合半导体元件3。
根据这种构成的半导体装置,碳化硅基板S在半导体元件3的安装面第2碳化硅层2的表面侧,具有在频率20GHz为2dB/mm以下的小的高频损失,及200W/mK以上的热传导率,即使是半导体元件3为在高频区域操作的元件,也可以进行可靠性高、稳定的操作。
另外,碳化硅基板S在第2碳化硅层2的表面侧具有104Ωcm以上的高比电阻,即使使用半导体元件3构成要求优异的绝缘性的电路,也可以确保稳定的操作。
实施例3
图5表示实施例3的SOI(Silicon on Insulator)晶圆的构造。SOI晶圆在实施例1所示的碳化硅基板S的第2碳化硅层2的表面上形成有SiO2等绝缘层4的同时,且在绝缘层4的表面上形成有硅层5。利用硅层5形成电路元件。
在该SOI晶圆中,碳化硅基板S在第2碳化硅层2的表面侧也具有于频率20GHz为2dB/mm以下的小的高频损失,及200W/mK以上的热传导率,因此利用硅层5来形成在高频区域操作的元件,也可以实现可靠性高、能进行急定操作的装置。
另外,碳化硅基板S在第2碳化硅层2的表面侧具有104Ωcm以上的高比电阻,即使利用硅层5来构成要求优异绝缘性的电路,也可以高可靠性、稳定的操作。
此外,在实施例1所示的碳化硅基板S形成高频传送线路,来制作处理微波、毫米波等讯号用的高频用配线基板。通过碳化硅基板S的存在,可以获得使高频讯号的传送损失变小的高频用配线基板。
Claims (8)
1.一种碳化硅基板,其特征在于:具备由多结晶碳化硅构成的第1层、及
由形成于所述第1层的表面上的多结晶碳化硅构成的第2层,
所述第2层具有比所述第1层更小的高频损失,且所述第1层具有比所述第2层更大的热传导率。
2.如权利要求1记载的碳化硅基板,其中,所述第2层的表面侧在频率20GHz的高频损失为2dB/mm以下,热传导率为200W/mK以上。
3.如权利要求1或2记载的碳化硅基板,其中,所述第2层具有所述碳化硅基板的总厚度的20%以下、且10μm以上的厚度。
4.一种碳化硅基板,其特征在于:
具备由多结晶碳化硅构成的第1层、及
由形成于所述第1层的表面上的多结晶碳化硅构成的第2层,
所述第2层具有比所述第1层更大的比电阻,所述第1层具有比所述第2层更大的热传导率。
5.如权利要求4记载的碳化硅基板,其中,所述第2层的表面侧的比电阻为104Ωcm以上,且热传导率为200W/mK以上。
6.如权利要求1~5中任一项记载的碳化硅基板,其中,所述第1层是在含有氮气的气氛中通过CVD法形成的,所述第2层是在不含有氮气的气氛中通过CVD法形成的。
7.一种半导体装置,其特征在于,具备:权利要求1~6中任一项记载的碳化硅基板、及接合于所述碳化硅基板的所述第2层的表面上的半导体元件。
8.一种SOI晶圆,其特征在于,具备:权利要求1~6中任一项记载的碳化硅基板、及形成于所述碳化硅基板的所述第2层的表面上的绝缘层、及形成于所述绝缘层的表面上的硅层。
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