CN102822976B - 用于场效应晶体管器件的自动对准接触 - Google Patents
用于场效应晶体管器件的自动对准接触 Download PDFInfo
- Publication number
- CN102822976B CN102822976B CN201180016073.4A CN201180016073A CN102822976B CN 102822976 B CN102822976 B CN 102822976B CN 201180016073 A CN201180016073 A CN 201180016073A CN 102822976 B CN102822976 B CN 102822976B
- Authority
- CN
- China
- Prior art keywords
- gate stack
- layer
- silicon
- hard mask
- drain region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 37
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 36
- 239000010703 silicon Substances 0.000 claims abstract description 36
- 238000000034 method Methods 0.000 claims abstract description 31
- 229910052751 metal Inorganic materials 0.000 claims abstract description 18
- 239000002184 metal Substances 0.000 claims abstract description 18
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 15
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 15
- 230000005669 field effect Effects 0.000 claims abstract description 6
- 239000004020 conductor Substances 0.000 claims abstract description 3
- 239000000758 substrate Substances 0.000 claims description 19
- 239000000463 material Substances 0.000 claims description 10
- 150000004767 nitrides Chemical class 0.000 claims description 4
- 150000001875 compounds Chemical class 0.000 claims description 2
- 239000012212 insulator Substances 0.000 claims description 2
- 238000005530 etching Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 6
- 230000008901 benefit Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000009471 action Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910012990 NiSi2 Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910008814 WSi2 Inorganic materials 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28088—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28114—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T, inverted-T
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Composite Materials (AREA)
- Electrodes Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (20)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/757,201 | 2010-04-09 | ||
US12/757,201 US8367508B2 (en) | 2010-04-09 | 2010-04-09 | Self-aligned contacts for field effect transistor devices |
PCT/US2011/028464 WO2011126682A1 (en) | 2010-04-09 | 2011-03-15 | Self-aligned contacts for field effect transistor devices |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102822976A CN102822976A (zh) | 2012-12-12 |
CN102822976B true CN102822976B (zh) | 2016-09-07 |
Family
ID=44760300
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201180016073.4A Expired - Fee Related CN102822976B (zh) | 2010-04-09 | 2011-03-15 | 用于场效应晶体管器件的自动对准接触 |
Country Status (7)
Country | Link |
---|---|
US (2) | US8367508B2 (zh) |
JP (1) | JP5764198B2 (zh) |
CN (1) | CN102822976B (zh) |
DE (1) | DE112011100421B4 (zh) |
GB (1) | GB2492514C (zh) |
TW (2) | TWI538064B (zh) |
WO (1) | WO2011126682A1 (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8664077B2 (en) * | 2012-02-14 | 2014-03-04 | Nanya Technology Corp. | Method for forming self-aligned overlay mark |
US8901627B2 (en) | 2012-11-16 | 2014-12-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Jog design in integrated circuits |
US9324709B2 (en) * | 2013-08-19 | 2016-04-26 | Globalfoundries Inc. | Self-aligned gate contact structure |
US9337284B2 (en) * | 2014-04-07 | 2016-05-10 | Alpha And Omega Semiconductor Incorporated | Closed cell lateral MOSFET using silicide source and body regions |
CN108987261B (zh) * | 2017-06-01 | 2022-05-17 | 联华电子股份有限公司 | 半导体结构及其制造方法 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6207543B1 (en) * | 1997-06-30 | 2001-03-27 | Vlsi Technology, Inc. | Metallization technique for gate electrodes and local interconnects |
Family Cites Families (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61133664A (ja) * | 1984-12-03 | 1986-06-20 | Nec Corp | 半導体集積回路 |
JPH0513017Y2 (zh) * | 1985-10-04 | 1993-04-06 | ||
WO1997014185A1 (en) | 1995-10-11 | 1997-04-17 | Paradigm Technology, Inc. | Semiconductor device with a planarized interconnect with poly-plug and self-aligned contacts |
JPH1079505A (ja) * | 1996-09-05 | 1998-03-24 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
JPH11177089A (ja) * | 1997-12-16 | 1999-07-02 | Hitachi Ltd | 半導体装置の製造方法 |
US20020031909A1 (en) | 2000-05-11 | 2002-03-14 | Cyril Cabral | Self-aligned silicone process for low resistivity contacts to thin film silicon-on-insulator mosfets |
US6503833B1 (en) | 2000-11-15 | 2003-01-07 | International Business Machines Corporation | Self-aligned silicide (salicide) process for strained silicon MOSFET ON SiGe and structure formed thereby |
JP3669919B2 (ja) * | 2000-12-04 | 2005-07-13 | シャープ株式会社 | 半導体装置の製造方法 |
US6403485B1 (en) | 2001-05-02 | 2002-06-11 | Chartered Semiconductor Manufacturing Ltd | Method to form a low parasitic capacitance pseudo-SOI CMOS device |
US6518151B1 (en) | 2001-08-07 | 2003-02-11 | International Business Machines Corporation | Dual layer hard mask for eDRAM gate etch process |
US6627502B1 (en) * | 2002-10-24 | 2003-09-30 | Taiwan Semiconductor Manufacturing Company | Method for forming high concentration shallow junctions for short channel MOSFETs |
JP2004152790A (ja) * | 2002-10-28 | 2004-05-27 | Toshiba Corp | 半導体装置、及び、半導体装置の製造方法 |
US6800530B2 (en) | 2003-01-14 | 2004-10-05 | International Business Machines Corporation | Triple layer hard mask for gate patterning to fabricate scaled CMOS transistors |
DE10345374B4 (de) * | 2003-09-30 | 2006-08-10 | Advanced Micro Devices, Inc., Sunnyvale | Halbleiterbauteil mit einem Nickel/Kobaltsilizidgebiet, das in einem Siliziumgebiet gebildet ist und Verfahren zu seiner Herstellung |
US7098114B1 (en) | 2004-06-22 | 2006-08-29 | Integrated Device Technology, Inc. | Method for forming cmos device with self-aligned contacts and region formed using salicide process |
TW200620478A (en) | 2004-08-20 | 2006-06-16 | Koninkl Philips Electronics Nv | Self-aligned epitaxially grown bipolar transistor |
US7361958B2 (en) | 2004-09-30 | 2008-04-22 | Intel Corporation | Nonplanar transistors with metal gate electrodes |
KR100629356B1 (ko) * | 2004-12-23 | 2006-09-29 | 삼성전자주식회사 | 필라 패턴을 갖는 플래시메모리소자 및 그 제조방법 |
US7470943B2 (en) | 2005-08-22 | 2008-12-30 | International Business Machines Corporation | High performance MOSFET comprising a stressed gate metal silicide layer and method of fabricating the same |
US20070178634A1 (en) * | 2006-01-31 | 2007-08-02 | Hyung Suk Jung | Cmos semiconductor devices having dual work function metal gate stacks |
US7615831B2 (en) | 2007-10-26 | 2009-11-10 | International Business Machines Corporation | Structure and method for fabricating self-aligned metal contacts |
US8159038B2 (en) | 2008-02-29 | 2012-04-17 | Infineon Technologies Ag | Self aligned silicided contacts |
JP2009302320A (ja) * | 2008-06-13 | 2009-12-24 | Renesas Technology Corp | 半導体装置およびその製造方法 |
US20100038715A1 (en) | 2008-08-18 | 2010-02-18 | International Business Machines Corporation | Thin body silicon-on-insulator transistor with borderless self-aligned contacts |
US8062975B2 (en) * | 2009-04-16 | 2011-11-22 | Freescale Semiconductor, Inc. | Through substrate vias |
JP2011146465A (ja) * | 2010-01-13 | 2011-07-28 | Fujitsu Semiconductor Ltd | 半導体装置およびその製造方法 |
US8673725B2 (en) * | 2010-03-31 | 2014-03-18 | Tokyo Electron Limited | Multilayer sidewall spacer for seam protection of a patterned structure |
-
2010
- 2010-04-09 US US12/757,201 patent/US8367508B2/en active Active
-
2011
- 2011-03-15 JP JP2013503757A patent/JP5764198B2/ja not_active Expired - Fee Related
- 2011-03-15 WO PCT/US2011/028464 patent/WO2011126682A1/en active Application Filing
- 2011-03-15 DE DE112011100421T patent/DE112011100421B4/de not_active Expired - Fee Related
- 2011-03-15 CN CN201180016073.4A patent/CN102822976B/zh not_active Expired - Fee Related
- 2011-03-15 GB GB201219007A patent/GB2492514C/en not_active Expired - Fee Related
- 2011-04-07 TW TW104127119A patent/TWI538064B/zh not_active IP Right Cessation
- 2011-04-07 TW TW100112069A patent/TWI527124B/zh not_active IP Right Cessation
-
2012
- 2012-07-20 US US13/554,305 patent/US8901626B2/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6207543B1 (en) * | 1997-06-30 | 2001-03-27 | Vlsi Technology, Inc. | Metallization technique for gate electrodes and local interconnects |
Also Published As
Publication number | Publication date |
---|---|
GB2492514A (en) | 2013-01-02 |
TW201545241A (zh) | 2015-12-01 |
US8901626B2 (en) | 2014-12-02 |
JP2013524529A (ja) | 2013-06-17 |
TWI538064B (zh) | 2016-06-11 |
JP5764198B2 (ja) | 2015-08-12 |
WO2011126682A1 (en) | 2011-10-13 |
DE112011100421B4 (de) | 2013-09-05 |
US8367508B2 (en) | 2013-02-05 |
DE112011100421T5 (de) | 2012-11-22 |
GB2492514B (en) | 2014-06-11 |
GB201219007D0 (en) | 2012-12-05 |
US20120280322A1 (en) | 2012-11-08 |
US20110248321A1 (en) | 2011-10-13 |
CN102822976A (zh) | 2012-12-12 |
TWI527124B (zh) | 2016-03-21 |
GB2492514C (en) | 2014-06-18 |
TW201203384A (en) | 2012-01-16 |
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Legal Events
Date | Code | Title | Description |
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20170118 Address after: Grand Cayman, Cayman Islands Patentee after: INTERNATIONAL BUSINESS MACHINES Corp. Address before: American New York Patentee before: Globalfoundries second U.S. Semiconductor Co.,Ltd. Effective date of registration: 20170118 Address after: American New York Patentee after: Globalfoundries second U.S. Semiconductor Co.,Ltd. Address before: American New York Patentee before: International Business Machines Corp. |
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TR01 | Transfer of patent right | ||
TR01 | Transfer of patent right |
Effective date of registration: 20180328 Address after: Ontario, Canada Patentee after: International Business Machines Corp. Address before: Grand Cayman, Cayman Islands Patentee before: INTERNATIONAL BUSINESS MACHINES Corp. |
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CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160907 Termination date: 20210315 |