TW201545241A - 用於場效電晶體裝置之自動對準接點 - Google Patents

用於場效電晶體裝置之自動對準接點 Download PDF

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TW201545241A
TW201545241A TW104127119A TW104127119A TW201545241A TW 201545241 A TW201545241 A TW 201545241A TW 104127119 A TW104127119 A TW 104127119A TW 104127119 A TW104127119 A TW 104127119A TW 201545241 A TW201545241 A TW 201545241A
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germanium
gate stack
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de-chao Guo
Wilfried E Hanensch
Xinhui Wang
Keith Kwong Hon Wong
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Abstract

一種形成一場效電晶體之方法，該方法包含：形成一閘極堆疊、鄰接該間隙物之相對側面之一間隙物、在該間隙物之相對側面之一矽化物源極區域及一矽化物汲極區域、在該源極區域及該汲極區域上磊晶成長之矽；在該閘極堆疊和該間隙物上形成一襯墊層、移除該襯墊層之一部分，以暴露該硬遮罩層之一部分、移除該硬遮罩層之該等暴露部分，以暴露該閘極堆疊之一矽層、移除暴露之矽，以暴露該閘極堆疊之一金屬層之一部份、該源極區域及該汲極區域；以及在該閘極堆疊之該金屬層上、該矽化物源極區域及該矽化物汲極區域沉積一導電材料。

Description

用於場效電晶體裝置之自動對準接點
本發明涉及半導體場效電晶體。
半導體場效電晶體(FETs)包含源極、汲極及閘極，其常常電性地接觸至金屬接點。如果在製造程序中金屬接點錯位，金屬接點之製造可能導致接點間之短路。
在本發明之一第一態樣中，形成一場效電晶體之方法包含：在一基板上形成一閘極堆疊、在該基板上鄰接於該閘極堆疊之相對側面處，形成一間隙物、在該基板上鄰接該閘極堆疊之一第一面上之該間隙物處，形成一矽化物源極、在該基板上鄰接該閘極堆疊之一第二面之該間隙物處，形成一矽化物汲極、在該暴露之矽化物源極區域及該暴露之矽化物汲極區域上，磊晶成長矽、在該閘極堆疊之一硬遮罩層和該間隙物上，形成一襯墊層、移除該襯墊層之一部分，以暴露該硬遮罩層之一部分、移除該硬遮罩層之該等暴露部分，以暴露該閘極堆疊之一矽層、移除暴露之矽，以暴露該閘極堆疊之一金屬層之一部份、該矽化物源極區域及該矽化物汲極區域，以及在該閘極堆疊之該暴露金屬、 該暴露之矽化物源極區域及該暴露之矽化物汲極區域層之上沉積一導電材料。
在本發明之另一態樣中，一場效電晶體裝置包含：沉積在一基板上之閘極堆疊、沉積在該閘極堆疊之第一末端上之第一接點部分，沉積在該閘極堆疊之第二末端之上之第二接點部分，該第一接點部分沉積在離該第二接點部分之距離d處，而寬度為w之一第三接點部分沉積在該設備之一源極區域中，該距離d大於該寬度w。
本發明之該等技術實現額外之諸特徵以及諸優點。本發明之其他諸實施例以及諸態樣將在此細述，並視為本所請發明之一部分。為了更加了解本發明之該諸優點及該諸特徵，可參照該描述及該諸圖示。
100‧‧‧閘極堆疊
102‧‧‧矽基板/基板
104‧‧‧介電層
106‧‧‧金屬層
108‧‧‧矽層
110‧‧‧硬遮罩層
112‧‧‧間隙物
114‧‧‧矽化物
202‧‧‧矽區域
302‧‧‧襯墊層
501‧‧‧絕緣層上矽晶溝槽部分
502‧‧‧空腔
702‧‧‧空腔
802g‧‧‧導電接點
802‧‧‧導電接點
在本說明書最後之諸請求項中，特別指出並明確地請求被視為本發明之標的。根據以上結合附圖之詳細描述，本案之前述與其他諸特徵和諸優點將更加顯而易見，其中：
第1A圖至第8C圖圖示形成一場效電晶體裝置之一方法和一所得構造。
第1A圖和第1B圖分別以剖視圖和上視圖圖示形成場效電晶體之方法。第1A圖圖示多個沉積在矽基板102上之閘極堆疊100，該基板可包含矽部分及絕緣層上矽晶(silicon-on-insulator；SOI)溝槽部分501(如下述之第5A圖所示)。閘極堆疊100順著縱軸x平行排列(如圖1B所示)。閘極 堆疊100包含介電層104(諸如沉積在基板102上之高介電值材料)。金屬層106(諸如沉積在介電層104上之氮化鉭)。沉積在金屬層106上之矽層108及硬遮罩層110(諸如沉基在矽層108上之氮化矽材料)。間隙物112在基板102上沿著閘極堆疊100之側邊形成。間隙物112可由如氮化物形成，並可包含任何層數及層中之任何材料組合。在所圖示之實施例中，間隙物112包含兩層間隙金屬。源極區域(S)和汲極區域(D)係形成在基板102上鄰接間隙物112處。源極區域和汲極區域包含矽化物114(諸如在源極區域和汲極區域上形成之二矽化鎢或二矽化鎳)。
第2A圖和第2B圖圖示後續在源極區域和汲極區域之暴露之矽化物114上，矽磊晶成長之所得構造。磊晶成長產生由矽化物114所延伸之暴露矽區域202。
第3A圖和第3B圖圖示後續在閘極堆疊100、矽區域202及間隙物112上，沉積襯墊層302之所得構造。襯墊層302可包含如氧化層者。
第4A圖和第4B圖圖示後續將襯墊層302之一部分移除，以暴露矽區域202之部分後的所得構造。襯墊層302之該部分可藉由(諸如化學機械拋光(chemical mechanical polishing；CMP)或其他合適之機械或化學程序所移除)。
第5A圖和第5B圖圖示後續將襯墊層302之多部分移除，以暴露硬遮罩層110之部分後的所得構造。移除襯墊層302之一部分，形成由硬遮罩層110及襯墊層302所定義之之空腔502。
第6A圖和第6B圖圖示後續將硬遮罩層110之暴露部分移除，而暴露矽層108之部分後的所得構造。硬遮罩層 110之暴露部分可藉由蝕刻程序(諸如反應性離子蝕刻(reactive ion etching；RIE)或其他用以蝕刻硬遮罩層110材料之合適蝕刻程序)所移除。
第7A圖、第7B圖和第7C圖圖示後續將(圖6A之)矽層(圖6B之)108之暴露部分和矽區域202移除之所得構造。暴露之矽可藉由(諸如用以移除矽之RIE程序或任何其他合適之)蝕刻程序所移除。矽層108之多個暴露部分之移除，暴露金屬層106之部分，且增加空腔502之深度，使空腔502由襯墊層302、間隙物112及金屬層106所定義。而矽區域202之移除，暴露矽化物114源極區域和汲極區域，並在襯墊層302中形成空腔702。空腔702係由襯墊層302及矽化物114所定義。
第8A圖、第8B圖和第8C圖圖示後續在(第7A圖和第7C圖之)空腔502及空腔702內形成導電接點802及802a之所得構造。導電接點802及802a可藉由在空腔502及空腔702內並在暴露之襯墊層302上，沉積一層金屬材料(諸如銀、金或鋁)所形成。拋光程序(諸如CMP或其他合適程序)可用來由襯墊層302移除金屬材料，且在其他實施例中，可用來自襯墊層302之一部分移除金屬材料，以定義接點802及802a。接點802及802a和裝置之源極、汲極及閘極(G)區域電性地接觸。
參閱第8B圖，源極及汲極區域接點802沿著如線8C所示之橫軸排列，線8C係與(第1B圖之)閘極堆疊100縱軸x相垂直，且和閘極堆疊100之中間相交。閘極區域接點802g沿如直線8A及直線y所示之平行軸排列，該等直線和平行閘極堆疊100之縱軸x相垂直。閘極區域接點802g在閘極堆疊之末端以距離d相隔。源極及汲極區域接點802之寬度為w。在所圖 示之實施例中，該距離d大於該寬度w。閘極區域接點802g距離源極由汲極區域接點802之偏移量，減少製造程序中接點802及802g間短路之發生。
本文之用語僅用來描述特定實施例，而並非意欲限制本發明。本文所使用單數形「一」及「該」亦意欲包含複數形，除非上下文有清楚地指出。應理解，在此說明書中所使用之術語「包含」及/或「包括」指明所具有之特徵、整體、步驟、操作、要素及/或元件，但非排除一或多個其他特徵、整體、步驟、操作、要素元件及/或其群體之呈現或添加。
以下請求項中之所有手段或步驟功能用語元件之相應結構、材料、動作、及均等物，意欲包含任何用於執行該功能之相應結構、材料、動作與其他特定所請求元件之組合。本發明所揭示內容之目的係在於圖示及描述，並非意欲為詳盡徹底之揭示或將本發明侷限於所揭示之形式。許多不偏離本發明之範疇及精神之修改及變化對於熟習此項技藝者乃顯而易見。所選擇描述之實施例係為能最佳地解釋發明原理及實際應用者，且為使其他熟習此項技藝者能理解本發明具有適於所預期之特殊用途之各式變化之各式實施例。
本文描繪之流程圖僅為一示例。本文描述之流程圖或步驟(或操作)可有許多不偏離該發明之範疇及精神之變化。例如，可依不同順序執行步驟，或可增加、刪除或修改步驟。所有此等變化皆視為該所請發明之一部分。
儘管本案已描述該發明之較佳實施例，應理解熟習此項技藝者可在現在及未來進行各式落在以下請求項之範疇中之改進及增強。此等請求項應被詮釋成，得以為被首次描述之發 明維持適當的保護。
100‧‧‧閘極堆疊
102‧‧‧矽基板/基板
104‧‧‧介電層
106‧‧‧金屬層
108‧‧‧矽層
110‧‧‧硬遮罩層
112‧‧‧間隙物
114‧‧‧矽化物
D‧‧‧汲極區域
S‧‧‧源極區域

Claims (9)

  1. 一種形成一場效電晶體之方法，該方法包含以下步驟：在一基板上形成一閘極堆疊；在該基板上鄰接該閘極堆疊之相對側面處，形成一間隙物；在該基板上鄰接在該閘極堆疊之一第一面上的該間隙物處，形成一矽化物源極；在該基板上鄰接該閘極堆疊之一第二面上的該間隙物處，形成一矽化物汲極；在該暴露之矽化物源極區域及該暴露之矽化物汲極區域上，磊晶成長矽；在該閘極堆疊之一硬遮罩層和該間隙物上，形成一襯墊層；移除該襯墊層之一部分，以暴露該硬遮罩層之一部分；移除該硬遮罩層之該等暴露部分，以暴露該閘極堆疊之一矽層；移除暴露之矽，以暴露該閘極堆疊之一金屬層之一部份、該矽化物源極區域及該矽化物汲極區域；以及在該閘極堆疊之該暴露金屬層、該暴露之矽化物源極區域及該暴露之矽化物汲極區域上，沉積一導電材料。
  2. 如請求項1所述之方法，其中該矽化物源極區域及該矽化物汲極區域與一第一軸對準，該第一軸垂直對準於該閘極堆疊。
  3. 如請求項2所述之方法，其中該閘極堆疊之該硬遮罩層之該暴露部分與一第二軸對準，該第二軸平行對準於該第一軸。
  4. 如請求項1所述之方法，其中該閘極堆疊包含：沉積在該基板上之一介電層、沉積在該介電層上之該金屬層、沉積在該金屬層上之該矽層，以及沉積在該係層上之該硬遮罩層。
  5. 如請求項1所述之方法，其中該間隙物包含一氮化物材料；或其中該間隙物包含一第一氮化物層及一第二氮化物層。
  6. 如請求項1所述之方法，其中移除該襯墊層之該部分以暴露該硬遮罩層之一部分之步驟，形成由該襯墊層及該硬遮罩層之該暴露部分所定義之一空腔；或其中移除該暴露之矽之步驟，形成由該襯墊層及該矽化物汲極所定義之一空腔。
  7. 如請求項1所述之方法，其中該基板包含一矽區域和一絕緣層上矽晶(silicon-on-insulator；SOI)溝槽區域；或其中該源極區域及該汲極區域係在該基板之一矽區域上，且該閘極堆疊之該暴露金屬區域係在該基板之一SOI區域上。
  8. 如請求項1所述之方法，其中該襯墊層係在該磊晶成長之矽之上形成，且該方法更進一步包含以下步驟：在移除該襯墊層之一部分以暴露該硬遮罩層之一部分前，移除該襯墊層之一部分和該磊晶成長之矽之一部分；或其中該襯墊層之該部分及該磊晶成長之矽之該部分係由一化學機械拋光程序所移除。
  9. 如請求項1所述之方法，其中該暴露之矽係以一反應性離子蝕刻所移除；或其中該硬遮罩層之該等暴露部分係以一反應性離子蝕刻所移除。
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