CN102740590B - 陶瓷基板及其制造方法 - Google Patents

陶瓷基板及其制造方法 Download PDF

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Publication number
CN102740590B
CN102740590B CN201210094793.9A CN201210094793A CN102740590B CN 102740590 B CN102740590 B CN 102740590B CN 201210094793 A CN201210094793 A CN 201210094793A CN 102740590 B CN102740590 B CN 102740590B
Authority
CN
China
Prior art keywords
ceramic
substrate
ceramic substrate
vias
contacts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201210094793.9A
Other languages
English (en)
Chinese (zh)
Other versions
CN102740590A (zh
Inventor
野村俊寿
铃木健司
秋田和重
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niterra Co Ltd
Original Assignee
NGK Spark Plug Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Spark Plug Co Ltd filed Critical NGK Spark Plug Co Ltd
Publication of CN102740590A publication Critical patent/CN102740590A/zh
Application granted granted Critical
Publication of CN102740590B publication Critical patent/CN102740590B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0286—Programmable, customizable or modifiable circuits
    • H05K1/0287—Programmable, customizable or modifiable circuits having an universal lay-out, e.g. pad or land grid patterns or mesh patterns
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07342—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being at an angle other than perpendicular to test object, e.g. probe card
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R3/00—Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments, e.g. of probe tips
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/0949—Pad close to a hole, not surrounding the hole
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09609—Via grid, i.e. two-dimensional array of vias or holes in a single plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0979—Redundant conductors or connections, i.e. more than one current path between two points
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/005—Punching of holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/11—Methods of delaminating, per se; i.e., separating at bonding face

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Measuring Leads Or Probes (AREA)
CN201210094793.9A 2011-04-01 2012-04-01 陶瓷基板及其制造方法 Expired - Fee Related CN102740590B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011082161A JP5670806B2 (ja) 2011-04-01 2011-04-01 セラミック基板及びその製造方法
JP2011-082161 2011-04-01

Publications (2)

Publication Number Publication Date
CN102740590A CN102740590A (zh) 2012-10-17
CN102740590B true CN102740590B (zh) 2015-10-21

Family

ID=46925759

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210094793.9A Expired - Fee Related CN102740590B (zh) 2011-04-01 2012-04-01 陶瓷基板及其制造方法

Country Status (4)

Country Link
US (1) US9049786B2 (cg-RX-API-DMAC10.html)
JP (1) JP5670806B2 (cg-RX-API-DMAC10.html)
KR (1) KR101555405B1 (cg-RX-API-DMAC10.html)
CN (1) CN102740590B (cg-RX-API-DMAC10.html)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5777997B2 (ja) * 2011-03-07 2015-09-16 日本特殊陶業株式会社 電子部品検査装置用配線基板およびその製造方法
JP5798435B2 (ja) 2011-03-07 2015-10-21 日本特殊陶業株式会社 電子部品検査装置用配線基板およびその製造方法
KR102419954B1 (ko) * 2017-10-20 2022-07-12 가부시키가이샤 페로텍 머티리얼 테크놀로지즈 세라믹스, 프로브 안내 부품, 프로브 카드 및 패키지 검사용 소켓
KR101961101B1 (ko) * 2017-12-07 2019-03-22 (주)티에스이 무프레임 구조를 갖는 테스트용 러버 소켓 및 그의 제작 방법
JP2020030127A (ja) * 2018-08-23 2020-02-27 日本特殊陶業株式会社 電気検査用基板およびその製造方法
JP7102525B2 (ja) * 2018-11-29 2022-07-19 コステックシス カンパニー リミテッド 入出力回路が内蔵された電力増幅器用パッケージの製造方法
CN115291340A (zh) * 2022-07-13 2022-11-04 广州奥鑫通讯设备有限公司 一种用于光纤陀螺仪的光器件及其制备方法
CN115307617A (zh) * 2022-07-13 2022-11-08 广州奥鑫通讯设备有限公司 一种用于光纤陀螺仪的光器件及其制备方法
CN116278242A (zh) * 2023-03-20 2023-06-23 瓷金科技(深圳)有限公司 多层陶瓷管壳及其生坯以及两者的制备方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002257858A (ja) * 2001-02-28 2002-09-11 Ibiden Co Ltd プローブカード

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1065345A (ja) * 1996-08-20 1998-03-06 Hitachi Ltd 多層セラミック基板とその製造方法及びパターン検査装置
JP2003060358A (ja) * 2001-08-10 2003-02-28 Ngk Spark Plug Co Ltd セラミック配線基板の製造方法
US20060086703A1 (en) * 2004-08-18 2006-04-27 Ling Liu System and method for singulating a substrate
JP2009074823A (ja) 2007-09-19 2009-04-09 Ngk Spark Plug Co Ltd 電子部品検査装置用配線基板およびその製造方法
JP4542587B2 (ja) 2008-02-04 2010-09-15 日本特殊陶業株式会社 電子部品検査装置用配線基板
JP5449719B2 (ja) * 2008-08-11 2014-03-19 日本特殊陶業株式会社 配線基板、ｉｃ電気特性検査用配線基板、及び配線基板の製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002257858A (ja) * 2001-02-28 2002-09-11 Ibiden Co Ltd プローブカード

Also Published As

Publication number Publication date
CN102740590A (zh) 2012-10-17
JP2012215527A (ja) 2012-11-08
KR101555405B1 (ko) 2015-09-23
KR20120112222A (ko) 2012-10-11
US20120247821A1 (en) 2012-10-04
US9049786B2 (en) 2015-06-02
JP5670806B2 (ja) 2015-02-18

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PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
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GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20151021