CN102651341A - 一种tft阵列基板的制造方法 - Google Patents
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Abstract
本发明提供一种TFT阵列基板的制造方法,包括如下步骤:通过构图工艺在基板上分别形成包括金属氧化物半导体层、透明像素电极、源电极、漏电极、刻蚀阻挡层、栅电极、栅极扫描线、栅极绝缘层、数据扫描线以及接触过孔的图形,其中,所述金属氧化物半导体层和刻蚀阻挡层通过一次构图工艺形成,所述源电极、漏电极、透明像素电极以及数据扫描线通过一次构图工艺形成。该制造方法能够简化制作工艺,提高生产效率,降低生产成本,且提高了良品率。
Description
技术领域
本发明属于平板显示器制造技术领域,具体涉及一种TFT阵列基板的制造方法。
背景技术
随着科学技术的发展,平板显示器已取代笨重的CRT显示器日益深入人们的日常生活中。目前,常用的平板显示器包括LCD(Liquid Crystal Display:液晶显示器)和OLED(OrganicLight-Emitting Diode:有机发光二极管)显示器。尤其是LCD平板显示器,由于其具有体积小、重量轻、厚度薄、功耗低、无辐射等特点,近年来得到了迅速地发展,在当前的平板显示器市场中占据了主导地位,在各种大中小尺寸的产品上得到了广泛的应用,几乎涵盖了当今信息社会的主要电子产品,如液晶电视、电脑、手机、PDA、GPS、车载显示、投影显示、摄像机、数码相机、电子手表、计算器、电子仪器、仪表、公共显示和虚幻显示等多个领域。
在成像过程中,LCD平板显示器中每一液晶像素点都由集成在TFT阵列基板中的薄膜晶体管(Thin Film Transistor:简称TFT)来驱动,再配合外围驱动电路,实现图像显示;有源矩阵驱动式OLED(Active Matrix Organic Light Emission Display,简称AMOLED)显示器中由TFT基板中的TFT驱动OLED面板中对应的OLED像素,再配合外围驱动电路,实现图像显示。在上述显示器中,TFT是控制发光的开关,是实现液晶显示器和OLED显示器大尺寸的关键,直接关系到高性能平板显示器的发展方向。
在现有平板显示器生产技术中,已实现产业化的TFT主要有非晶硅TFT、多晶硅TFT、单晶硅TFT等,用于制备平板显示器中阵列基板使用最多的是非晶硅TFT。目前,随着技术的发展,出现了金属氧化物TFT,金属氧化物TFT具有载流子迁移率高的优点,使得TFT可以做的很小,而使平板显示器的分辨率越高,显示效果越好;同时用金属氧化物TFT还具有特性不均现象少、材料和工艺成本降低、工艺温度低、可利用涂布工艺、透明率高、带隙大等优点。
目前,制作金属氧化物TFT一般采用六次光刻工艺,主要是因为在刻蚀源漏金属电极时会腐蚀掉金属氧化物半导体层,因此一般在金属氧化物半导体层上面增加一次光刻工艺以形成刻蚀阻挡层,以便在刻蚀源漏金属电极的过程中保护金属氧化物半导体层,使之不被源漏金属的刻蚀液腐蚀。一般来说,在制作金属氧化物TFT过程中,所用掩模板的数量越少,即光刻工艺的使用次数越少,则生产效率越高,成本越低。
发明内容
本发明所要解决的技术问题是针对现有技术中采用六次光刻工艺制作金属氧化物TFT的不足,提供一种能够减少光刻工艺次数的TFT阵列基板的制造方法,该制造方法能够简化制作工艺,提高生产效率,降低生产成本,且提高了良品率。
解决本发明技术问题所采用的技术方案是该TFT阵列基板的制造方法包括如下步骤:通过构图工艺在基板上分别形成包括金属氧化物半导体层、透明像素电极、源电极、漏电极、刻蚀阻挡层、栅电极、栅极扫描线、栅极绝缘层、数据扫描线以及接触过孔的图形,其中,所述金属氧化物半导体层和刻蚀阻挡层通过一次构图工艺形成,所述源电极、漏电极、透明像素电极以及数据扫描线通过一次构图工艺形成。
其中,该制造方法具体包括以下步骤:
步骤S1):采用灰色调或半色调掩模板,通过一次构图工艺在基板上形成包括金属氧化物半导体层和刻蚀阻挡层的图形;
步骤S2):采用灰色调或半色调掩模板,通过一次构图工艺,在完成步骤S1)的基板上形成包括源电极、漏电极、数据扫描线以及透明像素电极的图形;
步骤S3):在完成步骤S2)的基板上形成栅极绝缘层,再通过一次构图工艺形成包括接触过孔的图形;
步骤S4):在完成步骤S3)的基板上通过一次构图工艺形成包括栅电极和栅极扫描线的图形。
优选的是,步骤S1)包括如下步骤:
S11)在基板上依次沉积金属氧化物半导体膜和刻蚀阻挡膜;
S12)在完成步骤S11)的基板上涂覆一层光刻胶;
S13)采用灰色调或半色调掩模板对所述光刻胶进行曝光、显影,所述半色调掩模板或灰色调掩模板上设有非透射区域、部分透射区域以及透射区域,所述灰色调或半色调掩模板上的三个区域在所述光刻胶上分别对应形成光刻胶完全保留区域、光刻胶部分保留区域以及光刻胶完全去除区域,或者,所述灰色调或半色调掩模板上的三个区域在所述光刻胶上分别对应形成光刻胶完全去除区域、光刻胶部分保留区域以及光刻胶完全保留区域;所述光刻胶完全保留区域对应于形成刻蚀阻挡层的图形,所述光刻胶部分保留区域对应于形成金属氧化物半导体层的图形,所述刻蚀阻挡膜上未被光刻胶覆盖的区域则为光刻胶完全去除区域;
S14)对完成步骤S13)的基板进行刻蚀,以形成金属氧化物半导体层的图形;
S15)对完成步骤S14)的基板进行灰化处理,灰化掉所述光刻胶部分保留区域的光刻胶;
S16)对完成步骤S15)的基板进行刻蚀,以形成刻蚀阻挡层的图形;
S17)将剩余的光刻胶剥离。
优选的是,在步骤S11)中,先在基板上沉积修饰层,然后在所述修饰层上依次沉积金属氧化物半导体膜和刻蚀阻挡膜。优选沉积修饰层是采用PECVD方法,所述修饰层采用氧化物或氮化物或氧氮化合物制成,修饰层的厚度范围为
优选的是,在步骤S11)中,在修饰层上沉积金属氧化物半导体膜是采用溅射或热蒸发的方法,所述金属氧化物半导体膜采用非晶IGZO、IGZO、HIZO、IZO、a-InZnO、a-InZnO、ZnO:F、In2O3:Sn、In2O3:Mo、Cd2SnO4、ZnO:Al、TiO2:Nb或Cd-Sn-O制成,所述金属氧化物半导体膜的厚度范围为
优选的是,在金属氧化物半导体膜上沉积刻蚀阻挡膜是采用PECVD方法,所述刻蚀阻挡膜采用硅氧化物或氮化物或氧氮化合物制成。
更优选的是,所述刻蚀阻挡层采用一层或双层结构,当刻蚀阻挡层采用一层结构时,该刻蚀阻挡层采用SiOx或Al2O3制成;当刻蚀阻挡层采用双层结构时,所述与金属氧化物半导体层相邻的一层采用硅氧化物或氮化物制成,所述刻蚀阻挡层的厚度范围为
优选的是,步骤S2)包括如下步骤:
S21)在基板上依次沉积透明导电膜和源/漏金属膜;
S22)在完成步骤S21)的基板上涂覆一层光刻胶;
S23)采用灰色调或半色调掩模板对所述光刻胶进行曝光、显影,所述半色调掩模板或灰色调掩模板上设有非透射区域、部分透射区域以及透射区域,所述灰色调或半色调掩模板上的三个区域在所述光刻胶上分别对应形成光刻胶完全保留区域、光刻胶部分保留区域以及光刻胶完全去除区域,或者,所述灰色调或半色调掩模板上的三个区域在所述光刻胶上分别对应形成光刻胶完全去除区域、光刻胶部分保留区域以及光刻胶完全保留区域;所述光刻胶完全保留区域对应于形成数据扫描线、源电极和漏电极的图形,所述光刻胶部分保留区域对应于形成透明像素电极的图形;
S24)对完成步骤S23)的基板进行刻蚀,以形成包括源电极和数据扫描线的图形;
S25)对完成步骤S24)的基板进行灰化处理,灰化掉所述光刻胶部分保留区域的光刻胶;
S26)对完成步骤S25)的基板进行刻蚀,以形成包括漏电极和透明像素电极的图形;
S27)将剩余的光刻胶剥离。
优选的是,在步骤S21)中,沉积透明导电膜采用溅射或热蒸发的方法,所述透明导电膜采用ITO或金属氧化物制成,所述透明导电膜的厚度范围为沉积源/漏金属膜采用溅射或热蒸发的方法,所述源/漏金属膜采用Cr、W、Ti、Ta、Mo、Al、Cu制成或采用上述金属中部分金属的合金制成,所述源/漏金属膜的厚度范围为
优选的是,在步骤S3)中,在形成包括源电极、漏电极、数据扫描线和透明像素电极的图形的基板上通过沉积方式形成栅极绝缘层。优选沉积栅极绝缘层采用PECVD方法,所述栅极绝缘层采用氧化物或氮化物或氧氮化合物制成,所述栅极绝缘层的厚度范围为
优选的是,在步骤S4)中,在完成步骤S3)的基板上通过一次构图工艺形成包括栅电极和栅极扫描线的图形是在栅极绝缘层上沉积栅金属膜,再通过一次光刻工艺形成包括栅电极和栅极扫描线的图形;在栅极绝缘层上沉积栅金属膜采用溅射或热蒸发的方法,所述栅金属膜采用Cr、W、Cu、Ti、Ta、Mo制成或采用上述金属中部分金属的合金制成,所述栅金属膜的厚度范围为
本发明的有益效果是:通过采用四次构图工艺来制作TFT阵列基板,与现有技术中TFT阵列基板采用六次光刻工艺相比,减少了两次构图工艺,从而简化了制作工艺,提高了生产效率,降低了生产成本,提高了良品率。
附图说明
图1为采用本发明TFT阵列基板的制造方法所制成的TFT的平面示意图;
图2为本发明TFT阵列基板的制造方法中经第一次构图工艺后形成的TFT阵列基板的截面示意图;
图2a-图2e为本发明TFT阵列基板的制造方法中第一次构图工艺的中间过程的TFT阵列基板的截面示意图;
图3为本发明TFT阵列基板的制造方法中经第二次构图工艺后形成的TFT阵列基板的截面示意图;
图3a-图3e为本发明TFT阵列基板的制造方法中第二次构图工艺的中间过程的TFT阵列基板的截面示意图;
图4为本发明TFT阵列基板的制造方法中经第三次构图工艺后形成的TFT阵列基板的截面示意图;
图5为本发明TFT阵列基板的制造方法中经第四次构图工艺后形成的TFT阵列基板的截面示意图;
图6为本发明TFT阵列基板的制造方法的流程图。
图中:1-基板;2-修饰层;3-金属氧化物半导体层;4-刻蚀阻挡层;5-透明像素电极;6-漏电极;7-源电极;8-栅极绝缘层;9-栅电极;10-数据扫描线;11-栅极扫描线;12-光刻胶。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案,下面结合附图和具体实施方式对本发明TFT阵列基板的制造方法作进一步详细描述。
本发明中,光刻工艺,是指包括曝光、显影、刻蚀等工艺过程的利用光刻胶、掩模板、曝光机等进行刻蚀形成图形的工艺;构图工艺,包括光刻工艺,还包括打印、喷墨等其他用于形成预定图形的工艺。
本发明实施例提供一种TFT阵列基板的制造方法,包括如下步骤:通过构图工艺在基板上分别形成包括金属氧化物半导体层、透明像素电极、源电极、漏电极、刻蚀阻挡层、栅电极、栅极扫描线、栅极绝缘层、数据扫描线以及接触过孔的图形,其中,所述金属氧化物半导体层和刻蚀阻挡层通过一次构图工艺形成,所述源电极、漏电极、透明像素电极以及数据扫描线通过一次构图工艺形成。
上述制造方法具体包括以下步骤:
步骤S1):采用灰色调或半色调掩模板,通过一次构图工艺在基板上形成包括金属氧化物半导体层和刻蚀阻挡层的图形;
步骤S2):采用灰色调或半色调掩模板,通过一次构图工艺,在完成步骤S1)的基板上形成包括源电极、漏电极、数据扫描线以及透明像素电极的图形;
步骤S3):在完成步骤S2)的基板上形成栅极绝缘层,再通过一次构图工艺形成包括接触过孔的图形;
步骤S4):在完成步骤S3)的基板上通过一次构图工艺形成包括栅电极和栅极扫描线的图形。
实施例1:
图1所示为由本实施例中的制造方法制作形成的TFT的平面图。下面结合图2-图5以及图6对本实施例中TFT阵列基板的制造方法进行详细介绍。
本实施例中,所述TFT阵列基板的制造方法包括以下步骤:
步骤S1):采用灰色调或半色调掩模板,通过一次构图工艺在基板上形成金属氧化物半导体层和刻蚀阻挡层的图形,如图2所示。
具体地,是先在基板1上沉积修饰层2,接着在修饰层2上沉积金属氧化物半导体膜,然后沉积刻蚀阻挡膜,并采用灰色调或半色调掩模板经一次构图工艺之后,形成刻蚀阻挡层4以及金属氧化物半导体层3。
步骤S1)具体可以包括以下步骤:
S11)在基板上依次沉积修饰层2、金属氧化物半导体膜和刻蚀阻挡膜。
S12)在完成步骤S11)的基板上涂覆一层光刻胶12。
S13)采用灰色调或半色调掩模板对所述光刻胶进行曝光、显影,所述半色调掩模板或灰色调掩模板上设有非透射区域、部分透射区域以及透射区域,若所述光刻胶12为正性胶,所述灰色调或半色调掩模板上的三个区域在所述光刻胶上分别对应形成光刻胶完全保留区域NP、光刻胶部分保留区域HP以及光刻胶完全去除区域WP;若所述光刻胶12为负性胶,则所述灰色调或半色调掩模板上的三个区域在所述光刻胶上分别对应形成光刻胶完全去除区域WP、光刻胶部分保留区域HP以及光刻胶完全保留区域NP。所述光刻胶完全保留区域NP的光刻胶被全部保留,所述光刻胶完全保留区域对应于形成刻蚀阻挡层的图形,所述光刻胶部分保留区域HP的光刻胶的厚度比光刻胶完全保留区域NP的光刻胶的厚度薄,所述光刻胶部分保留区域对应于形成金属氧化物半导体层的图形,所述光刻胶完全去除区域WP的光刻胶被全部去除,所述刻蚀阻挡膜上未被光刻胶覆盖的区域则为光刻胶完全去除区域WP,如图2a所示。
其中,形成光刻胶部分保留区域HP的原理是:由于曝光的分别是灰色调或半色调掩模板上带有狭缝的部分透射区域,不论所述光刻胶12为正性胶或是负性胶,所述狭缝的衍射效应与干涉效应使得曝光在该部分透射区域的光强度比曝光在透射区域的光强度弱,因此所述部分透射区域的光刻胶不如透射区域的光刻胶曝光严重,使得光刻胶部分保留区域HP的光刻胶的厚度比光刻胶完全保留区域NP的光刻胶的厚度薄。
S14)对完成步骤S13)的基板进行刻蚀,以形成金属氧化物半导体层的图形。
如图2b所示,对图2a中的基板进行第一次刻蚀,本实施例中采用干法刻蚀工艺,通过刻蚀掉光刻胶完全去除区域WP对应的刻蚀阻挡膜;如图2c所示,对图2b中的基板进行第二次刻蚀,本实施例中采用湿法刻蚀工艺,通过刻蚀掉光刻胶完全去除区域WP对应的金属氧化物半导体膜而形成金属氧化物半导体层3的图形。
S15)对完成步骤S14)的基板进行灰化处理,灰化掉所述光刻胶部分保留区域的光刻胶,如图2d所示。
S16)对完成步骤S15)的基板进行刻蚀,以形成刻蚀阻挡层的图形。
如图2e所示,对图2d中的基板进行第三次刻蚀,本实施例中采用干法刻蚀工艺,通过刻蚀掉光刻胶部分保留区域HP的刻蚀阻挡膜而形成刻蚀阻挡层的图形。
S17)将剩余的光刻胶剥离,露出金属氧化物半导体层3和刻蚀阻挡层4,如图2所示。
在上述步骤中,在基板1上沉积修饰层2是采用PECVD(PlasmaEnhanced Chemical Vapor Deposition,等离子体增强化学气象沉积)方法进行连续沉积,所述修饰层2的厚度范围为 修饰层2可以采用氧化物(例如硅氧化物或Al2O3)或氮化物或氧氮化合物制成。所述PECVD方法中形成氧化物或氮化物或氧氮化合物对应的反应气体可以为SiH4、N2O或SiH4、NH3、N2或SiH2C12、NH3、N2。该修饰层2可以使后续制作的金属氧化物半导体层很好地沉积在基板1上,从而可以更好地保护金属氧化物半导体层3,提高金属氧化物半导体层3的稳定性能。
在基板1上沉积金属氧化物半导体膜是采用溅射或热蒸发的方法,所述金属氧化物半导体膜的沉积厚度为金属氧化物半导体膜可以采用非晶IGZO制成,也可以采用HIZO、IZO、a-InZnO、a-InZnO、ZnO:F、In2O3:Sn、In2O3:Mo、Cd2SnO4、ZnO:Al、TiO2:Nb、Cd-Sn-O或其他金属氧化物制成。
所述刻蚀阻挡膜采用PECVD方法进行沉积,所述刻蚀阻挡膜的沉积厚度为刻蚀阻挡膜可以采用硅氧化物或氮化物或氧氮化合物制成,其中,PECVD方法中对应的反应气体遵循以下原则:硅氧化物对应的反应气体为SiH4、N2O;氮化物或氧氮化合物对应气体是SiH4、NH3、N2或SiH2C12、NH3、N2。
步骤S2):采用灰色调或半色调掩模板,通过一次构图工艺,在完成步骤S1)的基板上形成包括漏电极6、源电极7、数据扫描线(图3中未示出)以及透明像素电极5的图形,如图3所示。
步骤S2)具体包括如下步骤:
S21)在基板上依次沉积透明导电膜和源/漏金属膜。
S22)在完成步骤S21)的基板上涂覆一层光刻胶12。
S23)采用灰色调或半色调掩模板对所述光刻胶进行曝光、显影,所述半色调掩模板或灰色调掩模板上设有非透射区域、部分透射区域以及透射区域,所述灰色调或半色调掩模板上的三个区域在所述光刻胶上分别对应形成光刻胶完全保留区域、光刻胶部分保留区域以及光刻胶完全去除区域,或者,所述灰色调或半色调掩模板上的三个区域在所述光刻胶上分别对应形成光刻胶完全去除区域、光刻胶部分保留区域以及光刻胶完全保留区域;所述光刻胶完全保留区域对应于形成数据扫描线、源电极和漏电极的图形,所述光刻胶部分保留区域对应于形成透明像素电极的图形,如图3a所示。
S24)对完成步骤S23)的基板进行刻蚀,以形成包括源电极7和数据扫描线的图形。
如图3b所示,对图3a中的基板进行第一次刻蚀,刻蚀掉光刻胶完全去除区域WP的源/漏金属膜,而形成包括源电极7和数据扫描线(图中未示出)的图形;如图3c所示,对图3b中的基板进行第二次刻蚀,刻蚀掉光刻胶完全去除区域WP的透明导电膜。
S25)对完成步骤S24)的基板进行灰化处理,灰化掉所述光刻胶部分保留区域的光刻胶,如图3d所示。
S26)对完成步骤S25)的基板进行刻蚀,以形成包括漏电极6和透明像素电极的图形。
如图3e所示,对图3d中的基板进行第三次刻蚀,通过刻蚀掉光刻胶部分保留区域HP的源/漏金属膜,而形成包括漏电极6和透明像素电极的图形。
S27)将剩余的光刻胶剥离,露出漏电极6、源电极7、透明像素电极以及数据扫描线。
由于在步骤S1)中在基板上沉积了一层修饰层2,因此,在上述步骤中进行透明导电膜的沉积时,修饰层2能有效地保护漏电极6、源电极7之间形成的TFT沟道,以免TFT沟道直接与基板1接触,形成不好的交界面;同时,也使得在步骤S1)中第一次光刻工艺中形成的金属氧化物半导体层的图形可以做得比较精细,避免产生不良。
在本实施例中,由于金属氧化物半导体层使用宽禁带宽度金属氧化物半导体,如IGZO,同时采用可见光照射该金属氧化物半导体层不会产生光电流,所以不用使用遮光层,直接采用修饰层即可。
在上述步骤中,在完成步骤S1)的基板上通过溅射或热蒸发的方法来沉积透明导电膜,所述透明导电膜的沉积厚度为 所述源/漏金属膜的沉积厚度为其中,透明导电膜采用ITO制成,也可以采用其他金属及金属氧化物制成;源/漏金属膜采用Cr、W、Ti、Ta、Mo、Al、Cu中的任一种所形成的单层膜制成,或者采用以上任一金属的合金制成,或者采用以上金属的任一组合所形成的多层膜制成。
步骤S3):在完成步骤S2)的基板上形成栅极绝缘层,再通过一次构图工艺形成包括接触过孔的图形。
具体地,在步骤S2)形成包括源电极、漏电极及数据扫描线的图形的基板上沉积栅极绝缘层8,通过一次光刻工艺形成包括接触过孔的图形。
在该步骤中,所述栅极绝缘层8是通过PECVD方法连续沉积形成,栅极绝缘层8的沉积厚度为栅极绝缘层8可以采用氧化物或氮化物或氧氮化合物,该PECVD方法中形成氧化物或氮化物或氧氮化合物对应的反应气体可以为SiH4、N2O或SiH4、NH3、N2或SiH2C12、NH3、N2,然后通过一次光刻工艺形成接触过孔(图中未示出),如图4所示。
步骤S4):在完成步骤S3)的基板上通过一次构图工艺形成包括栅电极和栅极扫描线的图形。
具体地,在完成步骤S3)的基板上沉积栅金属膜,通过一次光刻工艺形成栅电极9和栅极扫描线11。
在该步骤中,所述栅金属膜是通过采用溅射或热蒸发的沉积方法形成,所述栅金属膜的沉积厚度为其中,栅金属膜可以采用Cr、W、Cu、Ti、Ta、Mo中的任一种所形成的单层膜制成,或者采用以上任一金属的合金制成,或者采用以上金属的任一组合所形成的多层膜制成,然后通过一次光刻工艺形成栅电极9和栅极扫描线,如图5所示。
实施例2:
本实施例与实施例1的区别在于,在步骤S1)中的刻蚀阻挡层4和在步骤S3)中的栅极绝缘层8均采用叠层结构。
本实施例中,刻蚀阻挡层4和栅极绝缘层8采用双层结构。
在刻蚀阻挡层4中,与金属氧化物半导体层3接触的一层采用SiO2制成,该刻蚀阻挡层采用低速沉积方式形成,远离金属氧化物半导体层3的一层采用SiNx制成,该刻蚀阻挡层采用高速沉积方式形成;在栅极绝缘层8中,与金属氧化物半导体层3接触的一层采用SiO2制成,该栅极绝缘层采用低速沉积方式形成,远离金属氧化物半导体层3的一层采用SiNx制成,该栅极绝缘层采用高速沉积方式形成。这样,由于与金属氧化物半导体层3接触的刻蚀阻挡层和栅极绝缘层均分别采用低速沉积方式形成,沉积层较致密,因此能与金属氧化物半导体层3形成很好的交界面,有利于提高TFT的稳定性性能;而远离金属氧化物半导体层3的刻蚀阻挡层和栅极绝缘层均分别采用高速沉积方式形成,沉积速度较快,因此能有效提高生产效率。
本发明提供了一种四次光刻工艺的顶栅型金属氧化物TFT的制造方法,与现有技术中TFT制作采用六次光刻工艺相比,减少了两次光刻工艺,简化了制作工艺,提高了生产效率,提高了良品率,降低了生产成本;尤其适合适用于大尺寸、高分辨率的TFT-LCD平板显示器以及有源矩阵驱动式OLED平板显示器使用。
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。
Claims (10)
1.一种TFT阵列基板的制造方法,包括如下步骤:通过构图工艺在基板上分别形成包括金属氧化物半导体层、透明像素电极、源电极、漏电极、刻蚀阻挡层、栅电极、栅极扫描线、栅极绝缘层、数据扫描线以及接触过孔的图形,其特征在于,所述金属氧化物半导体层和刻蚀阻挡层通过一次构图工艺形成,所述源电极、漏电极、透明像素电极以及数据扫描线通过一次构图工艺形成。
2.根据权利要求1所述的制造方法,其特征在于,该制造方法具体包括以下步骤:
步骤S1):采用灰色调或半色调掩模板,通过一次构图工艺在基板上形成包括金属氧化物半导体层和刻蚀阻挡层的图形;
步骤S2):采用灰色调或半色调掩模板,通过一次构图工艺,在完成步骤S1)的基板上形成包括源电极、漏电极、数据扫描线以及透明像素电极的图形;
步骤S3):在完成步骤S2)的基板上形成栅极绝缘层,再通过一次构图工艺形成包括接触过孔的图形;
步骤S4):在完成步骤S3)的基板上通过一次构图工艺形成包括栅电极和栅极扫描线的图形。
3.根据权利要求2所述的制造方法,其特征在于,步骤S1)包括如下步骤:
S11)在基板上依次沉积金属氧化物半导体膜和刻蚀阻挡膜;
S12)在完成步骤S11)的基板上涂覆一层光刻胶;
S13)采用灰色调或半色调掩模板对所述光刻胶进行曝光、显影,所述半色调掩模板或灰色调掩模板上设有非透射区域、部分透射区域以及透射区域,所述灰色调或半色调掩模板上的三个区域在所述光刻胶上分别对应形成光刻胶完全保留区域、光刻胶部分保留区域以及光刻胶完全去除区域,或者,所述灰色调或半色调掩模板上的三个区域在所述光刻胶上分别对应形成光刻胶完全去除区域、光刻胶部分保留区域以及光刻胶完全保留区域;所述光刻胶完全保留区域对应于形成刻蚀阻挡层的图形,所述光刻胶部分保留区域对应于形成金属氧化物半导体层的图形,所述刻蚀阻挡膜上未被光刻胶覆盖的区域则为光刻胶完全去除区域;
S14)对完成步骤S13)的基板进行刻蚀,以形成金属氧化物半导体层的图形;
S15)对完成步骤S14)的基板进行灰化处理,灰化掉所述光刻胶部分保留区域的光刻胶;
S16)对完成步骤S15)的基板进行刻蚀,以形成刻蚀阻挡层的图形;
S17)将剩余的光刻胶剥离。
7.根据权利要求2所述的制造方法,其特征在于,步骤S2)包括如下步骤:
S21)在基板上依次沉积透明导电膜和源/漏金属膜;
S22)在完成步骤S21)的基板上涂覆一层光刻胶;
S23)采用灰色调或半色调掩模板对所述光刻胶进行曝光、显影,所述半色调掩模板或灰色调掩模板上设有非透射区域、部分透射区域以及透射区域,所述灰色调或半色调掩模板上的三个区域在所述光刻胶上分别对应形成光刻胶完全保留区域、光刻胶部分保留区域以及光刻胶完全去除区域,或者,所述灰色调或半色调掩模板上的三个区域在所述光刻胶上分别对应形成光刻胶完全去除区域、光刻胶部分保留区域以及光刻胶完全保留区域;所述光刻胶完全保留区域对应于形成数据扫描线、源电极和漏电极的图形,所述光刻胶部分保留区域对应于形成透明像素电极的图形;
S24)对完成步骤S23)的基板进行刻蚀,以形成包括源电极和数据扫描线的图形;
S25)对完成步骤S24)的基板进行灰化处理,灰化掉所述光刻胶部分保留区域的光刻胶;
S26)对完成步骤S25)的基板进行刻蚀,以形成包括漏电极和透明像素电极的图形;
S27)将剩余的光刻胶剥离。
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- 2012-12-10 EP EP12861052.4A patent/EP2804207B1/en active Active
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WO2014176877A1 (zh) * | 2013-04-28 | 2014-11-06 | 京东方科技集团股份有限公司 | 阵列基板及其制作方法以及包括该阵列基板的显示装置 |
US9698165B2 (en) | 2013-04-28 | 2017-07-04 | Boe Technology Group Co., Ltd. | Array substrate, method for manufacturing the same, and display device comprising array substrate |
JP2016520205A (ja) * | 2013-04-28 | 2016-07-11 | 京東方科技集團股▲ふん▼有限公司Boe Technology Group Co.,Ltd. | アレイ基板およびその製作方法、当該アレイ基板を備える表示装置 |
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CN103744240A (zh) * | 2013-12-27 | 2014-04-23 | 深圳市华星光电技术有限公司 | 阵列基板及用该阵列基板的液晶显示面板 |
WO2015100859A1 (zh) * | 2014-01-03 | 2015-07-09 | 京东方科技集团股份有限公司 | 阵列基板及其制造方法和显示装置 |
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US9627414B2 (en) | 2014-08-06 | 2017-04-18 | Boe Technology Group Co., Ltd. | Metallic oxide thin film transistor, array substrate and their manufacturing methods, display device |
WO2016019672A1 (zh) * | 2014-08-06 | 2016-02-11 | 京东方科技集团股份有限公司 | 金属氧化物薄膜晶体管、阵列基板及制作方法、显示装置 |
CN104810321A (zh) * | 2015-04-30 | 2015-07-29 | 京东方科技集团股份有限公司 | 一种tft阵列基板及显示装置的制备方法 |
CN105513947A (zh) * | 2015-09-21 | 2016-04-20 | 友达光电股份有限公司 | 一种结晶氧化铟镓锌半导体层及薄膜晶体管的制造方法 |
CN105206570A (zh) * | 2015-10-27 | 2015-12-30 | 深圳市华星光电技术有限公司 | 一种显示面板及其制造方法 |
CN105206570B (zh) * | 2015-10-27 | 2018-11-23 | 深圳市华星光电技术有限公司 | 一种显示面板及其制造方法 |
CN107093583A (zh) * | 2017-05-03 | 2017-08-25 | 京东方科技集团股份有限公司 | 一种阵列基板及其制备方法、显示装置 |
WO2018201770A1 (zh) * | 2017-05-03 | 2018-11-08 | 京东方科技集团股份有限公司 | 阵列基板及其制备方法、显示装置 |
US10504945B2 (en) | 2017-05-03 | 2019-12-10 | Boe Technology Group Co., Ltd. | Array substrate and method for manufacturing the same, display apparatus |
WO2019015054A1 (zh) * | 2017-07-19 | 2019-01-24 | 深圳市华星光电半导体显示技术有限公司 | 一种顶栅型薄膜晶体管的制作方法 |
CN108346704A (zh) * | 2018-02-01 | 2018-07-31 | 惠科股份有限公司 | 薄膜晶体管及其制造方法 |
CN110620080A (zh) * | 2019-10-23 | 2019-12-27 | 成都中电熊猫显示科技有限公司 | 阵列基板的制造方法、阵列基板及显示面板 |
Also Published As
Publication number | Publication date |
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CN102651341B (zh) | 2014-06-11 |
EP2804207A4 (en) | 2015-10-14 |
KR101620674B1 (ko) | 2016-05-12 |
EP2804207A1 (en) | 2014-11-19 |
JP2015505168A (ja) | 2015-02-16 |
KR20130106428A (ko) | 2013-09-27 |
JP6129206B2 (ja) | 2017-05-17 |
US9202892B2 (en) | 2015-12-01 |
WO2013104228A1 (zh) | 2013-07-18 |
US20130302939A1 (en) | 2013-11-14 |
EP2804207B1 (en) | 2018-10-31 |
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