CN102498543B - 图案化基底的方法 - Google Patents
图案化基底的方法 Download PDFInfo
- Publication number
- CN102498543B CN102498543B CN201080040495.0A CN201080040495A CN102498543B CN 102498543 B CN102498543 B CN 102498543B CN 201080040495 A CN201080040495 A CN 201080040495A CN 102498543 B CN102498543 B CN 102498543B
- Authority
- CN
- China
- Prior art keywords
- resist
- particle
- substrate
- layer
- array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/71—Etching of wafers, substrates or parts of devices using masks for conductive or resistive materials
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/40—Treatment after imagewise removal, e.g. baking
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/40—Treatment after imagewise removal, e.g. baking
- G03F7/405—Treatment with inorganic or organometallic reagents after imagewise removal
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
- H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
- H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
- H10P76/4085—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes characterised by the processes involved to create the masks
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Organic Chemistry (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Drying Of Semiconductors (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US23538309P | 2009-08-20 | 2009-08-20 | |
| US61/235,383 | 2009-08-20 | ||
| US12/859,606 US8912097B2 (en) | 2009-08-20 | 2010-08-19 | Method and system for patterning a substrate |
| US12/859,606 | 2010-08-19 | ||
| PCT/US2010/046146 WO2011022635A2 (en) | 2009-08-20 | 2010-08-20 | Methods and system for patterning a substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102498543A CN102498543A (zh) | 2012-06-13 |
| CN102498543B true CN102498543B (zh) | 2015-01-21 |
Family
ID=43063371
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201080040495.0A Expired - Fee Related CN102498543B (zh) | 2009-08-20 | 2010-08-20 | 图案化基底的方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US8912097B2 (https=) |
| JP (1) | JP5716026B2 (https=) |
| KR (1) | KR101662028B1 (https=) |
| CN (1) | CN102498543B (https=) |
| TW (1) | TW201129882A (https=) |
| WO (1) | WO2011022635A2 (https=) |
Families Citing this family (31)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8778603B2 (en) | 2010-03-15 | 2014-07-15 | Varian Semiconductor Equipment Associates, Inc. | Method and system for modifying substrate relief features using ion implantation |
| US8883649B2 (en) | 2011-03-23 | 2014-11-11 | International Business Machines Corporation | Sidewall image transfer process |
| KR20130015145A (ko) * | 2011-08-02 | 2013-02-13 | 삼성전자주식회사 | 반도체 소자의 미세 패턴 형성 방법 |
| WO2013111812A1 (ja) * | 2012-01-27 | 2013-08-01 | 旭化成株式会社 | 微細凹凸構造体、ドライエッチング用熱反応型レジスト材料、モールドの製造方法及びモールド |
| CN103456606B (zh) * | 2012-06-04 | 2016-04-06 | 中芯国际集成电路制造(上海)有限公司 | 一种用于形成硬掩膜层的方法 |
| US8716133B2 (en) * | 2012-08-23 | 2014-05-06 | International Business Machines Corporation | Three photomask sidewall image transfer method |
| CN103681232B (zh) * | 2012-09-04 | 2017-06-13 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法 |
| US9128384B2 (en) | 2012-11-09 | 2015-09-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a pattern |
| FR3000601B1 (fr) * | 2012-12-28 | 2016-12-09 | Commissariat Energie Atomique | Procede de formation des espaceurs d'une grille d'un transistor |
| WO2014159427A1 (en) * | 2013-03-14 | 2014-10-02 | Applied Materials, Inc | Resist hardening and development processes for semiconductor device manufacturing |
| US9541846B2 (en) | 2013-09-06 | 2017-01-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Homogeneous thermal equalization with active device |
| CN104517813A (zh) * | 2013-09-29 | 2015-04-15 | 中芯国际集成电路制造(上海)有限公司 | 双重图形的形成方法 |
| US20150187915A1 (en) * | 2013-12-26 | 2015-07-02 | Samsung Electronics Co., Ltd. | Method for fabricating fin type transistor |
| KR102185281B1 (ko) * | 2014-01-09 | 2020-12-01 | 삼성전자 주식회사 | 자기 정렬 더블 패터닝 공정을 이용하여 반도체 소자의 패턴을 형성하는 방법 |
| JP2015141929A (ja) | 2014-01-27 | 2015-08-03 | マイクロン テクノロジー, インク. | 半導体装置及びその製造方法 |
| US9754785B2 (en) | 2015-01-14 | 2017-09-05 | Samsung Electronics Co., Ltd. | Methods of manufacturing semiconductor devices |
| KR102323251B1 (ko) | 2015-01-21 | 2021-11-09 | 삼성전자주식회사 | 반도체 소자 및 반도체 소자의 제조방법 |
| KR102343859B1 (ko) * | 2015-01-29 | 2021-12-28 | 삼성전자주식회사 | 반도체 소자 및 이의 제조 방법 |
| US9941125B2 (en) | 2015-08-31 | 2018-04-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for integrated circuit patterning |
| KR102323660B1 (ko) | 2015-10-13 | 2021-11-08 | 삼성전자주식회사 | 반도체 소자 제조 방법 |
| US9984889B2 (en) * | 2016-03-08 | 2018-05-29 | Varian Semiconductor Equipment Associates, Inc. | Techniques for manipulating patterned features using ions |
| KR102216380B1 (ko) * | 2016-12-08 | 2021-02-17 | 주식회사 원익아이피에스 | 반도체 소자의 패터닝 방법 |
| US10545408B2 (en) | 2017-08-18 | 2020-01-28 | Varian Semiconductor Equipment Associates, Inc. | Performance improvement of EUV photoresist by ion implantation |
| US10354874B2 (en) | 2017-11-14 | 2019-07-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Directional processing to remove a layer or a material formed over a substrate |
| US10312089B1 (en) * | 2017-11-29 | 2019-06-04 | Taiwan Semiconductor Manufacturing Co., Ltd. | Methods for controlling an end-to-end distance in semiconductor device |
| US20190198325A1 (en) | 2017-12-22 | 2019-06-27 | International Business Machines Corporation | Extreme ultraviolet (euv) lithography patterning methods utilizing euv resist hardening |
| CN110528003B (zh) * | 2018-05-25 | 2020-10-27 | 北京航空航天大学 | 一种涂层的复合制备方法 |
| WO2020209939A1 (en) * | 2019-04-08 | 2020-10-15 | Applied Materials, Inc. | Methods for modifying photoresist profiles and tuning critical dimensions |
| KR20240000897A (ko) | 2022-06-24 | 2024-01-03 | 삼성전자주식회사 | 반도체 장치 제조 방법 |
| TWI847663B (zh) * | 2023-04-24 | 2024-07-01 | 南亞科技股份有限公司 | 半導體結構的形成方法 |
| TWI885942B (zh) * | 2023-04-24 | 2025-06-01 | 南亞科技股份有限公司 | 半導體結構的形成方法 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5876903A (en) * | 1996-12-31 | 1999-03-02 | Advanced Micro Devices | Virtual hard mask for etching |
| US6423475B1 (en) * | 1999-03-11 | 2002-07-23 | Advanced Micro Devices, Inc. | Sidewall formation for sidewall patterning of sub 100 nm structures |
| US20030222345A1 (en) * | 2002-05-30 | 2003-12-04 | Christopher Kenyon | Stabilization of resist material through ion implantation |
| US20080286954A1 (en) * | 2007-05-14 | 2008-11-20 | Hynix Semiconductor Inc. | Method of Forming Pattern of Semiconductor Device |
| US20080305443A1 (en) * | 2007-06-11 | 2008-12-11 | Hiroko Nakamura | Pattern forming method using relacs process |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3317582B2 (ja) * | 1994-06-01 | 2002-08-26 | 菱電セミコンダクタシステムエンジニアリング株式会社 | 微細パターンの形成方法 |
| JPH1126356A (ja) * | 1997-07-08 | 1999-01-29 | Sony Corp | 半導体装置の製造方法 |
| JP2000235969A (ja) | 1999-02-15 | 2000-08-29 | Sony Corp | 半導体装置の製造方法 |
| JP2001265011A (ja) * | 2000-03-17 | 2001-09-28 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
| US6645677B1 (en) * | 2000-09-18 | 2003-11-11 | Micronic Laser Systems Ab | Dual layer reticle blank and manufacturing process |
| US6653735B1 (en) | 2002-07-30 | 2003-11-25 | Advanced Micro Devices, Inc. | CVD silicon carbide layer as a BARC and hard mask for gate patterning |
| JP2004157424A (ja) * | 2002-11-08 | 2004-06-03 | Sony Corp | レジストの剥離方法及び半導体装置の製造方法 |
| DE102004058412B4 (de) * | 2004-12-03 | 2017-03-02 | Austriamicrosystems Ag | Mehrfachmaske und Verfahren zur Herstellung unterschiedlich dotierter Gebiete und Verwendung des Verfahrens |
| KR100925029B1 (ko) | 2006-12-27 | 2009-11-03 | 주식회사 하이닉스반도체 | 반도체 소자의 제조방법 |
| KR100858877B1 (ko) | 2007-08-13 | 2008-09-17 | 주식회사 하이닉스반도체 | 반도체 소자 제조 방법 |
| US8030218B2 (en) * | 2008-03-21 | 2011-10-04 | Micron Technology, Inc. | Method for selectively modifying spacing between pitch multiplied structures |
| US8273634B2 (en) * | 2008-12-04 | 2012-09-25 | Micron Technology, Inc. | Methods of fabricating substrates |
-
2010
- 2010-08-19 US US12/859,606 patent/US8912097B2/en not_active Expired - Fee Related
- 2010-08-20 TW TW099127942A patent/TW201129882A/zh unknown
- 2010-08-20 CN CN201080040495.0A patent/CN102498543B/zh not_active Expired - Fee Related
- 2010-08-20 KR KR1020127007102A patent/KR101662028B1/ko not_active Expired - Fee Related
- 2010-08-20 JP JP2012525726A patent/JP5716026B2/ja not_active Expired - Fee Related
- 2010-08-20 WO PCT/US2010/046146 patent/WO2011022635A2/en not_active Ceased
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5876903A (en) * | 1996-12-31 | 1999-03-02 | Advanced Micro Devices | Virtual hard mask for etching |
| US6423475B1 (en) * | 1999-03-11 | 2002-07-23 | Advanced Micro Devices, Inc. | Sidewall formation for sidewall patterning of sub 100 nm structures |
| US20030222345A1 (en) * | 2002-05-30 | 2003-12-04 | Christopher Kenyon | Stabilization of resist material through ion implantation |
| US20080286954A1 (en) * | 2007-05-14 | 2008-11-20 | Hynix Semiconductor Inc. | Method of Forming Pattern of Semiconductor Device |
| US20080305443A1 (en) * | 2007-06-11 | 2008-12-11 | Hiroko Nakamura | Pattern forming method using relacs process |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2011022635A3 (en) | 2011-04-21 |
| US20110300711A1 (en) | 2011-12-08 |
| KR20120046311A (ko) | 2012-05-09 |
| WO2011022635A2 (en) | 2011-02-24 |
| KR101662028B1 (ko) | 2016-10-05 |
| US8912097B2 (en) | 2014-12-16 |
| CN102498543A (zh) | 2012-06-13 |
| JP2013502726A (ja) | 2013-01-24 |
| TW201129882A (en) | 2011-09-01 |
| JP5716026B2 (ja) | 2015-05-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150121 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |