CN102130022A - 形成半导体管芯的方法 - Google Patents

形成半导体管芯的方法 Download PDF

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Publication number
CN102130022A
CN102130022A CN201110009539XA CN201110009539A CN102130022A CN 102130022 A CN102130022 A CN 102130022A CN 201110009539X A CN201110009539X A CN 201110009539XA CN 201110009539 A CN201110009539 A CN 201110009539A CN 102130022 A CN102130022 A CN 102130022A
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CN
China
Prior art keywords
dies
die
wafer
singulation
semiconductor
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Pending
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CN201110009539XA
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English (en)
Chinese (zh)
Inventor
G·M·格里瓦纳
M·J·塞登
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Semiconductor Components Industries LLC
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Semiconductor Components Industries LLC
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Filing date
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Publication of CN102130022A publication Critical patent/CN102130022A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/28—Configurations of stacked chips the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/811—Multiple chips on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/137—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being directly on the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

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  • Dicing (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
CN201110009539XA 2010-01-18 2011-01-18 形成半导体管芯的方法 Pending CN102130022A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/689,126 US8384231B2 (en) 2010-01-18 2010-01-18 Method of forming a semiconductor die
US12/689,126 2010-01-18

Publications (1)

Publication Number Publication Date
CN102130022A true CN102130022A (zh) 2011-07-20

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110009539XA Pending CN102130022A (zh) 2010-01-18 2011-01-18 形成半导体管芯的方法

Country Status (5)

Country Link
US (1) US8384231B2 (enExample)
JP (1) JP2011146718A (enExample)
KR (1) KR20110084836A (enExample)
CN (1) CN102130022A (enExample)
TW (1) TW201135868A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105895583A (zh) * 2015-02-13 2016-08-24 台湾积体电路制造股份有限公司 半导体器件和方法
CN108962820A (zh) * 2017-05-24 2018-12-07 半导体元件工业有限责任公司 处理衬底的方法
CN109411368A (zh) * 2017-08-17 2019-03-01 半导体组件工业公司 多面模塑半导体封装和相关方法

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8871613B2 (en) 2012-06-18 2014-10-28 Semiconductor Components Industries, Llc Semiconductor die singulation method
US8664089B1 (en) 2012-08-20 2014-03-04 Semiconductor Components Industries, Llc Semiconductor die singulation method
US9034733B2 (en) 2012-08-20 2015-05-19 Semiconductor Components Industries, Llc Semiconductor die singulation method
US9484260B2 (en) 2012-11-07 2016-11-01 Semiconductor Components Industries, Llc Heated carrier substrate semiconductor die singulation method
US9136173B2 (en) 2012-11-07 2015-09-15 Semiconductor Components Industries, Llc Singulation method for semiconductor die having a layer of material along one major surface
US9034734B2 (en) 2013-02-04 2015-05-19 Avago Technologies General Ip (Singapore) Pte. Ltd. Systems and methods for plasma etching compound semiconductor (CS) dies and passively aligning the dies
US9406564B2 (en) * 2013-11-21 2016-08-02 Infineon Technologies Ag Singulation through a masking structure surrounding expitaxial regions
US20150255349A1 (en) * 2014-03-07 2015-09-10 JAMES Matthew HOLDEN Approaches for cleaning a wafer during hybrid laser scribing and plasma etching wafer dicing processes
US9418894B2 (en) 2014-03-21 2016-08-16 Semiconductor Components Industries, Llc Electronic die singulation method
US9472458B2 (en) 2014-06-04 2016-10-18 Semiconductor Components Industries, Llc Method of reducing residual contamination in singulated semiconductor die
US9337098B1 (en) 2015-08-14 2016-05-10 Semiconductor Components Industries, Llc Semiconductor die back layer separation method
US11342189B2 (en) 2015-09-17 2022-05-24 Semiconductor Components Industries, Llc Semiconductor packages with die including cavities and related methods
US11430746B2 (en) 2020-04-29 2022-08-30 Semiconductor Components Industries, Llc Multidie supports for reducing die warpage
US10319639B2 (en) 2017-08-17 2019-06-11 Semiconductor Components Industries, Llc Thin semiconductor package and related methods
US9991338B2 (en) 2015-09-17 2018-06-05 Semiconductor Components Industries, Llc Electronic device including a conductive structure surrounded by an insulating structure
US10366923B2 (en) 2016-06-02 2019-07-30 Semiconductor Components Industries, Llc Method of separating electronic devices having a back layer and apparatus
US10497602B2 (en) 2016-08-01 2019-12-03 Semiconductor Components Industries, Llc Process of forming an electronic device including forming an electronic component and removing a portion of a substrate
US10056428B2 (en) * 2016-09-07 2018-08-21 Semiconductor Components Industries, Llc Semiconductor device and method of forming curved image sensor region robust against buckling
US10497689B2 (en) * 2017-08-04 2019-12-03 Mediatek Inc. Semiconductor package assembly and method for forming the same
US11367619B2 (en) 2017-08-17 2022-06-21 Semiconductor Components Industries, Llc Semiconductor package electrical contacts and related methods
US11404276B2 (en) 2017-08-17 2022-08-02 Semiconductor Components Industries, Llc Semiconductor packages with thin die and related methods
US11404277B2 (en) 2017-08-17 2022-08-02 Semiconductor Components Industries, Llc Die sidewall coatings and related methods
US11393692B2 (en) 2017-08-17 2022-07-19 Semiconductor Components Industries, Llc Semiconductor package electrical contact structures and related methods
US11348796B2 (en) 2017-08-17 2022-05-31 Semiconductor Components Industries, Llc Backmetal removal methods
US10741487B2 (en) 2018-04-24 2020-08-11 Semiconductor Components Industries, Llc SOI substrate and related methods
US11361970B2 (en) 2017-08-17 2022-06-14 Semiconductor Components Industries, Llc Silicon-on-insulator die support structures and related methods
US12230502B2 (en) 2017-08-17 2025-02-18 Semiconductor Components Industries, Llc Semiconductor package stress balance structures and related methods
US10880991B2 (en) * 2018-04-04 2020-12-29 Marvell Asia Pte, Ltd. Apparatus and methods for enhancing signaling bandwidth in an integrated circuit package
CN110634796A (zh) 2018-06-25 2019-12-31 半导体元件工业有限责任公司 用于处理电子管芯的方法及半导体晶圆和管芯的切单方法
US10916474B2 (en) 2018-06-25 2021-02-09 Semiconductor Components Industries, Llc Method of reducing residual contamination in singulated semiconductor die
US11791212B2 (en) * 2019-12-13 2023-10-17 Micron Technology, Inc. Thin die release for semiconductor device assembly
KR102872928B1 (ko) * 2019-12-30 2025-10-16 삼성전자주식회사 반도체 웨이퍼 및 그 제조 방법

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040185580A1 (en) * 2003-03-22 2004-09-23 Seok Goh Method for dicing semiconductor wafer
US20050158967A1 (en) * 2004-01-20 2005-07-21 Taiwan Semiconductor Manufacturing Co. Semiconductor chip singulation method
JP2006049403A (ja) * 2004-08-02 2006-02-16 Matsushita Electric Ind Co Ltd 半導体素子形成領域の配置決定方法、半導体素子形成領域の配置決定用プログラム、及び半導体素子の製造方法
CN1762053A (zh) * 2003-03-13 2006-04-19 Pdf全解公司 具有非矩形单元片的半导体晶片
US7309623B2 (en) * 2002-01-09 2007-12-18 Micron Technology, Inc. Method of fabricating a stacked die in die BGA package

Family Cites Families (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2985484B2 (ja) * 1992-03-19 1999-11-29 株式会社日立製作所 半導体装置とその製造方法
US4820377A (en) * 1987-07-16 1989-04-11 Texas Instruments Incorporated Method for cleanup processing chamber and vacuum process module
US5075253A (en) * 1989-04-12 1991-12-24 Advanced Micro Devices, Inc. Method of coplanar integration of semiconductor IC devices
JPH05267449A (ja) * 1992-03-19 1993-10-15 Mitsubishi Electric Corp 半導体装置及びその製造方法
US5300461A (en) * 1993-01-25 1994-04-05 Intel Corporation Process for fabricating sealed semiconductor chip using silicon nitride passivation film
US6030885A (en) * 1997-04-18 2000-02-29 Vlsi Technology, Inc. Hexagonal semiconductor die, semiconductor substrates, and methods of forming a semiconductor die
US5982018A (en) * 1997-05-23 1999-11-09 Micron Technology, Inc. Thin film capacitor coupons for memory modules and multi-chip modules
JPH11168172A (ja) * 1997-12-04 1999-06-22 Toshiba Tec Corp 半導体チップの製造方法及びその半導体チップによる３次元構造体、その製造方法及びその電気的接続方法
US6214703B1 (en) * 1999-04-15 2001-04-10 Taiwan Semiconductor Manufacturing Company Method to increase wafer utility by implementing deep trench in scribe line
WO2001056063A2 (en) 2000-01-26 2001-08-02 Tru-Si Technologies, Inc. Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners
JP3778773B2 (ja) * 2000-05-09 2006-05-24 三洋電機株式会社 板状体および半導体装置の製造方法
US6686225B2 (en) * 2001-07-27 2004-02-03 Texas Instruments Incorporated Method of separating semiconductor dies from a wafer
US6642127B2 (en) 2001-10-19 2003-11-04 Applied Materials, Inc. Method for dicing a semiconductor wafer
GB0130870D0 (en) * 2001-12-21 2002-02-06 Accentus Plc Solid-state antenna
US6849554B2 (en) * 2002-05-01 2005-02-01 Applied Materials, Inc. Method of etching a deep trench having a tapered profile in silicon
JP3923368B2 (ja) * 2002-05-22 2007-05-30 シャープ株式会社 半導体素子の製造方法
US6897128B2 (en) 2002-11-20 2005-05-24 Matsushita Electric Industrial Co., Ltd. Method of manufacturing semiconductor device, plasma processing apparatus and plasma processing method
US20040102022A1 (en) * 2002-11-22 2004-05-27 Tongbi Jiang Methods of fabricating integrated circuitry
JP4013753B2 (ja) 2002-12-11 2007-11-28 松下電器産業株式会社 半導体ウェハの切断方法
JP3991872B2 (ja) 2003-01-23 2007-10-17 松下電器産業株式会社 半導体装置の製造方法
US7129114B2 (en) * 2004-03-10 2006-10-31 Micron Technology, Inc. Methods relating to singulating semiconductor wafers and wafer scale assemblies
KR100627006B1 (ko) * 2004-04-01 2006-09-25 삼성전자주식회사 인덴트 칩과, 그를 이용한 반도체 패키지와 멀티 칩 패키지
JP2006041005A (ja) 2004-07-23 2006-02-09 Matsushita Electric Ind Co Ltd 半導体素子形成領域の配置決定方法及び装置、半導体素子形成領域の配置決定用プログラム、並びに半導体素子の製造方法
JP4018088B2 (ja) 2004-08-02 2007-12-05 松下電器産業株式会社 半導体ウェハの分割方法及び半導体素子の製造方法
US7288489B2 (en) * 2004-08-20 2007-10-30 Semitool, Inc. Process for thinning a semiconductor workpiece
US7335576B2 (en) * 2004-10-08 2008-02-26 Irvine Sensors Corp. Method for precision integrated circuit die singulation using differential etch rates
JP4288229B2 (ja) 2004-12-24 2009-07-01 パナソニック株式会社 半導体チップの製造方法
US7253477B2 (en) * 2005-02-15 2007-08-07 Semiconductor Components Industries, L.L.C. Semiconductor device edge termination structure
JP4275095B2 (ja) 2005-04-14 2009-06-10 パナソニック株式会社 半導体チップの製造方法
SG126885A1 (en) * 2005-04-27 2006-11-29 Disco Corp Semiconductor wafer and processing method for same
JP4285455B2 (ja) 2005-07-11 2009-06-24 パナソニック株式会社 半導体チップの製造方法
US8153464B2 (en) * 2005-10-18 2012-04-10 International Rectifier Corporation Wafer singulation process
US20070132034A1 (en) * 2005-12-14 2007-06-14 Giuseppe Curello Isolation body for semiconductor devices and method to form the same
JP2007227883A (ja) * 2006-01-27 2007-09-06 Matsushita Electric Ind Co Ltd ベース半導体チップ、半導体集積回路装置及びその製造方法
JP2007294612A (ja) * 2006-04-24 2007-11-08 Oki Data Corp 半導体装置、半導体装置の製造方法、半導体製造装置、ｌｅｄヘッド、および画像形成装置
JP5023614B2 (ja) 2006-08-24 2012-09-12 パナソニック株式会社 半導体チップの製造方法及び半導体ウエハの処理方法
JP4544231B2 (ja) 2006-10-06 2010-09-15 パナソニック株式会社 半導体チップの製造方法
JP2008159985A (ja) 2006-12-26 2008-07-10 Matsushita Electric Ind Co Ltd 半導体チップの製造方法
JP4840174B2 (ja) 2007-02-08 2011-12-21 パナソニック株式会社 半導体チップの製造方法
JP2008217384A (ja) * 2007-03-05 2008-09-18 Hitachi Ltd 回路チップ及びその製造方法、並びにこれを搭載したｒｆｉｄ回路装置
US7705440B2 (en) * 2007-09-07 2010-04-27 Freescale Semiconductor, Inc. Substrate having through-wafer vias and method of forming
TW200935506A (en) 2007-11-16 2009-08-16 Panasonic Corp Plasma dicing apparatus and semiconductor chip manufacturing method
JP2009164263A (ja) * 2007-12-28 2009-07-23 Nec Electronics Corp 配線モジュール及び半導体集積回路装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7309623B2 (en) * 2002-01-09 2007-12-18 Micron Technology, Inc. Method of fabricating a stacked die in die BGA package
CN1762053A (zh) * 2003-03-13 2006-04-19 Pdf全解公司 具有非矩形单元片的半导体晶片
US20040185580A1 (en) * 2003-03-22 2004-09-23 Seok Goh Method for dicing semiconductor wafer
US20050158967A1 (en) * 2004-01-20 2005-07-21 Taiwan Semiconductor Manufacturing Co. Semiconductor chip singulation method
JP2006049403A (ja) * 2004-08-02 2006-02-16 Matsushita Electric Ind Co Ltd 半導体素子形成領域の配置決定方法、半導体素子形成領域の配置決定用プログラム、及び半導体素子の製造方法

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105895583A (zh) * 2015-02-13 2016-08-24 台湾积体电路制造股份有限公司 半导体器件和方法
US10510604B2 (en) 2015-02-13 2019-12-17 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method
CN111834296A (zh) * 2015-02-13 2020-10-27 台湾积体电路制造股份有限公司 半导体器件和方法
US11688639B2 (en) 2015-02-13 2023-06-27 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method
CN108962820A (zh) * 2017-05-24 2018-12-07 半导体元件工业有限责任公司 处理衬底的方法
CN108962820B (zh) * 2017-05-24 2023-11-07 半导体元件工业有限责任公司 处理衬底的方法
CN109411368A (zh) * 2017-08-17 2019-03-01 半导体组件工业公司 多面模塑半导体封装和相关方法

Also Published As

Publication number Publication date
TW201135868A (en) 2011-10-16
US8384231B2 (en) 2013-02-26
KR20110084836A (ko) 2011-07-26
JP2011146718A (ja) 2011-07-28
US20110175242A1 (en) 2011-07-21

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