JP2011146718A - 半導体ダイを形成する方法 - Google Patents

半導体ダイを形成する方法 Download PDF

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Publication number
JP2011146718A
JP2011146718A JP2011007523A JP2011007523A JP2011146718A JP 2011146718 A JP2011146718 A JP 2011146718A JP 2011007523 A JP2011007523 A JP 2011007523A JP 2011007523 A JP2011007523 A JP 2011007523A JP 2011146718 A JP2011146718 A JP 2011146718A
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JP
Japan
Prior art keywords
die
dies
wafer
singulation
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
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JP2011007523A
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English (en)
Japanese (ja)
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JP2011146718A5 (enExample
Inventor
Gordon M Grivna
グリヴナ，ゴードン・エム
Michael J Seddon
セドン，マイケル・ジェイ
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Semiconductor Components Industries LLC
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Semiconductor Components Industries LLC
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Publication date
Application filed by Semiconductor Components Industries LLC filed Critical Semiconductor Components Industries LLC
Publication of JP2011146718A publication Critical patent/JP2011146718A/ja
Publication of JP2011146718A5 publication Critical patent/JP2011146718A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/28—Configurations of stacked chips the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/811—Multiple chips on leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/137—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being directly on the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

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  • Dicing (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP2011007523A 2010-01-18 2011-01-18 半導体ダイを形成する方法 Pending JP2011146718A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/689,126 US8384231B2 (en) 2010-01-18 2010-01-18 Method of forming a semiconductor die
US12/689,126 2010-01-18

Publications (2)

Publication Number Publication Date
JP2011146718A true JP2011146718A (ja) 2011-07-28
JP2011146718A5 JP2011146718A5 (enExample) 2013-12-05

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011007523A Pending JP2011146718A (ja) 2010-01-18 2011-01-18 半導体ダイを形成する方法

Country Status (5)

Country Link
US (1) US8384231B2 (enExample)
JP (1) JP2011146718A (enExample)
KR (1) KR20110084836A (enExample)
CN (1) CN102130022A (enExample)
TW (1) TW201135868A (enExample)

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US8664089B1 (en) 2012-08-20 2014-03-04 Semiconductor Components Industries, Llc Semiconductor die singulation method
US9034733B2 (en) 2012-08-20 2015-05-19 Semiconductor Components Industries, Llc Semiconductor die singulation method
US9484260B2 (en) 2012-11-07 2016-11-01 Semiconductor Components Industries, Llc Heated carrier substrate semiconductor die singulation method
US9136173B2 (en) 2012-11-07 2015-09-15 Semiconductor Components Industries, Llc Singulation method for semiconductor die having a layer of material along one major surface
US9034734B2 (en) 2013-02-04 2015-05-19 Avago Technologies General Ip (Singapore) Pte. Ltd. Systems and methods for plasma etching compound semiconductor (CS) dies and passively aligning the dies
US9406564B2 (en) * 2013-11-21 2016-08-02 Infineon Technologies Ag Singulation through a masking structure surrounding expitaxial regions
US20150255349A1 (en) * 2014-03-07 2015-09-10 JAMES Matthew HOLDEN Approaches for cleaning a wafer during hybrid laser scribing and plasma etching wafer dicing processes
US9418894B2 (en) 2014-03-21 2016-08-16 Semiconductor Components Industries, Llc Electronic die singulation method
US9472458B2 (en) 2014-06-04 2016-10-18 Semiconductor Components Industries, Llc Method of reducing residual contamination in singulated semiconductor die
US10163709B2 (en) 2015-02-13 2018-12-25 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method
US9337098B1 (en) 2015-08-14 2016-05-10 Semiconductor Components Industries, Llc Semiconductor die back layer separation method
US11342189B2 (en) 2015-09-17 2022-05-24 Semiconductor Components Industries, Llc Semiconductor packages with die including cavities and related methods
US11430746B2 (en) 2020-04-29 2022-08-30 Semiconductor Components Industries, Llc Multidie supports for reducing die warpage
US10529576B2 (en) * 2017-08-17 2020-01-07 Semiconductor Components Industries, Llc Multi-faced molded semiconductor package and related methods
US10319639B2 (en) 2017-08-17 2019-06-11 Semiconductor Components Industries, Llc Thin semiconductor package and related methods
US9991338B2 (en) 2015-09-17 2018-06-05 Semiconductor Components Industries, Llc Electronic device including a conductive structure surrounded by an insulating structure
US10366923B2 (en) 2016-06-02 2019-07-30 Semiconductor Components Industries, Llc Method of separating electronic devices having a back layer and apparatus
US10497602B2 (en) 2016-08-01 2019-12-03 Semiconductor Components Industries, Llc Process of forming an electronic device including forming an electronic component and removing a portion of a substrate
US10056428B2 (en) * 2016-09-07 2018-08-21 Semiconductor Components Industries, Llc Semiconductor device and method of forming curved image sensor region robust against buckling
US10373869B2 (en) * 2017-05-24 2019-08-06 Semiconductor Components Industries, Llc Method of separating a back layer on a substrate using exposure to reduced temperature and related apparatus
US10497689B2 (en) * 2017-08-04 2019-12-03 Mediatek Inc. Semiconductor package assembly and method for forming the same
US11367619B2 (en) 2017-08-17 2022-06-21 Semiconductor Components Industries, Llc Semiconductor package electrical contacts and related methods
US11404276B2 (en) 2017-08-17 2022-08-02 Semiconductor Components Industries, Llc Semiconductor packages with thin die and related methods
US11404277B2 (en) 2017-08-17 2022-08-02 Semiconductor Components Industries, Llc Die sidewall coatings and related methods
US11393692B2 (en) 2017-08-17 2022-07-19 Semiconductor Components Industries, Llc Semiconductor package electrical contact structures and related methods
US11348796B2 (en) 2017-08-17 2022-05-31 Semiconductor Components Industries, Llc Backmetal removal methods
US10741487B2 (en) 2018-04-24 2020-08-11 Semiconductor Components Industries, Llc SOI substrate and related methods
US11361970B2 (en) 2017-08-17 2022-06-14 Semiconductor Components Industries, Llc Silicon-on-insulator die support structures and related methods
US12230502B2 (en) 2017-08-17 2025-02-18 Semiconductor Components Industries, Llc Semiconductor package stress balance structures and related methods
US10880991B2 (en) * 2018-04-04 2020-12-29 Marvell Asia Pte, Ltd. Apparatus and methods for enhancing signaling bandwidth in an integrated circuit package
CN110634796A (zh) 2018-06-25 2019-12-31 半导体元件工业有限责任公司 用于处理电子管芯的方法及半导体晶圆和管芯的切单方法
US10916474B2 (en) 2018-06-25 2021-02-09 Semiconductor Components Industries, Llc Method of reducing residual contamination in singulated semiconductor die
US11791212B2 (en) * 2019-12-13 2023-10-17 Micron Technology, Inc. Thin die release for semiconductor device assembly
KR102872928B1 (ko) * 2019-12-30 2025-10-16 삼성전자주식회사 반도체 웨이퍼 및 그 제조 방법

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JPH11168172A (ja) * 1997-12-04 1999-06-22 Toshiba Tec Corp 半導体チップの製造方法及びその半導体チップによる３次元構造体、その製造方法及びその電気的接続方法
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JPH05267449A (ja) * 1992-03-19 1993-10-15 Mitsubishi Electric Corp 半導体装置及びその製造方法
JPH05267559A (ja) * 1992-03-19 1993-10-15 Hitachi Ltd 半導体装置とその製造方法
JPH11168172A (ja) * 1997-12-04 1999-06-22 Toshiba Tec Corp 半導体チップの製造方法及びその半導体チップによる３次元構造体、その製造方法及びその電気的接続方法
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Also Published As

Publication number Publication date
TW201135868A (en) 2011-10-16
CN102130022A (zh) 2011-07-20
US8384231B2 (en) 2013-02-26
KR20110084836A (ko) 2011-07-26
US20110175242A1 (en) 2011-07-21

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