CN102113110B - 具有扩展的有源区的半导体器件 - Google Patents

具有扩展的有源区的半导体器件 Download PDF

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Publication number
CN102113110B
CN102113110B CN2009801297506A CN200980129750A CN102113110B CN 102113110 B CN102113110 B CN 102113110B CN 2009801297506 A CN2009801297506 A CN 2009801297506A CN 200980129750 A CN200980129750 A CN 200980129750A CN 102113110 B CN102113110 B CN 102113110B
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recess
groove
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feature
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Chinese (zh)
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CN102113110A (zh
Inventor
M·D·霍尔
G·C·阿伯林
C-C·付
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NXP USA Inc
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Freescale Semiconductor Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/05—Manufacture or treatment characterised by using material-based technologies using Group III-V technology
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Recrystallisation Techniques (AREA)
CN2009801297506A 2008-07-30 2009-05-11 具有扩展的有源区的半导体器件 Active CN102113110B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/182,421 US8062953B2 (en) 2008-07-30 2008-07-30 Semiconductor devices with extended active regions
US12/182,421 2008-07-30
PCT/US2009/043457 WO2010014287A1 (en) 2008-07-30 2009-05-11 Semiconductor devices with extended active regions

Publications (2)

Publication Number Publication Date
CN102113110A CN102113110A (zh) 2011-06-29
CN102113110B true CN102113110B (zh) 2013-12-11

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CN2009801297506A Active CN102113110B (zh) 2008-07-30 2009-05-11 具有扩展的有源区的半导体器件

Country Status (5)

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US (2) US8062953B2 (enExample)
JP (1) JP5721178B2 (enExample)
CN (1) CN102113110B (enExample)
TW (1) TW201005874A (enExample)
WO (1) WO2010014287A1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103367147A (zh) * 2012-03-29 2013-10-23 中芯国际集成电路制造(上海)有限公司 一种鳍型半导体器件的制造方法
CN103681325B (zh) * 2012-09-04 2016-08-03 中芯国际集成电路制造(上海)有限公司 一种鳍片场效应晶体管的制备方法
US9337079B2 (en) * 2012-10-09 2016-05-10 Stmicroelectronics, Inc. Prevention of contact to substrate shorts
US9437440B2 (en) * 2012-11-21 2016-09-06 Infineon Technologies Dresden Gmbh Method for manufacturing a semiconductor device
CN104282612B (zh) * 2013-07-01 2017-04-19 中芯国际集成电路制造(上海)有限公司 一种半导体器件浅沟槽隔离结构的制作方法
TWI562373B (en) * 2014-02-19 2016-12-11 Vanguard Int Semiconduct Corp Semiconductor device and method for manufacturing the same
US9978861B2 (en) 2014-04-09 2018-05-22 Vanguard International Semiconductor Corporation Semiconductor device having gate in trenches
JP2017515480A (ja) * 2014-05-15 2017-06-15 キャリスタ， インコーポレイテッド 極長炭素鎖化合物を生物学的に産生するための方法
KR102675909B1 (ko) * 2017-02-20 2024-06-18 삼성전자주식회사 반도체 소자
KR102342551B1 (ko) * 2017-09-25 2021-12-23 삼성전자주식회사 아이솔레이션 영역을 포함하는 반도체 소자

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6503799B2 (en) * 2001-03-08 2003-01-07 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor device
CN1494732A (zh) * 2001-03-28 2004-05-05 �Ƚ�΢װ�ù�˾ 形成次平版印刷的光阻材料图案的制作方法
CN101154665A (zh) * 2006-09-29 2008-04-02 海力士半导体有限公司 半导体器件及其制造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000260952A (ja) * 1999-03-05 2000-09-22 Toshiba Corp 半導体装置
US6483156B1 (en) 2000-03-16 2002-11-19 International Business Machines Corporation Double planar gated SOI MOSFET structure
JP2002158932A (ja) * 2000-11-16 2002-05-31 Sony Corp 固体撮像装置及び固体撮像素子の駆動方法
US6716571B2 (en) * 2001-03-28 2004-04-06 Advanced Micro Devices, Inc. Selective photoresist hardening to facilitate lateral trimming
KR20050045599A (ko) 2003-11-12 2005-05-17 삼성전자주식회사 선택적 에피텍셜 성장을 이용한 소자분리막 형성방법
KR100673896B1 (ko) * 2004-07-30 2007-01-26 주식회사 하이닉스반도체 트렌치 구조의 소자분리막을 갖는 반도체소자 및 그 제조방법
JP2006237509A (ja) * 2005-02-28 2006-09-07 Toshiba Corp 半導体装置
JP4718894B2 (ja) * 2005-05-19 2011-07-06 株式会社東芝 半導体装置の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6503799B2 (en) * 2001-03-08 2003-01-07 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor device
CN1494732A (zh) * 2001-03-28 2004-05-05 �Ƚ�΢װ�ù�˾ 形成次平版印刷的光阻材料图案的制作方法
CN101154665A (zh) * 2006-09-29 2008-04-02 海力士半导体有限公司 半导体器件及其制造方法

Also Published As

Publication number Publication date
JP2011530168A (ja) 2011-12-15
TW201005874A (en) 2010-02-01
WO2010014287A1 (en) 2010-02-04
CN102113110A (zh) 2011-06-29
US8062953B2 (en) 2011-11-22
US20120007155A1 (en) 2012-01-12
JP5721178B2 (ja) 2015-05-20
US20100025805A1 (en) 2010-02-04

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Address after: Texas in the United States

Patentee after: NXP America Co Ltd

Address before: Texas in the United States

Patentee before: Fisical Semiconductor Inc.