CN102074577B - 一种垂直沟道场效应晶体管及其制备方法 - Google Patents
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Abstract
本发明公开了一种垂直沟道场效应晶体管及其制备方法。该场效应晶体管的沟道区为一垂直于衬底上的圆环形Si台;源端为多晶硅,位于圆环形Si台的上端;漏端位于圆环形Si台下端的外侧;栅位于圆环形Si台的外侧面;在圆环形Si台的内部填充有介质材料。与常规的垂直结构Si台场效应晶体管相比,本发明的圆环结构场效应晶体管可有效抑制短沟效应,达到改善器件性能的目的。
Description
技术领域
本发明涉及一种半导体器件,尤其是一种具有垂直沟道结构的场效应晶体管,以及它的制备方法。
背景技术
垂直沟道场效应晶体管(vertical FET)技术是一种新的实现小尺寸场效应晶体管(MOSFET)的方法。垂直沟道场效应晶体管的沟道长度并非由光刻直接定义,而是由硅台刻蚀、离子注入或者外延来决定的,所以无需借助复杂的光刻手段就很容易实现短沟道器件的制作,并且其工艺和平面MOSFET技术也完全兼容。垂直沟道器件被学术界和工业界认为是继平面MOSFET之后最有潜力的新型器件之一,目前,在ROM、DRAM等领域已有成熟的应用。
从加工工艺上来分,垂直沟道场效应晶体管可以分为两类,一类是以硅台刻蚀和离子注入的方法形成垂直沟道,另一类是通过外延技术形成垂直沟道。前者的优点是工艺比较简单,缺点是难以精确控制沟道的长度。后者可以通过外延工艺精确控制沟道长度,但缺点是技术比较复杂,对设备和工艺条件要求严格。申请号为02129384.8的中国专利提出了一种多晶硅做源端的垂直结构MOSFET,可有效节省器件有源区面积,更好的控制器件沟道长度,并且可以和双极器件兼容,为实现BiCMOS奠定了基础。随着集成度的提高和器件尺寸的缩小,现有硅台结构的短沟道效应越来越明显,严重影响了器件的性能,所以,有必要提出一种可以抑制垂直硅台结构器件短沟效应的器件结构及其制备方法。
发明内容
本发明的目的是提供一种可更好的抑制短沟道效应,改善器件性能的垂直沟道结构的场效应晶体管。
本发明的垂直沟道场效应晶体管的特征是,其沟道区为一垂直于衬底上的圆环形Si台;源端为多晶硅,位于圆环形Si台的上端;漏端位于圆环形Si台下端的外侧;栅位于圆环形Si台的外侧面;在圆环形Si台的内部填充有介质材料。
本发明场效应晶体管最基本的结构特点是,器件的沟道区为纳米尺寸的圆环,圆环的中心填充介质。所述圆环形的Si台高50nm~500nm,内径20nm~500nm,外径30nm~600nm;圆环中心填充的介质材料可以是氧化硅、氮化硅、氧化铪、氧化锆、氧化钛等中的一种或多种。
上述垂直结构场效应晶体管在具体制备之前先进行版图设计(如图1所示):定义有源区;在有源区中定义Si圆环区域,将来要在此处刻蚀出圆环形状的Si台,垂直沟道在圆环形Si台的外侧壁上形成;器件的源漏是不对称结构,源端引出在场区,漏端引出在有源区里面;多晶硅栅引出在场区;最后在源、漏、栅区开引线孔,并设计金属引线。
然后根据下述步骤进行制备:
1)在Si衬底上进行器件隔离,定义出有源区;
该步骤可采用传统的场区局部氧化(LOCOS)隔离技术实现器件隔离,定义出器件的有源区。
2)对有源区进行阈值调节注入;
根据制作器件类型的不同对有源区做n型或p型注入。
3)淀积源端多晶硅,并在其上淀积掩蔽层;
一般的,源端多晶硅采用低压化学气相沉积(LPCVD)的方式淀积,厚度一般在100nm~300nm;接着淀积一层氧化硅作为掩蔽层,厚度约为30nm~50nm。
4)刻蚀形成圆环形Si台;
首先在掩蔽层上涂光刻胶,以光刻胶为掩膜各向异性干法刻蚀掩蔽层,然后依次刻蚀多晶硅和Si衬底,形成圆环形的Si台,刻蚀完成后去除光刻胶和掩蔽层。Si台高度由器件的沟道长度所决定,Si台的内径20nm~500nm,外径30nm~600nm。
5)在圆环形Si台内部填充介质材料;
通过在有源区淀积介质材料,光刻保护圆环内介质材料,腐蚀圆环外介质材料等工艺完成;
6)制备器件的轻掺杂区域(LDD区);
首先生长一层牺牲氧化层,然后进行离子注入,在衬底表层形成漏端的LDD区,最后去除牺牲氧化层。
7)生长栅氧化层;
可采用干氧氧化方法在源端多晶硅、Si台及Si衬底的表层形成栅氧化层,厚度为3nm~10nm。
8)淀积栅极多晶硅,并对其进行重掺杂,接着做激活退火,然后刻蚀该多晶硅,在圆环形Si台外侧壁形成多晶硅侧墙;
在栅氧化层上LPCVD淀积多晶硅;常用的掺杂方法可以是离子注入或者在生长多晶硅的同时进行原位掺杂;采用各向异性干法刻蚀多晶硅,形成的多晶硅侧墙即为栅。
9)进行源漏注入;
10)淀积低氧层,并进行致密退火,然后刻蚀引线孔,溅射金属,合金,完成源、漏、栅的引出。
本发明具有垂直沟道结构的Si纳米环场效应晶体管最基本的结构特点是,器件的沟道区为纳米尺寸的圆环,圆环的中心填充介质。与常规的垂直结构Si台MOSFET相比,此种圆环结构场效应晶体管可有效抑制短沟效应,达到改善器件性能的目的。
附图说明
图1为本发明Si纳米环垂直沟道MOSFET的版图(俯视)示意图。
图2(a)-图2(h)为本发明实施例制备垂直结构N型MOSFET的工艺步骤流程示意图,均为沿图1中A-A’方向的剖面图。
图中,201-Si衬底;202-第一氧化硅掩蔽层;203-氮化硅层;204-场氧化层;205-源端多晶硅;206-第二氧化硅掩蔽层;207-Si纳米环;208-填充介质;209-LDD区;210-栅介质层;211-栅极多晶硅;212-漏区。
具体实施方式
下边结合附图,以Si纳米环垂直沟道的N型MOSFET的制备为实施例对本发明做进一步的详细描述。
图1是本实施例场效应晶体管的版图设计:在有源区中定义Si圆环区域,将来要在此处刻蚀出圆环形状的Si台,垂直沟道在圆环形Si台的外侧壁上形成;器件的源漏是不对称结构,源端引出在场区,漏端引出在有源区里面;多晶硅栅引出在场区;最后在源、漏、栅区开引线孔,并设计金属引线。
器件的制备过程如下:
1)对Si衬底201进行LOCOS氧化隔离,定义出器件的有源区,如图2(a)所示。
具体工艺过程包括:首先在Si衬底201上依次生长氧化硅和氮化硅,即第一氧化硅掩蔽层202和氮化硅层203,其中氧化硅采用热氧化生长,厚度为30nm,氮化硅采用低压化学气相沉积(LPCVD)生长,厚度为100nm。然后,用光刻和刻蚀工艺将衬底上没有光刻胶覆盖的区域(对应于后来的场区)的氮化硅去掉。之后进行离子注入,防止场区开启,注入离子为B,剂量为1E13cm-2量级,能量为40~80keV。采用湿法腐蚀工艺去掉未被保护的氧化硅,接着用热氧化的方法生长场氧化层204。本实施例中场氧化层204的生长温度为850~1000℃,厚度450~800nm。
2)阈值调节注入,如图2(b)所示。
具体工艺过程包括:湿法腐蚀去掉有源区的氮化硅,对有源区进行离子注入以调节器件的阈值电压,本实施例中注入离子为B,注入剂量范围为1E13cm-2~1E14cm-2,注入能量为80~100keV。注入完成后湿法腐蚀去掉第一氧化硅掩蔽层202。
3)淀积源端多晶硅,如图2(c)所示;
具体工艺过程包括:在有源区LPCVD多晶硅100~300nm,这层多晶硅205将用于作为器件源端。接着淀积第二氧化硅掩蔽层206,厚度约为30~50nm。
4)刻蚀圆环形Si台,如图2(d)所示;
具体工艺过程包括:首先进行常规的光刻工艺,接着用光刻胶为掩膜各向异性干法刻蚀工艺去除光刻胶未覆盖的第二氧化硅掩蔽层206。然后依次各向异性干法刻蚀多晶硅205和Si衬底201,制备出圆环形的Si台207。圆环的厚度为10~200nm。刻蚀Si衬底的深度即圆环形Si台的高度由所制备MOSFET的沟长决定。刻蚀完成后,去掉光刻胶和第二氧化硅掩蔽层206。
5)在圆环内部填充介质材料,如图2(e)所示;
具体工艺过程包括:在有源区淀积填充介质材料,通过光刻工艺用光刻胶保护圆环内介质材料,腐蚀圆环外介质材料,去掉光刻胶。
6)制备器件的LDD区,如图2(f)所示;
具体工艺过程包括:首先生长一层牺牲氧化层,厚度约为30nm,以降低圆环形Si台侧壁的缺陷,同时也作为接下来的离子注入的掩蔽层。氧化完成后对Si衬底201进行As离子注入,注入剂量为1E13cm-2~1E14cm-2,注入能量为30~60keV,制备出漏端的LDD区209。最后采用湿法腐蚀工艺去掉牺牲氧化层。
7)生长栅氧化层;
采用干氧氧化方法制备栅氧化层即栅介质层210,厚度为3~10nm。
8)淀积多晶硅,并对其进行重掺杂,然后做激活退火,如图2(g)所示;
具体工艺过程包括:在栅介质层210上LPCVD 250nm左右的栅极多晶硅211,之后对其进行掺杂,常用的掺杂方法是离子注入或者在生长多晶硅的同时进行原位掺杂。本实施例采用离子注入工艺,注P,注入剂量为1E15cm-2~1E16cm-2,注入能量为80~120keV,注入完成后进行退火,温度900~1100℃。
9)刻蚀栅极多晶硅211,并做源漏注入,如图2(h)所示;
采用各向异性干法刻蚀栅极多晶硅211,在圆环形Si纳米环的外侧壁形成多晶硅侧墙。源漏As注入的剂量为1E15cm-2~1E16cm-2,能量为80~100keV。
10)淀积低氧层,并进行致密退火,刻蚀引线孔,溅射金属,合金,完成源、漏、栅的引出。
以上是对本发明实施例的详细描述,应该理解的是,在不脱离本发明实质和精神的范围内,本领域的技术人员可以在一定程度上对本发明的做出变动和修改,因此,本发明的器件不局限于实施例中所描述的结构,其制备方法也不限于实施例中所公开的内容,本发明的保护范围以所附权利要求书而定。
Claims (10)
1.一种垂直沟道场效应晶体管,其特征在于,其沟道区为一垂直于衬底上的圆环形Si台;源端为多晶硅,位于圆环形Si台的上端;漏端位于圆环形Si台下端的外侧;栅位于圆环形Si台的外侧面;在圆环形Si台的内部填充有介质材料。
2.如权利要求1所述的垂直沟道场效应晶体管,其特征在于,所述圆环形Si台高50nm~500nm,内径20nm~500nm,外径30nm~600nm。
3.如权利要求1所述的垂直沟道场效应晶体管,其特征在于,圆环形Si台的内部填充的介质材料是氧化硅、氮化硅、氧化铪、氧化锆和氧化钛的一种或多种。
4.权利要求1所述垂直沟道场效应晶体管的制备方法,包括以下步骤:
1)在Si衬底上进行器件隔离,定义出有源区;
2)对有源区进行阈值调节注入;
3)在有源区淀积源端多晶硅,并在其上淀积一掩蔽层;
4)刻蚀形成圆环形Si台,去除掩蔽层;
5)在圆环形Si台内部填充介质材料;
6)在圆环形Si台外侧的衬底表层形成漏端LDD区;
7)在源端多晶硅、Si台及Si衬底的表面生长栅氧化层;
8)在栅氧化层上淀积多晶硅,并对其进行重掺杂,接着做激活退火,然后刻蚀该多晶硅,在圆环形Si台外侧壁形成多晶硅侧墙;
9)进行源漏注入;
10)淀积低氧层,并进行致密退火,然后刻蚀引线孔,溅射金属,合金,完成源、漏、栅的引出。
5.如权利要求4所述的制备方法,其特征在于,步骤1)采用场区局部氧化隔离技术实现器件隔离。
6.如权利要求4所述的制备方法,其特征在于,步骤4)首先在掩蔽层上涂光刻胶,以光刻胶为掩膜各向异性干法刻蚀掩蔽层,然后依次刻蚀源端多晶硅和Si衬底,形成圆环形Si台,刻蚀完成后去除光刻胶和掩蔽层。
7.如权利要求4所述的制备方法,其特征在于,步骤5)先在有源区淀积介质材料,然后通过光刻技术保护圆环形Si台内部的介质材料,而腐蚀去除Si台外的介质材料。
8.如权利要求4所述的制备方法,其特征在于,步骤5)填充的介质材料是氧化硅、氮化硅、氧化铪、氧化锆和氧化钛的一种或多种。
9.如权利要求4所述的制备方法,其特征在于,步骤6)先生长一层牺牲氧化层,然后进行离子注入,在衬底表层形成漏端的LDD区,最后去除牺牲氧化层。
10.如权利要求4所述的制备方法,其特征在于,步骤8)在栅氧化层上采用低压化学气相沉积法生长多晶硅,然后进行离子注入掺杂,或者在生长多晶硅的同时进行原位掺杂;随后各向异性干法刻蚀多晶硅,形成的多晶硅侧墙。
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