CN102027591B - 半导体模块、半导体模块的制造方法及便携式设备 - Google Patents
半导体模块、半导体模块的制造方法及便携式设备 Download PDFInfo
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- CN102027591B CN102027591B CN2009801172074A CN200980117207A CN102027591B CN 102027591 B CN102027591 B CN 102027591B CN 2009801172074 A CN2009801172074 A CN 2009801172074A CN 200980117207 A CN200980117207 A CN 200980117207A CN 102027591 B CN102027591 B CN 102027591B
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01076—Osmium [Os]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008091644A JP4753960B2 (ja) | 2008-03-31 | 2008-03-31 | 半導体モジュール、半導体モジュールの製造方法 |
| JP091644/08 | 2008-03-31 | ||
| PCT/JP2009/055307 WO2009122911A1 (ja) | 2008-03-31 | 2009-03-18 | 半導体モジュール、半導体モジュールの製造方法、ならびに携帯機器 |
Publications (2)
| Publication Number | Publication Date |
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| CN102027591A CN102027591A (zh) | 2011-04-20 |
| CN102027591B true CN102027591B (zh) | 2013-02-20 |
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| US (1) | US8476776B2 (enExample) |
| JP (1) | JP4753960B2 (enExample) |
| CN (1) | CN102027591B (enExample) |
| WO (1) | WO2009122911A1 (enExample) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011077108A (ja) * | 2009-09-29 | 2011-04-14 | Elpida Memory Inc | 半導体装置 |
| JP5496692B2 (ja) * | 2010-01-22 | 2014-05-21 | 三洋電機株式会社 | 半導体モジュールの製造方法 |
| KR101678052B1 (ko) * | 2010-02-25 | 2016-11-22 | 삼성전자 주식회사 | 단층 배선 패턴을 포함한 인쇄회로기판(pcb), pcb를 포함한 반도체 패키지, 반도체 패키지를 포함한 전기전자장치, pcb제조방법, 및 반도체 패키지 제조방법 |
| US9748154B1 (en) | 2010-11-04 | 2017-08-29 | Amkor Technology, Inc. | Wafer level fan out semiconductor device and manufacturing method thereof |
| JP5819999B2 (ja) * | 2014-02-05 | 2015-11-24 | ラピスセミコンダクタ株式会社 | 半導体装置およびその半導体装置の製造方法 |
| CN105097758B (zh) | 2014-05-05 | 2018-10-26 | 日月光半导体制造股份有限公司 | 衬底、其半导体封装及其制造方法 |
| JPWO2023042450A1 (enExample) * | 2021-09-14 | 2023-03-23 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JPH08236586A (ja) * | 1994-12-29 | 1996-09-13 | Nitto Denko Corp | 半導体装置及びその製造方法 |
| DE69635397T2 (de) * | 1995-03-24 | 2006-05-24 | Shinko Electric Industries Co., Ltd. | Halbleitervorrichtung mit Chipabmessungen und Herstellungsverfahren |
| JPH08306828A (ja) * | 1995-05-11 | 1996-11-22 | Nitto Denko Corp | 半導体装置 |
| US6181569B1 (en) * | 1999-06-07 | 2001-01-30 | Kishore K. Chakravorty | Low cost chip size package and method of fabricating the same |
| JP2001176898A (ja) * | 1999-12-20 | 2001-06-29 | Mitsui High Tec Inc | 半導体パッケージの製造方法 |
| JP2002083904A (ja) * | 2000-09-06 | 2002-03-22 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
| JP3923368B2 (ja) * | 2002-05-22 | 2007-05-30 | シャープ株式会社 | 半導体素子の製造方法 |
| WO2004060034A1 (ja) * | 2002-12-24 | 2004-07-15 | Matsushita Electric Industrial Co., Ltd. | 電子部品内蔵モジュール |
| JP2004349361A (ja) | 2003-05-21 | 2004-12-09 | Casio Comput Co Ltd | 半導体装置およびその製造方法 |
| JP4479209B2 (ja) * | 2003-10-10 | 2010-06-09 | パナソニック株式会社 | 電子回路装置およびその製造方法並びに電子回路装置の製造装置 |
| JP4921354B2 (ja) * | 2005-03-01 | 2012-04-25 | 日本電気株式会社 | 半導体パッケージ及びその製造方法 |
| JP4428337B2 (ja) * | 2005-12-02 | 2010-03-10 | ソニー株式会社 | 半導体装置の製造方法 |
| JP4877626B2 (ja) * | 2006-02-16 | 2012-02-15 | 株式会社テラミクロス | 半導体装置の製造方法 |
| JP2008053693A (ja) * | 2006-07-28 | 2008-03-06 | Sanyo Electric Co Ltd | 半導体モジュール、携帯機器、および半導体モジュールの製造方法 |
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- 2009-03-18 CN CN2009801172074A patent/CN102027591B/zh not_active Expired - Fee Related
Non-Patent Citations (1)
| Title |
|---|
| JP特开2001-176898A 2001.06.29 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2009122911A1 (ja) | 2009-10-08 |
| CN102027591A (zh) | 2011-04-20 |
| JP4753960B2 (ja) | 2011-08-24 |
| JP2009246174A (ja) | 2009-10-22 |
| US20110193222A1 (en) | 2011-08-11 |
| US8476776B2 (en) | 2013-07-02 |
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