CN102017142B - 三维安装半导体装置及其制造方法 - Google Patents

三维安装半导体装置及其制造方法 Download PDF

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CN102017142B
CN102017142B CN2009801167517A CN200980116751A CN102017142B CN 102017142 B CN102017142 B CN 102017142B CN 2009801167517 A CN2009801167517 A CN 2009801167517A CN 200980116751 A CN200980116751 A CN 200980116751A CN 102017142 B CN102017142 B CN 102017142B
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mentioned
wiring
interarea
semiconductor device
circuit board
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CN102017142A (zh
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石原政道
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Kyushu Institute of Technology NUC
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Kyushu Institute of Technology NUC
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Abstract

在布线基板的两面具有用于连接各种电路元件的连接焊盘部及对该连接焊盘部进行连接的布线图案，并且具有用于将各个面的连接焊盘部以及布线图案相互连接的贯通布线部。形成将被支撑部支撑的多个柱电极整体地形成的柱电极部件。在布线基板的背面安装半导体芯片并与其连接焊盘部连接，并且在该布线图案的规定的位置固定并电连接柱电极部件，在树脂密封后，剥离支撑部并使柱电极端面或者与其连接的背面布线露出。在布线基板的正面的连接焊盘部配置并连接其它的电路元件。

Description

三维安装半导体装置及其制造方法
技术领域
本发明涉及在布线基板的两面安装有包含半导体芯片的各种电路元件的三维安装半导体装置及其制造方法。
背景技术
在便携电话中使用的RF(无线)模块等中高频特性非常重要，作为高频特性，最敏感的部分是半导体(LSI)芯片端与外带部件之间的布线。现有的布线为LSI芯片接合线-封装件基板-柱电极-部件端，其长度长。在RF模块的情况下，即使模块内布线多，模块的外部连接端子少也可。但是，在现有的一般的模块技术中，在封装件的基板侧能够进行多层布线，能够采用较多的布线，但是在柱电极侧，通常难以采用较多的布线。另外，信号路径也是二维的。如果将该信号路径三维化的话，则能够相应缩短信号路径，高频特性也得以改善。另外安装面积也能够减少，能够降低总成本。因此，要求进行三维安装，缩短信号路径。
图21是例示三维安装的根据现有技术的半导体装置的图(参照专利文献1)。在布线基板的上表面形成有电极A、以未图示的布线等构成的上表面布线图案。在电极A之上安装电容器、电阻、电感器、滤波器等无源元件或有源元件等电路元件。在布线基板的下表面形成有电极B、以连接它们的布线等构成的下表面布线图案。该下表面布线图案与布线基板上表面的电极A也通过未图示的布线电连接。
在下表面布线图案的电极B连接有LSI芯片的突起电极，而且从别的电极C形成垂直的连接孔，在该连接孔的内周形成有以金属薄膜构成的连接部。构成连接部的金属薄膜与在密封部表面的连接孔的周围形成的电极D成为一体。
这样的两面安装的半导体装置安装在母基板上。在母基板上形成有包含电极E以及接地电极的布线图案。电极E以及接地电极在与电极D以及散热体面对的位置形成，分别使用焊锡等接合。在半导体芯片的上表面的有源区域中产生的热从半导体芯片的下表面经由散热体以及接地电极向母基板散热。
这样，通过在布线基板的两面安装LSI芯片、各种电路元件，不仅能够减少安装面积、降低总成本，而且能够缩短信号路径。
但是，例示的半导体装置的构造复杂，特别是用于连接分别在布线基板和母基板设置的布线图案之间的连接结构需要复杂的工序。通常，半导体制造工艺分为制造LSI的前工序和将其封装的后工序，但是覆盖前工序的专业制造厂少。例示的半导体装置的制造，需要与在布线基板上进行与电极连接的垂直的连接孔的形成、导电性物质的埋入等的处理的工艺，即前工序接近的设备，仅用的后工序设备不能进行。
专利文献1：日本特开2005-203633号公报
发明内容
发明要解决的课题
本发明的目的在于用简易的方法使平面安装为三维安装，而且缩短信号路径。另外，通过把需要接近前工序的设备的工序以脱机方式汇总为部件，使后工序的制造厂不需要大的投资也能够参与，能够容易地追随今后的市场扩大。
本发明的在布线基板的两面安装有包含半导体芯片的各种电路元件的三维安装半导体装置及其制造方法，在布线基板的一方的主面以及另一方的主面各自具有用于连接各种电路元件的连接焊盘部及对该连接焊盘部进行连接的布线图案，并且具有用于将一方以及另一方的主面各自的连接焊盘部以及布线图案相互连接的贯通布线部。形成将被支撑部支撑的多个柱电极整体形成的柱电极部件。在布线基板的一方的主面，安装半导体芯片并与该一方的主面上的连接焊盘部连接，并且，在该布线图案的规定的位置，将柱电极部件固定并电连接，在树脂密封后，剥离支撑部并使柱电极端面露出。在布线基板的另一方的主面，在该另一方的主面上的连接焊盘部配置并连接其它的电路元件。
柱电极部件能够具有与柱电极连接的背面布线，在该种情况下，在树脂密封后，在剥离支撑部时使背面布线露出。在布线基板的一方的主面中，以使柱电极在侧面露出的方式进行树脂密封，该露出的柱电极以在其侧面制作弯月面(meniscus)的方式形成填锡(solder fillet)，能够在母基板的布线图案上进行软钎焊。
发明的效果
在本发明中能够容易地使平面安装为三维安装，能够缩短信号路径(LSI芯片-布线基板-电路元件)，改善高频特性。由此，能够实现RF(无线)模块的高性能化和少面积化，能够实现便携电话机等小型电子设备的高性能化和高密度安装。高密度安装导致设备的小型化或者低成本。
另外，根据本发明，能够使柱电极的侧面露出，由此能够在侧面形成填锡，因此能够格外强化安装强度。
附图说明
图1是表示在布线基板(多层有机基板)的背面上粘接而且连接半导体芯片(LSI芯片)的状态的图。
图2(A)是表示带有布线的柱电极部件的细节的图，是用于一个封装件的单体图案的侧面剖视图，(B)是其立体图，(C)是用于4个封装件而连结的图案的立体图。
图3是表示在粘接而且连接有LSI芯片的布线基板(参照图1)上连接有带有布线的柱电极部件(参照图2)的状态的图。
图4是表示树脂密封后的状态的图。
图5是表示剥离支撑部(电铸母模)后的状态的图。
图6是表示反转图5的上下后的状态的图。
图7是表示在有机基板的表面侧安装有各种电路元件的状态的图。
图8是表示用树脂密封了有机基板的表面侧的状态的图。
图9是说明本发明的第二实施方式的图。
图10是表示用树脂密封了表面侧的状态的图。
图11是表示第二实施方式的半导体装置的使用例的平面图。
图12是表示图11所示的半导体模块A～C之一的侧面剖视图。
图13是说明本发明的第三实施方式的图。
图14是表示树脂密封后的状态的图。
图15是说明本发明的第四实施方式的图。
图16是表示树脂密封后的状态的图。
图17是说明本发明的第五实施方式的图。
图18(A)是表示与图2不同的别的例子的带有布线的柱电极部件的立体图，(B)是剖视图，(C)是(B)中表示的圆内的放大图。
图19是例示本发明的第六实施方式的三维安装半导体装置的图。
图20是表示与图2以及图18不同的、再一其它的例子的带有布线的柱电极部件的制造工序的图。
图21是例示三维安装的根据现有技术的半导体装置的图。
图22是表示使用光致抗蚀剂的电铸部件的制造方法的工序图。
具体实施方式
下面根据示例说明本发明。参照图1～图8说明本发明的三维安装半导体装置的第一实施方式。图1是表示在布线基板(多层有机基板)的背面上粘接而且连接有半导体芯片(LSI芯片)的状态的图。再有，在图1中，将安装LSI芯片的图中的上侧作为背面(一方的主面)，如后述那样将安装其它电路元件的图中的下侧作为表面(另一方的主面)，在以下进行说明。例示了LSI芯片通过芯片粘结材料粘接在多层有机基板的图中上侧，与有机基板的最上层的布线图案通过接合线(bonding wire)而连接。在多层有机基板的最上层的布线图案中，形成成为接合线连接电极的接合用金属焊盘部，并且形成向该焊盘部的布线。
下面，作为布线基板以多层有机基板为例进行说明，但是只要是在基板的两面侧各自具有用于连接各种电路元件的连接焊盘部和连接它们的布线、以及用于将两面侧的连接焊盘部以及布线相互连接的贯通布线部的布线基板的话，本发明就不限于多层有机基板，能够使用包含硅基板的任何布线基板。
多层或者单层有机基板，是在由单层两层布线结构或者多层构成的基板的各层分别形成布线图案后粘合这些基板，根据需要形成用于连接各层的布线图案的通孔的基板。在该通孔的内部形成导体层，该导体层与在图中的下侧形成的作为端面电极部的连接盘(land)连接。进而在该连接盘使焊锡材料附着，能够形成外部连接用的突起电极。这样的多层或者单层有机基板例如作为在表面安装了称为“焊锡球”的将小的焊锡材料做成球的材料(突起)(BGA：Ball GridArray，球栅阵列)的整体密封有机基板而被人所知。
图2是表示通过板状的支撑部整体连结的带有布线的柱电极部件的细节的图，图2(A)以及(B)分别表示用于一个封装件的单体图案的侧面剖视图以及立体图，另外图2(C)表示把用于4个封装件的4个单体图案连结成一个的图案的立体图。不仅形成被支撑部支撑的柱电极，而且形成与其连接的布线图案。由此，在图示的带有布线的柱电极部件进行布线图案的制造，但是本发明也可以使用没有布线图案的仅是柱电极的结构。
这些单体图案或者连结图案通过由支撑部将布线图案以及多个柱电极整体地连结而构成。柱电极不限于例示那样的圆柱形状，只要是包含矩形、多边形状等的柱状(棒状)形状即可。能够通过电铸法制作布线图案以及柱电极。
电铸法自身是公知的加工方法。所谓电铸法是指“利用电镀法的金属制品的制造、修补或者复制法”，基本上与电镀同样，但在电镀厚度、进行电镀皮膜的分离操作的方面与电镀不同。另外在由母模剥离电镀皮膜进行使用的情况下，电镀皮膜的物性的控制/管理成为重要点。作为通过电铸法生长的导电性材料的电镀金属，可以使用包含镍或者铜、镍合金、或者铜合金的材料。作为母模材质，可以使用不锈钢，但是在这以外，可以使用与为了树脂密封使用的树脂材料的热膨胀系数没有大的不同的材质，例如能够使用利用铜材料作为基础、表面以使电镀图案容易剥离的方式而用能够通过电镀用的电的程度的薄氧化膜等材料覆盖的材质。需要选定不产生内部应力那样的电镀浴的组成、电镀条件，在镍电镀的情况下，作为电镀浴使用氨基磺酸镍浴。
图22是表示使用了光致抗蚀剂的电铸部件的制造方法的工序图。如图22(a)所示，电铸法在不锈钢等母模的上表面涂敷光致抗蚀剂(非导体被覆膜)。接着通过穿透图案薄膜并进行曝光的图案印相以及其后的显影，形成以光致抗蚀剂覆盖非电镀部分的电铸用原版(图22(b))。电铸用原版的光致抗蚀剂图案的厚度是制品(柱电极、或者布线图案)的厚度以上，在柱电极的情况下例如采用100μm～300μm左右的厚度。接着在光致抗蚀剂图案的开口部形成电镀金属(图22(c))。在维持在适宜温度的电镀浴(例如氨基磺酸镍液)中，在阳极侧置入要电铸的电铸金属，在阴极侧配置不锈钢等电铸母模。在阴极侧的电铸母模的表面上，如图22(c)所示，预先形成光致抗蚀剂图案。当流过电流时，阳极侧的电铸金属开始溶解，在电铸母模上的光致抗蚀剂图案开口部进行电镀。
接着，如图22(d)所示，进行平坦化加工。接着，当除去抗蚀剂时(图22(e))，抗蚀剂部分以外直接成为布线图案、柱电极。然后从电铸母模剥离该电镀金属(图22(f))。形成的电镀金属和支撑部的剥离，能够以热或者压力容易地进行，这是电铸法的特征。
图2表示的带有布线的柱电极部件，两次反复进行图22(a)～(d)表示的工序，在最初的工序中形成布线图案后，在第二次的工序中形成与布线图案连接的柱电极。其后，除去抗蚀剂，剥离与布线图案连接的柱电极。
图3是表示在粘接而且连接有LSI芯片的布线基板(参照图1)上，连接有带有布线的柱电极部件(参照图2)的状态的图。在有机基板的布线图案的规定的位置(图1表示的连接电极用金属焊盘部)，固定而且电连接柱电极。作为固定以及连接柱电极的方法，可以通过如下方法来进行，(1)利用超声波的接合，(2)利用银膏等的导电性膏体的连接，(3)焊锡连接，(4)在有机基板侧设置的连接电极用金属焊盘部设置凹部，另一方面在带有布线的柱电极部件侧设置凸部并插入压接或者插入铆接的方法。
图4是表示树脂密封后的状态的图。在通过支撑部整体连接的柱电极被固定后，在该状态下，布线基板的上表面，到支撑部的下表面被进行传递模塑，或者使用液状树脂(材质例如是环氧树脂类)进行树脂密封。
图5是表示剥离支撑部(电铸母模)后的状态的图。通过剥离支撑部，使柱电极以及与其连接的背面布线一个一个地电分离。由此能够将露出的背面布线作为外部连接用而使用。或者在使用无背面布线的柱电极部件时，能够将柱电极端面作为外部连接而使用。
图6是表示反转图5的上下后的状态的图。
图7是表示在位于图中的上侧的有机基板的表面侧安装有各种电路元件的状态的图。如图所示，在布线基板上的规定位置，配置其它的半导体芯片IC、电阻R、以及电容器C那样的电路元件，并进行连接，各电路元件在布线基板(有机基板)的连接盘上，使用通常的技术进行倒装芯片接合连接(flip chip bondconnect)。
图8是表示将有机基板的表面侧树脂密封了的状态的图。在树脂密封前的阶段，能够作为完成品使用，但也能够进行树脂密封。图1仅表示1个部件，但实际上在连结有多个的状态下，放入金属模内填充树脂。由此进行传递模塑，或者使用液状树脂(材质例如是环氧树脂类)进行树脂密封。
通过该阶段的结构，虽然可以作为完成品而使用，但是在此后，在背面侧(图中的下侧)的背面布线的规定位置(布线前端侧)，能够形成外部连接用的突起电极。或者在使用无背面布线的柱电极部件的情况下，能够将柱电极前端面作为外部连接用的外部电极，或者也能够在其前端面形成突起电极，将其作为外部电极使用。进而，进行用于使芯片单片化的切断，作为产品而完成。
接着参照图9～图12说明本发明的第二实施方式。该第二实施方式仅在柱电极的位置在树脂密封的侧面露出这一点与第一实施方式不同。虽然在该阶段能够作为成品使用，但是进而如图10所示，也能够用树脂密封表面侧，或者也能够在背面布线的规定位置形成外部连接用的突起电极。
图11是表示第二实施方式的半导体装置的使用例的平面图，并且图12是表示图11所示的半导体模块A～C之一的侧面剖视图。如图所示，在母基板的布线图案上，配置半导体模块A～C以及电容器等电路元件，通过软钎焊等电、机械地连接。此时，如图12所示，以在树脂密封的侧面露出的柱电极侧面制作弯月面(液体表面由于表面张力等力变形为曲线等的形状)的方式，在柱电极侧面形成填锡(焊锡凝固后在连接部形成的焊锡表面的形状)，能够增大连接强度。
接着，参照图13～图14说明本发明的第三实施方式。该第三实施方式仅LSI芯片对于布线基板被倒装芯片连接的这一点与第一实施方式不同。柱电极与第一实施方式同样地，内置在树脂密封内部。LSI芯片在布线基板(有机基板)的位于图中的下侧的最上层的布线图案，使用通常的技术进行倒装芯片接合连接。图13表示树脂密封表面前的状态，并且，图14表示树脂密封后的状态。哪个状态均可作为完成品使用。
接着参照图15～图16说明本发明的第四实施方式。该第四实施方式仅是LSI芯片对于布线基板以倒装芯片方式连接的这一点与第二实施方式不同。与第二实施方式同样地，柱电极的侧面露出于树脂密封外部。图15表示树脂密封表面前的状态，并且，图16表示树脂密封后的状态。哪个状态均可作为完成品使用。
图17是说明本发明的第五实施方式的图。与图13同样地，在布线基板(有机基板)的表面侧安装电路元件IC后，与背面侧同样地，在表面侧也连接固定图2所示那样的带有布线的柱电极部件。此后，与上述的例子同样地，用树脂密封表面侧并且剥离支撑板。其后，对于表面布线倒装芯片端子连接各种电路元件(电阻R、电容器C)。由此，能够构成层叠了3层电路元件的半导体装置。进而，如果同样层叠其它的带有布线的柱电极部件的话，则也能够多层连接为4层以上。
图18是表示与图2不同的其它例子的带有布线的柱电极部件的图，图18(A)是表示带有布线的柱电极部件的立体图，(B)是剖视图，(C)是(B)中表示的圆内的放大图。在该带有布线的柱电极部件的支撑部能够使用不锈钢(SUS)。例示的支撑部，在其一方的整个面，使用可剥离的粘接剂粘贴通过以聚酰压胺带等为代表的薄膜膜片的绝缘基材制作的带。支撑部和带在以后的工序中被相互剥离。因此，例如预先进行当施加比回流焊温度高的温度(模塑温度以上)时容易剥离支撑部和带的处理。例如采用热胶囊(capsule)加入粘接剂、或者支撑部采用透光的材料(耐热低热膨胀玻璃等)，使用紫外线剥离型粘接剂。另外也可以使用热可塑性的粘接剂。
进而，在该带上形成要成为布线图案的金属的片层，形成带有金属的带。作为该片层，例如能够使用可镀铜的金、银、铜、钯箔。布线层的图案通过在片层上涂敷抗蚀剂，曝光图案，进行显影，进而进行蚀刻，除去抗蚀剂后完成。在该片层上通过电镀使布线层生长。进而在其上为了形成柱电极部而进行抗蚀剂涂敷和显影，使柱部电镀生长。或者布线部也能够用纳米金属粒子直接对片层进行构图(参照上述的金属粒子布线)而省略光刻工序。进而在其上进行用于形成柱电极部的抗蚀剂涂敷和显影，使柱部电镀生长。或者对带有铜箔的带进行光刻加工而形成布线图案，进而在其上为了形成柱电极部进行抗蚀剂涂敷和显影，使柱部电镀生长。由此，完成带有布线的柱电极部件。
图19是说明本发明的第六实施方式的图。图19与在图8中例示的三维安装半导体装置附加了绝缘基材以及外部电极的装置相当。图18例示的带有布线的柱电极部件，与上述的例子同样，在粘接而且连接有LSI芯片的布线基板上被连接、固定，树脂密封。此后，剥离支撑部，但是此时例如通过施加规定的高温而仅剥离支撑部，剩余绝缘基材。露出的绝缘基材作为完成品的保护膜而发挥功能。此后，在背面中，在绝缘基材开孔，形成与通过开口露出的背面布线连接的外部电极。同样，图18例示的带有布线的柱电极部件，也能够在图10、图14、图16、图17中表示的第二～第五实施方式的三维安装半导体装置中应用，并具备作为保护膜而发挥功能的绝缘基材。
图20是表示与图2以及图18不同的再一其它例子的带有布线的柱电极部件的制造工序的图。作为图18表示的绝缘基材，能够使用在表面上附着有阻焊剂的薄的玻璃环氧树脂基板。为了该带有布线的柱电极部件的制造，首先，如图20(a)所示，在玻璃环氧树脂基板的一方的面(表面)形成柱电极和布线，并且在另一方的面(背面)上也形成布线。该两布线通过基板贯通布线连接。通过该两布线以及基板贯通布线，将从柱电极到外部电极位置的路径连线，将外部电极位置配置转换到与柱电极位置不同的任意位置。
接着，如(b)所示，对在外部电极位置设置了开口部的阻焊剂进行涂敷。另一方面，(c)表示涂敷了可剥离的粘接剂的支撑部。该支撑部以及粘接剂自身能够使用与参照图18说明的同样的支撑部和粘接剂。
接着在涂敷了该粘接剂的支撑部上，上下反转(b)中表示的结构，进行粘贴。由此完成带有布线的柱电极部件。该带有布线的柱电极部件也与图18例示的带有布线的柱电极部件能够同样地使用，但是例如在装入图19所示那样的三维安装半导体装置中时，在其制造中剥离并除去支撑部。这时，阻焊剂作为保护膜而残留。如上所述，因为在阻焊剂已经设置有外部电极用开口部，所以通过该开口部设置与带有布线的柱电极部件的布线连接的外部电极。
在作为布线基板(参照图1)使用玻璃环氧树脂基板的情况下，带有布线的柱电极部件也能够通过同一基板制造厂制造，具有大幅改善生成量、有助于降低成本这样的优点。为了尽可能将两面布线的玻璃环氧树脂基板做薄，将完成的封装件做得薄，支撑部是必要的。
以上在本公开中仅作为示例详细说明了几个实施方式，但在实质上不脱离本发明的新颖的教导以及有利的效果的条件下，对于这些实施方式能够有许多改变例。

Claims (20)

1.一种三维安装半导体装置，在布线基板的两面安装有包含半导体芯片的各种电路元件，其中，
上述布线基板在一方的主面以及另一方的主面各自具有用于连接各种电路元件的连接焊盘部及对该连接焊盘部进行连接的布线图案，并且具有用于将一方以及另一方的主面各自的连接焊盘部以及布线图案相互连接的贯通布线部，
在上述布线基板的一方的主面，安装半导体芯片并与该一方的主面上的连接焊盘部连接，并且，在该布线图案的规定的位置，将整体地形成了被支撑部支撑的多个柱电极的柱电极部件固定并电连接，通过在树脂密封后剥离上述支撑部，使上述柱电极端面露出，
在上述布线基板的另一方的主面，在该另一方的主面上的连接焊盘部，配置并连接其它的电路元件。
2.根据权利要求1所述的三维安装半导体装置，其中，上述柱电极部件具有与上述柱电极连接的布线，在剥离上述支撑部时使上述布线露出。
3.根据权利要求2所述的三维安装半导体装置，其中，上述柱电极以及与其连接的布线在绝缘基材上形成，该绝缘基材通过可剥离的粘接剂粘贴在上述支撑部上，将通过剥离上述支撑部而露出的绝缘基材作为保护膜进行使用，并且在该保护膜开孔，设置与通过开口露出的上述布线连接的外部电极。
4.根据权利要求3所述的三维安装半导体装置，其中，上述绝缘基材是玻璃环氧树脂基板及覆盖在其上形成的布线的阻焊剂，将通过剥离上述支撑部而露出的阻焊剂作为保护膜进行使用，并且设置通过在该保护膜开通的开口与上述布线连接的外部电极。
5.根据权利要求1所述的三维安装半导体装置，其中，在上述布线基板的另一方的主面，树脂密封了上述其它的电路元件。
6.根据权利要求1所述的三维安装半导体装置，其中，在上述布线基板的一方的主面，上述树脂密封以使上述柱电极在侧面露出的方式进行。
7.根据权利要求6所述的三维安装半导体装置，其中，上述在侧面露出的柱电极以在其侧面制作弯月面的方式形成填锡，并被软钎焊到母基板的布线图案上。
8.根据权利要求1所述的三维安装半导体装置，其中，上述半导体芯片被接合线连接或者倒装芯片连接于上述一方的主面上的连接焊盘部。
9.根据权利要求1所述的三维安装半导体装置，其中，上述各种电路元件被层叠为3层以上的多层。
10.一种三维安装半导体装置的制造方法，该三维安装半导体装置在布线基板的两面安装有包含半导体芯片的各种电路元件，其中，
上述布线基板在一方的主面以及另一方的主面各自具有用于连接各种电路元件的连接焊盘部及对该连接焊盘部进行连接的布线图案，并且具有用于将一方以及另一方的主面各自的连接焊盘部以及布线图案相互连接的贯通布线部，
形成将被支撑部支撑的多个柱电极整体地形成的柱电极部件，
在上述布线基板的一方的主面，安装半导体芯片并与该一方的主面上的连接焊盘部连接，并且，在该布线图案的规定的位置，固定并电连接上述柱电极部件，在树脂密封后，剥离上述支撑部并使上述柱电极端面露出，
在上述布线基板的另一方的主面，在该另一方的主面上的连接焊盘部，配置并连接其它的电路元件。
11.根据权利要求10所述的三维安装半导体装置的制造方法，其中，上述柱电极部件具有与上述柱电极连接的布线，在树脂密封后，在剥离上述支撑部时使上述布线露出。
12.根据权利要求11所述的三维安装半导体装置的制造方法，其中，上述柱电极以及与其连接的布线在绝缘基材上形成，该绝缘基材通过可剥离的粘接剂粘贴在上述支撑部上，将在树脂密封后通过剥离上述支撑部而露出的绝缘基材作为保护膜进行使用，并且在该保护膜开孔，设置与通过开口露出的上述布线连接的外部电极。
13.根据权利要求12所述的三维安装半导体装置的制造方法，其中，上述绝缘基材是玻璃环氧树脂基板及覆盖在其上形成的布线的阻焊剂，将在树脂密封后通过剥离上述支撑部而露出的阻焊剂作为保护膜进行使用，并且设置通过在该保护膜开通的开口与上述布线连接的外部电极。
14.根据权利要求10所述的三维安装半导体装置的制造方法，其中，在上述布线基板的另一方的主面，树脂密封了上述其它的电路元件。
15.根据权利要求10所述的三维安装半导体装置的制造方法，其中，在上述布线基板的一方的主面，上述树脂密封以使上述柱电极在侧面露出的方式进行。
16.根据权利要求15所述的三维安装半导体装置的制造方法，其中，上述在侧面露出的柱电极以在其侧面制作弯月面的方式形成填锡，并被软钎焊到母基板的布线图案上。
17.根据权利要求10所述的三维安装半导体装置的制造方法，其中，上述半导体芯片被接合线连接或者倒装芯片连接于上述一方的主面上的连接焊盘部。
18.根据权利要求10所述的三维安装半导体装置的制造方法，其中，上述各种电路元件被层叠为3层以上的多层。
19.一种三维安装半导体装置，在布线基板的两面安装有包含半导体芯片的各种电路元件，其中，
上述布线基板在一方的主面以及另一方的主面各自具有用于连接各种电路元件的连接焊盘部及对该连接焊盘部进行连接的布线图案，并且具有用于将一方以及另一方的主面各自的连接焊盘部以及布线图案相互连接的贯通布线部，
在上述布线基板的一方的主面，安装半导体芯片并与该一方的主面上的连接焊盘部连接，并且，在该布线图案的规定的位置，将在背面具备绝缘基材与布线的多个柱电极电连接，以使其柱电极端面露出的方式进行树脂密封，
在上述布线基板的另一方的主面，在该另一方的主面上的连接焊盘部，配置并连接其它的电路元件。
20.根据权利要求19所述的三维安装半导体装置，其中，上述绝缘基材是玻璃环氧树脂基板及覆盖在其上形成的布线的阻焊剂，将该阻焊剂作为保护膜进行使用，并且设置通过在该保护膜上开通的开口与上述布线连接的外部电极。
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US8415789B2 (en) 2013-04-09
JPWO2009136496A1 (ja) 2011-09-08
WO2009136496A1 (ja) 2009-11-12
US20110062584A1 (en) 2011-03-17
KR101193416B1 (ko) 2012-10-24
CN102017142A (zh) 2011-04-13

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