CN101236973B - 半导体装置以及其制造方法 - Google Patents

半导体装置以及其制造方法 Download PDF

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Publication number
CN101236973B
CN101236973B CN2008100044945A CN200810004494A CN101236973B CN 101236973 B CN101236973 B CN 101236973B CN 2008100044945 A CN2008100044945 A CN 2008100044945A CN 200810004494 A CN200810004494 A CN 200810004494A CN 101236973 B CN101236973 B CN 101236973B
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CN
China
Prior art keywords
film
semiconductor layer
gate insulating
doped semiconductor
insulating film
Prior art date
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Expired - Fee Related
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CN2008100044945A
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English (en)
Chinese (zh)
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CN101236973A (zh
Inventor
细谷邦雄
藤川最史
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Publication of CN101236973A publication Critical patent/CN101236973A/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0221—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/431—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having different compositions, shapes, layouts or thicknesses of gate insulators in different TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

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  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
CN2008100044945A 2007-01-30 2008-01-30 半导体装置以及其制造方法 Expired - Fee Related CN101236973B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007019662 2007-01-30
JP2007-019662 2007-01-30
JP2007019662 2007-01-30

Publications (2)

Publication Number Publication Date
CN101236973A CN101236973A (zh) 2008-08-06
CN101236973B true CN101236973B (zh) 2012-12-12

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CN2008100044945A Expired - Fee Related CN101236973B (zh) 2007-01-30 2008-01-30 半导体装置以及其制造方法

Country Status (6)

Country Link
US (2) US7777224B2 (enExample)
EP (1) EP1953813A3 (enExample)
JP (1) JP5216339B2 (enExample)
KR (1) KR101425845B1 (enExample)
CN (1) CN101236973B (enExample)
TW (1) TWI424531B (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI501319B (zh) * 2008-12-26 2015-09-21 半導體能源研究所股份有限公司 半導體裝置及其製造方法
TWI556323B (zh) * 2009-03-13 2016-11-01 半導體能源研究所股份有限公司 半導體裝置及該半導體裝置的製造方法
KR20220100086A (ko) 2009-07-10 2022-07-14 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 제조 방법
CN101789398B (zh) * 2010-03-09 2012-08-22 友达光电股份有限公司 半导体元件的制造方法
JP6072858B2 (ja) * 2015-06-22 2017-02-01 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
KR20220079442A (ko) * 2020-12-04 2022-06-13 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시 장치 및 표시 장치의 제작 방법
CN117976675A (zh) * 2022-10-26 2024-05-03 瀚宇彩晶股份有限公司 反射式显示装置以及其制造方法

Citations (1)

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US6228721B1 (en) * 2000-06-26 2001-05-08 Advanced Micro Devices, Inc. Fabrication of metal oxide structures with different thicknesses on a semiconductor substrate

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JPS6037313A (ja) * 1983-08-10 1985-02-26 Kenji Ishikura コンクリ−トブロツク
US5821563A (en) 1990-12-25 1998-10-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device free from reverse leakage and throw leakage
JPH0637313A (ja) 1992-07-16 1994-02-10 Hitachi Ltd 薄膜半導体装置とその製造方法
JP3025385B2 (ja) * 1993-01-21 2000-03-27 シャープ株式会社 半導体装置
JPH07131030A (ja) * 1993-11-05 1995-05-19 Sony Corp 表示用薄膜半導体装置及びその製造方法
JP3504025B2 (ja) 1995-06-06 2004-03-08 三菱電機株式会社 半導体装置およびその製造方法
DE69717174T2 (de) * 1996-03-19 2003-04-03 Exedy Corp., Neyagawa Vorrichtung für die Bewegungsbegrenzung einer Multilamellen- Reibungskupplung
JP3593212B2 (ja) 1996-04-27 2004-11-24 株式会社半導体エネルギー研究所 表示装置
TW334581B (en) 1996-06-04 1998-06-21 Handotai Energy Kenkyusho Kk Semiconductor integrated circuit and fabrication method thereof
JP3607016B2 (ja) 1996-10-02 2005-01-05 株式会社半導体エネルギー研究所 半導体装置およびその作製方法、並びに携帯型の情報処理端末、ヘッドマウントディスプレイ、ナビゲーションシステム、携帯電話、カメラおよびプロジェクター
JPH10256554A (ja) * 1997-03-13 1998-09-25 Toshiba Corp 薄膜トランジスタ及びその製造方法
JP3943245B2 (ja) 1997-09-20 2007-07-11 株式会社半導体エネルギー研究所 半導体装置
JP3592535B2 (ja) * 1998-07-16 2004-11-24 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6261881B1 (en) 1998-08-21 2001-07-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device provided with semiconductor circuit consisting of semiconductor element and method of manufacturing the same
JP4493741B2 (ja) 1998-09-04 2010-06-30 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7022556B1 (en) 1998-11-11 2006-04-04 Semiconductor Energy Laboratory Co., Ltd. Exposure device, exposure method and method of manufacturing semiconductor device
DE69942442D1 (de) 1999-01-11 2010-07-15 Semiconductor Energy Lab Halbleiteranordnung mit Treiber-TFT und Pixel-TFT auf einem Substrat
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JP4118484B2 (ja) 2000-03-06 2008-07-16 株式会社半導体エネルギー研究所 半導体装置の作製方法
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JP4118485B2 (ja) 2000-03-13 2008-07-16 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4683688B2 (ja) 2000-03-16 2011-05-18 株式会社半導体エネルギー研究所 液晶表示装置の作製方法
JP4785229B2 (ja) 2000-05-09 2011-10-05 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4678933B2 (ja) 2000-11-07 2011-04-27 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2003109773A (ja) 2001-07-27 2003-04-11 Semiconductor Energy Lab Co Ltd 発光装置、半導体装置およびそれらの作製方法
JP4737971B2 (ja) * 2003-11-14 2011-08-03 株式会社半導体エネルギー研究所 液晶表示装置および液晶表示装置の作製方法
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JP4889968B2 (ja) 2005-07-05 2012-03-07 ソニー株式会社 電力線搬送通信システム、電力線搬送通信方法、通信装置

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6228721B1 (en) * 2000-06-26 2001-05-08 Advanced Micro Devices, Inc. Fabrication of metal oxide structures with different thicknesses on a semiconductor substrate

Non-Patent Citations (3)

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JP平6-37313A 1994.02.10
JP特开2005-191212A 2005.07.04
JP特开2005-347538A 2005.12.15

Also Published As

Publication number Publication date
JP5216339B2 (ja) 2013-06-19
CN101236973A (zh) 2008-08-06
EP1953813A2 (en) 2008-08-06
US7777224B2 (en) 2010-08-17
EP1953813A3 (en) 2017-09-06
KR101425845B1 (ko) 2014-08-05
US20080283835A1 (en) 2008-11-20
TWI424531B (zh) 2014-01-21
US20100304538A1 (en) 2010-12-02
JP2008211195A (ja) 2008-09-11
KR20080071521A (ko) 2008-08-04
TW200849475A (en) 2008-12-16
US8273614B2 (en) 2012-09-25

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