CN100452409C - 在包括soi和体硅区域的半导体器件中sti的形成 - Google Patents

在包括soi和体硅区域的半导体器件中sti的形成 Download PDF

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Publication number
CN100452409C
CN100452409C CNB2005800153951A CN200580015395A CN100452409C CN 100452409 C CN100452409 C CN 100452409C CN B2005800153951 A CNB2005800153951 A CN B2005800153951A CN 200580015395 A CN200580015395 A CN 200580015395A CN 100452409 C CN100452409 C CN 100452409C
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China
Prior art keywords
silicon
etching
region
trench isolation
insulator
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Expired - Fee Related
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CNB2005800153951A
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English (en)
Chinese (zh)
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CN1954435A (zh
Inventor
M·施泰格瓦尔特
M·库马尔
H·L·霍
D·多布任斯基
J·法尔特迈尔
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Core Usa Second LLC
GlobalFoundries Inc
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International Business Machines Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76283—Lateral isolation by refilling of trenches with dielectric material

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Thin Film Transistor (AREA)
CNB2005800153951A 2004-06-16 2005-06-06 在包括soi和体硅区域的半导体器件中sti的形成 Expired - Fee Related CN100452409C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/710,060 2004-06-16
US10/710,060 US7118986B2 (en) 2004-06-16 2004-06-16 STI formation in semiconductor device including SOI and bulk silicon regions

Publications (2)

Publication Number Publication Date
CN1954435A CN1954435A (zh) 2007-04-25
CN100452409C true CN100452409C (zh) 2009-01-14

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CNB2005800153951A Expired - Fee Related CN100452409C (zh) 2004-06-16 2005-06-06 在包括soi和体硅区域的半导体器件中sti的形成

Country Status (6)

Country Link
US (2) US7118986B2 (enExample)
EP (1) EP1782473A4 (enExample)
JP (1) JP5004791B2 (enExample)
CN (1) CN100452409C (enExample)
TW (1) TWI405298B (enExample)
WO (1) WO2006009613A2 (enExample)

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CN110416152A (zh) * 2019-07-26 2019-11-05 上海华虹宏力半导体制造有限公司 深槽隔离结构及工艺方法

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US8077536B2 (en) 2008-08-05 2011-12-13 Zeno Semiconductor, Inc. Method of operating semiconductor memory device with floating body transistor using silicon controlled rectifier principle
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US10461084B2 (en) 2010-03-02 2019-10-29 Zeno Semiconductor, Inc. Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
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US9922981B2 (en) 2010-03-02 2018-03-20 Zeno Semiconductor, Inc. Compact semiconductor memory device having reduced number of contacts, methods of operating and methods of making
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US9025358B2 (en) 2011-10-13 2015-05-05 Zeno Semiconductor Inc Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating
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KR102059884B1 (ko) 2012-02-16 2019-12-27 제노 세미컨덕터, 인크. 두개의 트랜지스터로 구성된 메모리셀과 그 동작 방법
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Also Published As

Publication number Publication date
US20050282392A1 (en) 2005-12-22
WO2006009613A3 (en) 2006-04-13
JP2008503872A (ja) 2008-02-07
US7118986B2 (en) 2006-10-10
US7394131B2 (en) 2008-07-01
WO2006009613A2 (en) 2006-01-26
CN1954435A (zh) 2007-04-25
JP5004791B2 (ja) 2012-08-22
TWI405298B (zh) 2013-08-11
EP1782473A4 (en) 2010-03-17
US20060244093A1 (en) 2006-11-02
EP1782473A2 (en) 2007-05-09
TW200601489A (en) 2006-01-01

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