CN100448026C - 半导体结构及其形成方法 - Google Patents

半导体结构及其形成方法 Download PDF

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Publication number
CN100448026C
CN100448026C CNB2005100998038A CN200510099803A CN100448026C CN 100448026 C CN100448026 C CN 100448026C CN B2005100998038 A CNB2005100998038 A CN B2005100998038A CN 200510099803 A CN200510099803 A CN 200510099803A CN 100448026 C CN100448026 C CN 100448026C
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China
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bury
source
regions
buried
area
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Chinese (zh)
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CN1753188A (zh
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赫赛恩·I·哈纳菲
爱德华·J·诺瓦克
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International Business Machines Corp
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International Business Machines Corp
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213Channel regions of field-effect devices
    • H10D62/221Channel regions of field-effect devices of FETs
    • H10D62/235Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/314Channel regions of field-effect devices of FETs of IGFETs having vertical doping variations 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0275Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/601Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/608Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having non-planar bodies, e.g. having recessed gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113Isolations within a component, i.e. internal isolations
    • H10D62/115Dielectric isolations, e.g. air gaps
    • H10D62/116Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
  • Element Separation (AREA)
CNB2005100998038A 2004-09-20 2005-09-02 半导体结构及其形成方法 Expired - Fee Related CN100448026C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/711,450 US7271453B2 (en) 2004-09-20 2004-09-20 Buried biasing wells in FETS
US10/711,450 2004-09-20

Publications (2)

Publication Number Publication Date
CN1753188A CN1753188A (zh) 2006-03-29
CN100448026C true CN100448026C (zh) 2008-12-31

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Family Applications (1)

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CNB2005100998038A Expired - Fee Related CN100448026C (zh) 2004-09-20 2005-09-02 半导体结构及其形成方法

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US (2) US7271453B2 (enExample)
JP (1) JP5116224B2 (enExample)
CN (1) CN100448026C (enExample)

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US7091071B2 (en) * 2005-01-03 2006-08-15 Freescale Semiconductor, Inc. Semiconductor fabrication process including recessed source/drain regions in an SOI wafer
KR20090004147A (ko) * 2007-07-06 2009-01-12 삼성전자주식회사 반도체 소자 및 그 형성 방법
CN102254824B (zh) * 2010-05-20 2013-10-02 中国科学院微电子研究所 半导体器件及其形成方法
CN102479709B (zh) * 2010-11-24 2015-03-11 中芯国际集成电路制造(北京)有限公司 晶体管及其制作方法
CN102623337B (zh) * 2011-01-30 2014-12-03 中芯国际集成电路制造(北京)有限公司 晶体管及其制作方法
CN102693915B (zh) * 2011-03-22 2015-02-18 中芯国际集成电路制造(上海)有限公司 一种mos晶体管的制造方法
JP5915181B2 (ja) * 2011-04-05 2016-05-11 富士通セミコンダクター株式会社 半導体装置およびその製造方法
US8629016B1 (en) 2011-07-26 2014-01-14 Suvolta, Inc. Multiple transistor types formed in a common epitaxial layer by differential out-diffusion from a doped underlayer
US9070477B1 (en) 2012-12-12 2015-06-30 Mie Fujitsu Semiconductor Limited Bit interleaved low voltage static random access memory (SRAM) and related methods
WO2015042049A1 (en) 2013-09-17 2015-03-26 Wave Semiconductor, Inc. Multi-threshold circuitry based on silicon-on-insulator technology
WO2015152904A1 (en) 2014-04-01 2015-10-08 Empire Technology Development Llc Vertical transistor with flashover protection
US9406750B2 (en) 2014-11-19 2016-08-02 Empire Technology Development Llc Output capacitance reduction in power transistors
US11245020B2 (en) * 2017-01-04 2022-02-08 International Business Machines Corporation Gate-all-around field effect transistor having multiple threshold voltages
US10128347B2 (en) 2017-01-04 2018-11-13 International Business Machines Corporation Gate-all-around field effect transistor having multiple threshold voltages
CN110911407B (zh) * 2018-09-18 2025-03-28 长鑫存储技术有限公司 半导体器件及其形成方法
CN117529102B (zh) * 2024-01-03 2024-05-14 长鑫新桥存储技术有限公司 半导体结构及其制备方法

Citations (3)

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US4862232A (en) * 1986-09-22 1989-08-29 General Motors Corporation Transistor structure for high temperature logic circuits with insulation around source and drain regions
CN1407630A (zh) * 2001-08-10 2003-04-02 三洋电机株式会社 半导体器件及其制造方法
CN1440071A (zh) * 2002-02-19 2003-09-03 精工电子有限公司 半导体器件及其制造方法

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JPH0616559B2 (ja) * 1985-11-18 1994-03-02 日本電気株式会社 半導体装置の製造方法
US4885618A (en) * 1986-03-24 1989-12-05 General Motors Corporation Insulated gate FET having a buried insulating barrier
JP2537936B2 (ja) * 1986-04-23 1996-09-25 エイ・ティ・アンド・ティ・コーポレーション 半導体デバイスの製作プロセス
JP2817285B2 (ja) * 1989-11-29 1998-10-30 日本電気株式会社 電界効果型トランジスタ
US5290714A (en) * 1990-01-12 1994-03-01 Hitachi, Ltd. Method of forming semiconductor device including a CMOS structure having double-doped channel regions
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JP3060948B2 (ja) * 1996-06-03 2000-07-10 日本電気株式会社 半導体装置の製造方法
KR100226794B1 (ko) * 1996-06-10 1999-10-15 김영환 모스펫 제조방법
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Patent Citations (3)

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US4862232A (en) * 1986-09-22 1989-08-29 General Motors Corporation Transistor structure for high temperature logic circuits with insulation around source and drain regions
CN1407630A (zh) * 2001-08-10 2003-04-02 三洋电机株式会社 半导体器件及其制造方法
CN1440071A (zh) * 2002-02-19 2003-09-03 精工电子有限公司 半导体器件及其制造方法

Also Published As

Publication number Publication date
US7732286B2 (en) 2010-06-08
US7271453B2 (en) 2007-09-18
US20070293010A1 (en) 2007-12-20
JP5116224B2 (ja) 2013-01-09
JP2006093694A (ja) 2006-04-06
US20060060918A1 (en) 2006-03-23
CN1753188A (zh) 2006-03-29

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