CN100353538C - 带有倒焊晶片的无引线半导体封装结构及制造方法 - Google Patents
带有倒焊晶片的无引线半导体封装结构及制造方法 Download PDFInfo
- Publication number
- CN100353538C CN100353538C CNB031785565A CN03178556A CN100353538C CN 100353538 C CN100353538 C CN 100353538C CN B031785565 A CNB031785565 A CN B031785565A CN 03178556 A CN03178556 A CN 03178556A CN 100353538 C CN100353538 C CN 100353538C
- Authority
- CN
- China
- Prior art keywords
- semiconductor chip
- lead frame
- package according
- recessed
- chip package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
- H01L23/49551—Cross section geometry characterised by bent parts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Geometry (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
Claims (17)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/314,716 | 2002-12-09 | ||
US10/314,716 US20040108580A1 (en) | 2002-12-09 | 2002-12-09 | Leadless semiconductor packaging structure with inverted flip chip and methods of manufacture |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1507041A CN1507041A (zh) | 2004-06-23 |
CN100353538C true CN100353538C (zh) | 2007-12-05 |
Family
ID=32468545
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB031785565A Ceased CN100353538C (zh) | 2002-12-09 | 2003-07-15 | 带有倒焊晶片的无引线半导体封装结构及制造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US20040108580A1 (zh) |
CN (1) | CN100353538C (zh) |
AU (1) | AU2003253569A1 (zh) |
TW (1) | TWI321835B (zh) |
WO (1) | WO2004053985A1 (zh) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005117009A (ja) * | 2003-09-17 | 2005-04-28 | Denso Corp | 半導体装置およびその製造方法 |
WO2006068641A1 (en) * | 2004-12-20 | 2006-06-29 | Semiconductor Components Industries, L.L.C. | Electronic package having down-set leads and method |
US7439100B2 (en) * | 2005-08-18 | 2008-10-21 | Semiconductor Components Industries, L.L.C. | Encapsulated chip scale package having flip-chip on lead frame structure and method |
JP2008160017A (ja) * | 2006-12-26 | 2008-07-10 | Toshiba Corp | 半導体パッケージ及びその製造方法 |
GB2451077A (en) * | 2007-07-17 | 2009-01-21 | Zetex Semiconductors Plc | Semiconductor chip package |
US7855444B2 (en) * | 2008-03-25 | 2010-12-21 | Stats Chippac Ltd. | Mountable integrated circuit package system with substrate |
US7785929B2 (en) * | 2008-03-25 | 2010-08-31 | Stats Chippac Ltd. | Mountable integrated circuit package system with exposed external interconnects |
US8933555B2 (en) * | 2009-05-15 | 2015-01-13 | Infineon Technologies Ag | Semiconductor chip package |
CN102194774A (zh) * | 2010-03-19 | 2011-09-21 | 立锜科技股份有限公司 | 散热型覆晶封装结构及其应用 |
US8786068B1 (en) * | 2011-07-05 | 2014-07-22 | International Rectifier Corporation | Packaging of electronic circuitry |
TWI562295B (en) | 2012-07-31 | 2016-12-11 | Mediatek Inc | Semiconductor package and method for fabricating base for semiconductor package |
US9177899B2 (en) | 2012-07-31 | 2015-11-03 | Mediatek Inc. | Semiconductor package and method for fabricating base for semiconductor package |
US10991669B2 (en) | 2012-07-31 | 2021-04-27 | Mediatek Inc. | Semiconductor package using flip-chip technology |
US8669655B2 (en) * | 2012-08-02 | 2014-03-11 | Infineon Technologies Ag | Chip package and a method for manufacturing a chip package |
ITMI20130473A1 (it) * | 2013-03-28 | 2014-09-29 | St Microelectronics Srl | Metodo per fabbricare dispositivi elettronici |
US20140332940A1 (en) * | 2013-05-07 | 2014-11-13 | Sts Semiconductor & Telecommunications Co., Ltd. | Quad Flat No-Lead Integrated Circuit Package and Method for Manufacturing the Package |
CN105097727A (zh) * | 2015-06-23 | 2015-11-25 | 苏州日月新半导体有限公司 | 半导体封装结构及其封装方法 |
TWI625833B (zh) * | 2016-02-25 | 2018-06-01 | 台達電子工業股份有限公司 | 封裝結構 |
CN108933115B (zh) * | 2017-05-22 | 2023-11-14 | 德阳帛汉电子有限公司 | 线圈封装模块 |
CN110828407B (zh) * | 2019-11-19 | 2021-08-24 | 华进半导体封装先导技术研发中心有限公司 | 一种SiP封装结构及其制备方法 |
CN110957285A (zh) * | 2019-12-04 | 2020-04-03 | 苏州日月新半导体有限公司 | 集成电路封装体及其制造方法 |
CN111146099B (zh) * | 2019-12-31 | 2021-12-24 | 中芯集成电路(宁波)有限公司 | 半导体结构及其制作方法 |
CN113838839B (zh) * | 2020-06-23 | 2024-07-19 | 光宝科技新加坡私人有限公司 | 感测组件封装结构及其封装方法 |
CN114023657A (zh) * | 2020-12-05 | 2022-02-08 | 福建福顺半导体制造有限公司 | 一种半导体传感器反向封装工艺 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5559305A (en) * | 1993-08-27 | 1996-09-24 | Samsung Electronics Co., Ltd. | Semiconductor package having adjacently arranged semiconductor chips |
US5587606A (en) * | 1993-03-19 | 1996-12-24 | Fujitsu Miyagi Electronics Ltd. | Lead frame having deflectable and thereby precisely removed tie bars |
CN1246963A (zh) * | 1997-02-10 | 2000-03-08 | 松下电子工业株式会社 | 树脂封装型半导体装置及其制造方法 |
CN1381892A (zh) * | 2001-04-16 | 2002-11-27 | 矽品精密工业股份有限公司 | 交叉堆叠式双芯片封装装置及制造方法 |
Family Cites Families (24)
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US4209355A (en) * | 1978-07-26 | 1980-06-24 | National Semiconductor Corporation | Manufacture of bumped composite tape for automatic gang bonding of semiconductor devices |
KR970011649B1 (ko) * | 1988-03-10 | 1997-07-12 | 가부시끼가이샤 히다찌세이사꾸쇼 | 반도체 장치의 제조방법 |
JP2771203B2 (ja) * | 1988-12-27 | 1998-07-02 | 日本電気株式会社 | 集積回路実装用テープ |
US5198367A (en) * | 1989-06-09 | 1993-03-30 | Masuo Aizawa | Homogeneous amperometric immunoassay |
US5122858A (en) * | 1990-09-10 | 1992-06-16 | Olin Corporation | Lead frame having polymer coated surface portions |
US5244707A (en) * | 1992-01-10 | 1993-09-14 | Shores A Andrew | Enclosure for electronic devices |
EP0566872A3 (en) * | 1992-04-21 | 1994-05-11 | Motorola Inc | A thermally enhanced semiconductor device and method for making the same |
US5604376A (en) * | 1994-06-30 | 1997-02-18 | Digital Equipment Corporation | Paddleless molded plastic semiconductor chip package |
US5834831A (en) * | 1994-08-16 | 1998-11-10 | Fujitsu Limited | Semiconductor device with improved heat dissipation efficiency |
KR100209782B1 (ko) * | 1994-08-30 | 1999-07-15 | 가나이 쓰도무 | 반도체 장치 |
KR100248035B1 (ko) * | 1994-09-29 | 2000-03-15 | 니시무로 타이죠 | 반도체 패키지 |
DE19626087C2 (de) * | 1996-06-28 | 1998-06-10 | Siemens Ag | Integrierte Halbleiterschaltung mit Leiterrahmen und Gehäuse |
US5986334A (en) * | 1996-10-04 | 1999-11-16 | Anam Industrial Co., Ltd. | Semiconductor package having light, thin, simple and compact structure |
US5973389A (en) * | 1997-04-22 | 1999-10-26 | International Business Machines Corporation | Semiconductor chip carrier assembly |
US5914529A (en) * | 1998-02-20 | 1999-06-22 | Micron Technology, Inc. | Bus bar structure on lead frame of semiconductor device package |
JPH11289023A (ja) * | 1998-04-02 | 1999-10-19 | Oki Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US6194777B1 (en) * | 1998-06-27 | 2001-02-27 | Texas Instruments Incorporated | Leadframes with selective palladium plating |
SG88741A1 (en) * | 1998-09-16 | 2002-05-21 | Texas Instr Singapore Pte Ltd | Multichip assembly semiconductor |
CN1190840C (zh) * | 1999-04-08 | 2005-02-23 | 新光电气工业株式会社 | 半导体装置用引线框架 |
TW417220B (en) * | 1999-07-23 | 2001-01-01 | Advanced Semiconductor Eng | Packaging structure and method of semiconductor chip |
US20020100165A1 (en) * | 2000-02-14 | 2002-08-01 | Amkor Technology, Inc. | Method of forming an integrated circuit device package using a temporary substrate |
KR100426330B1 (ko) * | 2001-07-16 | 2004-04-08 | 삼성전자주식회사 | 지지 테이프를 이용한 초박형 반도체 패키지 소자 |
US6433413B1 (en) * | 2001-08-17 | 2002-08-13 | Micron Technology, Inc. | Three-dimensional multichip module |
US6784525B2 (en) * | 2002-10-29 | 2004-08-31 | Micron Technology, Inc. | Semiconductor component having multi layered leadframe |
-
2002
- 2002-12-09 US US10/314,716 patent/US20040108580A1/en not_active Abandoned
-
2003
- 2003-07-10 AU AU2003253569A patent/AU2003253569A1/en not_active Abandoned
- 2003-07-10 WO PCT/SG2003/000166 patent/WO2004053985A1/en not_active Application Discontinuation
- 2003-07-15 CN CNB031785565A patent/CN100353538C/zh not_active Ceased
- 2003-08-06 TW TW092121585A patent/TWI321835B/zh not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5587606A (en) * | 1993-03-19 | 1996-12-24 | Fujitsu Miyagi Electronics Ltd. | Lead frame having deflectable and thereby precisely removed tie bars |
US5559305A (en) * | 1993-08-27 | 1996-09-24 | Samsung Electronics Co., Ltd. | Semiconductor package having adjacently arranged semiconductor chips |
CN1246963A (zh) * | 1997-02-10 | 2000-03-08 | 松下电子工业株式会社 | 树脂封装型半导体装置及其制造方法 |
CN1381892A (zh) * | 2001-04-16 | 2002-11-27 | 矽品精密工业股份有限公司 | 交叉堆叠式双芯片封装装置及制造方法 |
Also Published As
Publication number | Publication date |
---|---|
AU2003253569A1 (en) | 2004-06-30 |
US20040108580A1 (en) | 2004-06-10 |
CN1507041A (zh) | 2004-06-23 |
TW200410380A (en) | 2004-06-16 |
TWI321835B (en) | 2010-03-11 |
WO2004053985A1 (en) | 2004-06-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20090306 Address after: 3 Singapore Marsiling Industrial Zone Patentee after: Advanpack Solutions Pte Ltd. Address before: 54, 4 North Road, Longgang, Singapore Patentee before: Advanpack Solutions Pte. Ltd. |
|
ASS | Succession or assignment of patent right |
Owner name: XIANJIN PACKING TECHNOLOGY PRIVATE CO., LTD. Free format text: FORMER OWNER: ADVANCED PACKAGING SOLUTIONS PRIVATE LTD. Effective date: 20090306 |
|
IW01 | Full invalidation of patent right | ||
IW01 | Full invalidation of patent right |
Decision date of declaring invalidation: 20190319 Decision number of declaring invalidation: 39401 Granted publication date: 20071205 |