BR112021022417A2 - Dispositivos de memória verticais - Google Patents
Dispositivos de memória verticaisInfo
- Publication number
- BR112021022417A2 BR112021022417A2 BR112021022417A BR112021022417A BR112021022417A2 BR 112021022417 A2 BR112021022417 A2 BR 112021022417A2 BR 112021022417 A BR112021022417 A BR 112021022417A BR 112021022417 A BR112021022417 A BR 112021022417A BR 112021022417 A2 BR112021022417 A2 BR 112021022417A2
- Authority
- BR
- Brazil
- Prior art keywords
- semiconductor device
- stack
- staircase
- substrate
- device includes
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 abstract 6
- 239000000758 substrate Substances 0.000 abstract 4
- 238000009413 insulation Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
- H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
- H01L23/5283—Cross-sectional geometry
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/50—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the boundary region between the core region and the peripheral circuit region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Abstract
dispositivos de memória verticais. a presente invenção refere-se a um dispositivo semicondutor. o dispositivo semicondutor inclui camadas de porta e camadas de isolamento que são empilhadas de maneira alternada ao longo de uma direção perpendicular a um substrato do dispositivo semicondutor e formam uma pilha sobre o substrato. o dispositivo semicondutor inclui um arranjo de estruturas de canal que são formadas em uma região de arranjo da pilha. além disso, o dispositivo semicondutor inclui uma primeira escadaria formada por uma primeira seção da pilha em uma região de conexão sobre o substrato, e uma segunda escadaria formada por uma segunda seção da pilha na região de conexão sobre o substrato. em adição, o dispositivo semicondutor inclui uma escadaria fictícia formada pela primeira seção da pilha e disposta entre a primeira escadaria e a segunda escadaria na região de conexão.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/CN2019/102332 WO2021035431A1 (en) | 2019-08-23 | 2019-08-23 | Vertical memory devices |
Publications (1)
Publication Number | Publication Date |
---|---|
BR112021022417A2 true BR112021022417A2 (pt) | 2022-03-08 |
Family
ID=69341845
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR112021022417A BR112021022417A2 (pt) | 2019-08-23 | 2019-08-23 | Dispositivos de memória verticais |
Country Status (10)
Country | Link |
---|---|
US (4) | US11171154B2 (pt) |
EP (1) | EP3953968B1 (pt) |
JP (1) | JP7412451B2 (pt) |
KR (2) | KR20240006088A (pt) |
CN (2) | CN112670289B (pt) |
AU (1) | AU2019464174B2 (pt) |
BR (1) | BR112021022417A2 (pt) |
SG (1) | SG11202112524SA (pt) |
TW (1) | TWI728685B (pt) |
WO (1) | WO2021035431A1 (pt) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20210010725A (ko) | 2019-07-18 | 2021-01-28 | 삼성전자주식회사 | 게이트 영역 및 절연 영역을 갖는 적층 구조물을 포함하는 반도체 소자 |
KR20210073143A (ko) * | 2019-12-10 | 2021-06-18 | 삼성전자주식회사 | 반도체 소자 |
WO2021163820A1 (en) * | 2020-02-17 | 2021-08-26 | Yangtze Memory Technologies Co., Ltd. | Multi-division staircase structure of three-dimensional memory device and method for forming the same |
WO2022021022A1 (en) * | 2020-07-27 | 2022-02-03 | Yangtze Memory Technologies Co., Ltd. | Staircase structures for word line contacts in three-dimensional memory |
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-
2019
- 2019-08-23 BR BR112021022417A patent/BR112021022417A2/pt unknown
- 2019-08-23 AU AU2019464174A patent/AU2019464174B2/en active Active
- 2019-08-23 SG SG11202112524SA patent/SG11202112524SA/en unknown
- 2019-08-23 EP EP19943654.4A patent/EP3953968B1/en active Active
- 2019-08-23 CN CN202011535848.6A patent/CN112670289B/zh active Active
- 2019-08-23 KR KR1020237044962A patent/KR20240006088A/ko not_active Application Discontinuation
- 2019-08-23 JP JP2021570493A patent/JP7412451B2/ja active Active
- 2019-08-23 KR KR1020217038759A patent/KR20220002528A/ko active Application Filing
- 2019-08-23 WO PCT/CN2019/102332 patent/WO2021035431A1/en unknown
- 2019-08-23 CN CN201980001779.XA patent/CN110770903B/zh active Active
- 2019-11-15 US US16/684,844 patent/US11171154B2/en active Active
-
2020
- 2020-02-06 TW TW109103689A patent/TWI728685B/zh active
-
2021
- 2021-09-21 US US17/448,307 patent/US11812614B2/en active Active
-
2023
- 2023-01-19 US US18/156,467 patent/US11864388B2/en active Active
- 2023-11-07 US US18/503,430 patent/US20240074197A1/en active Pending
Also Published As
Publication number | Publication date |
---|---|
WO2021035431A1 (en) | 2021-03-04 |
JP2022534730A (ja) | 2022-08-03 |
US20240074197A1 (en) | 2024-02-29 |
CN112670289B (zh) | 2023-12-08 |
US20220028887A1 (en) | 2022-01-27 |
SG11202112524SA (en) | 2021-12-30 |
US20210057442A1 (en) | 2021-02-25 |
US11864388B2 (en) | 2024-01-02 |
US11171154B2 (en) | 2021-11-09 |
TW202109646A (zh) | 2021-03-01 |
EP3953968A4 (en) | 2022-07-13 |
EP3953968B1 (en) | 2024-03-06 |
KR20240006088A (ko) | 2024-01-12 |
JP7412451B2 (ja) | 2024-01-12 |
CN112670289A (zh) | 2021-04-16 |
AU2019464174B2 (en) | 2022-06-23 |
AU2019464174A1 (en) | 2021-12-09 |
TWI728685B (zh) | 2021-05-21 |
KR20220002528A (ko) | 2022-01-06 |
CN110770903A (zh) | 2020-02-07 |
US11812614B2 (en) | 2023-11-07 |
US20230157026A1 (en) | 2023-05-18 |
EP3953968A1 (en) | 2022-02-16 |
CN110770903B (zh) | 2021-01-29 |
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