SG10201805238RA - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
SG10201805238RA
SG10201805238RA SG10201805238RA SG10201805238RA SG10201805238RA SG 10201805238R A SG10201805238R A SG 10201805238RA SG 10201805238R A SG10201805238R A SG 10201805238RA SG 10201805238R A SG10201805238R A SG 10201805238RA SG 10201805238R A SG10201805238R A SG 10201805238RA
Authority
SG
Singapore
Prior art keywords
regions
substrate
region
isolation regions
extending
Prior art date
Application number
SG10201805238RA
Inventor
Byoung Il Lee
Ji Mo Gu
Tak Lee
Jun Ho Cha
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of SG10201805238RA publication Critical patent/SG10201805238RA/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/41—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region of a memory region comprising a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/50—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the boundary region between the core region and the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/40—EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

A semiconductor device includes a substrate having first and second regions, a gate electrode stack having a plurality of gate electrodes vertically stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the substrate in the first region, and extending to have different lengths in a second direction 5 parallel to the upper surface of the substrate from the first region to the second region, first and second isolation regions extending in the second direction perpendicular to the first direction, while penetrating through the gate electrode stack on the substrate, in the first and second regions, string isolation regions disposed between the first and second isolation regions in the first region, and extending in the second direction while 10 penetrating through a portion of the gate electrode stack, and a plurality of auxiliary isolation regions disposed linearly with the string isolation regions in at least one of the first and second regions, and spaced apart from each other in the second direction. FIG. 3 15
SG10201805238RA 2017-06-21 2018-06-19 Semiconductor device SG10201805238RA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020170078530A KR102369654B1 (en) 2017-06-21 2017-06-21 Semiconductor devices

Publications (1)

Publication Number Publication Date
SG10201805238RA true SG10201805238RA (en) 2019-01-30

Family

ID=64693534

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201805238RA SG10201805238RA (en) 2017-06-21 2018-06-19 Semiconductor device

Country Status (4)

Country Link
US (2) US10515974B2 (en)
KR (1) KR102369654B1 (en)
CN (1) CN109103200B (en)
SG (1) SG10201805238RA (en)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102570901B1 (en) * 2017-11-20 2023-08-25 삼성전자주식회사 Three-dimensional semiconductor device
JP2019212689A (en) * 2018-05-31 2019-12-12 東芝メモリ株式会社 Semiconductor memory
KR102650421B1 (en) * 2019-02-12 2024-03-25 에스케이하이닉스 주식회사 Semiconductor device and manufacturing method thereof
KR20200132136A (en) 2019-05-15 2020-11-25 삼성전자주식회사 Three dimensional semiconductor memory device
JP7427686B2 (en) * 2019-06-17 2024-02-05 長江存儲科技有限責任公司 Three-dimensional memory device with support structure in gate line slit and method for forming the three-dimensional memory device
CN110914989B (en) 2019-06-17 2021-09-14 长江存储科技有限责任公司 Three-dimensional memory device without gate line gap and method for forming the same
CN115132735A (en) * 2019-10-10 2022-09-30 长江存储科技有限责任公司 Semiconductor structure and manufacturing method thereof
KR20210043101A (en) 2019-10-11 2021-04-21 삼성전자주식회사 Nonvolatile memory device and method for fabricating the same
KR20210051275A (en) * 2019-10-30 2021-05-10 삼성전자주식회사 Vertical memory devices
CN111146209A (en) * 2019-12-25 2020-05-12 长江存储科技有限责任公司 3D memory device and method of manufacturing the same
JP2022539396A (en) * 2020-01-17 2022-09-08 長江存儲科技有限責任公司 Memory device and method
CN111223872B (en) * 2020-01-17 2023-04-07 长江存储科技有限责任公司 3D NAND memory and manufacturing method thereof
JP7313486B2 (en) * 2020-01-21 2023-07-24 長江存儲科技有限責任公司 Three-dimensional memory device with adjacent source contact structures and method for forming same
KR20210122399A (en) 2020-03-31 2021-10-12 삼성전자주식회사 Semiconductor devices
TWI743836B (en) * 2020-04-30 2021-10-21 大陸商長江存儲科技有限責任公司 3d memory device and manufacturing method thereof
US11362142B2 (en) * 2020-05-18 2022-06-14 Micron Technology, Inc. Electronic apparatus with tiered stacks having conductive structures isolated by trenches, and related electronic systems and methods
KR20210142914A (en) * 2020-05-19 2021-11-26 에스케이하이닉스 주식회사 3 Dimensional Semiconductor Memory Device
KR20220059600A (en) * 2020-11-03 2022-05-10 삼성전자주식회사 Semiconductor device, method of manufacturing the same, and massive data storage system including the same

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101498676B1 (en) 2008-09-30 2015-03-09 삼성전자주식회사 3-Dimensional Semiconductor Device
US9324866B2 (en) * 2012-01-23 2016-04-26 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for transistor with line end extension
JP6140400B2 (en) 2011-07-08 2017-05-31 エスケーハイニックス株式会社ＳＫ ｈｙｎｉｘ Ｉｎｃ． Semiconductor device and manufacturing method thereof
KR101936752B1 (en) 2012-05-29 2019-01-10 삼성전자주식회사 Semiconductor device
KR20140063147A (en) 2012-11-16 2014-05-27 에스케이하이닉스 주식회사 Semiconductor device and method for manufacturing the same
KR102045288B1 (en) 2013-01-17 2019-11-15 삼성전자주식회사 Vertical type semiconductor device
KR102074982B1 (en) 2013-04-09 2020-02-10 에스케이하이닉스 주식회사 Nonvolatile memory device and method for fabricating the same
KR20140137632A (en) 2013-05-23 2014-12-03 에스케이하이닉스 주식회사 Semiconductor device
KR102161814B1 (en) 2013-11-19 2020-10-06 삼성전자주식회사 Vertical memory devices and methods of manufacturing the same
US9449983B2 (en) 2013-12-19 2016-09-20 Sandisk Technologies Llc Three dimensional NAND device with channel located on three sides of lower select gate and method of making thereof
KR102128465B1 (en) * 2014-01-03 2020-07-09 삼성전자주식회사 Vertical structure non-volatile memory device
KR102094470B1 (en) * 2014-04-08 2020-03-27 삼성전자주식회사 Semiconductor Device and Method of Fabricating the Same
KR20150116995A (en) 2014-04-09 2015-10-19 삼성전자주식회사 Vertical memory devices
KR20150139255A (en) 2014-06-03 2015-12-11 에스케이하이닉스 주식회사 Semiconductor device and method of manufacturing the same
CN104022120B (en) * 2014-06-23 2018-03-30 中国科学院微电子研究所 Three-dimensional semiconductor device and method for manufacturing the same
KR102150253B1 (en) 2014-06-24 2020-09-02 삼성전자주식회사 Semiconductor device
KR102239602B1 (en) * 2014-08-12 2021-04-14 삼성전자주식회사 Semiconductor Device and Method of fabricating the same
KR102188501B1 (en) * 2014-09-02 2020-12-09 삼성전자주식회사 Semiconductor device
US9425205B2 (en) 2014-09-12 2016-08-23 Kabushiki Kaisha Toshiba Semiconductor memory device
US9331091B1 (en) 2014-09-24 2016-05-03 SanDisk Technologies, Inc. 3D NAND memory with socketed floating gate cells and process therefor
KR102344876B1 (en) * 2015-03-10 2021-12-30 삼성전자주식회사 Semiconductor devices and methods of manufacturing the same
US9859297B2 (en) 2015-03-10 2018-01-02 Samsung Electronics Co., Ltd. Semiconductor devices and methods of manufacturing the same
US9508730B2 (en) 2015-03-11 2016-11-29 SK Hynix Inc. Semiconductor device and manufacturing method thereof
US9397043B1 (en) 2015-03-27 2016-07-19 Kabushiki Kaisha Toshiba Semiconductor memory device
KR102461150B1 (en) * 2015-09-18 2022-11-01 삼성전자주식회사 Three dimensional semiconductor device
US9419013B1 (en) * 2015-10-08 2016-08-16 Samsung Electronics Co., Ltd. Semiconductor device and method of manufacturing the same
US9704878B2 (en) * 2015-10-08 2017-07-11 Samsung Electronics Co., Ltd. Nonvolatile memory devices and methods of forming same
CN106876391B (en) 2017-03-07 2018-11-13 长江存储科技有限责任公司 A kind of groove domain structure, semiconductor devices and preparation method thereof
CN106876397B (en) 2017-03-07 2020-05-26 长江存储科技有限责任公司 Three-dimensional memory and forming method thereof

Also Published As

Publication number Publication date
US20180374862A1 (en) 2018-12-27
CN109103200B (en) 2023-10-17
KR20180138380A (en) 2018-12-31
US10672781B2 (en) 2020-06-02
KR102369654B1 (en) 2022-03-03
CN109103200A (en) 2018-12-28
US20200144277A1 (en) 2020-05-07
US10515974B2 (en) 2019-12-24

Similar Documents

Publication Publication Date Title
SG10201805238RA (en) Semiconductor device
SG10201805477YA (en) Semiconductor device
SG10201805116YA (en) Semiconductor devices and manufacturing methods thereof
SG10201805060XA (en) Semiconductor device and method of manufacturing the same
SG10201805010VA (en) Vertical-Type Memory Device
SG10201804182TA (en) Three-dimensional semiconductor device
SG10201804989UA (en) Vertical Memory Device
EP2963688A3 (en) Semiconductor device with a vertical channel
JP2016225614A5 (en)
SG10201803196YA (en) Semiconductor device and method for fabricating the same
SG10201804984VA (en) Semiconductor devices
JP2014225713A5 (en)
EP2846358A3 (en) Semiconductor device and manufacturing method thereof
SG10201804464UA (en) Three-dimensional semiconductor memory device and method of fabricating the same
SG10201805428XA (en) Three-dimensional semiconductor devices including vertical structures with varied spacing and methods of forming the same
SG10201805433WA (en) Semiconductor device and method of manufacturing the same
SG10201803186XA (en) Semiconductor device
EP2772940A3 (en) Heterostructure Power Transistor with AlSiN Passivation Layer
EP3343614A3 (en) Standard cell for vertical transistors
WO2013028685A3 (en) Semiconductor device structures including vertical transistor devices, arrays of vertical transistor devices, and methods of fabrication
EP2755237A3 (en) Trench MOS gate semiconductor device and method of fabricating the same
WO2015077647A3 (en) Electric field management for a group iii-nitride semiconductor
SG10201808204VA (en) Semiconductor devices and methods of manufacturing the same
SG10201806114YA (en) Semiconductor memory devices
SG10201804042RA (en) Semiconductor Memory Devices