SG10201805010VA - Vertical-Type Memory Device - Google Patents
Vertical-Type Memory DeviceInfo
- Publication number
- SG10201805010VA SG10201805010VA SG10201805010VA SG10201805010VA SG10201805010VA SG 10201805010V A SG10201805010V A SG 10201805010VA SG 10201805010V A SG10201805010V A SG 10201805010VA SG 10201805010V A SG10201805010V A SG 10201805010VA SG 10201805010V A SG10201805010V A SG 10201805010VA
- Authority
- SG
- Singapore
- Prior art keywords
- cell
- gate electrode
- channel layer
- dummy
- electrode layers
- Prior art date
Links
- 239000000758 substrate Substances 0.000 abstract 2
- 238000004519 manufacturing process Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
- H01L29/7843—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate the means being an applied insulating layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Geometry (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
OF THE DISCLOSURE A vertical-type memory device and a manufacturing method thereof, the device including a substrate having a cell array region and a connection region; gate electrode layers stacked on the cell array region and the connection region of the substrate, the gate electrode layers forming a stepped structure in the connection region; a cell channel layer in the cell array region, the cell channel layer passing through the plurality of gate electrode layers; a dummy channel layer in the connection region, the dummy channel layer passing through at least one gate electrode layer of the plurality of gate electrode layers; a cell epitaxial layer disposed below the cell channel layer; and a dummy epitaxial layer disposed below the dummy channel layer, wherein the dummy epitaxial layer has a shape that is different from a shape of the cell epitaxial layer . FIG. 3
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020170095397A KR102307057B1 (en) | 2017-07-27 | 2017-07-27 | Vertical-type memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
SG10201805010VA true SG10201805010VA (en) | 2019-02-27 |
Family
ID=65039112
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG10201805010VA SG10201805010VA (en) | 2017-07-27 | 2018-06-12 | Vertical-Type Memory Device |
Country Status (4)
Country | Link |
---|---|
US (1) | US10553606B2 (en) |
KR (1) | KR102307057B1 (en) |
CN (1) | CN109309097B (en) |
SG (1) | SG10201805010VA (en) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6969935B2 (en) * | 2017-08-28 | 2021-11-24 | キオクシア株式会社 | Semiconductor devices and their manufacturing methods |
KR102385566B1 (en) * | 2017-08-30 | 2022-04-12 | 삼성전자주식회사 | Vertical-type memory device |
KR20190122431A (en) * | 2018-04-20 | 2019-10-30 | 삼성전자주식회사 | Semiconductor memory device |
KR102460070B1 (en) * | 2018-09-21 | 2022-10-31 | 삼성전자주식회사 | Vertical memory device |
US11678486B2 (en) | 2019-06-03 | 2023-06-13 | Macronix Iniernational Co., Ltd. | 3D flash memory with annular channel structure and array layout thereof |
KR20210005441A (en) | 2019-07-05 | 2021-01-14 | 삼성전자주식회사 | Semiconductor device having gate layer and vertical structure and method of fortming the same |
KR20210027938A (en) * | 2019-09-03 | 2021-03-11 | 에스케이하이닉스 주식회사 | Semiconductor memory device and method for fabricating the same |
KR20210052934A (en) * | 2019-11-01 | 2021-05-11 | 에스케이하이닉스 주식회사 | Semiconductor memory device and manufacturing method thereof |
WO2022047722A1 (en) * | 2020-09-04 | 2022-03-10 | Yangtze Memory Technologies Co., Ltd. | Three-dimensional memory devices having isolation structure for source select gate line and methods for forming thereof |
CN112997310A (en) | 2020-09-04 | 2021-06-18 | 长江存储科技有限责任公司 | Three-dimensional memory device having isolation structure for source select gate line and method for forming the same |
CN112420724B (en) * | 2020-11-18 | 2021-09-28 | 长江存储科技有限责任公司 | Semiconductor device and method for manufacturing the same |
US20220406709A1 (en) * | 2021-06-17 | 2022-12-22 | Macronix International Co., Ltd. | Memory device and flash memory device |
US20230126600A1 (en) * | 2021-10-26 | 2023-04-27 | Sandisk Technologies Llc | Three-dimensional memory device with orthogonal memory opening and support opening arrays and method of making thereof |
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US83982A (en) * | 1868-11-10 | Improvement in head-blocks | ||
KR101755643B1 (en) * | 2010-12-15 | 2017-07-10 | 삼성전자주식회사 | Three Dimensional Semiconductor Memory Device and Method of Forming the Same |
KR101989514B1 (en) * | 2012-07-11 | 2019-06-14 | 삼성전자주식회사 | Semiconductor device and method of forming the same |
JP2014027099A (en) * | 2012-07-26 | 2014-02-06 | Ps4 Luxco S A R L | Semiconductor device and manufacturing method of the same |
KR102091729B1 (en) | 2013-10-10 | 2020-03-20 | 삼성전자 주식회사 | Method of manufacturing a three dimensional semiconductor memory device and the three dimensional semiconductor memory device fabricated by the method |
KR102118159B1 (en) * | 2014-05-20 | 2020-06-03 | 삼성전자주식회사 | Semiconductor Device and Method of fabricating the same |
KR102192848B1 (en) * | 2014-05-26 | 2020-12-21 | 삼성전자주식회사 | Memory device |
KR102239602B1 (en) * | 2014-08-12 | 2021-04-14 | 삼성전자주식회사 | Semiconductor Device and Method of fabricating the same |
KR102240024B1 (en) | 2014-08-22 | 2021-04-15 | 삼성전자주식회사 | Semiconductor device, manufacturing method of semiconductor device and method of forming epitaxial layer |
KR102300728B1 (en) | 2014-10-14 | 2021-09-14 | 삼성전자주식회사 | Semiconductor Memory Device And Method of Fabricating The Same |
KR102270099B1 (en) * | 2014-12-08 | 2021-06-29 | 삼성전자주식회사 | Semiconductor devices having dummy patterns and methods for fabricating the same |
KR102341716B1 (en) * | 2015-01-30 | 2021-12-27 | 삼성전자주식회사 | Semiconductor memory device and method of fabricating the same |
US9478561B2 (en) * | 2015-01-30 | 2016-10-25 | Samsung Electronics Co., Ltd. | Semiconductor memory device and method of fabricating the same |
KR20160124294A (en) | 2015-04-16 | 2016-10-27 | 삼성전자주식회사 | Semiconductor device including cell region stacked on periperal region and methods for fabricating the same |
US9666281B2 (en) | 2015-05-08 | 2017-05-30 | Sandisk Technologies Llc | Three-dimensional P-I-N memory device and method reading thereof using hole current detection |
US10074661B2 (en) | 2015-05-08 | 2018-09-11 | Sandisk Technologies Llc | Three-dimensional junction memory device and method reading thereof using hole current detection |
KR102393976B1 (en) * | 2015-05-20 | 2022-05-04 | 삼성전자주식회사 | Semiconductor memory devices |
KR102378820B1 (en) | 2015-08-07 | 2022-03-28 | 삼성전자주식회사 | Memory device |
US9449987B1 (en) | 2015-08-21 | 2016-09-20 | Sandisk Technologies Llc | Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors |
US9711531B2 (en) | 2015-10-08 | 2017-07-18 | Samsung Electronics Co., Ltd. | Semiconductor device and method of fabricating the same |
KR102571561B1 (en) | 2015-10-19 | 2023-08-29 | 삼성전자주식회사 | Three-dimensional semiconductor devices |
US9530790B1 (en) * | 2015-12-24 | 2016-12-27 | Sandisk Technologies Llc | Three-dimensional memory device containing CMOS devices over memory stack structures |
KR102530757B1 (en) * | 2016-01-18 | 2023-05-11 | 삼성전자주식회사 | Memory device |
US9576967B1 (en) * | 2016-06-30 | 2017-02-21 | Sandisk Technologies Llc | Method of suppressing epitaxial growth in support openings and three-dimensional memory device containing non-epitaxial support pillars in the support openings |
US9978766B1 (en) * | 2016-11-09 | 2018-05-22 | Sandisk Technologies Llc | Three-dimensional memory device with electrically isolated support pillar structures and method of making thereof |
US10083982B2 (en) * | 2016-11-17 | 2018-09-25 | Sandisk Technologies Llc | Three-dimensional memory device having select gate electrode that is thicker than word lines and method of making thereof |
KR102427324B1 (en) * | 2017-07-25 | 2022-07-29 | 삼성전자주식회사 | Three dimensional semiconductor device |
-
2017
- 2017-07-27 KR KR1020170095397A patent/KR102307057B1/en active IP Right Grant
-
2018
- 2018-03-28 US US15/938,101 patent/US10553606B2/en active Active
- 2018-06-12 SG SG10201805010VA patent/SG10201805010VA/en unknown
- 2018-07-17 CN CN201810785583.1A patent/CN109309097B/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20190035804A1 (en) | 2019-01-31 |
KR20190012437A (en) | 2019-02-11 |
CN109309097A (en) | 2019-02-05 |
KR102307057B1 (en) | 2021-10-01 |
US10553606B2 (en) | 2020-02-04 |
CN109309097B (en) | 2023-09-08 |
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