SG10201803447TA - Semiconductor Device - Google Patents
Semiconductor DeviceInfo
- Publication number
- SG10201803447TA SG10201803447TA SG10201803447TA SG10201803447TA SG10201803447TA SG 10201803447T A SG10201803447T A SG 10201803447TA SG 10201803447T A SG10201803447T A SG 10201803447TA SG 10201803447T A SG10201803447T A SG 10201803447TA SG 10201803447T A SG10201803447T A SG 10201803447TA
- Authority
- SG
- Singapore
- Prior art keywords
- region
- tsv
- insulation layer
- substrate
- cell array
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 238000009413 insulation Methods 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 3
- 239000003990 capacitor Substances 0.000 abstract 1
- 230000000149 penetrating effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
- H01L21/481—Insulating layers on insulating parts, with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
- H01L28/86—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
- H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
A semiconductor may include a substrate including a cell array region and a TSV region, an insulation layer disposed on the substrate and having a recess region on the TSV region, a capacitor on the insulation layer of the cell array region, a dummy support pattern disposed on the insulation layer of the TSV region and overlapping the recess region, when viewed in plan, and a TSV electrode penetrating the dummy support pattern and the substrate. FIG. 3
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020170088655A KR102406583B1 (en) | 2017-07-12 | 2017-07-12 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
SG10201803447TA true SG10201803447TA (en) | 2019-02-27 |
Family
ID=64999117
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG10201803447TA SG10201803447TA (en) | 2017-07-12 | 2018-04-25 | Semiconductor Device |
Country Status (4)
Country | Link |
---|---|
US (1) | US10535533B2 (en) |
KR (1) | KR102406583B1 (en) |
CN (1) | CN109256370B (en) |
SG (1) | SG10201803447TA (en) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10748906B2 (en) * | 2015-05-13 | 2020-08-18 | Samsung Electronics Co., Ltd. | Semiconductor device and method of fabricating the same |
FR3082656B1 (en) * | 2018-06-18 | 2022-02-04 | Commissariat Energie Atomique | INTEGRATED CIRCUIT COMPRISING MACROS AND ITS MANUFACTURING METHOD |
US10867891B2 (en) * | 2018-10-24 | 2020-12-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Ion through-substrate via |
KR102664275B1 (en) * | 2019-03-29 | 2024-05-09 | 에스케이하이닉스 주식회사 | Semiconductor device and method for fabricating the same |
KR20210005436A (en) | 2019-07-05 | 2021-01-14 | 삼성전자주식회사 | Semiconductor packages |
KR20220049654A (en) | 2020-10-14 | 2022-04-22 | 삼성전자주식회사 | Method of manufacturing semiconductor device and wafer structure including semiconductor device |
CN115881625A (en) * | 2021-09-29 | 2023-03-31 | 长鑫存储技术有限公司 | Manufacturing method of semiconductor structure and semiconductor structure |
US20240005078A1 (en) * | 2022-06-30 | 2024-01-04 | Advanced Micro Devices, Inc. | Through silicon via macro with dense layout for placement in an integrated circuit floorplan |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3582958B2 (en) * | 1996-05-28 | 2004-10-27 | 株式会社東芝 | Semiconductor device and manufacturing method thereof |
KR100266749B1 (en) * | 1997-06-11 | 2000-09-15 | 윤종용 | A method of forming contact plug of semiconductor device |
JPH11274432A (en) * | 1998-03-25 | 1999-10-08 | Fujitsu Ltd | Semiconductor device |
CN1167108C (en) * | 1998-11-27 | 2004-09-15 | 台湾积体电路制造股份有限公司 | Method for flattening surface |
KR100400047B1 (en) | 2001-11-19 | 2003-09-29 | 삼성전자주식회사 | Bonding pad structure of semiconductor device and method for forming thereof |
KR20030058585A (en) | 2001-12-31 | 2003-07-07 | 주식회사 하이닉스반도체 | Method for manufacturing semiconductor device |
KR100482366B1 (en) | 2002-07-15 | 2005-04-13 | 삼성전자주식회사 | method for fabricating storage capacitor in semiconductor memory device |
KR100493025B1 (en) | 2002-08-07 | 2005-06-07 | 삼성전자주식회사 | Method for manufacturing semiconductor memory device |
JP2005243689A (en) | 2004-02-24 | 2005-09-08 | Canon Inc | Method of manufacturing semiconductor chip and semiconductor device |
KR20110045632A (en) * | 2009-10-27 | 2011-05-04 | 삼성전자주식회사 | Semiconductor chip, stack module and memory card |
US9018768B2 (en) | 2010-06-28 | 2015-04-28 | Samsung Electronics Co., Ltd. | Integrated circuit having through silicon via structure with minimized deterioration |
KR101204675B1 (en) * | 2011-02-15 | 2012-11-26 | 에스케이하이닉스 주식회사 | Semiconductor device comprising capacitor and metal contact and method for fabricating the same |
JP2012256679A (en) | 2011-06-08 | 2012-12-27 | Elpida Memory Inc | Semiconductor device and manufacturing method of the same |
KR20130010298A (en) | 2011-07-18 | 2013-01-28 | 삼성전자주식회사 | Semiconductor device and method of forming the same |
US8975729B2 (en) | 2012-01-13 | 2015-03-10 | Qualcomm Incorporated | Integrating through substrate vias into middle-of-line layers of integrated circuits |
KR101896517B1 (en) | 2012-02-13 | 2018-09-07 | 삼성전자주식회사 | Semicoductor devices having through vias and methods for fabricating the same |
JP5925006B2 (en) | 2012-03-26 | 2016-05-25 | ルネサスエレクトロニクス株式会社 | Manufacturing method of semiconductor integrated circuit device |
KR20150042612A (en) * | 2013-10-11 | 2015-04-21 | 삼성전자주식회사 | Semiconductor device having decoupling capacitor and method of forming the same |
KR102079283B1 (en) * | 2013-10-15 | 2020-02-19 | 삼성전자 주식회사 | Integrated circuit device having through-silicon via structure and method of manufacturing the same |
KR20150061161A (en) * | 2013-11-26 | 2015-06-04 | 삼성전자주식회사 | Semiconductor chip with through-silicon vias, semiconductor package including the same, and method of fabricating the same |
KR102299781B1 (en) * | 2014-07-21 | 2021-09-08 | 삼성전자주식회사 | Semiconductor devices and methods of manufacturing the same |
US10269637B2 (en) * | 2016-12-02 | 2019-04-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor structure and fabricating method thereof |
-
2017
- 2017-07-12 KR KR1020170088655A patent/KR102406583B1/en active IP Right Grant
-
2018
- 2018-01-11 US US15/868,544 patent/US10535533B2/en active Active
- 2018-04-25 SG SG10201803447TA patent/SG10201803447TA/en unknown
- 2018-07-12 CN CN201810762262.XA patent/CN109256370B/en active Active
Also Published As
Publication number | Publication date |
---|---|
KR20190007574A (en) | 2019-01-23 |
US20190019742A1 (en) | 2019-01-17 |
US10535533B2 (en) | 2020-01-14 |
KR102406583B1 (en) | 2022-06-09 |
CN109256370B (en) | 2023-09-05 |
CN109256370A (en) | 2019-01-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
SG10201803447TA (en) | Semiconductor Device | |
SG10201805433WA (en) | Semiconductor device and method of manufacturing the same | |
SG10201804119SA (en) | Non-volatile memory devices and methods of fabricating the same | |
SG10201805477YA (en) | Semiconductor device | |
SG10201804989UA (en) | Vertical Memory Device | |
EP3506353A3 (en) | Displaying apparatus having light emitting device | |
SG10201805116YA (en) | Semiconductor devices and manufacturing methods thereof | |
SG10201805238RA (en) | Semiconductor device | |
SG10201803941SA (en) | Semiconductor Memory Device And Manufacturing The Same | |
SG10201805096YA (en) | Semiconductor device and method for fabricating the same | |
SG10201804464UA (en) | Three-dimensional semiconductor memory device and method of fabricating the same | |
EP3220433A3 (en) | Display device | |
SG10201805010VA (en) | Vertical-Type Memory Device | |
SG10201804042RA (en) | Semiconductor Memory Devices | |
SG10201808204VA (en) | Semiconductor devices and methods of manufacturing the same | |
MY193320A (en) | Integrated circuit die having backside passive components and methods associated therewith | |
EP4297551A3 (en) | Display device | |
TW201714253A (en) | Method of making embedded memory device with silicon-on-insulator substrate | |
SG10201803458SA (en) | Semiconductor memory device and method of manufacturing the same | |
TW201614838A (en) | Semiconductor device and methods for forming the same | |
TW201613060A (en) | Semiconductor device having terminals formed on a chip package including a plurality of semiconductor chips and manufacturing method thereof | |
SG10201804431UA (en) | Semiconductor device including a gate insulation pattern and a gate electrode pattern | |
TW201614776A (en) | Method of making embedded memory device with silicon-on-insulator substrate | |
EP3121647A3 (en) | Display device and method of fabricating the same | |
EP4283690A3 (en) | Semiconductor device |