BR112017023119A2 - transistor de película fina, circuito de acionamento de portão em sistema, aparelho de exibição e método de fabricação - Google Patents

transistor de película fina, circuito de acionamento de portão em sistema, aparelho de exibição e método de fabricação

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Publication number
BR112017023119A2
BR112017023119A2 BR112017023119A BR112017023119A BR112017023119A2 BR 112017023119 A2 BR112017023119 A2 BR 112017023119A2 BR 112017023119 A BR112017023119 A BR 112017023119A BR 112017023119 A BR112017023119 A BR 112017023119A BR 112017023119 A2 BR112017023119 A2 BR 112017023119A2
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BR
Brazil
Prior art keywords
base substrate
semiconductor region
nol
overlap
thin film
Prior art date
Application number
BR112017023119A
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English (en)
Other versions
BR112017023119B1 (pt
Inventor
Fan Chao
Jin Dongzhen
Chung Jaemoon
Cui Rongge
Original Assignee
Boe Technology Group Co Ltd
Chongqing Boe Optoelectronics Tech Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Boe Technology Group Co Ltd, Chongqing Boe Optoelectronics Tech Co Ltd filed Critical Boe Technology Group Co Ltd
Publication of BR112017023119A2 publication Critical patent/BR112017023119A2/pt
Publication of BR112017023119B1 publication Critical patent/BR112017023119B1/pt

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
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    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/772Field effect transistors
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    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
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    • H01L29/78696Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Geometry (AREA)
  • Thin Film Transistor (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Liquid Crystal (AREA)

Abstract

o presente pedido divulga um transistor de película fina incluindo um substrato de base; uma camada ativa (al) no substrato de base tendo uma primeira região semicondutora (al-1), uma segunda região semicondutora (al-2) e uma pluralidade de pontes semicondutoras (al-b), cada uma das quais unindo a primeira região semicondutora (al-1) e a segunda região semicondutora (al-2); a pluralidade de pontes semicondutoras (al-b) separada; a camada ativa (al) sendo feita de um material incluindo m1oanb, em que m1 é um metal único ou uma combinação de metais, a > 0 e b ¿ 0; uma camada de parada de cauterização (esl) em um lado da camada ativa (al) distal ao substrato de base; a primeira região semicondutora (al-1) tendo uma primeira porção sem sobreposição (nol-1), uma projeção da qual fica fora dessa da camada de parada de cauterização (esl) em vista plana do substrato de base; a segunda região semicondutora (al-2) tendo uma segunda porção sem sobreposição (nol-2), uma projeção da qual fica fora dessa da camada de parada de cauterização (esl) em vista plana do substrato de base; um primeiro eletrodo em um lado da primeira porção sem sobreposição (nol-1) distal ao substrato de base e um segundo eletrodo em um lado da segunda porção sem sobreposição (nol-2) distal ao substrato de base.
BR112017023119-0A 2016-07-08 2016-07-08 Transistor de película fina, circuito de acionamento de gate em matriz, aparelho de exibição e método de fabricação BR112017023119B1 (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2016/089409 WO2018006412A1 (en) 2016-07-08 2016-07-08 Thin film transistor, gate drive on array and display apparatus having the same, and fabricating method thereof

Publications (2)

Publication Number Publication Date
BR112017023119A2 true BR112017023119A2 (pt) 2018-07-10
BR112017023119B1 BR112017023119B1 (pt) 2022-11-16

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BR112017023119-0A BR112017023119B1 (pt) 2016-07-08 2016-07-08 Transistor de película fina, circuito de acionamento de gate em matriz, aparelho de exibição e método de fabricação

Country Status (8)

Country Link
US (1) US10032917B1 (pt)
EP (1) EP3482420A4 (pt)
JP (1) JP6779884B2 (pt)
KR (2) KR20180016330A (pt)
CN (1) CN106463545B (pt)
BR (1) BR112017023119B1 (pt)
RU (1) RU2705754C1 (pt)
WO (1) WO2018006412A1 (pt)

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CN111430368B (zh) * 2020-03-30 2023-01-20 友达光电(苏州)有限公司 显示装置

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CN106463545B (zh) 2019-11-01
BR112017023119B1 (pt) 2022-11-16
WO2018006412A1 (en) 2018-01-11
KR20190079708A (ko) 2019-07-05
US10032917B1 (en) 2018-07-24
US20180212050A1 (en) 2018-07-26
JP6779884B2 (ja) 2020-11-04
EP3482420A4 (en) 2020-03-04
CN106463545A (zh) 2017-02-22
KR102104471B1 (ko) 2020-04-24
EP3482420A1 (en) 2019-05-15

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