CN109360858A - 薄膜晶体管、显示基板及修复方法、显示装置 - Google Patents

薄膜晶体管、显示基板及修复方法、显示装置 Download PDF

Info

Publication number
CN109360858A
CN109360858A CN201811138641.8A CN201811138641A CN109360858A CN 109360858 A CN109360858 A CN 109360858A CN 201811138641 A CN201811138641 A CN 201811138641A CN 109360858 A CN109360858 A CN 109360858A
Authority
CN
China
Prior art keywords
film transistor
thin film
tft
active area
contact zone
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201811138641.8A
Other languages
English (en)
Inventor
王海涛
李广耀
汪军
王庆贺
刘宁
王东方
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Hefei Xinsheng Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN201811138641.8A priority Critical patent/CN109360858A/zh
Publication of CN109360858A publication Critical patent/CN109360858A/zh
Priority to US16/427,771 priority patent/US10872829B2/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/22—Connection or disconnection of sub-entities or redundant parts of a device in response to a measurement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136259—Repairing; Defects
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136259—Repairing; Defects
    • G02F1/136268—Switch defects
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/10—Dealing with defective pixels

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Nonlinear Science (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

本发明提供一种薄膜晶体管、显示基板及修复方法、显示装置，属于显示技术领域，其可至少部分解决现有的薄膜晶体管栅极和有源区短路造成显示不良的问题。本发明的薄膜晶体管包括有源区、叠置在所述有源区一侧的栅绝缘层、设置在所述栅绝缘层远离所述有源区一侧的栅极，所述有源区包括位于其一端的第一极接触区，位于与所述第一极接触区相对一端的第二极接触区，多条连接所述第一极接触区和所述第二极接触区的连接区，相邻的所述连接区之间设有间隔。

Description

薄膜晶体管、显示基板及修复方法、显示装置
技术领域
本发明属于显示技术领域，具体涉及一种薄膜晶体管、一种显示基板、一种显示基板的修复方法、一种显示装置。
背景技术
显示基板中一般由薄膜晶体管参与构成驱动电路，薄膜晶体管包括有源区、栅绝缘层、栅极、源极和漏极。当有源区与栅极之间存在杂质微粒或栅绝缘层缺损时，会导致薄膜晶体管的有源区和栅极短路，由于栅极一般是连接栅线的，而一条栅线控制整行薄膜晶体管(也即是控制整行亚像素)，如此会造成显示的线不良(工程上称为DGS型线不良)。如果切断发生有源区和栅极短路的栅极与对应栅线的连接，则会造成其所在的薄膜晶体管失效，同样造成点不良。
发明内容
本发明至少部分解决现有的薄膜晶体管有源区和栅极短路造成显示不良的问题，提供一种薄膜晶体管、显示基板及修复方法、显示装置。
根据本发明的第一方面，提供一种薄膜晶体管，包括有源区、叠置在所述有源区一侧的栅绝缘层、设置在所述栅绝缘层远离所述有源区一侧的栅极，所述有源区包括位于其一端的第一极接触区，位于与所述第一极接触区相对一端的第二极接触区，多条连接所述第一极接触区和所述第二极接触区的连接区，相邻的所述连接区之间设有间隔。
可选地，所述薄膜晶体管包括基底，所述有源区设置在所述基底上；所述栅绝缘层设置在所述有源区的远离所述基底的一侧，或者所述栅绝缘层设置在所述有源区的靠近所述基底的一侧。
可选地，所述有源区由氧化物半导体形成。
可选地，所述有源区由IGZO材料形成。
可选地，所述连接区的数量在2到4之间。
可选地，在与所述第一极接触区指向第二极接触区的方向相垂直的方向上，每个所述连接区的尺寸在4～8um，每个所述间隔的尺寸在6～10um。
可选地，所述间隔处填充绝缘材料。
根据本发明的第二方面，提供一种显示基板，包括设置在基底上的多个薄膜晶体管，至少部分所述薄膜晶体管为根据本发明第一方面所提供的薄膜晶体管。
可选地，至少部分上述的薄膜晶体管排成阵列，所述显示基板还包括：沿行方向延伸的多条栅线，同一行的所述薄膜晶体管的栅极连接至同一条栅线上。
可选地，所述栅绝缘层设置在所述有源区的远离所述基底的一侧，每条所述栅线覆盖位于同一行的多个所述薄膜晶体管的各连接区，所述薄膜晶体管的栅极由所述栅线的覆盖对应连接区的部分形成。
根据本发明的第三方面，提供一种显示装置，包括根据本发明第二方面所提供的显示基板。
根据本发明的第四方面，提供一种显示基板的修复方法，所述修复方法应用于根据本发明第二方面所提供的显示基板，该修复方法包括：切断与栅极发生短路的连接区与对应第一极接触区和对应第二极接触区的连接。
附图说明
图1为本发明的实施例的一种显示基板的俯视透视图；
图2为本发明的实施例的一种显示基板的俯视透视图；
图3为图1所示显示基板的沿L1线的剖视图；
图4为图1所示显示基板的沿L2线的剖视图；
其中，附图标记为：10、基底；11、金属遮光层；12、缓冲层；13、层间绝缘层；14、钝化层；15、过孔；21、数据线；22、第一极线；23、第二极线；24、栅线；311、第一极接触区；312、第二极接触区；313、连接区；32、栅绝缘层；33、栅极；40、像素电极；a、杂质微粒；L、切割线。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对本发明作进一步详细描述。
在本发明中，“构图工艺”是指形成具有特定的图形的结构的步骤，其可为光刻工艺，光刻工艺包括形成材料层、涂布光刻胶、曝光、显影、刻蚀、光刻胶剥离等步骤中的一步或多步；当然，“构图工艺”也可为压印工艺、喷墨打印工艺等其它工艺。
实施例1：
本实施例提供一种薄膜晶体管，其可被应用于显示基板内，
参与构成例如对像素电极40(或其它发光器件)的驱动电路。参见图1-图4，该薄膜晶体管包括有源区、叠置在有源区一侧的栅绝缘层32、设置在栅绝缘层32远离有源区一侧的栅极33，有源区包括位于其一端的第一极接触区311，位于与第一极接触区311相对一端的第二极接触区312，多条连接第一极接触区311和第二极接触区312的连接区313(图中第一极接触区311、连接区313、第二极接触区312之间的分界以虚线表示)，相邻的连接区313之间设有间隔。
有源区的第一极接触区311连接第一极线22形成该薄膜晶体管的第一极(源极或漏极，取决于具体的电路连接关系)。有源区的第二极接触区312连接第二极线23形成该薄膜晶体管的第二极(漏极或源极中的另一个，取决于具体的电路连接关系)。图1中的薄膜晶体管具有2个连接区313，图2中的薄膜晶体管具有3个连接区313。多个彼此隔开的连接区313可用于形成多个沟道，即从该薄膜晶体管的第一极到第二极的多条电流通道。
可选地，该间隔处填充绝缘材料，例如如图4所示，相邻连接区313之间通过栅绝缘层32隔开。
参见图2，一旦因杂质微粒a或栅绝缘层32缺损等原因造成其中一条连接区313与栅极33短路，可通过激光沿切割线L切割等修复手段切断这条连接区313与源极和漏极的连接，这样该薄膜晶体管仍能继续工作，从而避免了显示的线不良。即使该薄膜晶体管的性能受到一定程度的影响，也不会造成严重的显示的点不良。如此可降低显示基板的不良率。
可选地，如图3所示，薄膜晶体管设置在基底10上；栅绝缘层32设置在有源区的远离基底10的一侧。也即是该薄膜晶体管可以是顶栅型结构。当然栅绝缘层32也设置在有源区的靠近基底10的一侧。即对于底栅型结构本发明同样适用。
可选地，有源区由氧化物半导体形成。相对而言，氧化物半导体构成的有源区更容易出现上述不良。而当有源区由IGZO(氧化镓铟锌)材料形成时，该不良更加明显。故本发明对IGZO材料形成有源区的薄膜晶体管的改善效果更加明显。
可选地，连接区313的数量在2到4之间。
考虑到每个薄膜晶体管的器件区域面积有限，连接区313数量过多会造成每个连接区313过细或者说相邻连接区313之间的间隔过小，这样一个杂质微粒可能会影响到多个连接区313，这与一个杂质微粒影响一个连接区313造成的影响是相同的，但是增大了对半导体工艺的最小线宽的要求，因此连接区313的数量无需过多。
可选地，在与第一极接触区311指向第二极接触区312的方向相垂直的方向上，每个连接区313的尺寸在4～8um，每个间隔的尺寸在6～10um。
结合实际制造工艺中常见的杂质微粒不良的尺寸以及栅绝缘层32缺损的规模，以上尺寸范围对克服上述不良的改善效果较佳。
实施例2：
本实施例提供一种显示基板，参加图1-图4，包括设置在基底10上的多个薄膜晶体管，至少部分薄膜晶体管为根据本发明实施例1所提供的薄膜晶体管。
可选地，至少部分实施例1所提供的薄膜晶体管排成阵列，显示基板还包括：沿行方向延伸的多条栅线24，同一行的上述薄膜晶体管的栅极33连接至同一条栅线24上。
即一行上述薄膜晶体管的栅极33受同一条栅线24提供的栅控制电压的控制。
图1和图2中一个像素电极40对应一个薄膜晶体管。显示基板还包括沿列方向延伸的多条数据线21，同一列的薄膜晶体管的第二极接触区312通过第二极线23连接至同一条数据线21上。
当然对应于一个像素电极40的薄膜晶体管可能有多个，其中部分薄膜晶体管连接栅线24，部分薄膜晶体管连接数据线21。无论显示基板内的薄膜晶体管与栅线24、数据线21的连接关系如何，都可以采用实施例1所提供的薄膜晶体管。
可选地，如图1和图2所示，栅绝缘层32设置在有源区的远离基底10的一侧，每条栅线24覆盖位于同一行的多个薄膜晶体管的各连接区313，薄膜晶体管的栅极33由栅线24的覆盖对应连接区313的部分形成。
即作为一种优选的实施方式，此处的栅线24与栅极33为一体结构，栅线24的部分区域同时兼作薄膜晶体管的栅极33。
实施例3：
本实施例提供一种显示装置，包括根据本发明实施例2所提供的显示基板。
具体的，该显示装置可为液晶显示面板、有机发光二极管(OLED)显示面板、电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
实施例4：
本实施例提供一种显示基板的修复方法，该修复方法应用于实施例2所提供的显示基板，该修复方法包括：切断与栅极33发生短路的连接区313与对应第一极接触区311和对应第二极接触区312的连接。
以图1为例，显示基板的完整的制造与修复过程如下。
第一步，通过构图工艺在基底10(例如玻璃基板)上形成金属遮光层11的图案，之后沉积缓冲层12。需要说明的是金属遮光层11的图案可根据实际需要进行设计，图3中的金属遮光层11所保护的薄膜晶体管并未示出。
第二步，沉积用于形成有源区的材料，例如IGZO，厚度在之后涂覆光刻胶，光刻胶的厚度在之间。
第三步，利用掩模对光刻胶进行曝光，其中有源区的形状为实施例1所提供的有源区的形状，随后进行IGZO的刻蚀并剥离光刻胶，在有源区中形成多个间隔的连接条。
第四步，利用构图工艺形成栅绝缘层32(GI)的图案，并利用构图工艺形成栅极33以及栅线24的图案。当然也可利用灰阶掩模板等采用一张掩模板形成上绝缘层32和栅极33以及栅线24的图案。
第五步，利用构图工艺形成层间绝缘层13的图案(IDL),并形成连通至有源区的第一极接触区311和第二极接触区312的过孔15。
第六步，利用构图工艺形成第一极线22、第二极线23的图案。
第七步，定位DGS线不良，通过激光切断发生不良的连接区313与对应第一极接触区311和第二极接触区312的连接。切割的方法可参见图2。
第八步，沉积钝化层14(PVX)。
在此之后还可以进行诸如彩膜图案的形成、钝化层14图案的形成、利用构图工艺形成像素电极40的步骤等等。这部分可依据常规方式进行。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (12)

1.一种薄膜晶体管，包括有源区、叠置在所述有源区一侧的栅绝缘层、设置在所述栅绝缘层远离所述有源区一侧的栅极，其特征在于，所述有源区包括位于其一端的第一极接触区，位于与所述第一极接触区相对一端的第二极接触区，多条连接所述第一极接触区和所述第二极接触区的连接区，相邻的所述连接区之间设有间隔。
2.根据权利要求1所述的薄膜晶体管，其特征在于，所述薄膜晶体管包括基底，所述有源区设置在所述基底上；所述栅绝缘层设置在所述有源区的远离所述基底的一侧，或者所述栅绝缘层设置在所述有源区的靠近所述基底的一侧。
3.根据权利要求1所述的薄膜晶体管，其特征在于，所述有源区由氧化物半导体形成。
4.根据权利要求3所述的薄膜晶体管，其特征在于，所述有源区由IGZO材料形成。
5.根据权利要求1所述的薄膜晶体管，其特征在于，所述连接区的数量在2到4之间。
6.根据权利要求1所述的薄膜晶体管，其特征在于，在与所述第一极接触区指向第二极接触区的方向相垂直的方向上，每个所述连接区的尺寸在4～8um，每个所述间隔的尺寸在6～10um。
7.根据权利要求1所述的薄膜晶体管，其特征在于，所述间隔处填充绝缘材料。
8.一种显示基板，包括设置在基底上的多个薄膜晶体管，其特征在于，至少部分所述薄膜晶体管为根据权利要求1-7任意一项所述的薄膜晶体管。
9.根据权利要求8所述的显示基板，其特征在于，至少部分权利要求1-7任意一项所述的薄膜晶体管排成阵列，所述显示基板还包括：沿行方向延伸的多条栅线，同一行的所述薄膜晶体管的栅极连接至同一条栅线上。
10.根据权利要求9所述的显示基板，其特征在于，所述栅绝缘层设置在所述有源区的远离所述基底的一侧，每条所述栅线覆盖位于同一行的多个所述薄膜晶体管的各连接区，所述薄膜晶体管的栅极由所述栅线的覆盖对应连接区的部分形成。
11.一种显示装置，其特征在于，包括根据权利要求8-10任意一项所述的显示基板。
12.一种显示基板的修复方法，其特征在于，所述修复方法应用于根据权利要求8-10任意一项所述的显示基板，该修复方法包括：切断与栅极发生短路的连接区与对应第一极接触区和对应第二极接触区的连接。
CN201811138641.8A 2018-09-28 2018-09-28 薄膜晶体管、显示基板及修复方法、显示装置 Pending CN109360858A (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201811138641.8A CN109360858A (zh) 2018-09-28 2018-09-28 薄膜晶体管、显示基板及修复方法、显示装置
US16/427,771 US10872829B2 (en) 2018-09-28 2019-05-31 Method for repairing a display substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811138641.8A CN109360858A (zh) 2018-09-28 2018-09-28 薄膜晶体管、显示基板及修复方法、显示装置

Publications (1)

Publication Number Publication Date
CN109360858A true CN109360858A (zh) 2019-02-19

Family

ID=65348118

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811138641.8A Pending CN109360858A (zh) 2018-09-28 2018-09-28 薄膜晶体管、显示基板及修复方法、显示装置

Country Status (2)

Country Link
US (1) US10872829B2 (zh)
CN (1) CN109360858A (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113009743A (zh) * 2021-02-24 2021-06-22 武汉华星光电技术有限公司 像素结构以及显示面板

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030141505A1 (en) * 2002-01-28 2003-07-31 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of manufacturing the same
CN1638576A (zh) * 2003-12-22 2005-07-13 Lg.菲利浦Lcd株式会社 有机电致发光器件及其制造方法
CN1913176A (zh) * 2005-06-21 2007-02-14 三菱电机株式会社 薄膜晶体管
US20100009480A1 (en) * 2005-02-28 2010-01-14 Seok Woo Lee Method for fabricating liquid crystal display device
CN203134810U (zh) * 2013-03-22 2013-08-14 京东方科技集团股份有限公司 一种阵列基板及显示装置
CN106463545A (zh) * 2016-07-08 2017-02-22 京东方科技集团股份有限公司 薄膜晶体管及制造方法、阵列基板行驱动电路和显示装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI272666B (en) * 2002-01-28 2007-02-01 Semiconductor Energy Lab Semiconductor device and method of manufacturing the same
JP5322787B2 (ja) * 2009-06-11 2013-10-23 富士フイルム株式会社 薄膜トランジスタ及びその製造方法、電気光学装置、並びにセンサー

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030141505A1 (en) * 2002-01-28 2003-07-31 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of manufacturing the same
CN1638576A (zh) * 2003-12-22 2005-07-13 Lg.菲利浦Lcd株式会社 有机电致发光器件及其制造方法
US20100009480A1 (en) * 2005-02-28 2010-01-14 Seok Woo Lee Method for fabricating liquid crystal display device
CN1913176A (zh) * 2005-06-21 2007-02-14 三菱电机株式会社 薄膜晶体管
CN203134810U (zh) * 2013-03-22 2013-08-14 京东方科技集团股份有限公司 一种阵列基板及显示装置
CN106463545A (zh) * 2016-07-08 2017-02-22 京东方科技集团股份有限公司 薄膜晶体管及制造方法、阵列基板行驱动电路和显示装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113009743A (zh) * 2021-02-24 2021-06-22 武汉华星光电技术有限公司 像素结构以及显示面板
CN113009743B (zh) * 2021-02-24 2022-04-26 武汉华星光电技术有限公司 像素结构以及显示面板

Also Published As

Publication number Publication date
US20200105627A1 (en) 2020-04-02
US10872829B2 (en) 2020-12-22

Similar Documents

Publication Publication Date Title
US8772780B2 (en) Array substrate structure of display panel and method of making the same
US9524992B2 (en) Thin film transistor array panel and manufacturing method thereof
US10373988B2 (en) Display substrate, manufacturing method thereof, and display panel
US8624256B2 (en) Display device
US20210057516A1 (en) Display panel having pad disposed on bottom surface of substrate and manufacturing method thereof
KR20170140828A (ko) 트랜지스터 표시판
KR101922937B1 (ko) 박막트랜지스터 기판 및 이의 제조 방법
US9685494B2 (en) Organic EL display device
US10971525B1 (en) TFT array substrate and manufacturing method thereof
US20220115473A1 (en) Display Substrate, Preparation Method thereof, Display Mother Plate and Display Device
WO2021047140A1 (zh) 显示面板
CN110148601A (zh) 一种阵列基板、其制作方法及显示装置
US11088283B2 (en) Thin film transistor, method of fabricating thin film transistor and array substrate
TW201727960A (zh) 顯示器之陣列基板及其製造方法
US9799688B2 (en) Array substrate with uniform charge distribution, method for manufacturing the same and display device
KR20100072568A (ko) 표시 기판 및 그 제조 방법
US8704305B2 (en) Thin film transistor
KR20120045178A (ko) 박막 트랜지스터 및 이의 제조 방법
US20230253410A1 (en) Array substrate, manufacturing method thereof, and display panel
CN109360858A (zh) 薄膜晶体管、显示基板及修复方法、显示装置
JP6482256B2 (ja) 薄膜トランジスタ基板および液晶表示装置
KR20130066247A (ko) 박막 트랜지스터 표시판 및 그 제조 방법
US20220399433A1 (en) Display Substrate and Display Apparatus
US8138548B2 (en) Thin film transistor array substrate and method for manufacturing the same
CN109887883B (zh) 一种阵列基板及其制造方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20190219