WO2021124732A1 - 半導体装置の製造装置、および、半導体装置の製造方法 - Google Patents
半導体装置の製造装置、および、半導体装置の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 70
- 238000004519 manufacturing process Methods 0.000 title claims description 32
- 238000007689 inspection Methods 0.000 claims abstract description 117
- 238000012937 correction Methods 0.000 claims abstract description 86
- 238000000034 method Methods 0.000 claims abstract description 61
- 239000000758 substrate Substances 0.000 claims description 38
- 238000004364 calculation method Methods 0.000 claims description 7
- 238000013461 design Methods 0.000 claims description 6
- 238000003384 imaging method Methods 0.000 claims description 4
- 238000012545 processing Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 14
- 230000003287 optical effect Effects 0.000 description 11
- 238000001514 detection method Methods 0.000 description 3
- 238000013459 approach Methods 0.000 description 2
- 230000001419 dependent effect Effects 0.000 description 2
- 238000010191 image analysis Methods 0.000 description 2
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67126—Apparatus for sealing, encapsulating, glassing, decapsulating or the like
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67721—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrates to be conveyed not being semiconductor wafers or large planar substrates, e.g. chips, lead frames
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
Definitions
- the offset amount of the optical axis of the first camera 26 with respect to the central axis of the bonding tool 24 will be referred to as "camera offset amount Ocm".
- the design value of the camera offset amount Ocm is stored in advance in the memory of the controller 18 as the basic camera offset amount Ocm_b.
- the actual camera offset amount Ocm, the basic camera offset amount Ocm_b, and the area correction amount C for correcting the error are calculated prior to the bonding process of the semiconductor chip 110, which will be described later. To do.
- the controller 18 first drives the bonding head 14 and the pickup unit 12 to hold the semiconductor chip 110 on the bottom surface of the bonding tool 24 (S10). Subsequently, the controller 18 moves the bonding head 14 so that the bonding tool 24 is in the field of view of the second camera 28, and then the second camera 28 captures the bottom surface of the bonding tool 24 holding the semiconductor chip 110. (S12).
- the image obtained by capturing the bottom surface of the bonding tool 24 is referred to as a “tool image 40”.
- FIG. 3 is a diagram showing an example of the tool image 40.
- the controller 18 moves the bonding head 14 by the final offset amount Os. As a result, the semiconductor chip 110 held by the bonding tool 24 is located directly above the target position Ptg. In this state, the controller 18 lowers the bonding tool 24 to bond the semiconductor chip 110 to the target position Ptg.
- the chip offset amount Oct, the camera offset amount Ocm, and the target offset amount Otg are used for positioning the semiconductor chip 110.
- accurate values of the chip offset amount Oct, the camera offset amount Ocm, and the target offset amount Otg are required.
- the accurate values of the chip offset amount Oct and the target offset amount Otg can be calculated from the tool image 40 and the mounting surface image 42.
- the controller 18 drives the first camera 26 to image the mounting surface and the inspection chip 130 mounted on the mounting surface, as shown in FIG. 7C. (S40).
- the image obtained by capturing the mounting surface and the inspection chip 130 will be referred to as an “inspection image 44”.
- the basic camera offset amount Ocm_b is stored in the memory in advance as described repeatedly. Further, the chip offset amount Oct can be obtained from the tool image 40.
- a plurality of area correction amounts C may be sequentially acquired while one inspection chip 130 is sequentially placed on a plurality of point Pis. In any case, if the area correction amount C can be calculated for all the point Pis (that is, if Yes in S46), the process ends.
- this area correction amount C since it is not necessary to strictly control the relative position of the inspection chip 130 with respect to the mounting surface, it is not necessary to attach a special alignment mark or the like to the mounting surface. As a result, it is not necessary to prepare a special mounting surface for calculating the correction amount, and the cost and labor required for acquiring the correction amount can be reduced. Further, in this example, since it is not necessary to image the bonding tool 24 and the mounting surface at the same time, an expensive camera with two upper and lower fields of view is unnecessary, and the cost can be further reduced. Further, in this example, by calculating and storing the area correction amount C for each of the plurality of point Pis, it is possible to deal with the position-dependent error and further improve the position accuracy of bonding.
- FIGS. 9 and 10 are flowcharts showing other acquisition procedures of the area correction amount C.
- 11 and 12 are image diagrams showing the state of the acquisition procedure according to the flowcharts of FIGS. 9 and 10.
- the reference chip 140 is used in addition to the inspection chip 130 to acquire the area correction amount C.
- the reference chip 140 is a chip that is mounted on the mounting surface before the inspection chip 130 and is used as a positioning target of the inspection chip 130.
- the shape, size, and the like of the reference chip 140 are not particularly limited.
- the reference chip 140 may be provided with some alignment mark in order to make it easier to grasp the position of the reference chip 140 in image analysis.
- the inspection chip 130 is placed on the reference chip 140.
- the shape and size of the inspection chip 130 are also not particularly limited.
- the inspection chip 130 may be a transparent chip made of a transparent material such as glass, polycarbonate, acrylic, polyester, or transparent ceramic. With such a configuration, the alignment mark of the reference chip 140 can be confirmed even if the inspection chip 130 is placed on the reference chip 140. Further, as with the reference chip 140, some alignment mark may be provided on the surface of the inspection chip 130. Further, the inspection chip 130 may have a size smaller than that of the reference chip 140. With such a configuration, even when the inspection chip 130 is placed on the reference chip 140 in a state where the position with respect to the reference chip 140 is deviated, the inspection chip 130 is less likely to fall from the reference chip 140.
- the controller 18 drives the bonding head 14 and the second camera 28 to acquire the tool image 40 (S54). Specifically, as shown in FIG. 11A, the controller 18 moves the bonding head 14 so that the bonding tool 24 is located directly above the second camera 28, and then moves the bonding tool 14 to the second camera 28. 24 and the reference chip 140 held by the 24 are imaged. The controller 18 calculates the inclination of the reference chip 140 with respect to the X axis based on the tool image 40, and rotates the bonding tool 24 around the axis A so as to eliminate the inclination.
- the controller 18 moves the bonding head 14 to the point Pi (S56). This movement is controlled based on the detection result of a position sensor (for example, an encoder or the like) mounted on the drive system of the bonding head 14. Upon reaching the point Pi, the controller 18 lowers the bonding tool 24 to mount the reference chip 140 on the mounting surface, as shown in FIG. 11B (S58).
- the mounting surface may be the upper surface of the stage 16 or the upper surface of the substrate 100 mounted on the stage 16.
- the controller 18 causes the bonding tool 24 to hold the inspection chip 130 (S60). Then, the controller 18 drives the bonding head 14 and the second camera 28 to acquire the tool image 40 (S62). That is, as shown in FIG. 11C, the controller 18 moves the bonding head 14 so that the bonding tool 24 is located directly above the second camera 28, and then moves the bonding tool 24 and the bonding tool 24 to the second camera 28.
- the inspection chip 130 held in the camera is imaged.
- the controller 18 calculates the inclination of the inspection chip 130 with respect to the X axis based on the tool image 40, and rotates the bonding tool 24 around the axis A so as to eliminate the inclination. Further, the controller 18 temporarily stores the tool image 40 in the memory.
- the controller 18 moves the bonding head 14 to the point Pi (S64), and then causes the first camera 26 to image the mounting surface on which the reference chip 140 is mounted, as shown in FIG. 12A (S64). S66).
- an image obtained by capturing an image of the mounting surface on which the reference chip 140 is mounted is referred to as a “reference image”.
- the controller 18 moves the bonding head 14 so that the inspection chip 130 held by the bonding tool 24 is located directly above the reference chip 140 (S68). That is, the controller 18 has a relative position between the reference chip 140 mounted on the mounting surface and the inspection chip 130 held by the bonding tool 24 based on the reference image and the tool image 40 acquired in step S62. Is calculated.
- the procedure for calculating the relative position is the same as the procedure described with reference to FIG. 5, except that the basic camera offset amount Ocm_b is used as the camera offset amount Ocm. That is, the controller 18 calculates the chip offset amount Oct, which is the offset amount of the bonding tool 24 with respect to the inspection chip 130, based on the tool image 40. Further, the controller 18 calculates the target offset amount Otg, which is the offset amount of the target position (that is, the reference chip 140) with respect to the optical axis (that is, the center of the reference image) of the first camera 26 based on the reference image.
- the controller 18 calculates the value obtained by adding the calculated chip offset amount Oct, the target offset amount Otg, and the basic camera offset amount Ocm_b as the final offset amount Os.
- the controller 18 drives the bonding tool 24 to place the inspection chip 130 on the reference chip 140 (S70). ). Subsequently, as shown in FIG. 12C, the controller 18 causes the first camera 26 to image the mounting surface and acquires the inspection image 44 (S74).
- FIG. 13 is a diagram showing an example of the inspection image 44.
- the reference chip 140 is shown by an alternate long and short dash line, and the inspection chip 130 is shown by a solid line.
- the inspection chip 130 is deviated from the reference chip 140 by (X1, ⁇ Y1). Therefore, in this case, the area correction amount C for correcting the deviation is ( ⁇ X1, Y1).
- the reference chip 140 mounted prior to the inspection chip 130 is used as the mounting target position of the inspection chip 130. Therefore, it is not necessary to attach a special alignment mark or the like to the mounting surface. As a result, it is not necessary to prepare a special mounting surface for calculating the correction amount, and the cost and labor required for calculating the correction amount can be reduced. Further, in this example, the reference chip 140 mounted on the district court on the mounting surface is set as the target position instead of the theoretical target position. Therefore, the camera offset error and, by extension, the area correction amount C can be calculated more accurately.
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Abstract
Description
Claims (7)
- 基板が載置されるステージと、
前記ステージに対して相対的に、任意のポイントに移動可能なボンディングヘッドと、
前記ボンディングヘッドの位置を検出する位置検出手段と、
前記ボンディングヘッドに取り付けられ、チップを保持するボンディングツールと、
前記ボンディングヘッドに取り付けられ、前記ステージ上面または前記ステージに載置された基板上面である載置面を上方から撮像する第一カメラと、
コントローラと、
を備え、前記コントローラは、
前記ボンディングヘッドを前記任意のポイントに移動させたうえで、前記ボンディングツールを駆動して、前記チップを前記載置面に載置させる載置処理と、
前記チップが載置された後の前記載置面を前記第一カメラに撮像させた画像を検査画像として取得する検査画像取得処理と、
前記検査画像内における前記チップの位置に基づいて、前記ボンディングツールに対する前記第一カメラのオフセット量であるカメラオフセット量の補正量をエリア補正量として算出する補正値算出処理と、
算出されたエリア補正量と、前記位置検出手段で検出された前記任意のポイントの位置と、を対応付けて記憶装置に記憶する記憶処理と、
を1以上のポイントそれぞれについて実行するように構成されている、
ことを特徴とする半導体装置の製造装置。 - 請求項1に記載の半導体装置の製造装置であって、
前記コントローラは、前記補正値算出処理において、前記検査画像内におけるチップの実位置と、設計上の前記カメラオフセット量から求まる前記検査画像内における前記チップの理想位置と、の差分に基づいて前記エリア補正値を算出する、ことを特徴とする半導体装置の製造装置。 - 請求項2に記載の半導体装置の製造装置であって、さらに、
前記ボンディングツールを下側から撮像する第二カメラを備え、
前記コントローラは、前記載置処理に先立って、前記ボンディングツールに保持された前記チップを前記第二カメラに撮像させた画像をツール画像として取得するツール画像取得処理を、実行するように構成されており、
前記コントローラは、前記ツール画像に基づいて前記チップの中心に対する前記ボンディングツールの中心のオフセット量であるチップオフセット量を算出し、前記チップオフセットおよび設計上の前記カメラオフセット量に基づいて、前記検査画像内における前記チップの理想位置を算出する、
ことを特徴とする半導体装置の製造装置。 - 請求項1から3のいずれか一項に記載の半導体装置の製造装置であって、
前記コントローラは、前記載置処理の実行後、前記ボンディングヘッドを水平移動させることなく、前記検査画像取得処理を実行する、ことを特徴とする半導体装置の製造装置。 - 請求項1から4のいずれか一項に記載の半導体装置の製造装置であって、
前記位置検出手段は、前記ボンディングヘッドの駆動系に搭載された位置センサを含む、ことを特徴とする半導体装置の製造装置。 - ボンディングツールおよび第一カメラが取り付けられたボンディングヘッドを、ステージの上の任意のポイントに移動させるステップと、
前記ボンディングツールで保持されたチップを、前記ステージの上面または前記ステージに載置された基板の上面である載置面に載置するステップと、
前記チップが載置された後の前記載置面を前記第一カメラに撮像させた画像を検査画像として取得するステップと、
前記検査画像内における前記チップの位置に基づいて、前記ボンディングツールに対する前記第一カメラのオフセット量であるカメラオフセット量の補正量をエリア補正量として算出するステップと、
算出されたエリア補正量と、前記任意のポイントの位置と、を対応付けて記憶装置に記憶するステップと、
を1以上のポイントそれぞれについて実行する、ことを特徴とする半導体装置の製造方法。 - 基板が載置されるステージと、
前記ステージに対して相対的に移動可能なボンディングヘッドと、
前記ボンディングヘッドに取り付けられ、チップを前記基板にボンディングするボンディングツールと、
前記ボンディングヘッドに取り付けられ、前記ステージ上面または前記ステージに載置された基板上面である載置面を上方から撮像する第一カメラと、
コントローラと、
を備え、前記コントローラは、
前記ボンディングヘッドを任意のポイントに移動させたうえで、前記ボンディングツールを駆動して、参照チップを前記載置面に載置させる第一載置処理と、
前記参照チップが載置された後の前記載置面を前記第一カメラに撮像させた画像を参照画像として取得する参照画像取得処理と、
前記参照画像に基づいて前記参照チップの真上に検査チップを載置できるように前記ボンディングヘッドを位置決めしたうえで、前記ボンディングツールを駆動して、検査チップを前記参照チップの上に載置させる第二載置処理と、
前記検査チップが載置された後の前記載置面を前記第一カメラに撮像させた画像を検査画像として取得する検査画像取得処理と、
前記検査画像内における前記参照チップと前記検査チップとの位置ずれに基づいて、前記ボンディングツールに対する前記第一カメラのオフセット量であるカメラオフセット量の補正量をエリア補正量として算出する補正値算出処理と、
算出されたエリア補正量と、前記任意のポイントの位置と、を対応付けて記憶装置に記憶する記憶処理と、
を1以上のポイントそれぞれについて実行するように構成されている、
ことを特徴とする半導体装置の製造装置。
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CN202080029800.XA CN113767465B (zh) | 2019-12-17 | 2020-11-10 | 半导体装置的制造装置以及半导体装置的制造方法 |
JP2021565367A JP7224695B2 (ja) | 2019-12-17 | 2020-11-10 | 半導体装置の製造装置、および、半導体装置の製造方法 |
US17/609,401 US20220223450A1 (en) | 2019-12-17 | 2020-11-10 | Apparatus for producing semiconductor device, and method for producing semiconductor device |
SG11202111631SA SG11202111631SA (en) | 2019-12-17 | 2020-11-10 | Apparatus for producing semiconductor device, and method for producing semiconductor device |
KR1020217037043A KR20210148350A (ko) | 2019-12-17 | 2020-11-10 | 반도체 장치의 제조 장치, 및 반도체 장치의 제조 방법 |
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CN114388418A (zh) * | 2021-12-28 | 2022-04-22 | 凌波微步半导体设备(常熟)有限公司 | 一种半导体焊线机的闭环位置补偿方法及系统 |
CN114758969A (zh) * | 2022-04-18 | 2022-07-15 | 无锡九霄科技有限公司 | 晶圆片背面视觉检测结构、检测方法和相关设备 |
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CN116313859B (zh) * | 2023-05-26 | 2023-09-15 | 青岛泰睿思微电子有限公司 | 悬臂产品的焊线方法 |
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JP2015032613A (ja) * | 2013-07-31 | 2015-02-16 | 凸版印刷株式会社 | 荷電ビーム描画装置用の照射位置補正装置、荷電ビーム照射位置の補正方法、フォトマスクの製造方法及び半導体装置 |
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JP6307730B1 (ja) * | 2016-09-29 | 2018-04-11 | 株式会社新川 | 半導体装置の製造方法、及び実装装置 |
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- 2020-11-10 JP JP2021565367A patent/JP7224695B2/ja active Active
- 2020-11-10 CN CN202080029800.XA patent/CN113767465B/zh active Active
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JP2012174755A (ja) * | 2011-02-18 | 2012-09-10 | Hitachi High-Tech Instruments Co Ltd | ダイボンダ及び半導体製造方法 |
WO2015170645A1 (ja) * | 2014-05-07 | 2015-11-12 | 株式会社新川 | ボンディング装置およびボンディング方法 |
JP2017069554A (ja) * | 2015-09-28 | 2017-04-06 | ベシ スウィツァーランド アーゲー | 部品を基板上に取り付ける装置 |
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CN114388418A (zh) * | 2021-12-28 | 2022-04-22 | 凌波微步半导体设备(常熟)有限公司 | 一种半导体焊线机的闭环位置补偿方法及系统 |
CN114758969A (zh) * | 2022-04-18 | 2022-07-15 | 无锡九霄科技有限公司 | 晶圆片背面视觉检测结构、检测方法和相关设备 |
CN114758969B (zh) * | 2022-04-18 | 2023-09-12 | 无锡九霄科技有限公司 | 晶圆片背面视觉检测结构、检测方法和相关设备 |
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CN113767465A (zh) | 2021-12-07 |
SG11202111631SA (en) | 2021-11-29 |
KR20210148350A (ko) | 2021-12-07 |
TWI775198B (zh) | 2022-08-21 |
CN113767465B (zh) | 2023-11-10 |
JPWO2021124732A1 (ja) | 2021-06-24 |
TW202139319A (zh) | 2021-10-16 |
US20220223450A1 (en) | 2022-07-14 |
JP7224695B2 (ja) | 2023-02-20 |
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