WO2021093443A1 - 触控基板及其制作方法、触控显示基板以及触控显示装置 - Google Patents

触控基板及其制作方法、触控显示基板以及触控显示装置 Download PDF

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Publication number
WO2021093443A1
WO2021093443A1 PCT/CN2020/115077 CN2020115077W WO2021093443A1 WO 2021093443 A1 WO2021093443 A1 WO 2021093443A1 CN 2020115077 W CN2020115077 W CN 2020115077W WO 2021093443 A1 WO2021093443 A1 WO 2021093443A1
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WO
WIPO (PCT)
Prior art keywords
touch
line
ground
sub
ground wire
Prior art date
Application number
PCT/CN2020/115077
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English (en)
French (fr)
Other versions
WO2021093443A9 (zh
Inventor
颜俊
董向丹
何帆
王领然
程博
都蒙蒙
张波
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to KR1020227006900A priority Critical patent/KR20220093310A/ko
Priority to EP20886920.6A priority patent/EP4060464B1/en
Priority to EP23162922.1A priority patent/EP4220361A3/en
Priority to US17/417,478 priority patent/US11537253B2/en
Publication of WO2021093443A1 publication Critical patent/WO2021093443A1/zh
Priority to US17/512,777 priority patent/US11853519B2/en
Publication of WO2021093443A9 publication Critical patent/WO2021093443A9/zh

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416Control or interface arrangements specially adapted for digitisers
    • G06F3/04164Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/13338Input devices, e.g. touch panels
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412Digitisers structurally integrated in a display
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416Control or interface arrangements specially adapted for digitisers
    • G06F3/0418Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0446Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40OLEDs integrated with touch screens
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04102Flexible digitiser, i.e. constructional details for allowing the whole digitising part of a device to be flexed or rolled like a sheet of paper
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04111Cross over in capacitive digitiser, i.e. details of structures for connecting electrodes of the sensing pattern where the connections cross each other, e.g. bridge structures comprising an insulating layer, or vias through substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0254High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
    • H05K1/0257Overvoltage protection
    • H05K1/0259Electrostatic discharge [ESD] protection

Definitions

  • At least one embodiment of the present disclosure relates to a touch substrate and a manufacturing method thereof, a touch display substrate and a touch display device.
  • AMOLED Active-matrix organic light-emitting diode
  • At least one embodiment of the present disclosure relates to a touch substrate and a manufacturing method thereof, a touch display substrate, and a touch display device, which can play a dual protective role, effectively reducing or avoiding static electricity from affecting touch traces and sensor patterns. It reduces the risk of failure of touch performance caused by ESD, and achieves the purpose of improving the anti-ESD capability, thereby avoiding the decline of product yield caused by ESD, and achieving the purpose of improving product yield.
  • At least one embodiment of the present disclosure provides a touch substrate including: a touch structure, a first ground wire, and at least one second ground wire.
  • the touch structure includes a sensor pattern and a touch trace.
  • the sensor pattern includes a plurality of first sensor patterns and a plurality of second sensor patterns, and the plurality of first sensor patterns and the plurality of second sensor patterns cross each other And are insulated from each other,
  • the touch control traces include a plurality of first touch traces and a plurality of second touch traces, and the first sensor pattern is at least connected to one of the plurality of first touch traces Connected, the second sensor pattern is connected to one of the plurality of second touch traces.
  • the first ground wire is located at the periphery of the touch structure. At least one second ground wire is located on a side of the first ground wire away from the touch structure.
  • the second ground wire and the first ground wire are short-circuited on one side of the touch structure.
  • the first ground wire and the touch structure are insulated from each other, and the second ground wire and the touch structure are insulated from each other.
  • the width of the second ground line is equal to or greater than the width of the first ground line.
  • the maximum distance between the first ground wire and the second ground wire is 20-50 ⁇ m, and the first ground wire is closest to the first ground wire.
  • the distance between the touch traces of 11 is 10-40 ⁇ m.
  • the width of the first ground line is 15-20 ⁇ m, and the width of the second ground line is 15-20 ⁇ m.
  • the first ground wire is arranged around the touch structure
  • the second ground wire is arranged around the first ground wire
  • the first ground wire and the The second ground line has a first interval
  • the touch structure, the first ground wire, and the at least one second ground wire are located on a base substrate
  • the second ground wire includes a first ground sub Line and a second grounding sub-line
  • the first grounding sub-line is closer to the base substrate than the second grounding sub-line
  • the first grounding sub-line and the second grounding sub-line are connected by a first via hole penetrating the insulating layer
  • the orthographic projection of the first grounding sub-line on the base substrate is the same as the The orthographic projection of the second ground sub-line on the base substrate at least partially overlaps.
  • the touch substrate further includes a flexible circuit board, and two ends of the second ground wire are connected to different pins of the flexible circuit board.
  • the touch substrate further includes a third ground wire, the first ground wire and the second ground wire form an opening on one side of the touch structure, and the first ground wire and the second ground wire form an opening on one side of the touch structure.
  • Three ground wires are located in the opening, and two ends of the third ground wire are connected to different pins of the flexible circuit board.
  • At least one of the first touch trace and the second touch trace includes a first touch sub-line and a second touch sub-line
  • the first touch sub-line A touch sub-line is closer to the base substrate than the second touch sub-line
  • the insulating layer is provided between the first touch sub-line and the second touch sub-line
  • the The first touch sub-line and the second touch sub-line are connected by a second via hole penetrating the insulating layer
  • the orthographic projection of the first touch sub-line on the base substrate is the same as the first touch sub-line.
  • the orthographic projections of the two touch sub-lines on the base substrate at least partially overlap.
  • one of the first sensor pattern and the second sensor pattern includes a main body part and a bridge line, and one of the main body part and the bridge line is connected to the first sensor pattern.
  • the ground sub-line is in the same layer, and the other of the main part and the bridge wire is in the same layer as the second ground sub-line.
  • the other of the first sensor pattern and the second sensor pattern includes an integrally formed part, and the integrally formed part is provided on the same layer as the main body part.
  • the first grounding line includes a third grounding subline and a fourth grounding subline
  • the third grounding subline is closer to the fourth grounding subline than the fourth grounding subline.
  • the base substrate, the insulating layer is provided between the third ground sub-line and the fourth ground sub-line, and the third ground sub-line and the fourth ground sub-line pass through the insulating layer
  • the third via is connected, and the orthographic projection of the third ground sub-line on the base substrate and the orthographic projection of the fourth ground sub-line on the base substrate at least partially overlap.
  • the bridge line, the first ground sub-line, the third ground sub-line and the first touch sub-line are in the same layer, and the integral forming part, The main body portion, the second ground sub-line, the fourth ground sub-line and the second touch sub-line are in the same layer.
  • At least one of the bridge line, the integrally formed part, and the main body part is a metal mesh structure.
  • the distance between the second ground wire closest to the first ground wire and the first ground wire is smaller than the touch trace closest to the first ground wire The distance from the first ground wire.
  • a plurality of second ground wires are included, and the distance between two adjacent second ground wires is smaller than the second ground wire closest to the first ground wire and the first ground wire. The distance between a ground wire.
  • At least one embodiment of the present disclosure further provides a touch display substrate, including any of the above touch substrates.
  • the touch display substrate includes a display area and a peripheral area outside the display area, and the at least one second ground line is located in the peripheral area.
  • the touch display substrate further includes a base substrate and a packaging film, wherein the touch structure, the first ground wire, and the at least one second ground wire are located at the The side of the packaging film away from the base substrate.
  • the packaging film includes a first film, a second film, and a third film, and the second film is located between the first film and the third film.
  • the first film and the third film are in contact with each other at the edge to form a contact portion; the orthographic projection of the at least one second ground wire on the base substrate falls into the second film on the base substrate Within the orthographic projection.
  • the packaging film includes a first film, a second film, and a third film, and the second film is located between the first film and the third film.
  • the first film and the third film are in contact with each other at the edges to form a contact portion; the orthographic projection of the at least one second ground wire on the base substrate falls into the contact portion on the base substrate In orthographic projection.
  • At least one embodiment of the present disclosure further provides a touch display device, including any of the above touch display substrates.
  • At least one embodiment of the present disclosure further provides a method for manufacturing a touch substrate, including: forming a first conductive film on a base substrate; patterning the first conductive film to form a first pattern; and the first pattern includes Bridge wire, first touch sub-line, first ground sub-line, third ground sub-line; forming an insulating film; forming a first via, a second via, a third via, and a fourth in the insulating film A via hole and a fifth via hole; forming a second conductive film; and patterning the second conductive film to form a second pattern; the second pattern includes: a second touch sub-line, a second ground sub-line, and a second Four grounding sub-lines, an integral part and a main body part.
  • the first grounding sub-line and the second grounding sub-line are connected through a first via to form a second grounding line.
  • the first touch-control sub-line is connected to the main body.
  • the second touch sub-line is connected through the second via hole to form a touch line, and the third ground sub-line and the fourth ground sub-line are connected through a third via hole to form a first ground line.
  • the adjacent main body parts are respectively connected to the bridge line through the fourth via hole and the fifth via hole.
  • the first pattern further includes a fifth ground sub-line
  • a sixth via hole is also formed in the insulating film
  • the second pattern further includes a sixth ground sub-line .
  • the fifth grounding sub-line and the sixth grounding sub-line are connected through the sixth via to form a third grounding line.
  • FIG. 1 is a plan view of a display substrate provided by an embodiment of the disclosure
  • FIG. 2 is a schematic plan view of a touch substrate provided by an embodiment of the present disclosure
  • Figure 3 is a cross-sectional view at AB in Figure 2;
  • Figure 4 is a cross-sectional view at CD in Figure 2;
  • FIG. 5 is a schematic diagram of the principle of dual protection against ESD in a touch substrate provided by an embodiment of the present disclosure
  • Figure 6 is a cross-sectional view at EF in Figure 5;
  • Figure 7 is a cross-sectional view at GH in Figure 5;
  • FIG. 8 is a partial cross-sectional view of a touch substrate provided by another embodiment of the present disclosure.
  • FIG. 9 is a schematic plan view of a touch substrate provided by another embodiment of the present disclosure.
  • FIG. 10 is a partial cross-sectional view of a touch substrate provided by an embodiment of the disclosure.
  • FIG. 11 is a partial cross-sectional view of a touch display substrate provided by an embodiment of the present disclosure.
  • FIG. 12 is a partial cross-sectional view of a touch display substrate provided by another embodiment of the present disclosure.
  • FIGS. 13A to 13F are flowcharts of a manufacturing method of a touch substrate provided by an embodiment of the disclosure.
  • touch technology such as flexible multi-layer On Cell (Flexible Multi-Layer On Cell, FMLOC) touch technology was born.
  • FMLOC Flexible Multi-Layer On Cell
  • Static electricity includes static electricity generated during production or use, but is not limited to this.
  • FIG. 1 is a plan view of a display substrate provided by an embodiment of the disclosure.
  • a single ground line 01 ie GND line, voltage is 0V
  • the voltage of the ground line is 0V.
  • the structure (Touch Structure/pattern) TS damages the trace 02 or damages the touch structure TS, thereby causing the risk of touch failure, as shown in Figure 1.
  • the possible damage area 001 is shown in FIG. 1.
  • the area where the display area A1 is located is also a touch area.
  • the touch structure TS includes a first sensor pattern (Sensor Pattern) SP1 and a second sensor pattern SP2.
  • the first sensor pattern SP1 and the second sensor pattern SP2 are insulated from each other and arranged crosswise.
  • the first sensor pattern SP1 includes Integrally forming part P0
  • the second sensor pattern SP2 includes a plurality of body parts MP and a bridge line Bd connecting adjacent body parts MP.
  • the main body MP and the first sensor pattern SP1 may be formed by the same film layer using the same patterning process, and the bridge line Bd may be formed by another film layer using another patterning process.
  • An insulating layer may be provided between the bridge line Bd and the first sensor pattern SP1.
  • FIG. 2 is a schematic plan view of a touch substrate provided by an embodiment of the present disclosure.
  • the touch substrate 10 includes: a touch structure TS, a first ground wire 11 and at least one second ground wire 12.
  • the embodiment shown in FIG. 2 takes the setting of one second ground wire 12 as an example for description. In other embodiments, multiple second ground wires 12 may also be provided.
  • the touch structure TS, the first ground line 11 and the second ground line 12 are located on the base substrate.
  • the touch structure TS includes a sensor pattern SP and a touch trace TL.
  • the sensor pattern SP includes a first sensor pattern SP1 and a second sensor pattern SP2, and the first sensor pattern SP1 and the second sensor pattern SP2 are insulated from each other.
  • the first sensor pattern SP1 and the second sensor pattern SP2 are arranged crosswise.
  • the first sensor pattern SP1 is perpendicular to the second sensor pattern SP2, but it is not limited thereto.
  • the extension direction of the first sensor pattern SP1 crosses the extension direction of the second sensor pattern SP2.
  • the extension direction of the first sensor pattern SP1 is perpendicular to the extension direction of the second sensor pattern SP2, but it is not limited thereto.
  • the extension direction of a certain element may refer to the general trend or direction of the element, but is not limited thereto.
  • the touch trace TL includes a first touch trace TL1 and a second touch trace TL2.
  • the first sensor pattern SP1 is connected to the first touch trace TL1
  • the second sensor pattern SP2 is connected to the second touch trace TL2.
  • FIG. 2 schematically shows part of the touch trace TL.
  • the peripheral static electricity is first released by the second ground wire, and the static electricity that jumps in is released by the first ground wire, which can play the role of double protection and is effective.
  • Reduce or avoid the impact of static electricity on touch traces and sensor patterns reduce the risk of touch performance failure caused by ESD, and achieve the purpose of improving ESD prevention capabilities, thereby avoiding the decline in product yield caused by ESD, and achieving product enhancement The purpose of yield.
  • the second ground line 12 and the first ground line 11 are short-circuited on one side of the touch structure TS, but it is not limited to this.
  • the second ground line 12 and the first ground line 11 are short-circuited on one side of the touch structure TS and after the touch traces TL are gathered.
  • the second ground wire 12 and the first ground wire 11 may also be short-circuited together at other positions by a connecting wire.
  • the first ground wire 11 and the second ground wire 12 and the touch structure TS are respectively insulated from each other. That is, the first ground line 11 and the touch structure TS are insulated from each other, and the second ground line 12 and the touch structure TS are insulated from each other.
  • the first ground wire 11 is located at the periphery of the touch structure TS.
  • the at least one second ground wire 12 is located on a side of the first ground wire 11 away from the touch structure TS. That is, in a plane parallel to the surface of the base substrate, the second ground line 12 is located on the side of the first ground line 11 away from the touch structure TS.
  • the plane parallel to the surface of the base substrate is the surface of the base substrate used to fabricate various elements.
  • that the A element is located on the periphery of the B element means that in a plan view, the A element is located on the periphery of the B element.
  • the A element and the B element may have the same height relative to the base substrate, that is, the distance from the A element to the base substrate is equal to the distance from the B element to the base substrate, but is not limited to this.
  • the distance from the A element to the base substrate and the distance from the B element to the base substrate may not be equal.
  • the embodiment shown in FIG. 2 takes the first sensor pattern SP1 extending in the horizontal direction and the second sensor pattern SP2 extending in the vertical direction as an example for description, but it is not limited to this.
  • the embodiment shown in FIG. 2 takes the first sensor pattern SP1 as the receiving sensor (Rx) and the second sensor pattern SP2 as the transmitting sensor (Tx) as an example for description, but it is not limited to this. In other embodiments, both Can be interchanged. That is, in some embodiments, the first sensor pattern SP1 is a transmitting sensor (Tx), and the second sensor pattern SP2 is a receiving sensor (Rx).
  • a plurality of first sensor patterns SP1 and a plurality of second sensor patterns SP2 are shown in FIG. 2.
  • the plurality of first sensor patterns SP1 and the plurality of second sensor patterns SP2 cross each other and are insulated from each other.
  • One of the left and right ends of each first sensor pattern SP1 is connected to one first touch trace TL1, or the left and right ends of each first sensor pattern SP1 are connected to two first touch traces TL1, respectively.
  • One of the upper and lower ends of each second sensor pattern SP2 is connected to a second touch trace TL2, or the upper and lower ends of each second sensor pattern SP2 are respectively connected to two second touch traces TL2 .
  • the left end of each first sensor pattern SP1 is connected to a first touch trace TL1
  • the upper and lower ends of each second sensor pattern SP2 are connected to two second touch traces.
  • TL2 are connected separately as an example for illustration.
  • the touch substrate 10 further includes a flexible circuit board 20, and two ends of the second ground wire 12 are connected to different pins of the flexible printed circuit (FPC) 20.
  • the second ground wire 12 and the first ground wire 11 are shorted together near the FPC.
  • the second ground wire 12 and the first ground wire 11 are short-circuited on the side of the touch structure TS close to the FPC 20.
  • both ends of the second ground wire 12 are shorted together on one side of the touch structure TS and both ends of the first ground wire 11 respectively.
  • the first ground wire 11 and the second ground wire 12 can be respectively led to pads, and these pads are bound to different pins of the flexible circuit board 20 respectively.
  • the second ground line 12 and the first ground line 11 are short-circuited on the side of the touch structure TS close to the pad of the touch trace TL.
  • the FPC 20 includes a plurality of pins 201.
  • different pins of the flexible circuit board 20 can be insulated from each other so that signals can be transmitted separately.
  • each pin 201 can correspond to a pad and be connected to the pad.
  • one of the first sensor pattern SP1 and the second sensor pattern SP2 includes a main body part MP and a bridge line Bd.
  • the other of the first sensor pattern SP1 and the second sensor pattern SP2 includes an integral part P0.
  • Two adjacent body parts MP of the plurality of body parts MP are connected by a bridge line Bd.
  • the adjacent main body parts MP included in the same first sensor pattern SP1 are separately provided on opposite sides of a second sensor pattern SP2.
  • adjacent main body parts MP included in the same first sensor pattern SP1 are separately provided on the upper and lower sides of one second sensor pattern SP2.
  • the multiple main body parts MP and the integral forming part P0 may be located on the same layer, formed by the same film layer using the same patterning process, and the bridge line Bd is located on another layer.
  • the first sensor pattern SP1 is formed as a whole and the second sensor pattern SP2 is formed in segments as an example for description.
  • the second sensor pattern SP2 may be integrally formed, and the first sensor pattern SP1 may be formed in segments.
  • the width of the second ground wire 12 is equal to or greater than the width of the first ground wire 11, but it is not limited thereto. In other embodiments, the width of the second ground line 12 may also be smaller than the width of the first ground line 11.
  • the width of the first ground wire 11 is 15-20 ⁇ m
  • the width of the second ground wire 12 is 15-20 ⁇ m
  • the maximum distance between the first ground wire 11 and the second ground wire 12 is 20-50 ⁇ m
  • the first ground wire The distance between the line 11 and the touch trace TL closest to the first ground line 11 is 10-40 ⁇ m.
  • the width of the ground wire or the trace is the dimension in the direction perpendicular to the direction in which it extends.
  • the first ground wire 11 is arranged around the touch structure TS, and the second ground wire 12 is arranged around the first ground wire 11.
  • the second ground wire 12 is arranged around the touch structure TS, and the first ground wire 11 is arranged around the touch structure TS.
  • the second ground line 12 is arranged around the sensor pattern SP and the touch trace TL, and the first ground line 11 is arranged around the sensor pattern SP and the touch trace TL.
  • the first ground wire 11 and the second ground wire 12 form an opening 30 on one side of the touch structure TS. As shown in FIG. 2, the opening 30 is located on the lower side of the touch structure TS.
  • the touch substrate further includes a third ground wire 13, and the third ground wire 13 is located at the opening 30.
  • the third ground wire 13 is located in the opening 30.
  • both ends of the third ground wire 13 are connected to different pins of the flexible circuit board FPC20.
  • the third ground wire 13 is located between the first touch wire TL1 and the second touch wire TL2.
  • the third ground line 13 is located between the pin of the FPC20 connected to the first touch trace TL1 and the pin of the FPC20 connected to the second touch trace TL2.
  • At least one of the first ground line 11, the second ground line 12, and the touch wiring TL may be overlapped and overlapped in a direction perpendicular to the base substrate.
  • the two connected sub-lines are formed, that is, the design of using double-layer sub-lines to form the wiring.
  • Fig. 3 is a cross-sectional view at AB in Fig. 2.
  • Fig. 4 is a cross-sectional view at CD in Fig. 2. The following description will be given in conjunction with FIG. 2, FIG. 3, and FIG. 4.
  • the second ground line 12 includes a first ground sub-line 121 and a second ground sub-line 122, and the first ground sub-line 121 and the second ground sub-line 122 An insulating layer IS is provided therebetween, and the first grounding sub-line 121 and the second grounding sub-line 122 are connected through a first via V1 penetrating the insulating layer IS.
  • a plurality of first via holes V1 are distributed in the insulating layer IS, and the first ground sub-line 121 and the second ground sub-line 122 are connected through the plurality of first via holes V1 at a set position.
  • FIG. 3 is a cross-sectional view of the position where the first via hole is provided in the insulating layer IS
  • FIG. 4 is a cross-sectional view of the position where the first via hole is not provided in the insulating layer IS.
  • the orthographic projection of the first ground sub-line 121 on the base substrate BS and the orthographic projection of the second ground sub-line 122 on the base substrate BS at least partially overlap.
  • the orthographic projection of the first ground sub-line 121 on the base substrate BS coincides with the orthographic projection of the second ground sub-line 122 on the base substrate BS, but it is not limited thereto.
  • the first ground sub-line 121 is closer to the base substrate BS than the second ground sub-line 122 is.
  • the first ground sub-line 121 is in contact with the second ground sub-line 122.
  • the touch wiring TL (second touch wiring TL2) includes a first touch sub-line TL01 and a second touch sub-line TL02.
  • An insulating layer IS is provided between the touch sub-line TL01 and the second touch sub-line TL02, and the first touch sub-line TL01 and the second touch sub-line TL02 are connected through a second via V2 penetrating the insulating layer IS.
  • a plurality of second via holes V2 are distributed in the insulating layer IS, and the first touch sub-line TL01 and the second touch sub-line TL02 are connected through the plurality of second via holes V2 at a set position.
  • FIG. 3 is a cross-sectional view of the position where the second via hole is provided in the insulating layer IS
  • FIG. 4 is a cross-sectional view of the position where the second via hole is not provided in the insulating layer IS.
  • the first touch control trace TL1 can also adopt the same structure as the second touch control trace TL2.
  • the first touch sub-line TL01 is closer to the base substrate BS than the second touch sub-line TL02.
  • the orthographic projection of the first touch sub-line TL01 on the base substrate BS and the orthographic projection of the second touch sub-line TL02 on the base substrate BS at least partially overlap.
  • the orthographic projection of the first touch sub-line TL01 on the base substrate BS coincides with the orthographic projection of the second touch sub-line TL02 on the base substrate BS, but it is not limited thereto.
  • the first touch sub-line TL01 is in contact with the second touch sub-line TL02.
  • the first ground line 11 includes a third ground sub-line 111 and a fourth ground sub-line 112, and the third ground sub-line 111 and the fourth ground sub-line 112
  • An insulating layer IS is provided therebetween, and the third grounding sub-line 111 and the fourth grounding sub-line 112 are connected through a third via V3 penetrating the insulating layer IS.
  • a plurality of third via holes V3 are distributed in the insulating layer IS, and the third ground sub-line 111 and the fourth ground sub-line 112 are connected at a set position through the plurality of third via holes V3.
  • FIG. 3 is a cross-sectional view of the position where the third via hole is provided in the insulating layer IS
  • FIG. 4 is a cross-sectional view of the position where the third via hole is not provided in the insulating layer IS.
  • the third ground sub-line 111 is closer to the base substrate BS than the fourth ground sub-line 112 is.
  • the orthographic projection of the third ground sub-line 111 on the base substrate BS and the orthographic projection of the fourth ground sub-line 112 on the base substrate BS at least partially overlap.
  • the orthographic projection of the third ground sub-line 111 on the base substrate BS coincides with the orthographic projection of the fourth ground sub-line 112 on the base substrate BS, but it is not limited thereto.
  • the third ground sub-line 111 is in contact with the fourth ground sub-line 112.
  • FIG. 5 is a schematic diagram of the principle of dual protection against ESD in a touch substrate provided by an embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of the structure of part of the touch substrate in FIG. 2.
  • Figure 5 shows the touch trace TL.
  • the touch substrate provided by an embodiment of the present disclosure is provided with at least one second ground wire 12 at a certain distance outside the first ground wire 11, and the peripheral static electricity is first released by the second ground wire 12,
  • the static electricity that jumps in is released by the first ground wire 11, which plays a double protective role for the touch trace TL and the touch structure TS, reduces the risk of touch performance failure caused by ESD, and achieves the purpose of improving the ability to prevent ESD , Thereby avoiding the decrease in product yield caused by ESD, and achieving the purpose of improving product yield.
  • FIG. 6 is a cross-sectional view at EF in FIG. 5, and FIG. 7 is a cross-sectional view at GH in FIG. 5.
  • the integral forming part P0 and the main body part MP are arranged in the same layer.
  • the integral part P0 and the main body part MP have a metal mesh structure, but it is not limited to this.
  • two adjacent body parts MP are connected to the bridge line Bd through the fourth via V11 and the fifth via V12, respectively.
  • one of the main part MP and the bridge line Bd is on the same layer as the first ground sub-line 121, and the other of the main part MP and the bridge line Bd is on the same layer as the second ground sub-line 122.
  • the array substrate provided by an embodiment of the present disclosure may be formed by the following method.
  • a first conductive film is formed on the base substrate BS, and the first conductive film is patterned to form a bridge line Bd, a first touch sub-line TL01, a first ground sub-line 121 and a third ground sub-line 111.
  • the first via V1, the second via V2, the third via V3, the fourth via V11, and the fifth via V12 are formed in the insulating film to form the insulating layer IS.
  • a second conductive film is formed, and the second conductive film is patterned to form the second touch sub-line TL02, the second ground sub-line 122, the fourth ground sub-line 112, the integral part P0 and the main body part MP, the first
  • the ground sub-line 121 and the second ground sub-line 122 are connected through the first via V1
  • the first touch sub-line TL01 and the second touch sub-line TL02 are connected through the second via V2
  • the third ground sub-line 111 is connected to the second via V2.
  • the four ground sub-lines 112 are connected through the third via V3, and the adjacent main body parts MP are respectively connected to the bridge line Bd through the fourth via V11 and the fifth via V12.
  • the first conductive film and the second conductive film can be made of metal materials
  • the integral part P0 and the main body MP can form a metal mesh structure
  • the bridge line Bd can form a metal mesh structure, which is composed of the first conductive film or the second conductive film.
  • the remaining structures formed by the patterning of the conductive thin film may form a metal mesh structure or may not be a metal mesh structure.
  • FIG. 8 is a partial cross-sectional view of a touch substrate provided by another embodiment of the disclosure.
  • the touch substrate includes a first ground line 11, a second ground line 12 and a plurality of touch traces TL.
  • the touch trace TL includes a first touch sub-line TL01 and a second touch sub-line.
  • TL02, the first touch sub-line TL01 and the second touch sub-line TL02 are connected by a second via V2 penetrating the insulating layer IS.
  • Figure 8 shows four touch traces TL. The number of touch traces TL in the touch substrate can be determined according to needs.
  • the distance between the second ground wire 12 closest to the first ground wire 11 and the first ground wire 11 is the first distance D1
  • the touch trace TL closest to the first ground wire 11 is The distance between the first ground wires 11 is a second distance D2.
  • the first distance D1 is smaller than the second distance D2.
  • the distance D between adjacent touch traces TL is smaller than the second distance D2.
  • the distance D between adjacent touch traces TL is smaller than the first distance D1, but it is not limited to this.
  • the distance D between every two adjacent touch traces TL is equal, but it is not limited to this.
  • FIG. 9 is a schematic plan view of a touch substrate provided by another embodiment of the present disclosure.
  • the touch substrate shown in FIG. 9 is provided with a plurality of second ground wires 12, as shown in FIG.
  • the illustrated touch substrate is described by taking two second ground wires 12 as an example.
  • the plurality of second ground wires 12 may all be short-circuited with the first ground wire 11.
  • the distance between two adjacent second ground wires 12 is a third distance D3, and the third distance D3 is smaller than the first distance D1, so that anti-static and narrow frame design can be considered.
  • the third distance D3 may also be greater than or equal to the first distance D1.
  • FIG. 10 is a partial cross-sectional view of a touch substrate provided by an embodiment of the disclosure. 8 and 10, the distance between adjacent second ground wires 12 is a third distance D3, the third distance D3 is smaller than the first distance D1, and the third distance D3 is smaller than the second distance D2.
  • At least one embodiment of the present disclosure further provides a touch display substrate, including any of the above touch substrates.
  • the touch display substrate includes a display area A1 and a peripheral area A2 outside the display area A1, and at least one second ground wire 12 is located in the peripheral area A2.
  • the area within the dashed frame in FIG. 2 is the display area A1, and the area outside the display area A1 is the peripheral area A2.
  • the peripheral area A2 surrounds the display area A1.
  • the display panel and the touch structure can be integrated. Therefore, FMLOC (Flexible Multiple Layer On Cell) touch technology came into being.
  • FMLOC touch technology is to directly fabricate various electrode layers and various traces of the touch structure on the packaging film, thereby integrating the touch structure in the display On the panel. Therefore, the display device adopting the FMLOC touch technology can not only realize the lightness and thinness of the display device, but also realize the touch based on the flexible display.
  • FIG. 11 is a partial cross-sectional view of a touch display substrate provided by an embodiment of the disclosure.
  • a base substrate 100 is provided on the supporting substrate 200.
  • the base substrate 100 may be a flexible substrate, for example, polyimide (PI), but is not limited thereto.
  • the material of the base substrate 100 can be selected as required.
  • the support substrate 200 may be a glass substrate. In some embodiments, the supporting substrate 200 may be removable.
  • An array of Thin Film Transistor (TFT) 3123 may be disposed on the base substrate 100, and only one thin film transistor 3123 is shown in FIG. 11.
  • the thin film transistor 3123 may include a semiconductor layer, a gate electrode, a gate insulating layer, a source electrode and a drain electrode, and the like.
  • a buffer layer 111a, a semiconductor layer 112a, a gate insulating layer 113, a gate 114, an interlayer dielectric layer 115, and a source-drain layer 116 may be sequentially disposed on the base substrate 100.
  • the source-drain layer 116 includes a source electrode 1161 and a drain electrode 1162.
  • the source electrode 1161 and the drain electrode 1162 are spaced apart from each other and can be connected to the semiconductor layer 112a through via holes, respectively.
  • the thin film transistor 3123 may be provided with a planarization layer 117, and a device to be packaged (OLED) 2123 may be provided on the planarization layer 117.
  • the device to be packaged (OLED) 2123 may include a first electrode 121a, a light-emitting function layer 122a and a second electrode 123.
  • the electrode 121 a may be electrically connected to the drain 1162 through a via hole penetrating the planarization layer 117.
  • a pixel defining layer 118 may be disposed on the first electrode 121a to facilitate the formation of the light-emitting function layer 122a.
  • the second electrode 123 may be electrically connected to the electrode lead 1163 through the connection electrode 1211.
  • the light-emitting functional layer 122a may include a light-emitting layer, and may also include other functional layers, for example, may further include at least one of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer, but is not limited thereto.
  • the electrode lead 1163 can be formed in the same layer as the source and drain layer 116.
  • the flat layer 117 may be a resin layer.
  • An encapsulation film 1123 may be formed on the device to be encapsulated (OLED) 2123.
  • the packaging film 1123 covers the device 2123 to be packaged to prevent water and oxygen from attacking the device 2123 to be packaged.
  • the structure of the device to be packaged (OLED) 2123 is not limited to this.
  • the base substrate 100 in FIG. 11 may be the above-mentioned base substrate BS.
  • the packaging film 1123 is disposed on the base substrate 100.
  • the packaging film 1123 includes a first film 101, a second film 102, and a third film 103 that are sequentially away from the base substrate 100.
  • the second film 102 is sandwiched between Between the first film 101 and the third film 103 and at the edge position, the first film 101 and the third film 103 are in contact.
  • the first thin film 101 and the third thin film 103 may be inorganic thin films, such as SiNx, SiOx, SiOxNy, SiCxNy, and other inorganic oxides, but are not limited thereto.
  • the second film 102 may be an organic film, for example, it may be an organic substance such as a resin, but is not limited thereto.
  • the resin may be, for example, a thermosetting resin, and the thermosetting resin includes, for example, epoxy resin, but is not limited thereto.
  • the resin may be, for example, a thermoplastic resin, and the thermoplastic resin includes, for example, acrylic (PMMA) resin, but is not limited thereto.
  • the first thin film 101 and the third thin film 103 can be produced by a chemical vapor deposition (Chemical Vapor Deposition, CVD) method, and the second thin film 102 can be produced by an ink jet printing (IJP) method. Both the first film 101 and the third film 103 can serve as a water blocking layer.
  • the first film 101 may include a plurality of laminated sublayers
  • the second film 102 and the third film 103 may also include a plurality of laminated sublayers.
  • FIG. 11 also shows the first barrier dam 106 and the second barrier dam 107.
  • the first barrier dam 106 may be formed in the same layer as the pixel defining layer 118.
  • the second blocking dam 107 may include a first sub-blocking dam 1071 and a second sub-blocking dam 1072.
  • the first sub-barrier dam 1071 may be formed in the same layer as the flat layer 117
  • the second sub-barrier dam 1072 may be formed in the same layer as the pixel defining layer 118.
  • the second film 102 is located between the first film 101 and the third film 103, and the first film 101 and the third film 103 contact each other at the edges to form a contact portion 1031.
  • FIG. 11 also shows the display area A1 and the peripheral area A2.
  • the touch structure TS is located in the display area A1
  • the touch trace TL is located in the peripheral area A2.
  • the orthographic projection of the touch trace TL on the base substrate 100 falls within the orthographic projection of the second thin film 102 on the base substrate 100.
  • the orthographic projection of the first ground wire 11 on the base substrate 100 falls within the orthographic projection of the second thin film 102 on the base substrate 100.
  • the orthographic projection of the second ground wire 12 on the base substrate 100 falls within the orthographic projection of the second thin film 102 on the base substrate 100.
  • the orthographic projection of the plurality of second ground wires 12 on the base substrate 100 falls within the orthographic projection of the second thin film 102 on the base substrate 100.
  • FIG. 12 is a partial cross-sectional view of a touch display substrate provided by another embodiment of the disclosure.
  • the touch display substrate shown in FIG. 12 has adjusted the arrangement positions of the first ground wire 11 and the second ground wire 12.
  • the orthographic projection of the first ground wire 11 on the base substrate 100 is outside the orthographic projection of the second thin film 102 on the base substrate 100.
  • the orthographic projection of the second ground wire 12 on the base substrate 100 is outside the orthographic projection of the second thin film 102 on the base substrate 100.
  • the orthographic projection of the plurality of second ground wires 12 on the base substrate 100 is outside the orthographic projection of the second thin film 102 on the base substrate 100.
  • the orthographic projection of the second ground wire 12 on the base substrate 100 falls within the orthographic projection of the contact portion 1031 on the base substrate 100.
  • the orthographic projection of the first ground wire 11 on the base substrate 100 falls within the orthographic projection of the first barrier dam 106 on the base substrate 100.
  • the orthographic projection of the second ground wire 12 on the base substrate 100 falls within the orthographic projection of the second barrier dam 107 on the base substrate 100.
  • At least one embodiment of the present disclosure further provides a touch display device, which includes any of the above touch display substrates.
  • the touch display device includes a flexible multi-layer on-cell (Flexible multi-layer on-cell, FMLOC) product, but it is not limited thereto.
  • Touch display devices can be display devices such as liquid crystal displays, electronic paper, OLED (Organic Light-Emitting Diode) displays, and TVs, digital cameras, mobile phones, watches, tablets, laptops, and navigation devices that include these display devices. Any product or component with touch and display functions, such as an instrument.
  • the above-mentioned distance may refer to a pitch.
  • the first distance D1, the second distance D2, the distance D, and the third distance D3 may respectively refer to distances.
  • At least one embodiment of the present disclosure also provides a manufacturing method of a touch substrate, as shown in FIGS. 13A to 13F, including the following steps.
  • a first conductive film L1 is formed on the base substrate.
  • the first conductive film L1 is patterned to form a first pattern P1;
  • the first pattern P1 includes a bridge line Bd, a first touch sub-line TL01, a first ground sub-line 121, and a third ground The sub-line 111 and the fifth ground sub-line 131.
  • an insulating film ISF is formed.
  • a first via V1, a second via V2, a third via V3, a fourth via V11, a fifth via V12, and a sixth via V31 are formed in the insulating film ISF. .
  • a second conductive film L2 is formed.
  • the second conductive film L2 is patterned to form a second pattern P2;
  • the second pattern P2 includes: a second touch sub-line TL02, a second ground sub-line 122, and a fourth ground sub-line 112 ,
  • the integral part P0, the main body part MP and the sixth ground sub-line 132, the first ground sub-line 121 and the second ground sub-line 122 are connected through the first via V1 to form the second ground line 12, the first touch sub-line
  • the line TL01 and the second touch sub-line TL02 are connected through the second via V2 to form a touch line TL, and the third ground sub-line 111 and the fourth ground sub-line 112 are connected through the third via V3 to form a first ground line 11.
  • the adjacent main body part MP is respectively connected to the bridge line Bd through the fourth via V11 and the fifth via V12 to form the second sensor pattern SP2; the integral part P0 is the first sensor pattern SP1; the fifth ground sub The line 131 and the sixth ground sub-line 132 are connected through the sixth via V31 to form the third ground line 13.
  • the FPC20 is bound to the touch substrate by crimping.
  • Another embodiment of the present disclosure also provides a manufacturing method of a touch substrate. Refer also to FIGS. 13A to 13F, which includes the following steps.
  • a first conductive film L1 is formed on the base substrate.
  • the first conductive film L1 is patterned to form a first pattern P1; the first pattern P1 includes a bridge line Bd, a first touch sub-line TL01, a first ground sub-line 121 and a third ground Subline 111.
  • an insulating film ISF is formed.
  • a first via V1, a second via V2, a third via V3, a fourth via V11, and a fifth via V12 are formed in the insulating film ISF to form an insulating layer IS .
  • a second conductive film L2 is formed.
  • the second conductive film L2 is patterned to form a second pattern P2;
  • the second pattern P2 includes: a second touch sub-line TL02, a second ground sub-line 122, and a fourth ground sub-line 112 ,
  • the integral part P0 and the main body part MP, the first ground sub-line 121 and the second ground sub-line 122 are connected through the first via V1 to form the second ground line 12, the first touch sub-line TL01 and the second touch
  • the sub-line TL02 is connected through the second via V2 to form a touch line TL, and the third ground sub-line 111 and the fourth ground sub-line 112 are connected through the third via V3 to form the first ground line 11.
  • the MP is connected to the bridge line Bd through the fourth via V11 and the fifth via V12 respectively to form the second sensor pattern SP2; the integral part P0 is the first sensor pattern SP1.
  • the FPC20 is bound to the touch substrate by crimping.
  • FIGS. 13A to 13F also do not show all touch lines TL, and only seven touch lines TL are schematically shown.
  • a touch line TL is provided on the upper and lower sides of the second sensor pattern SP2, and the first sensor pattern SP1 is only provided with a touch line TL on the left side.
  • first sensor pattern SP1 and the second sensor pattern SP2 are not limited to those shown in the figure, and can be determined according to needs.
  • the number of second ground wires 12 is not limited to that shown in the figure.
  • the insulating film ISF can be made of insulating materials, for example, silicon oxide, silicon nitride, silicon oxynitride, or resin can be used, but it is not limited thereto.
  • first conductive film L1 and the second conductive film L2 can be made of metal materials, but are not limited thereto.
  • the elements arranged in the same layer are formed by the same film layer using the same patterning process.
  • the elements arranged in the same layer are located on the surface of the same element away from the base substrate, but it is not limited to this.
  • the elements arranged in the same layer can have different heights relative to the base substrate.
  • the patterning or patterning process may include only a photolithography process, or a photolithography process and an etching step, or may include other processes for forming predetermined patterns such as printing and inkjet.
  • the photolithography process refers to the process including film formation, exposure, development, etc., using photoresist, mask, exposure machine, etc. to form patterns.
  • the corresponding patterning process can be selected according to the structure formed in the embodiment of the present disclosure.

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Abstract

提供一种触控基板及其制作方法、触控显示基板以及触控显示装置。触控基板包括触控结构、第一接地线和至少一条第二接地线。触控结构包括传感器图形和触控走线,传感器图形包括第一传感器图形和第二传感器图形,第一传感器图形与第二传感器图形彼此交叉且相互绝缘,触控走线包括第一触控走线和第二触控走线,第一传感器图形与第一触控走线相连,第二传感器图形与第二触控走线相连。第一接地线位于触控结构的外围。至少一条第二接地线位于第一接地线的远离触控结构的一侧。该触控基板可以起到双重防护的作用,有效减轻或避免静电对触控结构的影响,降低了因ESD造成的触控性能失效风险,达到提升防ESD能力的目的。

Description

触控基板及其制作方法、触控显示基板以及触控显示装置
相关申请的交叉引用
本专利申请要求于2019年11月15日递交的中国专利申请第201911121001.0号的优先权,在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开至少一实施例涉及一种触控基板及其制作方法、触控显示基板以及触控显示装置。
背景技术
随着有源矩阵有机发光二极管(Active-matrix organic light-emitting diode,AMOLED)的迅速发展,触控显示装置例如手机的发展进入了全面屏以及窄边框时代,为了给用户带来更优的使用体验,全面屏、窄边框、高分辨率、可卷曲穿戴、可折叠等特性的显示装置必将成为未来AMOLED显示装置的重要发展方向。
发明内容
本公开的至少一实施例涉及一种触控基板及其制作方法、触控显示基板以及触控显示装置,可以起到双重防护的作用,有效减轻或避免静电对触控走线和传感器图形的影响,降低了因ESD造成的触控性能失效风险,达到提升防ESD能力的目的,进而避免了因ESD造成的产品良率下降,达到提升产品良率的目的。
本公开的至少一实施例提供一种触控基板,包括:触控结构、第一接地线以及至少一条第二接地线。触控结构包括传感器图形和触控走线,所述传感器图形包括多个第一传感器图形和多个第二传感器图形,所述多个第一传感器图形与所述多个第二传感器图形彼此交叉且相互绝缘,所述触控走线包括多条第一触控走线和多条第二触控走线,所述第一传感器图形至少与所述多条第一触控走线中的一条相连,所述第二传感器图形与所述多条第二触控 走线中的一条相连。第一接地线位于所述触控结构的外围。至少一条第二接地线,位于所述第一接地线的远离所述触控结构的一侧。
在本公开的一个或多个实施例中,所述第二接地线与所述第一接地线在所述触控结构的一侧短接。
在本公开的一个或多个实施例中,所述第一接地线与所述触控结构彼此绝缘,所述第二接地线与所述触控结构彼此绝缘。
在本公开的一个或多个实施例中,所述第二接地线的宽度等于或大于所述第一接地线的宽度。
在本公开的一个或多个实施例中,所述第一接地线和所述第二接地线之间的最大距离为20~50μm,所述第一接地线到最靠近所述第一接地线11的触控走线之间的距离为10~40μm。
在本公开的一个或多个实施例中,所述第一接地线的宽度为15~20μm,所述第二接地线的宽度为15~20μm。
在本公开的一个或多个实施例中,所述第一接地线围绕所述触控结构设置,所述第二接地线围绕所述第一接地线设置,所述第一接地线和所述第二接地线具有第一间隔。
在本公开的一个或多个实施例中,所述触控结构、所述第一接地线和所述至少一条第二接地线位于衬底基板上,所述第二接地线包括第一接地子线和第二接地子线,所述第一接地子线比所述第二接地子线更靠近所述衬底基板,所述第一接地子线和所述第二接地子线之间设有绝缘层,所述第一接地子线和所述第二接地子线通过贯穿所述绝缘层的第一过孔相连,所述第一接地子线在所述衬底基板上的正投影与所述第二接地子线在所述衬底基板上的正投影至少部分交叠。
在本公开的一个或多个实施例中,触控基板还包括柔性电路板,所述第二接地线的两端连接至所述柔性电路板的不同引脚。
在本公开的一个或多个实施例中,触控基板还包括第三接地线,所述第一接地线和所述第二接地线在所述触控结构的一侧形成开口,所述第三接地线位于所述开口内,所述第三接地线的两端连接至所述柔性电路板的不同引脚。
在本公开的一个或多个实施例中,所述第一触控走线和所述第二触控走 线至少之一包括第一触控子线和第二触控子线,所述第一触控子线比所述第二触控子线更靠近所述衬底基板,所述第一触控子线和所述第二触控子线之间设有所述绝缘层,所述第一触控子线和所述第二触控子线通过贯穿所述绝缘层的第二过孔相连,所述第一触控子线在所述衬底基板上的正投影与所述第二触控子线在所述衬底基板上的正投影至少部分交叠。
在本公开的一个或多个实施例中,所述第一传感器图形和所述第二传感器图形之一包括主体部分和桥接线,所述主体部分和所述桥接线之一与所述第一接地子线同层,所述主体部分和所述桥接线之另一与所述第二接地子线同层。
在本公开的一个或多个实施例中,所述第一传感器图形和所述第二传感器图形之另一包括整体形成部分,所述整体形成部分与所述主体部分同层设置。
在本公开的一个或多个实施例中,所述第一接地线包括第三接地子线和第四接地子线,所述第三接地子线比所述第四接地子线更靠近所述衬底基板,所述第三接地子线和所述第四接地子线之间设有所述绝缘层,所述第三接地子线和所述第四接地子线通过贯穿所述绝缘层的第三过孔相连,所述第三接地子线在所述衬底基板上的正投影与所述第四接地子线在所述衬底基板上的正投影至少部分交叠。
在本公开的一个或多个实施例中,所述桥接线、所述第一接地子线、所述第三接地子线和所述第一触控子线同层,所述整体形成部分、所述主体部分、所述第二接地子线、所述第四接地子线和所述第二触控子线同层。
在本公开的一个或多个实施例中,所述桥接线、所述整体形成部分和所述主体部分至少之一为金属网格结构。
在本公开的一个或多个实施例中,最靠近所述第一接地线的第二接地线与所述第一接地线之间的距离小于最靠近所述第一接地线的触控走线与所述第一接地线之间的距离。
在本公开的一个或多个实施例中,包括多条第二接地线,相邻两条第二接地线之间的距离小于最靠近所述第一接地线的第二接地线与所述第一接地线之间的距离。
本公开至少一个实施例还提供一种触控显示基板,包括上述任一触控基 板。
在本公开的一个或多个实施例中,所述触控显示基板包括显示区和所述显示区外的周边区,所述至少一条第二接地线位于所述周边区。
在本公开的一个或多个实施例中,触控显示基板还包括衬底基板和封装薄膜,其中,所述触控结构、所述第一接地线和所述至少一条第二接地线位于所述封装薄膜的远离所述衬底基板的一侧。
在本公开的一个或多个实施例中,所述封装薄膜包括第一薄膜、第二薄膜和第三薄膜,所述第二薄膜位于所述第一薄膜和所述第三薄膜之间,所述第一薄膜和所述第三薄膜在边缘彼此接触形成接触部分;所述至少一条第二接地线在所述衬底基板上的正投影落入所述第二薄膜在所述衬底基板上的正投影内。
在本公开的一个或多个实施例中,所述封装薄膜包括第一薄膜、第二薄膜和第三薄膜,所述第二薄膜位于所述第一薄膜和所述第三薄膜之间,所述第一薄膜和所述第三薄膜在边缘彼此接触形成接触部分;所述至少一条第二接地线在所述衬底基板上的正投影落入所述接触部分在所述衬底基板上的正投影内。
本公开至少一个实施例还提供一种触控显示装置,包括上述任一触控显示基板。
本公开至少一个实施例还提供一种触控基板的制作方法,包括:在衬底基板上形成第一导电薄膜;对所述第一导电薄膜进行构图形成第一图形;所述第一图形包括桥接线、第一触控子线、第一接地子线、第三接地子线;形成绝缘薄膜;在所述绝缘薄膜中形成第一过孔、第二过孔、第三过孔、第四过孔和第五过孔;形成第二导电薄膜;以及对所述第二导电薄膜进行构图形成第二图形;所述第二图形包括:第二触控子线、第二接地子线、第四接地子线、整体形成部分和主体部分,所述第一接地子线和所述第二接地子线通过第一过孔相连以构成第二接地线,所述第一触控子线和所述第二触控子线通过所述第二过孔相连以构成触控线,所述第三接地子线和所述第四接地子线通过第三过孔相连以构成第一接地线,相邻的主体部分分别通过所述第四过孔和所述第五过孔与所述桥接线相连。
在本公开的一个或多个实施例中,所述第一图形还包括第五接地子线, 在所述绝缘薄膜中还形成第六过孔,所述第二图形还包括第六接地子线,所述第五接地子线和所述第六接地子线通过所述第六过孔相连以形成第三接地线。
附图说明
为了更清楚地说明本公开实施例的技术方案,下面将对实施例的附图作简单地介绍,显而易见地,下面描述中的附图仅仅涉及本公开的一些实施例,而非对本公开的限制。
图1为本公开一实施例提供的显示基板的平面图;
图2为本公开一实施例提供的一种触控基板的平面示意图;
图3为图2中AB处的剖视图;
图4为图2中CD处的剖视图;
图5为本公开一实施例提供的一种触控基板中双重防护防ESD的原理示意图;
图6为图5中EF处的剖视图;
图7为图5中GH处的剖视图;
图8为本公开另一实施例提供的触控基板的局部剖视图;
图9为本公开另一实施例提供的触控基板的平面示意图;
图10为本公开一实施例提供的触控基板的局部剖视图;
图11为本公开一实施例提供的触控显示基板的局部剖视图;
图12为本公开另一实施例提供的触控显示基板的局部剖视图;以及
图13A至图13F为本公开一实施例提供的触控基板的制作方法的流程图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚,下面将结合本公开实施例的附图,对本公开实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本公开的一部分实施例,而不是全部的实施例。基于所描述的本公开的实施例,本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例,都属于本公开保护的范围。
除非另外定义,本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。同样,“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系,当被描述对象的绝对位置改变后,则该相对位置关系也可能相应地改变。
为了实现触控显示面板更轻更薄更窄边框以适应可折叠及可卷曲产品,触控技术例如柔性多层On Cell(Flexible Multi-Layer On Cell,FMLOC)触控技术孕育而生。在触控显示装置中,静电容易导致触控失效,造成触控不良。静电包括在制作或使用过程中产生的静电,但不限于此。
图1为本公开一实施例提供的显示基板的平面图。就FMLOC触控技术的面板设计,在防静电释放(Electro-Static discharge,ESD)方面,可通过在面板周边一圈设计单个接地线01(即GND线,电压为0V),达到释放静电的目的。在本公开的实施例中,接地线的电压均为0V。
虽然单个接地线可以起到一定的拦截ESD的作用,但是也存在静电跳跃过接地线01,窜入到周边区A2的走线(Trace line)02或是显示区(Active area)A1的触控结构(Touch Structure/pattern)TS,损坏走线02或是损坏触控结构TS,进而造成触控失效的风险,如图1所示。图1中示出了可能的损坏区域001。显示区A1所在的区域也为触控区。
如图1所示,触控结构TS包括第一传感器图形(Sensor Pattern)SP1和第二传感器图形SP2,第一传感器图形SP1和第二传感器图形SP2彼此绝缘且交叉设置,第一传感器图形SP1包括整体形成部分P0,第二传感器图形SP2包括多个主体部分MP和连接相邻的主体部分MP的桥接线Bd。主体部分MP、第一传感器图形SP1可以由同一膜层采用同一构图工艺形成,桥接线Bd可由另一膜层采用另一构图工艺形成。桥接线Bd和第一传感器图形SP1之间可设置绝缘层。
图2为本公开一实施例提供的一种触控基板的平面示意图。如图2所示, 触控基板10包括:触控结构TS、第一接地线11和至少一条第二接地线12。图2所示的实施例以设置一条第二接地线12为例进行说明,在其他的实施例中,也可以设置多条第二接地线12。触控结构TS、第一接地线11和第二接地线12位于衬底基板上。
例如,如图2所示,触控结构TS包括传感器图形SP和触控走线TL。传感器图形SP包括第一传感器图形SP1和第二传感器图形SP2,第一传感器图形SP1与第二传感器图形SP2相互绝缘。第一传感器图形SP1和第二传感器图形SP2交叉设置。例如,第一传感器图形SP1垂直于第二传感器图形SP2,但不限于此。例如,第一传感器图形SP1的延伸方向与第二传感器图形SP2的延伸方向交叉。例如,第一传感器图形SP1的延伸方向垂直于第二传感器图形SP2的延伸方向,但不限于此。例如,某一元件的延伸方向可指该元件的大体的趋势或走向,但不限于此。例如,如图2所示,触控走线TL包括第一触控走线TL1和第二触控走线TL2。例如,如图2所示,第一传感器图形SP1与第一触控走线TL1相连,第二传感器图形SP2与第二触控走线TL2相连。为了图示清晰,图2中示意性的示出了部分触控走线TL。
本公开的实施例提供的触控基板中,通过设置第二接地线,外围静电首先被第二接地线释放,跳跃窜入的静电由第一接地线释放,可以起到双重防护的作用,有效减轻或避免静电对触控走线和传感器图形的影响,降低了因ESD造成的触控性能失效风险,达到提升防ESD能力的目的,进而避免了因ESD造成的产品良率下降,达到提升产品良率的目的。
例如,如图2所示,第二接地线12与第一接地线11在触控结构TS的一侧短接,但不限于此。例如,如图2所示,第二接地线12与第一接地线11在触控结构TS的一侧且在触控走线TL聚集之后短接。当然,在本公开的实施例中,第二接地线12与第一接地线11也可在其他位置通过连接线短接在一起。例如,如图2所示,第一接地线11和第二接地线12与触控结构TS分别彼此绝缘。即,第一接地线11与触控结构TS彼此绝缘,第二接地线12与触控结构TS彼此绝缘。
如图2所示,第一接地线11位于触控结构TS的外围。所述至少一条第二接地线12位于第一接地线11的远离触控结构TS的一侧。即,在平行于衬底基板的表面的平面内,第二接地线12位于第一接地线11的远离触控结 构TS的一侧。例如,平行于衬底基板的表面的平面为衬底基板的用于制作各种元件的表面。在本公开的实施例中,A元件位于B元件的外围是指在平面图中,A元件位于该B元件的外围。A元件和B元件可以相对于衬底基板具有相同的高度,即,A元件到衬底基板的距离与B元件到衬底基板的距离相等,但不限于此。A元件到衬底基板的距离与B元件到衬底基板的距离也可以不相等。
图2所示的实施例以第一传感器图形SP1沿水平方向延伸,第二传感器图形SP2沿竖直方向延伸为例进行说明,但不限于此。图2所示的实施例以第一传感器图形SP1为接收传感器(Rx),第二传感器图形SP2为发送传感器(Tx)为例进行说明,但不限于此,在其他的实施例中,两者可以互换。即,在一些实施例中,第一传感器图形SP1为发送传感器(Tx),第二传感器图形SP2为接收传感器(Rx)。
图2中示出了多个第一传感器图形SP1和多个第二传感器图形SP2。多个第一传感器图形SP1和多个第二传感器图形SP2相互交叉且彼此绝缘。每个第一传感器图形SP1的左右两端中的一端与一条第一触控走线TL1相连,或者每个第一传感器图形SP1的左右两端与两条第一触控走线TL1分别相连。每个第二传感器图形SP2的上下两端中的一端与一条第二触控走线TL2相连,或者,每个第二传感器图形SP2的上下两端与两条第二触控走线TL2分别相连。图2所示的实施例中以每个第一传感器图形SP1的左端与一条第一触控走线TL1相连,并且每个第二传感器图形SP2的上下两端与两条第二触控走线TL2分别相连为例进行说明。
例如,如图2所示,触控基板10还包括柔性电路板20,第二接地线12的两端连接至柔性电路板(Flexible Printed Circuit,FPC)20的不同引脚。例如,如图2所示,第二接地线12与第一接地线11在靠近FPC处短接在一起。例如,如图2所示,第二接地线12与第一接地线11在触控结构TS的靠近FPC20的一侧短接。例如,第二接地线12的两端在触控结构TS的一侧与第一接地线11的两端分别短接在一起。第一接地线11和第二接地线12可分别引出到接垫(pad),这些接垫与柔性电路板20的不同引脚再分别绑定。例如,第二接地线12与第一接地线11在触控结构TS的靠近触控走线TL的接垫的一侧短接。图2中示出了FPC20包括多个引脚201。例如,柔性电路板 20的不同引脚可彼此绝缘,以便可分别传输信号。例如,每个引脚201可对应一个接垫,并与该接垫相连。
例如,如图2所示,第一传感器图形SP1和第二传感器图形SP2之一包括主体部分MP和桥接线Bd。第一传感器图形SP1和第二传感器图形SP2之另一包括整体形成部分P0。多个主体部分MP中相邻两个主体部分MP通过桥接线Bd相连。例如,如图2所示,包括在同一个第一传感器图形SP1中的相邻主体部分MP分设在一条第二传感器图形SP2的相对的两侧。例如,如图2所示,包括在同一个第一传感器图形SP1中的相邻主体部分MP分设在一条第二传感器图形SP2的上侧和下侧。多个主体部分MP、整体形成部分P0可位于同一层,由同一膜层采用同一构图工艺形成,桥接线Bd位于另一层。图2中以第一传感器图形SP1整体形成,第二传感器图形SP2分段形成为例进行说明。在其他的实施例中,也可以第二传感器图形SP2整体形成,第一传感器图形SP1分段形成。
例如,为了更好的起到静电防护的作用,第二接地线12的宽度等于或大于第一接地线11的宽度,但不限于此。在其他的实施例中,第二接地线12的宽度也可以小于第一接地线11的宽度。
例如,第一接地线11的宽度为15~20μm,第二接地线12的宽度为15~20μm,第一接地线11和第二接地线12之间的最大距离为20~50μm,第一接地线11到最靠近第一接地线11的触控走线TL之间的距离为10~40μm。在本公开的实施例中,接地线或走线的宽度为在垂直于其延伸方向的方向上的尺寸。
例如,如图2所示,第一接地线11围绕触控结构TS设置,第二接地线12围绕第一接地线11设置。例如,如图2所示,第二接地线12围绕触控结构TS设置,第一接地线11围绕触控结构TS设置。例如,第二接地线12围绕传感器图形SP和触控走线TL设置,第一接地线11围绕传感器图形SP和触控走线TL设置。例如,如图2所示,第一接地线11和第二接地线12在触控结构TS的一侧形成开口30。如图2所示,开口30位于触控结构TS的下侧。
例如,如图2所示,为了进一步起到静电防护的作用,触控基板还包括第三接地线13,第三接地线13位于开口30处。例如,第三接地线13位于 开口30内。例如,第三接地线13的两端连接至柔性电路板FPC20的不同引脚。例如,第三接地线13位于第一触控走线TL1和第二触控走线TL2之间。例如,第三接地线13位于FPC20的连接第一触控走线TL1的引脚和FPC20的连接第二触控走线TL2的引脚之间。
在本公开的一些实施例中,为了降低走线电阻,第一接地线11、第二接地线12、触控走线TL中至少之一可以采用在垂直于衬底基板的方向上交叠且相连的两个子线形成,即采用双层子线构成走线的设计。
图3为图2中AB处的剖视图。图4为图2中CD处的剖视图。以下结合图2、图3和图4进行说明。
例如,如图3和图4所示,为了降低走线电阻,第二接地线12包括第一接地子线121和第二接地子线122,第一接地子线121和第二接地子线122之间设有绝缘层IS,第一接地子线121和第二接地子线122通过贯穿绝缘层IS的第一过孔V1相连。绝缘层IS中分布有多个第一过孔V1,第一接地子线121和第二接地子线122在设定位置处通过多个第一过孔V1相连。即,第一接地子线121和第二接地子线122并联。图3为绝缘层IS中设置第一过孔的位置处的剖视图,图4为绝缘层IS中不设置第一过孔的位置处的剖视图。
例如,如图3和图4所示,第一接地子线121在衬底基板BS上的正投影与第二接地子线122在衬底基板BS上的正投影至少部分交叠。在一些实施例中,第一接地子线121在衬底基板BS上的正投影与第二接地子线122在衬底基板BS上的正投影重合,但不限于此。例如,如图4所示,第一接地子线121比第二接地子线122更靠近衬底基板BS。例如,如图4所示,第一接地子线121与第二接地子线122接触。
例如,为了降低走线电阻,如图3和图4所示,触控走线TL(第二触控走线TL2)包括第一触控子线TL01和第二触控子线TL02,第一触控子线TL01和第二触控子线TL02之间设有绝缘层IS,第一触控子线TL01和第二触控子线TL02通过贯穿绝缘层IS的第二过孔V2相连。绝缘层IS中分布有多个第二过孔V2,第一触控子线TL01和第二触控子线TL02在设定位置处通过多个第二过孔V2相连。即,第一触控子线TL01和第二触控子线TL02并联。图3为绝缘层IS中设置第二过孔的位置处的剖视图,图4为绝缘层IS中不设置第二过孔的位置处的剖视图。第一触控走线TL1也可采用与第二触 控走线TL2相同的结构。
例如,如图3和图4所示,第一触控子线TL01比第二触控子线TL02更靠近衬底基板BS。例如,如图3和图4所示,第一触控子线TL01在衬底基板BS上的正投影与第二触控子线TL02在衬底基板BS上的正投影至少部分交叠。在一些实施例中,第一触控子线TL01在衬底基板BS上的正投影与第二触控子线TL02在衬底基板BS上的正投影重合,但不限于此。例如,如图4所示,第一触控子线TL01与第二触控子线TL02接触。
例如,如图3和图4所示,为了降低走线电阻,第一接地线11包括第三接地子线111和第四接地子线112,第三接地子线111和第四接地子线112之间设有绝缘层IS,第三接地子线111和第四接地子线112通过贯穿绝缘层IS的第三过孔V3相连。绝缘层IS中分布有多个第三过孔V3,第三接地子线111和第四接地子线112在设定位置处通过多个第三过孔V3相连。即,第三接地子线111和第四接地子线112并联。图3为绝缘层IS中设置第三过孔的位置处的剖视图,图4为绝缘层IS中不设置第三过孔的位置处的剖视图。
例如,如图3和图4所示,第三接地子线111比第四接地子线112更靠近衬底基板BS。例如,如图3和图4所示,第三接地子线111在衬底基板BS上的正投影与和第四接地子线112在衬底基板BS上的正投影至少部分交叠。在一些实施例中,第三接地子线111在衬底基板BS上的正投影与第四接地子线112在衬底基板BS上的正投影重合,但不限于此。例如,如图4所示,第三接地子线111与第四接地子线112接触。
图5为本公开一实施例提供的一种触控基板中双重防护防ESD的原理示意图。图5为图2中部分触控基板的结构示意图。图5示出了触控走线TL。
参照图2和图5,本公开一实施例提供的触控基板,在第一接地线11之外的一定距离再设置至少一条第二接地线12,外围静电首先被第二接地线12释放,跳跃窜入的静电由第一接地线11释放,对触控走线TL和触控结构TS起到了双重防护的作用,降低了因ESD造成的触控性能失效风险,达到提升防ESD能力的目的,进而避免了因ESD造成的产品良率下降,达到提升产品良率的目的。
图6为图5中EF处的剖视图,图7为图5中GH处的剖视图。例如,如图6所示,整体形成部分P0与主体部分MP同层设置。例如,整体形成 部分P0和主体部分MP为金属网格结构,但不限于此。
例如,如图5和图6所示,相邻两个主体部分MP分别通过第四过孔V11和第五过孔V12与桥接线Bd相连。
例如,为了简化制作工艺,主体部分MP和桥接线Bd之一与第一接地子线121同层,主体部分MP和桥接线Bd之另一与第二接地子线122同层。
例如,本公开的一实施例提供的阵列基板可采用如下方法形成。
(1)在衬底基板BS上形成第一导电薄膜,对第一导电薄膜进行构图形成桥接线Bd、第一触控子线TL01、第一接地子线121和第三接地子线111。
(2)形成绝缘薄膜。
(3)在绝缘薄膜中形成第一过孔V1、第二过孔V2、第三过孔V3、第四过孔V11和第五过孔V12,以形成绝缘层IS。
(4)形成第二导电薄膜,对第二导电薄膜进行构图形成第二触控子线TL02、第二接地子线122、第四接地子线112、整体形成部分P0和主体部分MP,第一接地子线121和第二接地子线122通过第一过孔V1相连,第一触控子线TL01和第二触控子线TL02通过第二过孔V2相连,第三接地子线111和第四接地子线112通过第三过孔V3相连,相邻的主体部分MP分别通过第四过孔V11和第五过孔V12与桥接线Bd相连。
例如,第一导电薄膜和第二导电薄膜可采用金属材料制作,整体形成部分P0和主体部分MP可形成金属网格结构,桥接线Bd可形成金属网格结构,由第一导电薄膜或者第二导电薄膜构图形成的其余的结构可形成金属网格结构也可不为金属网格结构。
图8为本公开另一实施例提供的触控基板的局部剖视图。如图8所示,触控基板包括第一接地线11、第二接地线12和多条触控走线TL,触控走线TL包括第一触控子线TL01和第二触控子线TL02,第一触控子线TL01和第二触控子线TL02通过贯穿绝缘层IS的第二过孔V2相连。图8示出了四条触控走线TL。触控基板中触控走线TL的数量可根据需要而定。
参考图2和图8,最靠近第一接地线11的第二接地线12和第一接地线11之间的距离为第一距离D1,最靠近第一接地线11的触控走线TL和第一接地线11之间的距离为第二距离D2,为了提高静电防护效果,第一距离D1小于第二距离D2。
例如,为了提高静电防护效果,如图8所示,相邻触控走线TL之间的距离D小于第二距离D2。例如,如图8所示,相邻触控走线TL之间的距离D小于第一距离D1,但不限于此。例如,每两个相邻触控走线TL之间的距离D均相等,但不限于此。
图9为本公开另一实施例提供的触控基板的平面示意图,与图2所示的触控基板相比,图9所示的触控基板设置多条第二接地线12,图9所示的触控基板以设置两条第二接地线12为例进行说明。多条第二接地线12可均与第一接地线11短接。相邻两条第二接地线12之间的距离为第三距离D3,第三距离D3小于第一距离D1,从而,可兼顾防静电和窄边框设计。当然,在其他的实施例中,第三距离D3也可大于或等于第一距离D1。
图10为本公开一实施例提供的触控基板的局部剖视图。参考图8和图10,相邻的第二接地线12之间的距离为第三距离D3,第三距离D3小于第一距离D1,第三距离D3小于第二距离D2。
本公开至少一实施例还提供一种触控显示基板,包括上述任一触控基板。
例如,如图2所示,触控显示基板包括显示区A1和显示区A1外的周边区A2,至少一条第二接地线12位于周边区A2。图2中虚线框内的区域为显示区A1,显示区A1之外的区域为周边区A2。周边区A2围绕显示区A1。
为了实现显示装置(例如,有机发光二极管显示装置)的轻薄化设计,可将显示面板和触控结构集成在一起。因此,FMLOC(Flexible Multiple Layer On Cell)触控技术应运而生,FMLOC触控技术是直接在封装薄膜上制作触控结构的各种电极层和各种走线,从而将触控结构集成在显示面板上。由此,采用FMLOC触控技术的显示装置不仅可实现显示装置的轻薄化,还可实现基于柔性显示的触控。
图11为本公开一实施例提供的触控显示基板的局部剖视图。在一实施例中,如图11所示,在支撑基板200上设置衬底基板100,衬底基板100可为柔性基板,例如,可为聚酰亚胺(Polyimide,PI),但不限于此,衬底基板100的材质可根据需要进行选择。支撑基板200可为玻璃基板。在一些实施例中,支撑基板200可去除。衬底基板100上可设置薄膜晶体管(Thin Film Transistor,TFT)3123阵列,图11中仅示出了一个薄膜晶体管3123。薄膜晶体管3123可包括半导体层、栅极、栅极绝缘层、源极和漏极等。如图11 所示,衬底基板100上可依次设置有缓冲层111a、半导体层112a,栅极绝缘层113、栅极114、层间介电层115和源漏极层116,源漏极层116包括源极1161和漏极1162,源极1161和漏极1162彼此间隔并可分别通过过孔与半导体层112a相连。薄膜晶体管3123上可设置平坦层117,平坦层117上可设置待封装器件(OLED)2123,待封装器件(OLED)2123可包括第一电极121a,发光功能层122a和第二电极123,第一电极121a可通过贯穿平坦层117的过孔与漏极1162电连接。第一电极121a上可设置像素限定层118以利于形成发光功能层122a。第二电极123可通过连接电极1211与电极引线1163电连接。发光功能层122a可包括发光层,还可包括其他功能层,例如还可包括空穴注入层、空穴传输层、电子传输层和电子注入层等至少之一,但不限于此。例如,电极引线1163可与源漏极层116同层形成。平坦层117可为树脂层。在待封装器件(OLED)2123上可形成封装薄膜1123。封装薄膜1123覆盖待封装器件2123以防止水氧侵袭待封装器件2123。待封装器件(OLED)2123的结构不限于此。图11中的衬底基板100可为上述衬底基板BS。
如图11所示,封装薄膜1123设置在衬底基板100上,封装薄膜1123包括依次远离衬底基板100的第一薄膜101,第二薄膜102和第三薄膜103,第二薄膜102夹设在第一薄膜101和第三薄膜103之间,且在边缘位置处,第一薄膜101和第三薄膜103接触。例如,第一薄膜101和第三薄膜103可为无机薄膜,例如可为SiNx、SiOx、SiOxNy、SiCxNy等无机氧化物,但不限于此。例如,第二薄膜102可为有机薄膜,例如,可以为树脂等有机物,但不限于此。树脂例如可为热固性树脂,热固性树脂例如包括环氧树脂,但不限于此。树脂例如可为热塑性树脂,热塑性树脂例如包括亚克力(PMMA)树脂,但不限于此。例如,第一薄膜101和第三薄膜103可采用化学气相沉积(Chemical Vapor Deposition,CVD)方法制作,第二薄膜102可采用喷墨打印(Ink Jet Printing,IJP)的方法制作。第一薄膜101和第三薄膜103均可作为阻水层。例如,第一薄膜101可包括多个叠层设置的子层,第二薄膜102和第三薄膜103也可分别包括多个叠层设置的子层。
图11还示出了第一阻挡坝106和第二阻挡坝107。第一阻挡坝106可与像素限定层118同层形成。第二阻挡坝107可包括第一子阻挡坝1071和第二 子阻挡坝1072。例如,第一子阻挡坝1071可与平坦层117同层形成,第二子阻挡坝1072可与像素限定层118同层形成。
如图11所示,第二薄膜102位于第一薄膜101和第三薄膜103之间,第一薄膜101和第三薄膜103在边缘彼此接触形成接触部分1031。
图11还示出了显示区A1和周边区A2。如图11所示,触控结构TS位于显示区A1,触控走线TL位于周边区A2。如图11所示,触控走线TL在衬底基板100上的正投影落入第二薄膜102在衬底基板100上的正投影内。
在图11所示的触控显示基板中,第一接地线11在衬底基板100上的正投影落入第二薄膜102在衬底基板100上的正投影内。例如,如图11所示,第二接地线12在衬底基板100上的正投影落入第二薄膜102在衬底基板100上的正投影内。当设置多条第二接地线12时,多条第二接地线12在衬底基板100上的正投影落入第二薄膜102在衬底基板100上的正投影内。
图12为本公开另一实施例提供的触控显示基板的局部剖视图。图12所示的触控显示基板与图11所示的触控显示基板相比,调整了第一接地线11和第二接地线12的设置位置。在图12所示的触控显示基板中,第一接地线11在衬底基板100上的正投影在第二薄膜102在衬底基板100上的正投影之外。例如,如图12所示,第二接地线12在衬底基板100上的正投影在第二薄膜102在衬底基板100上的正投影之外。当设置多条第二接地线12时,多条第二接地线12在衬底基板100上的正投影在第二薄膜102在衬底基板100上的正投影之外。
例如,如图12所示,第二接地线12在衬底基板100上的正投影落入接触部分1031在衬底基板100上的正投影内。
进一步例如,图12所示,第一接地线11在衬底基板100上的正投影落入第一阻挡坝106在衬底基板100上的正投影内。例如,图12所示,第二接地线12在衬底基板100上的正投影落入第二阻挡坝107在衬底基板100上的正投影内。
本公开至少一实施例还提供一种触控显示装置,包括上述任一触控显示基板。
在本公开的实施例中,触控显示装置包括柔性多层on-cell(Flexible multi-layer on-cell,FMLOC)产品,但不限于此。触控显示装置可以为液 晶显示器、电子纸、OLED(Organic Light-Emitting Diode,有机发光二极管)显示器等显示器件以及包括这些显示器件的电视、数码相机、手机、手表、平板电脑、笔记本电脑、导航仪等任何具有触控和显示功能的产品或者部件。
例如,在本公开的实施例中,上述距离可指间距。例如,第一距离D1、第二距离D2、距离D、第三距离D3可分别指间距。
本公开至少一实施例还提供一种触控基板的制作方法,如图13A至图13F所示,包括如下步骤。
(1)如图13A所示,在衬底基板上形成第一导电薄膜L1。
(2)如图13B所示,对第一导电薄膜L1进行构图形成第一图形P1;第一图形P1包括桥接线Bd、第一触控子线TL01、第一接地子线121、第三接地子线111和第五接地子线131。
(3)如图13C所示,形成绝缘薄膜ISF。
(4)如图13D所示,在绝缘薄膜ISF中形成第一过孔V1、第二过孔V2、第三过孔V3、第四过孔V11、第五过孔V12和第六过孔V31。
(5)如图13E所示,形成第二导电薄膜L2。
(6)如图13F所示,对第二导电薄膜L2进行构图形成第二图形P2;第二图形P2包括:第二触控子线TL02、第二接地子线122、第四接地子线112、整体形成部分P0、主体部分MP和第六接地子线132,第一接地子线121和第二接地子线122通过第一过孔V1相连以形成第二接地线12,第一触控子线TL01和第二触控子线TL02通过第二过孔V2相连以形成触控线TL,第三接地子线111和第四接地子线112通过第三过孔V3相连以形成第一接地线11,相邻的主体部分MP分别通过第四过孔V11和第五过孔V12与桥接线Bd相连以形成第二传感器图形SP2;整体形成部分P0即为第一传感器图形SP1;第五接地子线131和第六接地子线132通过第六过孔V31相连以形成第三接地线13。
(7)通过压接的方式将FPC20绑定到触控基板上。
以上以形成图9所示的触控基板为例进行说明。当不设置第三接地线13时,相应地,去掉形成第五接地子线131、第六接地子线132、第六过孔V31。以下对该方法进行描述。
本公开另一实施例还提供一种触控基板的制作方法,也可参照图13A至 图13F,包括如下步骤。
(1)如图13A所示,在衬底基板上形成第一导电薄膜L1。
(2)如图13B所示,对第一导电薄膜L1进行构图形成第一图形P1;第一图形P1包括桥接线Bd、第一触控子线TL01、第一接地子线121和第三接地子线111。
(3)如图13C所示,形成绝缘薄膜ISF。
(4)如图13D所示,在绝缘薄膜ISF中形成第一过孔V1、第二过孔V2、第三过孔V3、第四过孔V11和第五过孔V12,以形成绝缘层IS。
(5)如图13E所示,形成第二导电薄膜L2。
(6)如图13F所示,对第二导电薄膜L2进行构图形成第二图形P2;第二图形P2包括:第二触控子线TL02、第二接地子线122、第四接地子线112、整体形成部分P0和主体部分MP,第一接地子线121和第二接地子线122通过第一过孔V1相连以形成第二接地线12,第一触控子线TL01和第二触控子线TL02通过第二过孔V2相连以形成触控线TL,第三接地子线111和第四接地子线112通过第三过孔V3相连以形成第一接地线11,相邻的主体部分MP分别通过第四过孔V11和第五过孔V12与桥接线Bd相连以形成第二传感器图形SP2;整体形成部分P0即为第一传感器图形SP1。
(7)通过压接的方式将FPC20绑定到触控基板上。
为了图示清晰,图13A至图13F也未示出全部的触控线TL,仅示意性的示出了七条触控线TL。在本公开的实施例中,第二传感器图形SP2的上下两侧分别设置一条触控线TL,而第一传感器图形SP1仅在其左侧设置一条触控线TL。
当然,第一传感器图形SP1和第二传感器图形SP2的个数和形状也不限于图中所示,可以根据需要而定。第二接地线12的个数也不限于图中所示。
例如,绝缘薄膜ISF可采用绝缘材料制作,例如,可采用氧化硅、氮化硅、氮氧化硅、或树脂制作,但不限于此。
例如,第一导电薄膜L1和第二导电薄膜L2可采用金属材料制作,但不限于此。
需要说明的是,为了清晰起见,在用于描述本公开的实施例的附图中,层或区域的厚度被放大。可以理解,当诸如层、膜、区域或基板之类的元件 被称作位于另一元件“上”或“下”时,该元件可以“直接”位于另一元件“上”或“下”,或者可以存在中间元件。
本公开的实施例中,同层设置的元件由同一膜层采用同一构图工艺形成。例如,同层设置的元件位于同一元件的远离衬底基板的表面,但不限于此。同层设置的元件可相对于衬底基板具有不同的高度。
在本公开的实施例中,构图或构图工艺可只包括光刻工艺,或包括光刻工艺以及刻蚀步骤,或者可以包括打印、喷墨等其他用于形成预定图形的工艺。光刻工艺是指包括成膜、曝光、显影等工艺过程,利用光刻胶、掩模板、曝光机等形成图形。可根据本公开的实施例中所形成的结构选择相应的构图工艺。
在不冲突的情况下,本公开的同一实施例及不同实施例中的特征可以相互组合。
以上所述,仅为本公开的具体实施方式,但本公开的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本公开揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本公开的保护范围之内。因此,本公开的保护范围应以所述权利要求的保护范围为准。

Claims (26)

  1. 一种触控基板,包括:
    触控结构,包括传感器图形和触控走线,所述传感器图形包括多个第一传感器图形和多个第二传感器图形,所述多个第一传感器图形与所述多个第二传感器图形彼此交叉且相互绝缘,所述触控走线包括多条第一触控走线和多条第二触控走线,所述第一传感器图形至少与所述多条第一触控走线中的一条相连,所述第二传感器图形至少与所述多条第二触控走线中的一条相连;
    第一接地线,位于所述触控结构的外围;以及
    至少一条第二接地线,位于所述第一接地线的远离所述触控结构的一侧。
  2. 根据权利要求1所述的触控基板,其中,所述第二接地线与所述第一接地线在所述触控结构的一侧短接。
  3. 根据权利要求1或2所述的触控基板,其中,所述第一接地线与所述触控结构彼此绝缘,所述第二接地线与所述触控结构彼此绝缘。
  4. 根据权利要求1-3任一项所述的触控基板,其中,所述第二接地线的宽度等于或大于所述第一接地线的宽度。
  5. 根据权利要求1-4任一项所述的触控基板,其中,所述第一接地线和所述第二接地线之间的最大距离为20~50μm,所述第一接地线到最靠近所述第一接地线11的触控走线之间的距离为10~40μm。
  6. 根据权利要求1-5任一项所述的触控基板,其中,所述第一接地线的宽度为15~20μm,所述第二接地线的宽度为15~20μm。
  7. 根据权利要求1-6任一项所述的触控基板,其中,所述第一接地线围绕所述触控结构设置,所述第二接地线围绕所述第一接地线设置,所述第一接地线和所述第二接地线具有第一间隔。
  8. 根据权利要求1-7任一项所述的触控基板,其中,所述触控结构、所述第一接地线和所述至少一条第二接地线位于衬底基板上,所述第二接地线包括第一接地子线和第二接地子线,所述第一接地子线比所述第二接地子线更靠近所述衬底基板,所述第一接地子线和所述第二接地子线之间设有绝缘层,所述第一接地子线和所述第二接地子线通过贯穿所述绝缘层的第一过孔相连,所述第一接地子线在所述衬底基板上的正投影与所述第二接地子线在 所述衬底基板上的正投影至少部分交叠。
  9. 根据权利要求1-8任一项所述的触控基板,还包括柔性电路板,其中,所述第二接地线的两端连接至所述柔性电路板的不同引脚。
  10. 根据权利要求9所述的触控基板,还包括第三接地线,其中,所述第一接地线和所述第二接地线在所述触控结构的一侧形成开口,所述第三接地线位于所述开口内,所述第三接地线的两端连接至所述柔性电路板的不同引脚。
  11. 根据权利要求8所述的触控基板,其中,所述第一触控走线和所述第二触控走线至少之一包括第一触控子线和第二触控子线,所述第一触控子线比所述第二触控子线更靠近所述衬底基板,所述第一触控子线和所述第二触控子线之间设有所述绝缘层,所述第一触控子线和所述第二触控子线通过贯穿所述绝缘层的第二过孔相连,所述第一触控子线在所述衬底基板上的正投影与所述第二触控子线在所述衬底基板上的正投影至少部分交叠。
  12. 根据权利要求11所述的触控基板,其中,所述第一传感器图形和所述第二传感器图形之一包括主体部分和桥接线,所述主体部分和所述桥接线之一与所述第一接地子线同层,所述主体部分和所述桥接线之另一与所述第二接地子线同层。
  13. 根据权利要求12所述的触控基板,其中,所述第一传感器图形和所述第二传感器图形之另一包括整体形成部分,所述整体形成部分与所述主体部分同层设置。
  14. 根据权利要求13所述的触控基板,其中,所述第一接地线包括第三接地子线和第四接地子线,所述第三接地子线和所述第四接地子线之间设有所述绝缘层,所述第三接地子线比所述第四接地子线更靠近所述衬底基板,所述第三接地子线和所述第四接地子线通过贯穿所述绝缘层的第三过孔相连,所述第三接地子线在所述衬底基板上的正投影与所述第四接地子线在所述衬底基板上的正投影至少部分交叠。
  15. 根据权利要求14所述的触控基板,其中,所述桥接线、所述第一接地子线、所述第三接地子线和所述第一触控子线同层,所述整体形成部分、所述主体部分、所述第二接地子线、所述第四接地子线和所述第二触控子线同层。
  16. 根据权利要求13-15任一项所述的触控基板,其中,所述桥接线、所述整体形成部分和所述主体部分至少之一为金属网格结构。
  17. 根据权利要求8-16任一项所述的触控基板,其中,最靠近所述第一接地线的第二接地线与所述第一接地线之间的距离小于最靠近所述第一接地线的触控走线与所述第一接地线之间的距离。
  18. 根据权利要求1-17任一项所述的触控基板,其中,包括多条第二接地线,相邻两条第二接地线之间的距离小于最靠近所述第一接地线的第二接地线与所述第一接地线之间的距离。
  19. 一种触控显示基板,包括权利要求1-18任一项所述的触控基板。
  20. 根据权利要求19所述的触控显示基板,其中,所述触控显示基板包括显示区和所述显示区外的周边区,所述至少一条第二接地线位于所述周边区。
  21. 根据权利要求19或20所述的触控显示基板,还包括衬底基板和封装薄膜,其中,所述触控结构、所述第一接地线和所述至少一条第二接地线位于所述封装薄膜的远离所述衬底基板的一侧。
  22. 根据权利要求21所述的触控显示基板,其中,所述封装薄膜包括第一薄膜、第二薄膜和第三薄膜,所述第二薄膜位于所述第一薄膜和所述第三薄膜之间,所述第一薄膜和所述第三薄膜在边缘彼此接触形成接触部分;
    所述至少一条第二接地线在所述衬底基板上的正投影落入所述第二薄膜在所述衬底基板上的正投影内。
  23. 根据权利要求21所述的触控显示基板,其中,所述封装薄膜包括第一薄膜、第二薄膜和第三薄膜,所述第二薄膜位于所述第一薄膜和所述第三薄膜之间,所述第一薄膜和所述第三薄膜在边缘彼此接触形成接触部分;
    所述至少一条第二接地线在所述衬底基板上的正投影落入所述接触部分在所述衬底基板上的正投影内。
  24. 一种触控显示装置,包括权利要求19-23任一项所述的触控显示基板。
  25. 一种触控基板的制作方法,包括:
    在衬底基板上形成第一导电薄膜;
    对所述第一导电薄膜进行构图形成第一图形;所述第一图形包括桥接线、 第一触控子线、第一接地子线、第三接地子线;
    形成绝缘薄膜;
    在所述绝缘薄膜中形成第一过孔、第二过孔、第三过孔、第四过孔和第五过孔;
    形成第二导电薄膜;以及
    对所述第二导电薄膜进行构图形成第二图形;所述第二图形包括:第二触控子线、第二接地子线、第四接地子线、整体形成部分和主体部分,所述第一接地子线和所述第二接地子线通过第一过孔相连以构成第二接地线,所述第一触控子线和所述第二触控子线通过所述第二过孔相连以构成触控线,所述第三接地子线和所述第四接地子线通过第三过孔相连以构成第一接地线,相邻的主体部分分别通过所述第四过孔和所述第五过孔与所述桥接线相连。
  26. 根据权利要求25所述的制作方法,其中,所述第一图形还包括第五接地子线,在所述绝缘薄膜中还形成第六过孔,所述第二图形还包括第六接地子线,所述第五接地子线和所述第六接地子线通过所述第六过孔相连以形成第三接地线。
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