WO2020229917A1 - 表示装置 - Google Patents

表示装置 Download PDF

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Publication number
WO2020229917A1
WO2020229917A1 PCT/IB2020/053958 IB2020053958W WO2020229917A1 WO 2020229917 A1 WO2020229917 A1 WO 2020229917A1 IB 2020053958 W IB2020053958 W IB 2020053958W WO 2020229917 A1 WO2020229917 A1 WO 2020229917A1
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WO
WIPO (PCT)
Prior art keywords
circuit
conductor
insulator
driver circuit
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB2020/053958
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English (en)
French (fr)
Japanese (ja)
Inventor
中川貴史
池田隆之
小林英智
宍戸英明
勝井秀一
木村清貴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to KR1020217038378A priority Critical patent/KR20220006547A/ko
Priority to CN202080033476.9A priority patent/CN113785346A/zh
Priority to JP2021519023A priority patent/JPWO2020229917A1/ja
Priority to DE112020002322.2T priority patent/DE112020002322T5/de
Priority to US17/609,497 priority patent/US11626052B2/en
Publication of WO2020229917A1 publication Critical patent/WO2020229917A1/ja
Anticipated expiration legal-status Critical
Priority to US18/296,690 priority patent/US12027091B2/en
Priority to US18/755,819 priority patent/US12536969B2/en
Priority to JP2025051475A priority patent/JP7820081B2/ja
Ceased legal-status Critical Current

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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00—Electroluminescent light sources
    • H05B33/12—Light sources with substantially two-dimensional [2D] radiating surfaces
    • H05B33/14—Light sources with substantially two-dimensional [2D] radiating surfaces characterised by the chemical or physical composition or the arrangement of the electroluminescent material, or by the simultaneous addition of the electroluminescent material in or onto the light source
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
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    • H10K59/131—Interconnections, e.g. wiring lines or terminals
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    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
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    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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    • H—ELECTRICITY
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    • H—ELECTRICITY
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    • H10K59/80—Constructional details
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Definitions

  • One aspect of the present invention relates to a display device.
  • One aspect of the present invention is not limited to the above technical fields.
  • the technical fields of one aspect of the present invention disclosed in the present specification and the like include semiconductor devices, display devices, light emitting devices, power storage devices, storage devices, electronic devices, lighting devices, input devices, input / output devices, and methods for driving them. , Or their manufacturing methods, can be mentioned as an example.
  • a semiconductor device refers to a device in general that can function by utilizing semiconductor characteristics.
  • Oxide semiconductors using metal oxides are attracting attention as semiconductor materials applicable to transistors.
  • a plurality of oxide semiconductor layers are laminated, and among the plurality of oxide semiconductor layers, the oxide semiconductor layer serving as a channel contains indium and gallium, and the ratio of indium is the ratio of gallium.
  • a semiconductor device in which the electric field effect mobility (sometimes referred to simply as mobility or ⁇ FE) is increased by making it larger than the above is disclosed.
  • the metal oxide that can be used for the semiconductor layer can be formed by a sputtering method or the like, it can be used for the semiconductor layer of a transistor constituting a large display device.
  • the metal oxide that can be used for the semiconductor layer can be formed by a sputtering method or the like, it can be used for the semiconductor layer of a transistor constituting a large display device.
  • the transistor using the metal oxide has a higher field effect mobility than the case using amorphous silicon, it is possible to realize a high-performance display device provided with a drive circuit.
  • a wearable type display device As a display device for augmented reality (AR: Augmented Reality) or virtual reality (VR: Virtual Reality), a wearable type display device and a stationary type display device are becoming widespread.
  • the wearable type display device include a head-mounted display (HMD: Head Mounted Display) and a glasses-type display device.
  • the stationary display device include a head-up display (HUD: Head-Up Display) and the like.
  • an electronic viewfinder is used as a viewfinder used for confirming an image to be captured before imaging, which is provided in a digital camera or the like which is an electronic device having an imaging device.
  • the electronic viewfinder is provided with a display unit, and an image obtained by the imaging device can be displayed as an image on the display unit.
  • Patent Document 2 discloses an electronic viewfinder that can obtain a good diopter state from the central portion of an image to the peripheral portion of an image.
  • a display device such as a head-mounted display (HMD) where the distance between the display surface and the user is short
  • the user can easily see the pixels and feel a strong graininess, which makes AR and VR immersive and realistic. It may fade.
  • the electronic viewfinder is provided with an eyepiece like the optical viewfinder, and the image displayed on the display of the electronic viewfinder is visually recognized by bringing the user's eyes close to the eyepiece. Therefore, the distance between the display unit of the electronic viewfinder and the user becomes short. As a result, the user can easily see the pixels provided on the display unit, which may give a strong grainy feeling. From the above, in the HMD and the electronic viewfinder, a display device provided with fine pixels so that the pixels are not visually recognized by the user is desired.
  • the pixel density is preferably 1000 ppi or more, more preferably 2000 ppi or more, and even more preferably 5000 ppi or more. Further, for example, in a display device provided in an electronic viewfinder, it is preferable that an image having a resolution of 4K (number of pixels: 3840 ⁇ 2160), 5K (number of pixels: 5120 ⁇ 2880) or higher can be displayed.
  • the pixel density becomes high, it is necessary to provide transistors and the like provided in a drive circuit such as a data driver circuit with high density integration.
  • the area occupied by the data driver circuit may be larger than the area of the display unit.
  • the frame which is an area where the display unit is not provided, becomes large.
  • One aspect of the present invention is to provide a display device having a narrow frame. Alternatively, one aspect of the present invention is to provide a small display device. Alternatively, one aspect of the present invention is to provide a display device having a high degree of freedom in layout. Alternatively, one aspect of the present invention is to provide a display device having a high pixel density. Alternatively, one aspect of the present invention is to provide a display device capable of displaying a high-definition image. Alternatively, one aspect of the present invention is to provide a display device capable of displaying a high-quality image. Alternatively, one aspect of the present invention is to provide a display device capable of displaying a highly realistic image.
  • one aspect of the present invention is to provide a display device capable of displaying a high-luminance image.
  • one aspect of the present invention is to provide a display device that operates at high speed.
  • one aspect of the present invention is to provide a display device having low power consumption.
  • one aspect of the present invention is to provide a low-priced display device.
  • one aspect of the present invention is to provide a highly reliable display device.
  • one aspect of the present invention is to provide a new display device.
  • one aspect of the present invention is to provide a method of operating the display device.
  • one aspect of the present invention is to provide an electronic device having the above display device.
  • One aspect of the present invention is a display device in which a first layer, a second layer, and a third layer are laminated, and the first layer is a gate driver circuit and data. It has a driver circuit, a second layer has a demultiplexer circuit, a third layer has a display unit, and the display unit has pixels arranged in a matrix to form a demultiplexer circuit.
  • the input terminal is electrically connected to the data driver circuit
  • the output terminal of the demultiplexer circuit is electrically connected to the pixel
  • the gate driver circuit has an area overlapping the pixel
  • the data driver circuit is the pixel.
  • the gate driver circuit is a display device having an overlapping area and having an overlapping area with the data driver circuit.
  • the demultiplexer circuit may have a region overlapping the pixels.
  • the display device has a D / A conversion circuit
  • the D / A conversion circuit has a potential generation circuit and a path transistor logic circuit
  • the potential generation circuit is a data driver circuit.
  • the path transistor logic circuit provided externally is provided in the data driver circuit, and the number of path transistor logic circuits provided in the D / A conversion circuit is less than the number of rows of pixels provided in the display unit, and D / A conversion is performed.
  • the number of potential generation circuits provided in the circuit is less than the number of pass transistor logic circuits
  • the potential generation circuits have a function of generating a plurality of potentials having different sizes from each other, and the pass transistor logic circuits generate image data. It may have a function of receiving and outputting any of the potentials generated by the potential generation circuit based on the digital value of the image data.
  • the number of pass transistor logic circuits may be 1/2 or less of the number of pixel columns.
  • the pixel has a transistor having a metal oxide in the channel forming region, and the metal oxide contains In, the element M (M is Al, Ga, Y, or Sn), Zn, and the like. May have.
  • one aspect of the present invention is a display device in which a first layer, a second layer, and a third layer are laminated, and the first layer is a gate driver circuit.
  • the second layer has a first data driver circuit, a second data driver circuit, a third data driver circuit, a fourth data driver circuit, and a fifth data driver circuit.
  • the third layer has a first demultiplexer circuit, a second demultiplexer circuit, a third demultiplexer circuit, a fourth demultiplexer circuit, and a fifth demultiplexer circuit. It has a first display unit, a second display unit, a third display unit, a fourth display unit, and a fifth display unit, and the first display unit has a first display unit.
  • the pixels are arranged in a matrix, the second pixel is arranged in a matrix in the second display unit, the third pixel is arranged in a matrix in the third display unit, and the fourth display is displayed.
  • the fourth pixel is arranged in a matrix in the unit, the fifth pixel is arranged in a matrix in the fifth display unit, and the input terminal of the first demultiplexer circuit is the first data driver. Electrically connected to the circuit, the input terminal of the second demultiplexer circuit is electrically connected to the second data driver circuit, and the input terminal of the third demultiplexer circuit is connected to the third data driver circuit.
  • the input terminal of the 4th demultiplexer circuit is electrically connected to the 4th data driver circuit
  • the input terminal of the 5th demultiplexer circuit is electrically connected to the 5th data driver circuit.
  • the output terminal of the first demultiplexer circuit is electrically connected to the first pixel
  • the output terminal of the second demultiplexer circuit is electrically connected to the second pixel
  • the third The output terminal of the demultiplexer circuit is electrically connected to the third pixel
  • the output terminal of the fourth demultiplexer circuit is electrically connected to the fourth pixel
  • the output of the fifth demultiplexer circuit is The terminals are electrically connected to the fifth pixel
  • the gate driver circuit has an area overlapping the first pixel
  • the first data driver circuit has an area overlapping the first pixel
  • the first The second data driver circuit has an area that overlaps with the second pixel
  • the third data driver circuit has an area that overlaps with the third pixel
  • the fourth data driver circuit has an area that overlaps with the fourth pixel.
  • the first demultiplexer circuit has a region overlapping the first pixel
  • the second demultiplexer circuit has a region overlapping the second pixel
  • the third demultiplexer circuit Has an area that overlaps with the third pixel
  • the fourth demultiplexer circuit has an area that overlaps with the fourth pixel
  • the fifth demultiplexer circuit has an area that overlaps with the fifth pixel. You may.
  • the display device has a D / A conversion circuit
  • the D / A conversion circuit includes a potential generation circuit, a first pass transistor logic circuit, a second pass transistor logic circuit, and a second. It has a pass transistor logic circuit of 3, a fourth pass transistor logic circuit, and a fifth pass transistor logic circuit, and the potential generation circuit is provided outside the first to fifth data driver circuits.
  • the first pass transistor logic circuit is provided in the first data driver circuit
  • the second pass transistor logic circuit is provided in the second data driver circuit
  • the third pass transistor logic circuit is provided in the third.
  • the fourth pass transistor logic circuit is provided in the data driver circuit, the fourth pass transistor logic circuit is provided in the fourth data driver circuit, the fifth pass transistor logic circuit is provided in the fifth data driver circuit, and the D / A conversion circuit is provided.
  • the number of the first pass transistor logic circuits provided in the first display unit is smaller than the number of rows of the first pixels provided in the first display unit, and the number of second pass transistor logic circuits provided in the D / A conversion circuit is ,
  • the number of third pass transistor logic circuits provided in the D / A conversion circuit is less than the number of rows of the second pixel provided in the second display unit, and the number of third pass transistor logic circuits provided in the third display unit is the third pixel provided in the third display unit.
  • the number of fourth pass transistor logic circuits provided in the D / A conversion circuit is less than the number of columns of the fourth pixel provided in the fourth display unit, and is provided in the D / A conversion circuit.
  • the number of fifth pass transistor logic circuits provided is less than the number of rows of fifth pixels provided in the fifth display unit, and the number of potential generation circuits provided in the D / A conversion circuit is the number of potential generation circuits provided in the first pass transistor.
  • the number of potential generation circuits provided in the D / A conversion circuit is less than the number of logic circuits, and the number of potential generation circuits provided in the D / A conversion circuit is less than the number of second pass transistor logic circuits.
  • the number of potential generation circuits provided in the D / A conversion circuit is less than the number of pass transistor logic circuits of 3, and the number of potential generation circuits provided in the D / A conversion circuit is smaller than the number of fourth pass transistor logic circuits.
  • the number is less than the number of the fifth pass transistor logic circuits, the potential generation circuits have a function of generating a plurality of potentials having different sizes from each other, and the first to fifth pass transistor logic circuits have image data. Is received and based on the digital value of the image data It may have a function of outputting any of the potentials generated by the potential generation circuit.
  • the number of first pass transistor logic circuits is 1 ⁇ 2 or less of the number of rows of the first pixel
  • the number of second pass transistor logic circuits is the number of rows of the second pixel.
  • the number of third pass transistor logic circuits is 1/2 or less of the number of rows of the third pixel
  • the number of fourth pass transistor logic circuits is 1/2 of that of the fourth pixel. It may be 1/2 or less of the number of columns
  • the number of fifth pass transistor logic circuits may be 1/2 or less of the number of columns of the fifth pixel.
  • the first to fifth pixels have a transistor having a metal oxide in the channel forming region, and the metal oxide contains In and the element M (M is Al, Ga, Y, or Sn. ) And Zn.
  • a display device having a narrow frame it is possible to provide a small display device. Alternatively, according to one aspect of the present invention, it is possible to provide a display device having a high degree of freedom in layout. Alternatively, according to one aspect of the present invention, it is possible to provide a display device having a high pixel density. Alternatively, according to one aspect of the present invention, it is possible to provide a display device capable of displaying a high-definition image. Alternatively, according to one aspect of the present invention, it is possible to provide a display device capable of displaying a high-quality image.
  • a display device capable of displaying a highly realistic image.
  • a display device capable of displaying a high-luminance image.
  • one aspect of the present invention can provide a display device that operates at high speed.
  • a display device having low power consumption it is possible to provide a display device having low power consumption.
  • one aspect of the present invention can provide a low-cost display device.
  • one aspect of the present invention can provide a highly reliable display device.
  • a novel display device can be provided by one aspect of the present invention.
  • a method of operating the display device can be provided.
  • an electronic device having the above display device can be provided.
  • FIG. 1A is a block diagram showing a configuration example of a display device.
  • FIG. 1B is a schematic view showing a configuration example of a display device.
  • FIG. 2 is a block diagram showing a configuration example of the display device.
  • FIG. 3 is a block diagram showing a configuration example of the display device.
  • 4A to 4C are circuit diagrams showing a configuration example of pixels.
  • FIG. 5 is a timing chart showing an example of the operation method of the display device.
  • FIG. 6 is a block diagram showing a configuration example of the display device.
  • FIG. 7 is a block diagram showing a configuration example of the display device.
  • FIG. 8 is a block diagram showing a configuration example of the display device.
  • FIG. 9 is a block diagram showing a configuration example of the display device.
  • FIG. 1B is a schematic view showing a configuration example of a display device.
  • FIG. 2 is a block diagram showing a configuration example of the display device.
  • FIG. 3 is a block
  • FIG. 10 is a block diagram showing a configuration example of the display device.
  • FIG. 11 is a block diagram showing a configuration example of the display device.
  • FIG. 12 is a block diagram showing a configuration example of the display device.
  • FIG. 13 is a circuit diagram showing a configuration example of a D / A conversion circuit.
  • FIG. 14 is a block diagram showing a configuration example of a gate driver circuit.
  • FIG. 15A is a block diagram showing a configuration example of a register circuit.
  • FIG. 15B is a circuit diagram showing a configuration example of a register circuit.
  • FIG. 16 is a schematic diagram showing the arrangement of the gate driver circuit and the data driver circuit.
  • FIG. 17 is a top view showing a configuration example of a gate driver circuit and a data driver circuit.
  • FIG. 18 is a cross-sectional view showing a configuration example of the display device.
  • FIG. 19 is a cross-sectional view showing a configuration example of the display device.
  • FIG. 20 is a cross-sectional view showing a configuration example of the display device.
  • FIG. 21 is a cross-sectional view showing a configuration example of the display device.
  • FIG. 22 is a cross-sectional view showing a configuration example of the display device.
  • FIG. 23 is a cross-sectional view showing a configuration example of the display device.
  • 24A and 24B are top views showing a configuration example of pixels.
  • FIG. 25 is a top view showing a configuration example of pixels.
  • FIG. 26 is a cross-sectional view showing a configuration example of pixels.
  • FIG. 28A is a top view showing a configuration example of the transistor.
  • 28B and 28C are cross-sectional views showing a configuration example of a transistor.
  • FIG. 29A is a top view showing a configuration example of the transistor.
  • 29B and 29C are cross-sectional views showing a configuration example of a transistor.
  • FIG. 30A is a top view showing a configuration example of the transistor.
  • 30B and 30C are cross-sectional views showing a configuration example of a transistor.
  • FIG. 31A is a diagram illustrating classification of the crystal structure of IGZO.
  • FIG. 31B is a diagram illustrating an XRD spectrum of the CAAC-IGZO film.
  • FIG. 31C is a diagram illustrating an ultrafine electron beam diffraction pattern of the CAAC-IGZO film.
  • 32A to 32E are perspective views showing an example of an electronic device.
  • 33A to 33G are perspective views showing an example of an electronic device.
  • the source and drain functions of the transistor may be interchanged when the polarity of the transistor or the direction of the current changes in the circuit operation. Therefore, the terms source and drain can be interchanged.
  • Electrode may be used as part of a “wiring” and vice versa.
  • the terms “electrode” and “wiring” include the case where a plurality of “electrodes” and “wiring” are integrally formed.
  • a “terminal” may be used as part of a “wiring” or “electrode” and vice versa.
  • the term “terminal” includes a case where a plurality of "electrodes", “wiring”, “terminals” and the like are integrally formed.
  • the "electrode” can be a part of the “wiring” or the “terminal”, and for example, the “terminal” can be a part of the “wiring” or the “electrode”.
  • terms such as “electrode”, “wiring”, and “terminal” may be replaced with terms such as "area” in some cases.
  • the resistance value of "resistance” may be determined by the length of wiring.
  • the resistance value may be determined by connecting to a conductor having a resistivity different from that of the conductor used in wiring.
  • the resistance value may be determined by doping the semiconductor with impurities.
  • electrically connected includes a case of being directly connected and a case of being connected via "something having some electrical action".
  • the "thing having some kind of electrical action” is not particularly limited as long as it enables the exchange of electric signals between the connection targets. Therefore, even when it is expressed as “electrically connected”, in an actual circuit, there is a case where there is no physical connection part and only the wiring is extended. Further, even when expressed as "direct connection”, a case where different conductors are connected via a contact is included. In the wiring, there are cases where different conductors contain one or more of the same elements and cases where different conductors contain different elements.
  • membrane and the term “layer” can be interchanged with each other.
  • conductive layer and “insulating layer” may be interchangeable with the terms “conductive film” and “insulating film”.
  • the off current means a drain current when the transistor is in an off state (also referred to as a non-conducting state or a cutoff state).
  • the off state is a state in which the voltage V gs between the gate and the source is lower than the threshold voltage V th in the n-channel transistor (higher than V th in the p-channel transistor) unless otherwise specified. To say.
  • the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.
  • the drawings schematically show ideal examples, and are not limited to the shapes or values shown in the drawings. For example, in an actual manufacturing process, layers, resist masks, and the like may be unintentionally reduced due to processing such as etching, but they may not be reflected in the figure for ease of understanding. Further, in the drawings, the same reference numerals may be used in common between different drawings for the same parts or parts having the same functions / materials, and the repeated description thereof may be omitted. In addition, when referring to the same function / material, the hatch pattern may be the same and no particular sign may be added.
  • a metal oxide is a metal oxide in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as Oxide Semiconductor or simply OS) and the like. For example, when a metal oxide is used in the active layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when it is described as an OS transistor, it can be rephrased as a transistor having an oxide or an oxide semiconductor.
  • One aspect of the present invention relates to a display device in which a first layer, a second layer, and a third layer are laminated.
  • the first layer has a gate driver circuit and a data driver circuit
  • the second layer has a demultiplexer circuit
  • the third layer has a display unit. Pixels are arranged in a matrix on the display unit.
  • the gate driver circuit and the data driver circuit are provided so as to have an area overlapping the display unit.
  • the gate driver circuit and the data driver circuit are not clearly separated and have overlapping regions.
  • the display device can be further narrowed and downsized as compared with the case where the overlapping area is not provided.
  • the gate driver circuit and the data driver circuit are configured so as not to overlap the display unit, the gate driver circuit and the data driver circuit are provided, for example, on the outer peripheral portion of the display unit. In this case, it is difficult to provide more display units than 2 rows and 2 columns from the viewpoint of the installation location of the data driver circuit and the like.
  • the gate driver circuit and the data driver circuit can be provided in a layer different from the layer in which the display unit is provided so as to have an area overlapping the display unit. .. Therefore, more display units than 2 rows and 2 columns can be provided. That is, the display device of one aspect of the present invention may be provided with five or more gate driver circuits and five or more data driver circuits.
  • the gate driver circuit and the data driver circuit operate at a higher speed, for example, than a display device having a configuration that does not overlap the display unit.
  • the pixel density of the display device according to one aspect of the present invention can be increased as compared with the display device having a configuration in which the gate driver circuit and the data driver circuit do not overlap with the display unit.
  • the pixel density of the display device according to one aspect of the present invention can be 1000 ppi or more, 2000 ppi or more, and 5000 ppi or more.
  • the display device of one aspect of the present invention can display a high-definition image.
  • the pixel density of the display device is increased, it is necessary to integrate transistors and the like provided in a drive circuit such as a data driver circuit in a high density.
  • the area occupied by the data driver circuit may be larger than the area of the display unit.
  • the area of the portion of the data driver circuit that does not overlap with the display unit becomes large, and therefore the frame, which is the region where the display unit is not provided, may become large.
  • a demultiplexer circuit is provided in the second layer as described above.
  • the input terminal of the demultiplexer circuit is electrically connected to the data driver circuit, and the output terminal of the demultiplexer circuit is electrically connected to the pixel.
  • the demultiplexer circuit has a first output terminal and a second output terminal as output terminals, the first output terminal and the second output terminal have pixels in different columns. Is electrically connected to.
  • the demultiplexer circuit can have a function of switching the supply destination of the image data generated by the data driver circuit. Therefore, the configuration of the data driver circuit can be simplified. Specifically, for example, the number of elements such as transistors included in the data driver circuit can be reduced. As a result, the occupied area of the data driver circuit can be reduced. Therefore, the area of the portion of the data driver circuit that does not overlap with the display portion can be reduced. Thereby, the display device of one aspect of the present invention can be narrowed.
  • the demultiplexer circuit is provided in a layer different from both the layer in which the data driver circuit is provided and the layer in which the display unit is provided as described above.
  • the demultiplexer circuit can be provided so as to have an area overlapping the display unit while increasing the degree of freedom in layout. Therefore, for example, the display device of one aspect of the present invention can be further narrowed and miniaturized as compared with the case where the demultiplexer circuit is provided in the same layer as the data driver circuit.
  • FIG. 1A is a block diagram showing a configuration example of a display device 10 which is a display device according to an aspect of the present invention.
  • the display device 10 includes a gate driver circuit 21, a data driver circuit 22, and a circuit 40. Further, the display device 10 has a display unit 33 in which pixels 34 are arranged in a matrix of m rows and n columns (m and n are integers of 1 or more). Further, the display device 10 has a demultiplexer circuit 81.
  • the code when the same code is used for a plurality of elements, particularly when it is necessary to distinguish them, the code is "_1", “_2”, “[n]", “[m, n]”.
  • a code for identification such as is added.
  • the pixel 34 in the first row and the first column is described as the pixel 34 [1,1]
  • the pixel 34 in the mth row and the nth column is described as the pixel 34 [m, n].
  • the data driver circuit 22 is electrically connected to the input terminal of the demultiplexer circuit 81 via the wiring 82. Further, the selection control signal input terminal of the demultiplexer circuit 81 is electrically connected to the wiring 83. Further, the demultiplexer circuit 81 has a plurality of output terminals, and the plurality of output terminals are electrically connected to the pixel 34 via wiring 32 different from each other.
  • the term "output terminal of the demultiplexer circuit” may indicate any one of a plurality of output terminals of the demultiplexer circuit.
  • the wiring may be electrically connected to one of a plurality of output terminals.
  • the gate driver circuit 21 is electrically connected to the pixel 34 via the wiring 31. Further, the circuit 40 is electrically connected to the data driver circuit 22. The circuit 40 may be electrically connected to other circuits or the like.
  • FIG. 1A shows a configuration in which pixels 34 in the same column are electrically connected to the same wiring 32, and pixels 34 in the same row are electrically connected to the same wiring 31.
  • the wiring 32 electrically connected to the pixel 34 in the first row is described as wiring 32 [1]
  • the wiring 32 electrically connected to the pixel 34 in the nth row is wired 32. Described as [n].
  • the wiring 31 electrically connected to the pixel 34 in the first row is described as wiring 31 [1]
  • the wiring 31 electrically connected to the pixel 34 in the mth row is referred to as wiring 31 [m]. Describe.
  • the data driver circuit 22 has a function of generating image data.
  • the image data is supplied to the demultiplexer circuit 81 via the wiring 82.
  • the demultiplexer circuit 81 receives the image data input from the input terminal from any one of the plurality of output terminals according to the signal input to the selection control signal input terminal, that is, according to the potential of the wiring 83. It has a function to output. For example, when the demultiplexer circuit 81 has a first output terminal and a second output terminal and the selection control signal is a 1-bit digital signal, it is input when the selection control signal has a high potential. The image data can be output from the first output terminal. On the other hand, when the selection control signal has a low potential, the image data input to the demultiplexer circuit 81 can be output from the second output terminal. When the selection control signal has a low potential, the image data input to the demultiplexer circuit 81 may be output from the first output terminal, and when the selection control signal has a high potential, it may be output from the second output terminal.
  • the image data input to the demultiplexer circuit 81 is output to the wiring 32 and supplied to the pixels 34. Therefore, the wiring 32 can have a function as a data line.
  • the demultiplexer circuit 81 has a plurality of output terminals, and each output terminal can be electrically connected to one wiring 32. Therefore, the number of demultiplexer circuits 81 included in the display device 10 can be less than n, which is the number of columns of pixels 34. For example, when the demultiplexer circuit 81 has a first output terminal and a second output terminal as output terminals, the display device 10 can have n / 2 demultiplexer circuits 81. Further, when the demultiplexer circuit 81 has a first output terminal, a second output terminal, and a third output terminal as output terminals, the display device 10 has n / 3 demultiplexer circuits 81. be able to.
  • the display device 10 can have n / k demultiplexer circuits 81. ..
  • the number of bits of the selection control signal can be set according to the number of output terminals of the demultiplexer circuit 81.
  • the selection control signal can be a 2-bit digital signal.
  • the selection control signal can be a log 2 (k) bit digital signal.
  • FIG. 1A shows a case where the demultiplexer circuit 81 has a first output terminal and a second output terminal as output terminals.
  • the display device 10 can have n / 2 demultiplexer circuits 81.
  • a plurality of demultiplexer circuits 81 are described as demultiplexer circuits 81 [1], demultiplexer circuits 81 [2] and the like to distinguish them.
  • the n / 2 demultiplexer circuits 81 are described as the demultiplexer circuit 81 [1] to the demultiplexer circuit 81 [n / 2] to distinguish them from each other.
  • the wiring 82 that is electrically connected to the input terminal of the demultiplexer circuit 81 [1] is described as wiring 82 [1], and is electrically connected to the selection control signal input terminal of the demultiplexer circuit 81 [1].
  • the wiring 83 to be connected is described as wiring 83 [1].
  • the wiring 82 electrically connected to the input terminal of the demultiplexer circuit 81 [n / 2] is described as wiring 82 [n / 2]
  • the selection control signal input of the demultiplexer circuit 81 [n / 2] is described.
  • the wiring 83 electrically connected to the terminal is referred to as wiring 83 [n / 2].
  • the gate driver circuit 21 has a function of selecting a pixel 34 in which a potential corresponding to the image data generated by the data driver circuit 22 is written.
  • the gate driver circuit 21 can generate a selection signal and supply the selection signal to the pixels 34 in a specific row.
  • the potential corresponding to the image data can be written to the pixel 34 to which the selection signal is supplied.
  • the gate driver circuit 21 selects the pixel 34 in the first row, then selects the pixel 34 in the second row, sequentially selects the pixel 34 in the mth row, and then selects the pixel 34 in the first row again.
  • the gate driver circuit 21 has a function of scanning the pixels 34.
  • the selection signal can be supplied from the gate driver circuit 21 to the pixel 34 via the wiring 31. From the above, it can be said that the wiring 31 has a function as a scanning line.
  • the interlace drive after selecting the pixel 34 in the first row, the pixel 34 in the second row is not selected, for example, the pixels 34 in the third row or the fourth and subsequent rows are selected. For example, when m is an even number, the pixels 34 in the odd-numbered rows can be sequentially selected, and then the pixels 34 in the even-numbered rows can be sequentially selected.
  • the circuit 40 has, for example, a function of receiving data that is the basis of image data generated by the data driver circuit 22 and supplying the received data to the data driver circuit 22. Further, the circuit 40 has a function as a control circuit that generates a start pulse signal, a clock signal, and the like. In addition, the circuit 40 may be a circuit having a function that the gate driver circuit 21 and the data driver circuit 22 do not have.
  • the display unit 33 has a function of displaying an image corresponding to the image data supplied to the pixel 34. Specifically, the image is displayed on the display unit 33 by emitting light having a brightness corresponding to the image data from the pixel 34.
  • the color of the light emitted from the pixel 34 can be, for example, red, green, blue, or the like.
  • the display unit 33 by providing the display unit 33 with a pixel 34 that emits red light, a pixel 34 that emits green light, and a pixel 34 that emits blue light, the display device 10 can perform full-color display.
  • the pixel 34 can be said to be a sub-pixel.
  • FIG. 1B is a schematic view showing a configuration example of the display device 10.
  • the display device 10 can have a laminated structure of the layer 20, the layer 80, and the layer 30.
  • FIG. 1B shows a configuration in which the layer 80 is provided above the layer 20 and the layer 30 is provided above the layer 80.
  • An interlayer insulating layer can be provided between the layers 20 and 80, and between the layers 80 and 30.
  • the stacking order of the layers 20, the layers 80, and the layers 30 is not limited to that shown in FIG. 1B.
  • the layer 80 may be provided above the layer 30, and the layer 20 may be provided above the layer 80.
  • a gate driver circuit 21, a data driver circuit 22, and a circuit 40 can be provided on the layer 20.
  • a demultiplexer circuit 81 can be provided on the layer 80.
  • the layer 30 may be provided with, for example, a display unit 33.
  • the gate driver circuit 21, the data driver circuit 22, the circuit 40, and the like provided on the layer 20 are circuits necessary for driving the display device 10. Therefore, these circuits can be called drive circuits.
  • the demultiplexer circuit 81 may be called a drive circuit.
  • FIG. 2 is a diagram showing a configuration example of the layer 20, the layer 80, and the layer 30 shown in FIG. 1B.
  • the positional relationship between the layer 20 and the layer 30 is shown by a dotted chain line and a white circle, and the white circle of the layer 20 and the white circle of the layer 30 connected by the alternate long and short dash line overlap each other. ing. The same notation is used in other figures.
  • the display device 10 has an area in which the gate driver circuit 21 and the data driver circuit 22 provided on the layer 20 overlap with the display unit 33.
  • the gate driver circuit 21 and the data driver circuit 22 have an area that overlaps with the pixel 34.
  • the gate driver circuit 21 and the data driver circuit 22 are not clearly separated and have overlapping regions.
  • the area is referred to as area 23.
  • the region 23 By having the region 23, the total occupied area of the gate driver circuit 21 and the data driver circuit 22 can be reduced. Therefore, even when the area of the display unit 33 is small, the gate driver circuit 21 and the data driver circuit 22 can be provided without protruding from the display unit 33. Alternatively, the area of the area of the gate driver circuit 21 and the data driver circuit 22 that does not overlap with the display unit 33 can be reduced. From the above, the display device 10 can be further narrowed and miniaturized as compared with the case where the area 23 is not provided.
  • the demultiplexer circuit 81 has a first output terminal and a second output terminal as output terminals, and the wiring 32 in the odd-numbered row is electrically connected to the first output terminal.
  • the data driver circuit 22 may generate the image data to be supplied to the pixels 34 in the even-numbered columns after generating the image data to be supplied to the pixels 34 in the odd-numbered columns.
  • the configuration of the data driver circuit 22 can be simplified. Specifically, for example, the number of elements such as transistors included in the data driver circuit 22 can be reduced. As a result, the occupied area of the data driver circuit 22 can be reduced. Therefore, even when the area of the display unit 33 is small, it is possible to prevent the data driver circuit 22 from protruding from the display unit 33. Alternatively, the area of the area of the data driver circuit 22 that does not overlap with the display unit 33 can be reduced. From the above, the display device 10 can be made narrower and smaller.
  • the demultiplexer circuit 81 is provided in a layer different from both the layer in which the data driver circuit 22 is provided and the layer in which the display unit 33 is provided. As a result, the demultiplexer circuit 81 can be provided so as to have an area overlapping the display unit 33 while increasing the degree of freedom in layout. For example, the demultiplexer circuit 81 can be provided so as to have a region overlapping the pixels 34. Therefore, for example, the display device 10 can be further narrowed and downsized as compared with the case where the demultiplexer circuit 81 is provided on the layer 20 where the data driver circuit 22 is provided.
  • the demultiplexer circuit 81 is provided so as to have a region overlapping with the data driver circuit 22.
  • the circuit 40 can be provided so as not to overlap the display unit 33.
  • the circuit 40 may be provided so as to have a region overlapping with the display unit 33.
  • the gate driver circuit 21 and / or the circuit 40 may be provided on the layer 80.
  • the gate driver circuit 21 and the demultiplexer circuit 81 may have a region where they are not clearly separated and overlap each other.
  • FIG. 3 is a block diagram showing a configuration example of the circuit 40 and the data driver circuit 22. Note that FIG. 3 shows a case where the demultiplexer circuit 81 has two output terminals and the display device 10 has n / 2 demultiplexer circuits 81 as shown in FIGS. 1A and 2.
  • the circuit 40 includes a receiving circuit 41, a serial-parallel conversion circuit 42, and a potential generation circuit 46a.
  • the circuit 40 may be provided with various circuits.
  • the circuit 40 may be provided with a control circuit having a function of generating a start pulse signal, a clock signal, and the like.
  • the data driver circuit 22 includes a buffer circuit 43, a shift register circuit 44, a latch circuit 45, a pass transistor logic circuit 46b, and an amplifier circuit 47.
  • the latch circuit 45, the pass transistor logic circuit 46b, and the amplifier circuit 47 can be provided in the same number as the demultiplexer circuit 81.
  • FIG. 3 shows a case where the data driver circuit 22 has one shift register circuit 44, and each of the latch circuit 45, the pass transistor logic circuit 46b, and the amplifier circuit 47 is n / 2.
  • the n / 2 latch circuit 45, the pass transistor logic circuit 46b, and the amplifier circuit 47 are referred to as the latch circuit 45 [1] to the latch circuit 45 [n / 2] and the pass transistor logic circuit 46b, respectively.
  • the receiving circuit 41 has a function of receiving data that is the basis of the image data generated by the data driver circuit 22.
  • the data can be single-ended digital data.
  • the receiving circuit 41 receives data using a data transmission signal such as LVDS (Low Voltage Differential Signaling), it may have a function of converting the data into a signal standard capable of internal processing.
  • LVDS Low Voltage Differential Signaling
  • the serial-parallel conversion circuit 42 has a function of parallel-converting the single-ended data output by the receiving circuit 41.
  • the buffer circuit 43 can be, for example, a unity gain buffer.
  • the buffer circuit 43 has a function of outputting the same data as the data output from the serial-parallel conversion circuit 42.
  • the shift register circuit 44 has a function of generating a signal for controlling the operation of the latch circuit 45.
  • the latch circuit 45 has a function of holding or outputting the data output by the buffer circuit 43. In the latch circuit 45, whether to hold or output data is selected based on the signal supplied from the shift register circuit 44.
  • the D / A conversion circuit 46 has a function of converting the digital data output by the latch circuit 45 into analog image data.
  • the potential generation circuit 46a has a function of generating a potential of a type corresponding to the number of bits of data that can be D / A converted and supplying the potential to the path transistor logic circuit 46b. For example, when the D / A conversion circuit 46 has a function of converting 8-bit digital data into analog image data, the potential generation circuit 46a can generate 256 types of potentials having different sizes from each other.
  • the pass transistor logic circuit 46b has a function of receiving data from the latch circuit 45 and outputting any of the potentials generated by the potential generation circuit 46a as an analog signal based on the digital value of the received data. For example, the larger the digital value of the data, the larger the potential output by the pass transistor logic circuit 46b.
  • the display device 10 may be configured such that the circuits constituting the D / A conversion circuit 46 are distributed and provided in the data driver circuit 22 and the circuit 40.
  • a circuit that is preferably provided for each data driver circuit such as the pass transistor logic circuit 46b, is provided in the data driver circuit 22, and may not be provided for each data driver circuit, such as the potential generation circuit 46a.
  • the circuit can be configured to be provided in the circuit 40. Thereby, for example, the number of potential generation circuits 46a included in the display device 10 can be made smaller than the number of path transistor logic circuits 46b. Therefore, the occupied area of the data driver circuit 22 can be reduced.
  • the display device 10 can be made narrower and smaller.
  • the components of the circuit can be distributed and provided in the data driver circuit 22 and the circuit 40.
  • the amplifier circuit 47 has a function of amplifying the analog signal output by the pass transistor logic circuit 46b and outputting it to the wiring 82. By providing the amplifier circuit 47, the image data represented by the analog signal can be stably supplied to the demultiplexer circuit 81.
  • a voltage follower circuit or the like having an operational amplifier or the like can be applied.
  • the offset voltage of the differential input circuit is preferably 0V as much as possible.
  • the data driver circuit 22 needs to have, for example, n latch circuits 45, pass transistor logic circuits 46b, and amplifier circuits 47.
  • the data driver circuit 22 has, for example, n / 2 latch circuits 45, pass transistor logic circuits 46b, and amplifier circuits 47. can do.
  • the number of the latch circuit 45, the pass transistor logic circuit 46b, and the amplifier circuit 47 included in the data driver circuit 22 can be reduced.
  • the number of the latch circuit 45, the pass transistor logic circuit 46b, and the amplifier circuit 47 included in the data driver circuit 22 can be made smaller than the number of rows n of the pixels 34.
  • the number of elements such as transistors included in the data driver circuit 22 can be reduced, so that the area occupied by the data driver circuit 22 can be reduced. Therefore, even when the area of the display unit 33 is small, it is possible to prevent the data driver circuit 22 from protruding from the display unit 33.
  • the area of the area of the data driver circuit 22 that does not overlap with the display unit 33 can be reduced. From the above, the display device 10 can be made narrower and smaller.
  • FIG. 3 shows a case where the demultiplexer circuit 81 has two output terminals.
  • the demultiplexer circuit 81 has three or more output terminals, the number of the latch circuit 45, the pass transistor logic circuit 46b, and the amplifier circuit 47 included in the data driver circuit 22 can be further reduced. As a result, the occupied area of the data driver circuit 22 can be further reduced.
  • FIG. 4A and 4B are circuit diagrams showing a configuration example of the pixel 34.
  • the pixel 34 having the configuration shown in FIG. 4A includes a liquid crystal element 570, a transistor 550, and a capacitance element 560.
  • the capacity element 560 may not be provided.
  • One of the source or drain of the transistor 550 is electrically connected to one electrode of the liquid crystal element 570.
  • One electrode of the liquid crystal element 570 is electrically connected to one electrode of the capacitive element 560.
  • the other of the source or drain of transistor 550 is electrically connected to wire 32.
  • the gate of the transistor 550 is electrically connected to the wiring 31.
  • the other electrode of the capacitive element 560 is electrically connected to the wiring 35.
  • a node to which one of the source and drain of the transistor 550, one electrode of the liquid crystal element 570, and one electrode of the capacitance element 560 is electrically connected is referred to as a node FD.
  • the potential of the other electrode of the liquid crystal element 570 is appropriately set according to the specifications of the pixel 34.
  • the orientation state of the liquid crystal element 570 is set by the image data written in the pixel 34.
  • a common potential (common potential) may be supplied to the other electrode of the liquid crystal element 570 of each of the plurality of pixels 34. Further, different potentials may be supplied to the other electrode of the liquid crystal element 570 of the pixel 34 in each row.
  • the pixel 34 having the configuration shown in FIG. 4B includes a transistor 552, a transistor 554, a capacitance element 562, and a light emitting element 572. If the gate capacitance of the transistor 554 is sufficiently large, the capacitance element 562 may not be provided.
  • One of the source or drain of transistor 552 is electrically connected to the gate of transistor 554.
  • the gate of transistor 554 is electrically connected to one electrode of the capacitive element 562.
  • One of the source or drain of the transistor 554 is electrically connected to one electrode of the light emitting element 572.
  • the other of the source or drain of the transistor 552 is electrically connected to the wire 32.
  • the gate of the transistor 552 is electrically connected to the wiring 31.
  • the other electrode of the source or drain of the transistor 554 and the other electrode of the capacitive element 562 are electrically connected to the wiring 35a.
  • the other electrode of the light emitting element 572 is electrically connected to the wiring 35b.
  • a node in which one of the source or drain of the transistor 552, the gate of the transistor 554, and one electrode of the capacitance element 562 are electrically connected is referred to as a node FD.
  • a low potential can be supplied to the wiring 35a, and for example, a high potential can be supplied to the wiring 35b.
  • the emission brightness from the light emitting element 572 is controlled by controlling the current flowing through the light emitting element 572 according to the potential of the node FD.
  • the light emitting element 572 for example, an EL element using electroluminescence can be applied.
  • the EL element has a layer containing a luminescent compound (hereinafter, also referred to as an EL layer) between a pair of electrodes.
  • a potential difference larger than the threshold voltage of the EL element is generated between the pair of electrodes, holes are injected into the EL layer from the anode side and electrons are injected from the cathode side. The injected electrons and holes are recombined in the EL layer, and the luminescent substance contained in the EL layer emits light.
  • the EL element is distinguished by whether the light emitting material is an organic compound or an inorganic compound, and the former is generally called an organic EL element and the latter is called an inorganic EL element.
  • the organic EL element by applying a voltage, electrons are injected into the EL layer from one electrode and holes are injected into the EL layer from the other electrode. Then, when these carriers (electrons and holes) are recombined, the luminescent organic compound forms an excited state, and when the excited state returns to the ground state, it emits light. From such a mechanism, such a light emitting element is called a current excitation type light emitting element.
  • the voltage supplied to a display element such as a light emitting element or a liquid crystal element is a potential applied to one electrode of the display element and a potential applied to the other electrode of the display element. Shows the difference between.
  • the EL layer is a substance having a high hole injection property, a substance having a high hole transport property, a hole blocking material, a substance having a high electron transport property, a substance having a high electron transfer property, or a bipolar. It may have a sex substance (a substance having high electron transport property and hole transport property) and the like.
  • the EL layer can be formed by a method such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, or a coating method.
  • Inorganic EL elements are classified into dispersed inorganic EL elements and thin film type inorganic EL elements according to their device configurations.
  • the dispersed inorganic EL element has a light emitting layer in which particles of a light emitting material are dispersed in a binder, and the light emitting mechanism is donor-acceptor recombination type light emission utilizing a donor level and an acceptor level.
  • the thin film type inorganic EL element has a structure in which a light emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and the light emitting mechanism is localized light emission utilizing the inner shell electronic transition of metal ions.
  • the light emitting element may have at least one of a pair of electrodes transparent in order to extract light. Then, a transistor and a light emitting element are formed on the substrate, and a top emission (top emission) structure for extracting light emission from the surface opposite to the substrate, a bottom injection (bottom emission) structure for extracting light emission from the surface on the substrate side, and There is a light emitting element having a double-sided injection (dual emission) structure that extracts light from both sides, and any light emitting element having an injection structure can be applied.
  • FIG. 4C A modified example of the pixel 34 having the configuration shown in FIG. 4B is shown in FIG. 4C.
  • one of the source and drain of the transistor 554 is electrically connected to one electrode of the light emitting element 572 and the other electrode of the capacitance element 562.
  • the wiring 35a can be configured not to be electrically connected to the other electrode of the capacitance element 562.
  • a high potential can be supplied to the wiring 35a, and for example, a low potential can be supplied to the wiring 35b.
  • FIG. 5 is a timing chart illustrating an example of an operation method of the display device 10 having the pixels 34 having the configurations shown in FIGS. 4A to 4C.
  • the timing chart shown in FIG. 5 shows an example of an operation method of the display device 10 when, for example, the demultiplexer circuit 81 has two output terminals and the display device 10 has n / 2 demultiplexer circuits 81.
  • FIG. 5 shows an example of an operation method of pixel 34 [i, j-1] and pixel 34 [i, j] (i is an integer of 1 or more and m or less, j is an even number of 2 or more and n or less). ..
  • the potential of the node FD [j-1], and the time course of the potential of the node FD [j] are shown.
  • the node FD [j-1] indicates the node FD possessed by the pixel 34 in the j-1st column
  • the node FD [j] indicates the node FD possessed by the pixel 34 in the jth column.
  • the timing chart shown in FIG. 5 shows an operation performed by the data driver circuit 22 to generate image data and display an image corresponding to the image data on the display unit 33. Specifically, an analog signal having a potential corresponding to data D [i, j-1] is supplied to pixel 34 [i, j-1], and an analog signal having a potential corresponding to data D [i, j] is supplied. The operation of supplying to the pixel 34 [i, j] is shown. Further, the selection control signal input from the wiring 83 to the demultiplexer circuit 81 is a 1-bit digital signal. When the potential of the wiring 83 [j / 2] is high, the demultiplexer circuit 81 [j / 2] outputs the analog signal input from the input terminal to the wiring 32 [j-1]. And. On the other hand, when the potential of the wiring 83 [j / 2] is low, the demultiplexer circuit 81 [j / 2] shall output the analog signal input from the input terminal to the wiring 32 [j]. ..
  • the high potential is indicated by “H” and the low potential is indicated by “L”. Further, for ease of explanation, the influences of various resistors such as wiring resistance, parasitic capacitance of transistors and wiring, and threshold voltage of transistors are not considered.
  • the potential of the wiring 83 [j / 2] is set to a high potential, and the potential of the wiring 82 [j / 2] is set to the potential corresponding to the data D [i, j-1].
  • the potential of the wiring 32 [j-1] becomes the potential corresponding to the data D [i, j-1].
  • the wiring 32 [j-1] and the node FD [i, j-1] are made conductive.
  • the potential of the node FD [j-1] becomes the potential corresponding to the data D [i, j-1], and the data D [i, j-1] is written in the pixel 34 [i, j-1]. ..
  • the potential of the wiring 83 [j / 2] is set to a low potential, and the potential of the wiring 82 [j / 2] is set to the potential corresponding to the data D [i, j].
  • the potential of the wiring 32 [j] becomes the potential corresponding to the data D [i, j].
  • the wiring 32 [j] and the node FD [i, j] are made conductive.
  • the potential of the node FD [j] becomes the potential corresponding to the data D [i, j]
  • the data D [i, j] is written in the pixel 34 [i, j].
  • the operation shown above is performed on, for example, all the pixels 34 of the display device 10. As a result, the image can be displayed on the display unit 33.
  • FIG. 6 is a diagram showing a configuration example of the display device 10.
  • the display device 10 having the configuration shown in FIG. 6 is different from the display device 10 having the configuration shown in FIG. 2 in that a plurality of display units 33 are provided on the layer 30, that is, the display units provided on the layer 30 are divided. different.
  • FIG. 6 shows a configuration example of the display device 10 when the layer 30 is provided with the display unit 33 having 3 rows and 3 columns.
  • the layer 30 may be provided with a display unit 33 having 2 rows and 2 columns, or may be provided with a display unit 33 having 4 rows and 4 columns or more. Further, the number of rows and the number of columns of the display unit 33 provided on the layer 30 may be different.
  • one image can be displayed by using all the display units 33.
  • the wiring 31, the wiring 32, the wiring 82, and the wiring 83 are omitted for the sake of clarity of the figure.
  • the display device 10 having the configuration shown in FIG. 6 has the wiring 31, the wiring, and the wiring. 32, wiring 82, and wiring 83 are provided.
  • the electrical connection relationship of the circuit 40 is omitted, it is actually electrically connected to the data driver circuit 22. In other figures, as in FIG. 6, some components and the like may be omitted.
  • the layer 20 may be provided with the same number of gate driver circuits 21 and data driver circuits 22 as, for example, the display unit 33.
  • the gate driver circuit 21 can be provided so that the gate driver circuit 21 overlaps with the display unit 33 provided with the pixel 34 for supplying the signal.
  • the data driver circuit 22 can be provided so that the data driver circuit 22 overlaps with the display unit 33 provided with the pixels 34 for supplying the image data.
  • the number of pixels 34 provided in one display unit 33 can be reduced. Since the plurality of gate driver circuits 21 provided can be operated in parallel and the plurality of data driver circuits 22 provided can be operated in parallel, for example, an image corresponding to an image of one frame can be operated. The time required to write the data to the pixel 34 can be shortened. Therefore, the length of one frame period can be shortened, and the operation of the display device 10 can be speeded up. Therefore, the number of pixels 34 included in the display device 10 can be increased, and the definition of the image displayed by the display device 10 can be improved.
  • the resolution of the image that can be displayed by the display device of one aspect of the present invention is higher than the resolution of the image that can be displayed by the display device having a configuration in which the gate driver circuit and the data driver circuit do not overlap with the display unit. Can be done. Further, since the clock frequency can be reduced, the power consumption of the display device 10 can be reduced.
  • the gate driver circuit and the data driver circuit are configured so as not to overlap the display unit, the gate driver circuit and the data driver circuit are provided, for example, on the outer peripheral portion of the display unit. In this case, it is difficult to provide more display units than 2 rows and 2 columns from the viewpoint of the installation location of the data driver circuit and the like.
  • the gate driver circuit and the data driver circuit can be provided in a layer different from the layer in which the display unit is provided so as to have an area overlapping the display unit. Therefore, as shown in FIG. 6, more display units than 2 rows and 2 columns can be provided. That is, the display device 10 can be provided with five or more gate driver circuits and five or more data driver circuits.
  • the display device 10 can be operated at a higher speed than the display device having a configuration in which the gate driver circuit and the data driver circuit do not overlap with the display unit, for example. Therefore, the pixel density of the display device 10 can be increased as compared with the display device having a configuration in which the gate driver circuit and the data driver circuit do not overlap with the display unit.
  • the pixel density of the display device 10 can be 1000 ppi or more, 2000 ppi or more, and 5000 ppi or more.
  • a high-definition image can be displayed on the display device 10. Therefore, a high-quality image with less graininess can be displayed on the display device 10, and an image with a high sense of presence can be displayed.
  • the display device 10 can be suitably used for devices in which the display surface and the user are close to each other, particularly portable electronic devices, wearable electronic devices (wearable devices), electronic book terminals, and the like. It can also be suitably used for VR equipment, AR equipment and the like. Further, it can be suitably used for a viewfinder such as an electronic viewfinder provided in a digital camera or the like which is an electronic device having an imaging device.
  • the resolution of the image that can be displayed by the display device 10 can be made higher than the resolution of the image that can be displayed by the display device having a configuration in which the gate driver circuit and the data driver circuit do not overlap with the display unit.
  • the display device 10 when the display device 10 is used as a viewfinder, the display device 10 can display an image having a resolution of 4K, 5K, or higher.
  • the pixel density of the display device 10 is increased, it is necessary to provide transistors and the like provided in the drive circuit of the data driver circuit 22 and the like in a high density integrated manner.
  • the area occupied by the data driver circuit 22 may be larger than the area of the display unit 33.
  • the data driver circuit 22 may protrude from the display unit 33.
  • the area of the area of the data driver circuit 22 that does not overlap with the display unit 33 may increase. Therefore, the picture frame may be large.
  • the demultiplexer circuit 81 in the display device 10 the number of elements such as transistors included in the data driver circuit 22 can be reduced as described above, so that the occupied area of the data driver circuit 22 can be reduced. Can be done. Therefore, even when the pixel density of the display device 10 is high, it is possible to prevent the data driver circuit 22 from protruding from the display unit 33. Alternatively, the area of the area of the data driver circuit 22 that does not overlap with the display unit 33 can be reduced. From the above, the display device 10 can be made narrower and smaller.
  • the circuit 40 provided on the display device 10 is provided as in the case shown in FIG.
  • the number can be one. Therefore, as shown in FIG. 6, the circuit 40 can be provided so as not to overlap any of the display units 33.
  • the circuit 40 may be provided so as to have a region overlapping with any display unit 33.
  • FIG. 6 shows a configuration example in which the same number of gate driver circuits 21 as the display units 33 are provided, but one aspect of the present invention is not limited to this.
  • FIG. 7 is a modified example of the configuration shown in FIG. 6, and shows a configuration example of the display device 10 when the number of gate driver circuits 21 is the same as the number of columns of the display unit 33.
  • the display device 10 having the configuration shown in FIG. 7 since the display units 33 in three rows are provided, three gate driver circuits 21 are provided. Further, a display unit 33 having three rows is provided, and the display unit 33 having three rows and one column shares one gate driver circuit 21.
  • FIG. 8 is a modified example of the configuration shown in FIG. 6, and shows a configuration example of the display device 10 when a plurality of display units 33 are provided and one gate driver circuit 21 is provided.
  • the display unit 33 having 3 rows and 3 columns shares one gate driver circuit 21.
  • the gate driver circuit 21 can be configured not to overlap with the display unit 33.
  • the number of data driver circuits 22 may not be the same as that of the display unit 33.
  • the number of data driver circuits 22 included in the display device 10 may be larger or smaller than the number of display units 33 provided in the display device 10.
  • FIG. 2 shows a configuration example in which the circuit 40 is provided on the layer 20, the circuit 40 may not be provided on the layer 20.
  • FIG. 9 is a modification of the configuration shown in FIG. 2, and shows a configuration example of the display device 10 when the circuit 40 is provided on the layer 30. Further, the circuit 40 may be provided on the layer 80. The elements constituting the circuit 40 may be dispersed in two or three layers of the layer 20, the layer 80, and the layer 30.
  • FIG. 2 shows a configuration example in which one display unit 33 and one data driver circuit are provided, more data driver circuits 22 may be provided than the display unit 33.
  • FIG. 10 is a modification of the configuration shown in FIG. 2, and is a configuration of the display device 10 when two data driver circuits (data driver circuit 22a and data driver circuit 22b) are provided for one display unit 33. An example is shown.
  • the input terminals of the odd-th demultiplexer circuit 81 (demultiplexer circuit 81 [1], demultiplexer circuit 81 [3], etc.) are electrically connected to the data driver circuit 22a.
  • the input terminals of the even-order demultiplexer circuit 81 (demultiplexer circuit 81 [2], demultiplexer circuit 81 [4], etc.) are electrically connected to the data driver circuit 22b.
  • n / 2 is an even number.
  • the data driver circuit 22a has a function of generating image data representing an image displayed by using the pixel 34 electrically connected to the output terminal of the odd-th demultiplexer circuit 81.
  • the data driver circuit 22b has a function of generating image data representing an image displayed by using pixels 34 that are electrically connected to the output terminals of the even-order demultiplexer circuit 81. It can be said that one image is represented by the image data generated by the data driver circuit 22a and the image data generated by the data driver circuit 22b.
  • the data driver circuit 22a and the data driver circuit 22b have an area that overlaps with the display unit 33.
  • the data driver circuit 22a and the data driver circuit 22b have an area overlapping the pixels 34, similarly to the data driver circuit 22.
  • the data driver circuit 22a has a region 23a which is not clearly separated from the gate driver circuit 21 and is an overlapping region.
  • the data driver circuit 22b has a region 23b that is not clearly separated from the gate driver circuit 21 and is an overlapping region.
  • the density of the transistors and the like constituting the data driver circuit can be reduced. This makes it possible to increase the degree of freedom in the layout of the display device 10.
  • the configuration of the data driver circuit 22a and the data driver circuit 22b can be the same as that of the data driver circuit 22 shown in FIG.
  • FIG. 2 shows a configuration example in which one display unit 33 and one gate driver circuit are provided, more gate driver circuits may be provided than the display unit 33.
  • FIG. 11 is a modification of the configuration shown in FIG. 2, and is a configuration example of the display device 10 when two gate driver circuits (gate driver circuit 21a and gate driver circuit 21b) are provided for one display unit 33. Is shown.
  • the pixels 34 in the odd-numbered rows are electrically connected to the gate driver circuit 21a via the wiring 31a, and the pixels 34 in the even-numbered rows are connected to the gate driver via the wiring 31b. It is electrically connected to the circuit 21b.
  • the wiring 31a and the wiring 31b have a function as a scanning line like the wiring 31.
  • the gate driver circuit 21a has a function of generating a signal for controlling the operation of the pixels 34 in the odd-numbered rows and supplying the signal to the pixels 34 via the wiring 31a.
  • the gate driver circuit 21b has a function of generating a signal for controlling the operation of the pixels 34 in the even-numbered rows and supplying the signal to the pixels 34 via the wiring 31b.
  • the gate driver circuit 21a and the gate driver circuit 21b have an area overlapping with the display unit 33, similarly to the gate driver circuit 21.
  • the gate driver circuit 21a and the gate driver circuit 21b have an area overlapping the pixels 34, similarly to the gate driver circuit 21.
  • the gate driver circuit 21a has a region 23c which is not clearly separated from the data driver circuit 22 and is an overlapping region.
  • the gate driver circuit 21b has a region 23d that is not clearly separated from the data driver circuit 22 and is an overlapping region.
  • the density of the transistors and the like constituting the gate driver circuit can be reduced. This makes it possible to increase the degree of freedom in the layout of the display device 10.
  • the gate driver circuit 21a is operated to write image data to all the pixels 34 in the odd-numbered rows, and then the gate driver circuit 21b is operated to operate all the even-numbered rows.
  • Image data can be written to the pixel 34 of. That is, the display device 10 having the configuration shown in FIG. 11 can be operated by the interlace method. By operating by the interlace method, the operation of the display device 10 can be speeded up and the frame frequency can be increased. Further, the number of pixels 34 in which image data is written in one frame period can be halved when the display device 10 is operated by the progressive method. Therefore, when the display device 10 is operated by the interlaced method, the clock frequency can be made smaller than that when the display device 10 is operated by the progressive method, so that the power consumption of the display device 10 can be reduced.
  • FIG. 2 shows a configuration in which only one end of the wiring 32 is connected to the output terminal of the demultiplexer circuit 81
  • a plurality of locations of the wiring 32 may be connected to the output terminal of the demultiplexer circuit 81.
  • the wiring distance from the output terminal of the demultiplexer circuit to the pixel 34 can be shortened.
  • signal delays and the like caused by wiring resistance, parasitic capacitance, and the like can be suppressed, so that the operation of the display device 10 can be speeded up.
  • FIG. 12 shows a configuration example of the display device 10 when both ends of the wiring 32 are connected to the output terminals of the demultiplexer circuit.
  • the demultiplexer circuit connected to one end of the wiring 32 is referred to as the demultiplexer circuit 81a
  • the demultiplexer circuit connected to the other end of the wiring 32 is referred to as the demultiplexer circuit 81b.
  • the input terminal of the demultiplexer circuit 81a is electrically connected to the wiring 82a
  • the input terminal of the demultiplexer circuit 81b is electrically connected to the wiring 82b.
  • the selection control signal input terminal of the demultiplexer circuit 81a is electrically connected to the wiring 83a
  • the selection control signal input terminal of the demultiplexer circuit 81b is electrically connected to the wiring 83b.
  • other parts of the wiring 32 may be connected to the output terminal of the demultiplexer circuit.
  • the central portion of the wiring 32 may be connected to the output terminal of the demultiplexer circuit.
  • signal delay and the like can be further suppressed, and the operation of the display device 10 can be further speeded up.
  • one end of the wiring 32 and the central portion of the wiring 32 may be connected to the output terminal of the demultiplexer circuit, and the other end of the wiring 32 may not be connected to the output terminal of the demultiplexer circuit.
  • a plurality of locations of the wiring 31 may be connected to one gate driver circuit 21. This also makes it possible to suppress signal delay and the like and speed up the operation of the display device 10.
  • FIG. 13 is a circuit diagram showing a configuration example of the potential generation circuit 46a and the pass transistor logic circuit 46b constituting the D / A conversion circuit 46.
  • the D / A conversion circuit 46 having the configuration shown in FIG. 13 can convert 8-bit digital data DD into analog image data IS.
  • the data driver circuit 22 may have a plurality of pass transistor logic circuits 46b, but FIG. 13 shows one pass transistor logic circuit 46b for convenience of explanation.
  • the digital data DD is 8-bit digital data
  • the digital data DD is composed of an 8-digit digital value DV.
  • 8-digit digital value DV is described as digital value DV ⁇ 1> to digital value DV ⁇ 8> in ascending order from the smallest digit. That is, for example, the digital value DV ⁇ 1> to the digital value DV ⁇ 8> each indicate a 1-bit value (for example, 0 or 1).
  • the potential generation circuit 46a having the configuration shown in FIG. 13 has resistance elements 48 [1] to resistance elements 48 [256], which are connected in series. That is, the D / A conversion circuit 46 can be a resistance string type D / A conversion circuit.
  • the potential VDD can be supplied to one terminal of the resistance element 48 [1].
  • a potential VSS can be supplied to one terminal of the resistance element 48 [256].
  • potentials V 1 to V 256 having different sizes can be output from the terminals of the resistance element 48 [1] to the resistance element 48 [256].
  • FIG. 13 there is shown an exemplary configuration of a voltage generation circuit 46a at which a potential VDD potential V 1, may be a potential V 256 a configuration in which the potential VSS.
  • the potential of the potential V 1 VDD the potential V 256 may be potential VSS.
  • the potential VDD can be set to, for example, a high potential
  • the potential VSS can be set to, for example, a low potential
  • the pass transistor logic circuit 46b having the configuration shown in FIG. 13 is composed of eight-stage pass transistors 49.
  • the path transistor logic circuit 46b has a configuration in which each stage is electrically branched into two paths, and has a total of 256 paths. That is, it can be said that the pass transistor 49 is electrically connected by a tournament method.
  • Analog image data IS can be output from either the source or drain of the eighth-stage pass transistor 49, which is the final stage.
  • the digital value DV ⁇ 1> can be supplied to the first-stage pass transistor 49
  • the digital value DV ⁇ 2> can be supplied to the second-stage pass transistor 49
  • the digital value DV ⁇ 8> Can be supplied to the eighth-stage pass transistor 49.
  • the potential of the image data IS according to the digital data DD, it may be any of the potential V 1 to the potential V 256. Therefore, the digital image data can be converted into the analog image data IS.
  • the path transistor logic circuit 46b shown in FIG. 13 is provided with both an n-channel type pass transistor 49 and a p-channel type pass transistor 49, but is provided with only the n-channel type pass transistor 49. It can also be.
  • all the pass transistors 49 provided in the pass transistor logic circuit 46b are all n channels. It can be a type transistor.
  • the configuration shown in FIG. 13 can also be applied to a D / A conversion circuit 46 having a function of D / A conversion of digital data DD having a number of bits other than 8 bits.
  • a D / A conversion circuit 46 having a function of D / A conversion of digital data DD having a number of bits other than 8 bits.
  • the D / A conversion circuit 46 can generate 10-bit digital data DD. It can have a function of D / A conversion.
  • FIG. 14 is a block diagram showing a configuration example of the gate driver circuit 21.
  • the gate driver circuit 21a and the gate driver circuit 21b shown in FIG. 11 can have the same configuration.
  • the gate driver circuit 21 has a register circuit R composed of a plurality of set reset flip-flops.
  • the register circuit R is electrically connected to a wiring 31 having a function as a scanning line, and has a function of outputting a signal to the wiring 31.
  • the signal RES is a reset signal, and by setting the signal RES to, for example, a high potential, all the outputs of the register circuit R can be set to a low potential.
  • the signal SP is a start pulse signal, and by inputting the signal to the gate driver circuit 21, the shift operation by the register circuit R can be started.
  • the signal PWC is a pulse width control signal, and has a function of controlling the pulse width of the signal output to the wiring 31 by the register circuit R.
  • the signal CLK [1], the signal CLK [2], the signal CLK [3], and the signal CLK [4] are clock signals, and one register circuit R has the signal CLK [1] to the signal CLK [4]. Of these, for example, two signals can be input.
  • the configuration shown in FIG. 14 can also be applied to the shift register circuit 44 and the like of the data driver circuit 22 by using the wiring 31 electrically connected to the register circuit R as another wiring.
  • FIG. 15A is a diagram showing a signal input to the register circuit R and a signal output from the register circuit R.
  • FIG. 15A shows a case where the signal CLK [1] and the signal CLK [3] are input as clock signals.
  • the signal FO is an output signal, for example, a signal output to the wiring 31.
  • the signal SROUT is a shift signal, and can be a signal LIN input to the register circuit R of the next stage.
  • the signal RES, the signal PWC, the signal CLK [1], the signal CLK [3], and the signal LIN are signals input to the register circuit R, and the signal FO and the signal SROUT are This is a signal output from the register circuit R.
  • FIG. 15B is a circuit diagram showing a configuration example of a register circuit R in which the input / output signal is the signal shown in FIG. 15A.
  • the register circuit R includes transistors 51 to 63, and a capacitance element 64 to a capacitance element 66.
  • One of the source or drain of the transistor 51 is electrically connected to one of the source or drain of the transistor 52, one of the source or drain of the transistor 56, and one of the source or drain of the transistor 59.
  • the gate of the transistor 52 is one of the source or drain of the transistor 53, one of the source or drain of the transistor 54, one of the source or drain of the transistor 55, the gate of the transistor 58, the gate of the transistor 61, and one of the capacitive elements 64. It is electrically connected to the electrode.
  • the other of the source or drain of the transistor 56 is electrically connected to the gate of the transistor 57 and one electrode of the capacitive element 65.
  • the other of the source or drain of the transistor 59 is electrically connected to the gate of the transistor 60 and one electrode of the capacitive element 66.
  • One of the source or drain of the transistor 60 is electrically connected to one of the source or drain of the transistor 61, the gate of the transistor 62, and the other electrode of the capacitive element 66.
  • a signal LIN is input to the gate of the transistor 51 and the gate of the transistor 55.
  • the signal CLK [3] is input to the gate of the transistor 53.
  • the signal RES is input to the gate of the transistor 54.
  • the signal CLK [1] is input to either the source or the drain of the transistor 57.
  • a signal PWC is input to the other of the source and drain of the transistor 60.
  • One of the source or drain of the transistor 62 and one of the source or drain of the transistor 63 are electrically connected to the wiring 31, and the signal FO is output from the wiring 31 as described above.
  • the signal SROUT is output from the other electrode of the source or drain of the transistor 57, one of the source or drain of the transistor 58, and the other electrode of the capacitive element 65.
  • the other of the source or drain of the transistor 51, the other of the source or drain of the transistor 53, the other of the source or drain of the transistor 54, the gate of the transistor 56, the gate of the transistor 59, and the other of the source or drain of the transistor 62 have potentials.
  • VDD is supplied.
  • the potential VSS is supplied to the other electrode.
  • the transistor 63 is a bias transistor and has a function as a constant current source.
  • the potential Vbias which is a bias potential, can be supplied to the gate of the transistor 63.
  • the source follower circuit 67 is configured by the transistor 62 and the transistor 63.
  • the source follower circuit can have a function as a buffer circuit. Therefore, by providing the source follower circuit 67 in the register circuit R, even if signal attenuation due to wiring resistance, parasitic capacitance, etc. occurs inside the register circuit R, the potential of the signal FO decreases due to this. Can be suppressed. As a result, the operation of the display device 10 can be speeded up.
  • the source follower circuit 67 may be a circuit other than the source follower circuit as long as it has a function as a buffer. For example, it may be a source grounded circuit.
  • FIG. 16 is a diagram showing a configuration example of a region 23 which is a region where the gate driver circuit 21 and the data driver circuit 22 overlap.
  • the regions 23a and 23b shown in FIG. 10 and the regions 23c and 23d shown in FIG. 11 can have the same configuration.
  • a region having elements constituting the gate driver circuit 21 and a region having elements constituting the data driver circuit 22 are provided with a certain regularity.
  • a transistor 71 is shown as an element constituting the gate driver circuit 21
  • a transistor 72 is shown as an element constituting the data driver circuit 22.
  • FIG. 16 when the regions having the elements constituting the gate driver circuit 21 are provided in the first and third rows, and the regions having the elements constituting the data driver circuit 22 are provided in the second and fourth rows. Is shown.
  • a dummy element is provided between each region having an element constituting the gate driver circuit 21. Further, a dummy element is provided between each region having an element constituting the data driver circuit 22.
  • FIG. 16 shows a configuration example of the region 23 when the dummy transistor 73 is provided as a dummy element on the four sides of the transistor 71 and the four sides of the transistor 72.
  • the transistor 71, the transistor 72, and the dummy transistor 73 are arranged in a matrix, but they may not be arranged in a matrix.
  • FIG. 17 is a top view showing a configuration example of the region 70, which is a part of the region 23.
  • the region 70 is provided with one transistor 71, one transistor 72, and two dummy transistors 73.
  • the transistor 71 has a channel forming region 110, a source region 111, and a drain region 112. Further, the gate electrode 113 is provided so as to have a region overlapping the channel forming region 110.
  • FIG. 17 components such as a gate insulator are omitted. Further, in FIG. 17, the channel formation region, the source region, and the drain region are shown without being clearly separated.
  • the source region 111 is provided with an opening 114, and the source region 111 is electrically connected to the wiring 115 via the opening 114.
  • the drain region 112 is provided with an opening 116, and the drain region 112 is electrically connected to the wiring 117 via the opening 116.
  • the gate electrode 113 is provided with an opening 118, and the gate electrode 113 is electrically connected to the wiring 121 via the opening 118.
  • the wiring 115 is provided with an opening 119, and the wiring 115 is electrically connected to the wiring 122 through the opening 119.
  • the wiring 117 is provided with an opening 120, and the wiring 117 is electrically connected to the wiring 123 via the opening 120. That is, the source region 111 is electrically connected to the wiring 122 via the wiring 115, and the drain region 112 is electrically connected to the wiring 123 via the wiring 117.
  • the transistor 72 has a channel forming region 130, a source region 131, and a drain region 132. Further, the gate electrode 133 is provided so as to have a region overlapping the channel forming region 130.
  • the source region 131 is provided with an opening 134, and the source region 131 is electrically connected to the wiring 135 via the opening 134.
  • the drain region 132 is provided with an opening 136, and the drain region 132 is electrically connected to the wiring 137 via the opening 136.
  • the gate electrode 133 is provided with an opening 138, and the gate electrode 133 is electrically connected to the wiring 141 via the opening 138.
  • the wiring 135 is provided with an opening 139, and the wiring 135 is electrically connected to the wiring 142 through the opening 139.
  • the wiring 137 is provided with an opening 140, and the wiring 137 is electrically connected to the wiring 143 via the opening 140. That is, the source region 131 is electrically connected to the wiring 142 via the wiring 135, and the drain region 132 is electrically connected to the wiring 143 via the wiring 137.
  • the channel forming region 110 and the channel forming region 130 can be provided in the same layer. Further, the source region 111 and the drain region 112 and the source region 131 and the drain region 132 can be provided in the same layer. Further, the gate electrode 113 and the gate electrode 133 can be provided in the same layer as each other. Further, the wiring 115 and the wiring 117 and the wiring 135 and the wiring 137 can be provided on the same layer. That is, the transistor 71 and the transistor 72 can be provided in the same layer as each other. As a result, the manufacturing process of the display device 10 can be simplified and the display device 10 can be made inexpensive as compared with the case where the transistor 71 and the transistor 72 are provided in different layers.
  • the wiring 121 to 123 electrically connected to the transistor 71 constituting the gate driver circuit 21 are provided on the same layer as each other. Further, the wirings 141 to 143 electrically connected to the transistors 72 constituting the data driver circuit 22 are provided on the same layer as each other. Further, the wiring 121 to 123 are provided in a layer different from the wiring 141 to 143. As described above, it is possible to prevent the transistor 71, which is an element constituting the gate driver circuit 21, and the transistor 72, which is an element constituting the data driver circuit 22, from being electrically short-circuited. Therefore, even if the gate driver circuit 21 and the data driver circuit 22 are not clearly separated and have overlapping regions, malfunctions of the gate driver circuit 21 and the data driver circuit 22 can be suppressed. As a result, the reliability of the display device 10 can be improved.
  • the same layer as A means, for example, a layer having the same material formed in the same step as A.
  • FIG. 17 shows a configuration in which the wirings 141 to 143 are provided above the wirings 121 to 123, the wirings 141 to 143 may be provided below the wirings 121 to 123.
  • FIG. 17 shows a configuration in which the wiring 121 to 123 extend in the horizontal direction and the wiring 141 to 143 extend in the vertical direction, but one aspect of the present invention is not limited to this.
  • the wiring 121 to 123 may be extended in the vertical direction
  • the wiring 141 to 143 may be extended in the horizontal direction.
  • both the wiring 121 to the wiring 123 and the wiring 141 to 143 may be extended in the horizontal direction or in the vertical direction.
  • the dummy transistor 73 includes a semiconductor 151 and a conductor 152.
  • the conductor 152 has a region that overlaps with the semiconductor 151.
  • the semiconductor 151 can be formed in the same layer as the channel formation region of the transistor 71 and the transistor 72. Further, the conductor 152 can be formed in the same layer as the transistor 71 and the gate electrode of the transistor 72.
  • the dummy transistor 73 may be configured not to have either the semiconductor 151 or the conductor 152.
  • the semiconductor 151 and the conductor 152 can be configured so as not to be electrically connected to other wiring or the like.
  • a constant potential may be supplied to the semiconductor 151 and / or the conductor 152.
  • a ground potential may be supplied.
  • FIG. 18 is a cross-sectional view showing a configuration example of the display device 10.
  • the display device 10 has a substrate 701 and a substrate 705, and the substrate 701 and the substrate 705 are bonded to each other by a sealing material 712.
  • a single crystal semiconductor substrate such as a single crystal silicon substrate can be used.
  • a semiconductor substrate other than the single crystal semiconductor substrate may be used as the substrate 701.
  • a transistor 441 and a transistor 601 are provided on the substrate 701.
  • the transistor 441 can be a transistor provided in the circuit 40.
  • the transistor 601 can be a transistor provided in the gate driver circuit 21 or a transistor provided in the data driver circuit 22. That is, the transistor 441 and the transistor 601 can be provided on the layer 20 shown in FIG. 1B and the like.
  • the transistor 441 is composed of a conductor 443 having a function as a gate electrode, an insulator 445 having a function as a gate insulator, and a part of a substrate 701, and is a semiconductor region 447 including a channel forming region and a source region. Alternatively, it has a low resistance region 449a that functions as one of the drain regions and a low resistance region 449b that functions as the other of the source region or the drain region.
  • the transistor 441 may be either a p-channel type or an n-channel type.
  • the transistor 441 is electrically separated from other transistors by the element separation layer 403.
  • FIG. 18 shows a case where the transistor 441 and the transistor 601 are electrically separated by the element separation layer 403.
  • the element separation layer 403 can be formed by using a LOCOS (LOCOxidation of Silicon) method, an STI (Shallow Trench Isolation) method, or the like.
  • the semiconductor region 447 has a convex shape. Further, the side surface and the upper surface of the semiconductor region 447 are provided so as to be covered with the conductor 443 via the insulator 445. Note that FIG. 18 does not show how the conductor 443 covers the side surface of the semiconductor region 447. Further, a material for adjusting the work function can be used for the conductor 443.
  • a transistor having a convex shape in the semiconductor region can be called a fin-type transistor because it utilizes the convex portion of the semiconductor substrate.
  • it may have an insulator which is in contact with the upper part of the convex portion and has a function as a mask for forming the convex portion.
  • FIG. 18 shows a configuration in which a part of the substrate 701 is processed to form a convex portion, the SOI substrate may be processed to form a semiconductor having a convex shape.
  • the configuration of the transistor 441 shown in FIG. 18 is an example, and is not limited to the configuration, and may be an appropriate configuration according to the circuit configuration, the operation method of the circuit, or the like.
  • the transistor 441 may be a planar transistor.
  • the transistor 601 can have the same configuration as the transistor 441.
  • an insulator 405, an insulator 407, an insulator 409, and an insulator 411 are provided.
  • the conductor 451 is embedded in the insulator 405, the insulator 407, the insulator 409, and the insulator 411.
  • the height of the upper surface of the conductor 451 and the height of the upper surface of the insulator 411 can be made about the same.
  • the insulator 413 and the insulator 415 are provided on the conductor 451 and the insulator 411. Further, the conductor 457 is embedded in the insulator 413 and the insulator 415.
  • the conductor 457 can be provided in the same layer as the wiring 121 to 123 shown in FIG.
  • the height of the upper surface of the conductor 457 and the height of the upper surface of the insulator 415 can be made about the same.
  • Insulator 417 and insulator 419 are provided on the conductor 457 and on the insulator 415. Further, the conductor 459 is embedded in the insulator 417 and the insulator 419. The conductor 459 can be provided in the same layer as the wirings 141 to 143 shown in FIG. Here, the height of the upper surface of the conductor 459 and the height of the upper surface of the insulator 419 can be made about the same.
  • the insulator 821 and the insulator 814 are provided on the conductor 459 and the insulator 419.
  • the conductor 853 is embedded in the insulator 821 and in the insulator 814.
  • the height of the upper surface of the conductor 853 and the height of the upper surface of the insulator 814 can be made about the same.
  • Insulator 816 is provided on the conductor 853 and on the insulator 814.
  • a conductor 855 is embedded in the insulator 816.
  • the height of the upper surface of the conductor 855 and the height of the upper surface of the insulator 816 can be made about the same.
  • Insulator 822, insulator 824, insulator 854, insulator 844, insulator 880, insulator 874, and insulator 881 are provided on the conductor 855 and the insulator 816.
  • the conductor 805 is embedded in the insulator 822, the insulator 824, the insulator 854, the insulator 844, the insulator 880, the insulator 874, and the insulator 881.
  • the height of the upper surface of the conductor 805 and the height of the upper surface of the insulator 881 can be made about the same.
  • the insulator 421 and the insulator 214 are provided on the conductor 817 and the insulator 881.
  • the conductor 453 is embedded in the insulator 421 and in the insulator 214.
  • the height of the upper surface of the conductor 453 and the height of the upper surface of the insulator 214 can be made about the same.
  • Insulator 216 is provided on the conductor 453 and on the insulator 214.
  • a conductor 455 is embedded in the insulator 216.
  • the height of the upper surface of the conductor 455 and the height of the upper surface of the insulator 216 can be made about the same.
  • Insulator 222, insulator 224, insulator 254, insulator 244, insulator 280, insulator 274, and insulator 281 are provided on the conductor 455 and the insulator 216.
  • the conductor 305 is embedded in the insulator 222, the insulator 224, the insulator 254, the insulator 244, the insulator 280, the insulator 274, and the insulator 281.
  • the height of the upper surface of the conductor 305 and the height of the upper surface of the insulator 281 can be made about the same.
  • An insulator 361 is provided on the conductor 305 and on the insulator 281.
  • a conductor 317 and a conductor 337 are embedded in the insulator 361.
  • the height of the upper surface of the conductor 337 and the height of the upper surface of the insulator 361 can be made about the same.
  • Insulator 363 is provided on the conductor 337 and on the insulator 361.
  • a conductor 347, a conductor 353, a conductor 355, and a conductor 357 are embedded in the insulator 363.
  • the height of the upper surface of the conductor 353, the conductor 355, and the conductor 357 can be made the same as the height of the upper surface of the insulator 363.
  • Connection electrodes 760 are provided on the conductor 353, on the conductor 355, on the conductor 357, and on the insulator 363. Further, an anisotropic conductor 780 is provided so as to be electrically connected to the connection electrode 760, and an FPC (Flexible Printed Circuit) 716 is provided so as to be electrically connected to the anisotropic conductor 780. Various signals and the like are supplied to the display device 10 from the outside of the display device 10 by the FPC 716.
  • FPC Flexible Printed Circuit
  • the low resistance region 449b having a function as the other of the source region and the drain region of the transistor 441 includes a conductor 451 and a conductor 457, a conductor 459, a conductor 853, a conductor 855, and a conductor. 805, conductor 817, conductor 453, conductor 455, conductor 305, conductor 317, conductor 337, conductor 347, conductor 353, conductor 355, conductor 357, connection electrode 760, and anisotropic It is electrically connected to the FPC 716 via a conductor 780.
  • connection electrode 760 and the conductor 347 shows three conductors having a function of electrically connecting the connection electrode 760 and the conductor 347, that is, the conductor 353, the conductor 355, and the conductor 357, which is one of the present inventions.
  • the aspect is not limited to this.
  • the number of conductors having a function of electrically connecting the connection electrode 760 and the conductor 347 may be one, two, or four or more.
  • the contact resistance can be reduced by providing a plurality of conductors having a function of electrically connecting the connection electrode 760 and the conductor 347.
  • a transistor 800 is provided on the insulator 814.
  • the transistor 800 can be a transistor provided in the demultiplexer circuit 81. That is, the transistor 800 can be a transistor provided on the layer 80 shown in FIG. 1B.
  • the transistor 800 can be an OS transistor.
  • the conductor 801a and the conductor 801b are embedded in the insulator 854, the insulator 844, the insulator 880, the insulator 874, and the insulator 881.
  • the conductor 801a is electrically connected to one of the source or drain of the transistor 800
  • the conductor 801b is electrically connected to the other of the source or drain of the transistor 800.
  • the height of the upper surface of the conductor 801a and the conductor 801b and the height of the upper surface of the insulator 881 can be made about the same.
  • a transistor 550 is provided on the insulator 214.
  • the transistor 550 can be a transistor provided in the pixel 34. That is, the transistor 550 can be provided on the layer 30 shown in FIG. 1B or the like.
  • the transistor 550 can be an OS transistor.
  • the OS transistor is characterized by an extremely low off current. Therefore, since the holding time of the image data can be lengthened, the frequency of the refresh operation can be reduced. Therefore, the power consumption of the display device 10 can be reduced.
  • the conductor 301a and the conductor 301b are embedded in the insulator 254, the insulator 244, the insulator 280, the insulator 274, and the insulator 281.
  • the conductor 301a is electrically connected to one of the source or drain of the transistor 550
  • the conductor 301b is electrically connected to the other of the source or drain of the transistor 550.
  • the height of the upper surfaces of the conductors 301a and 301b and the height of the upper surfaces of the insulator 281 can be made about the same.
  • An OS transistor or the like may be provided between the layer on which the transistor 441 and the transistor 601 are provided and the layer on which the transistor 800 and the like are provided. Further, an OS transistor or the like may be provided between the layer on which the transistor 800 or the like is provided and the layer on which the transistor 550 or the like is provided. Further, an OS transistor or the like may be provided above the layer on which the transistor 550 or the like is provided.
  • a conductor 311 and a conductor 313, a conductor 331, a capacitance element 560, a conductor 333, and a conductor 335 are embedded in the insulator 361.
  • the conductor 311 and the conductor 313 are electrically connected to the transistor 550 and have a function as wiring.
  • the conductor 333 and the conductor 335 are electrically connected to the capacitive element 560.
  • the height of the upper surface of the conductor 331, the conductor 333, and the conductor 335 can be made the same as the height of the upper surface of the insulator 361.
  • a conductor 341, a conductor 343, and a conductor 351 are embedded in the insulator 363.
  • the height of the upper surface of the conductor 351 and the height of the upper surface of the insulator 363 can be made about the same.
  • Insulator 405, Insulator 407, Insulator 409, Insulator 411, Insulator 413, Insulator 415, Insulator 417, Insulator 419, Insulator 821, Insulator 814, Insulator 880, Insulator 874, Insulator 881, the insulator 421, the insulator 214, the insulator 280, the insulator 274, the insulator 281 and the insulator 361, and the insulator 363 have a function as an interlayer film and cover the uneven shape below each of them. It may have a function as a flattening film.
  • the upper surface of the insulator 363 may be flattened by a flattening treatment using a chemical mechanical polishing (CMP) method or the like in order to improve the flatness.
  • CMP chemical mechanical polishing
  • the capacitive element 560 has a lower electrode 321 and an upper electrode 325. Further, an insulator 323 is provided between the lower electrode 321 and the upper electrode 325. That is, the capacitive element 560 has a laminated structure in which an insulator 323 that functions as a dielectric is sandwiched between a pair of electrodes.
  • FIG. 18 shows an example in which the capacitance element 560 is provided on the insulator 281, the capacitance element 560 may be provided on an insulator different from the insulator 281.
  • FIG. 18 shows an example in which the conductor 801a, the conductor 801b, and the conductor 805 are formed in the same layer. Further, an example is shown in which the conductor 811, the conductor 813, and the conductor 817 are formed in the same layer. Further, an example is shown in which the conductor 301a, the conductor 301b, and the conductor 305 are formed in the same layer. Further, an example is shown in which the conductor 311 and the conductor 313, the conductor 317, and the lower electrode 321 are formed in the same layer. Further, an example is shown in which the conductor 331, the conductor 333, the conductor 335, and the conductor 337 are formed in the same layer.
  • the conductor 341, the conductor 343, and the conductor 347 are formed in the same layer. Further, an example is shown in which the conductor 351 and the conductor 353, the conductor 355, and the conductor 357 are formed in the same layer.
  • the display device 10 shown in FIG. 18 has a liquid crystal element 570.
  • the liquid crystal element 570 has a conductor 772, a conductor 774, and a liquid crystal layer 776 between them.
  • the conductor 774 is provided on the substrate 705 side and has a function as a common electrode.
  • the conductor 772 is electrically connected to the other of the source or drain of the transistor 550 via the conductor 351 and the conductor 341, the conductor 331, the conductor 313, and the conductor 301b.
  • the conductor 772 is formed on the insulator 363 and has a function as a pixel electrode.
  • a material that is transparent to visible light or a material that is reflective can be used.
  • the translucent material for example, an oxide material containing indium, zinc, tin, etc. may be used.
  • the reflective material for example, a material containing aluminum, silver, or the like may be used.
  • the display device 10 When a reflective material is used for the conductor 772, the display device 10 becomes a reflective liquid crystal display device. On the other hand, if a translucent material is used for the conductor 772 and a translucent material is also used for the substrate 701 or the like, the display device 10 becomes a transmissive liquid crystal display device. When the display device 10 is a reflective liquid crystal display device, a polarizing plate is provided on the viewing side. On the other hand, when the display device 10 is a transmissive liquid crystal display device, a pair of polarizing plates are provided so as to sandwich the liquid crystal element.
  • an alignment film in contact with the liquid crystal layer 776 may be provided.
  • an optical member optical substrate
  • a polarizing member such as a polarizing member, a retardation member, and an antireflection member
  • a light source such as a backlight and a side light
  • a structure 778 is provided between the insulator 363 and the conductor 774.
  • the structure 778 is a columnar spacer and has a function of controlling the distance (cell gap) between the substrate 701 and the substrate 705.
  • a spherical spacer may be used as the structure 778.
  • a light-shielding layer 738, a colored layer 736, and an insulator 734 in contact with these are provided on the substrate 705 side.
  • the light-shielding layer 738 has a function of blocking light emitted from an adjacent region.
  • the light-shielding layer 738 has a function of blocking external light from reaching the transistor 550 or the like.
  • the colored layer 736 is provided so as to have a region overlapping with the liquid crystal element 570.
  • the liquid crystal layer 776 includes a thermotropic liquid crystal, a low molecular weight liquid crystal, a polymer liquid crystal, a polymer dispersed liquid crystal (PDLC: Polymer Dispersed Liquid Crystal), a polymer network type liquid crystal (PNLC: Polymer Network Liquid Crystal), and a strong dielectric liquid crystal. , Anti-strong dielectric liquid crystal and the like can be used. Further, when the transverse electric field method is adopted, a liquid crystal showing a blue phase without using an alignment film may be used.
  • TN Transmission Nematic
  • VA Very Birefringence
  • IPS In-Plane-Switching
  • FFS Frringe Field Switching
  • ASM Axial symmetry
  • OCB Optically Compensated Birefringence
  • ECB Electroally Controlled Birefringence
  • a scattering type liquid crystal using a polymer dispersion type liquid crystal, a polymer network type liquid crystal, or the like for the liquid crystal layer 776 can also be used.
  • a black-and-white display may be performed without providing the colored layer 736, or a color display may be performed using the colored layer 736.
  • a time division display method (also referred to as a field sequential driving method) in which color display is performed based on a time-addition color mixing method may be applied.
  • the structure may be such that the colored layer 736 is not provided.
  • the time division display method it is not necessary to provide pixels exhibiting the respective colors of R (red), G (green), and B (blue), so that the aperture ratio of the pixels can be improved and the definition can be improved. There are advantages such as being able to increase.
  • the display device 10 having the configuration shown in FIG. 18 uses a liquid crystal element as the display element, but one aspect of the present invention is not limited to this.
  • FIG. 19 is a modification of the display device 10 shown in FIG. 18, which is different from the display device 10 shown in FIG. 18 in that a light emitting element is used as the display element.
  • the display device 10 shown in FIG. 19 has a light emitting element 572.
  • the light emitting element 572 has a conductor 772, an EL layer 786, and a conductor 788.
  • the EL layer 786 can have an organic compound as a light emitting material. Alternatively, it can have an inorganic compound such as a quantum dot.
  • the transistor 554 is shown instead of the transistor 550, and the capacitive element 562 is shown instead of the capacitive element 560. As shown in FIG. 19, the transistor 554 can have the same configuration as the transistor 550, and the capacitive element 562 can have the same configuration as the capacitive element 560.
  • Examples of the material that can be used for the organic compound include a fluorescent material and a phosphorescent material.
  • Examples of materials that can be used for quantum dots include colloidal quantum dot materials, alloy-type quantum dot materials, core-shell type quantum dot materials, and core-type quantum dot materials.
  • an insulator 730 is provided on the insulator 363.
  • the insulator 730 can be configured to cover a part of the conductor 772.
  • the light emitting element 572 has a translucent conductor 788 and is a top emission type light emitting element.
  • the light emitting element 572 may have a bottom emission structure that emits light to the conductor 772 side, or a dual emission structure that emits light to both the conductor 772 and the conductor 788.
  • the light emitting element 572 can have a microcavity structure, which will be described in detail later.
  • a predetermined color for example, RGB
  • the display device 10 can perform color display.
  • the display device 10 can display a high-brightness image, and the power consumption of the display device 10 can be reduced.
  • the EL layer 786 is formed in an island shape for each pixel or in a striped shape for each pixel row, that is, when the EL layer 786 is formed by painting separately, it is possible to configure the structure without providing the colored layer.
  • the light-shielding layer 738 is provided so as to have a region overlapping with the insulator 730. Further, the light shielding layer 738 is covered with an insulator 734. Further, the space between the light emitting element 572 and the insulator 734 is filled with a sealing layer 732.
  • the structure 778 is provided between the insulator 730 and the EL layer 786. Further, the structure 778 is provided between the insulator 730 and the insulator 734.
  • FIG. 20 is a modification of the display device 10 shown in FIG. 19, and is different from the display device 10 shown in FIG. 19 in that a colored layer 736 is provided.
  • the colored layer 736 By providing the colored layer 736, the color purity of the light extracted from the light emitting element 572 can be increased. As a result, a high-quality image can be displayed on the display device 10. Further, for example, since all the light emitting elements 572 of the display device 10 can be light emitting elements that emit white light, it is not necessary to separately paint the EL layer 786, and the pixel density of the display device 10 can be increased. Can be done.
  • FIGS. 18 to 20 show a configuration in which the transistor 441 and the transistor 601 are provided so that a channel forming region is formed inside the substrate 701, and the OS transistor is provided by laminating the transistor 441 and the transistor 601.
  • FIG. 21 is a modification of FIG. 18,
  • FIG. 22 is a modification of FIG. 19,
  • FIG. 23 is a modification of FIG. 20, which is laminated on transistor 602 and transistor 603, which are OS transistors, instead of transistors 441 and 601.
  • the display device 10 having the configuration shown in FIGS. 18 to 20 is different from the display device 10 in that the transistor 800 and the transistor 550 or the transistor 554 are provided. That is, the display device 10 having the configuration shown in FIGS. 21 to 23 is provided with three layers of OS transistors stacked.
  • An insulator 613 and an insulator 614 are provided on the substrate 701, and a transistor 602 and a transistor 603 are provided on the insulator 614.
  • a transistor or the like may be provided between the substrate 701 and the insulator 613.
  • a transistor having the same configuration as the transistor 441 and the transistor 601 shown in FIGS. 18 to 20 may be provided between the substrate 701 and the insulator 613.
  • an OS transistor or the like may be provided between the layer on which the transistor 602 and the transistor 603 and the like are provided and the layer on which the transistor 800 and the like are provided.
  • an OS transistor or the like may be provided between the layer on which the transistor 800 or the like is provided and the layer on which the transistor 550 or the transistor 554 or the like is provided. Further, an OS transistor or the like may be provided in a layer above the layer in which the transistor 550 or the transistor 554 or the like is provided.
  • the transistor 602 can be a transistor provided in the circuit 40.
  • the transistor 603 can be a transistor provided in the gate driver circuit 21 or a transistor provided in the data driver circuit 22. That is, the transistor 602 and the transistor 603 can be provided on the layer 20 shown in FIG. 1B and the like.
  • the transistor 602 and the transistor 603 can be a transistor having the same configuration as the transistor 550 or the like.
  • the transistor 602 and the transistor 603 may be an OS transistor having a configuration different from that of the transistor 550 and the transistor 554.
  • an insulator 616, an insulator 622, an insulator 624, an insulator 654, an insulator 644, an insulator 680, an insulator 674, and an insulator 681 are provided on the insulator 614. ..
  • the conductor 461 is embedded in the insulator 654, the insulator 644, the insulator 680, the insulator 674, and the insulator 681.
  • the height of the upper surface of the conductor 461 and the height of the upper surface of the insulator 681 can be made about the same.
  • the insulator 501 is provided on the conductor 461 and the insulator 681.
  • a conductor 463 is embedded in the insulator 501.
  • the height of the upper surface of the conductor 463 and the height of the upper surface of the insulator 501 can be made about the same.
  • the insulator 503 is provided on the conductor 463 and on the insulator 501.
  • a conductor 465 is embedded in the insulator 503.
  • the height of the upper surface of the conductor 465 and the height of the upper surface of the insulator 503 can be made about the same.
  • the insulator 505 is provided on the conductor 465 and on the insulator 503. Further, the conductor 467 is embedded in the insulator 505.
  • the conductor 467 can be provided in the same layer as the wiring 121 to 123 shown in FIG.
  • the height of the upper surface of the conductor 467 and the height of the upper surface of the insulator 505 can be made about the same.
  • the insulator 507 is provided on the conductor 467 and on the insulator 505.
  • a conductor 469 is embedded in the insulator 507.
  • the height of the upper surface of the conductor 469 and the height of the upper surface of the insulator 507 can be made about the same.
  • Insulator 509 is provided on the conductor 469 and on the insulator 507. Further, the conductor 471 is embedded in the insulator 509. The conductor 471 can be provided in the same layer as the wirings 141 to 143 shown in FIG. Here, the height of the upper surface of the conductor 471 and the height of the upper surface of the insulator 509 can be made about the same.
  • Insulator 821 and insulator 814 are provided on the conductor 471 and on the insulator 509.
  • the conductor 853 is embedded in the insulator 821 and in the insulator 814.
  • the height of the upper surface of the conductor 853 and the height of the upper surface of the insulator 814 can be made about the same.
  • one of the source and drain of the transistor 602 is a conductor 461, a conductor 463, a conductor 465, a conductor 467, a conductor 469, a conductor 471, a conductor 853, and a conductor.
  • the insulator 613, the insulator 614, the insulator 680, the insulator 674, the insulator 681, the insulator 501, the insulator 503, the insulator 505, the insulator 507, and the insulator 509 have a function as an interlayer film. , It may have a function as a flattening film that covers each of the lower uneven shapes.
  • all the transistors of the display device 10 can be OS transistors while the display device 10 is narrowed and downsized. As a result, it is not necessary to manufacture different types of transistors, so that the manufacturing cost of the display device 10 can be reduced, and the display device 10 can be made inexpensive.
  • FIGS. 24A and 24B are top views showing a configuration example of the sub-pixel 901 that can be applied to the display device of one aspect of the present invention.
  • the sub-pixel 901 can have the circuit configuration shown in FIG. 4C. That is, when the pixel 34 has a light emitting element 572, the pixel 34 can have the same structure as the sub-pixel 901 shown in FIGS. 24A and 24B.
  • the transistor 552 has a back gate in addition to the gate, and the back gate is electrically connected to the wiring 31.
  • the transistor 554 has a back gate in addition to the gate, and the back gate is electrically connected to the other electrode of the source or drain of the transistor 554, the other electrode of the capacitance element 562, and one electrode of the light emitting element 572.
  • FIG. 24A shows a transistor, a capacitive element, a conductor constituting a wiring, and a semiconductor included in the sub-pixel 901.
  • a conductor 772 having a function as one electrode of the light emitting element 572 is shown in both FIGS. 24A and 24B.
  • the conductor and the like having a function as the other electrode of the light emitting element 572 are omitted.
  • one electrode of the light emitting element 572 has a function as a pixel electrode
  • the other electrode of the light emitting element 572 has a function as a common electrode.
  • the sub-pixel 901 includes a conductor 911, a conductor 912, a semiconductor 913, a semiconductor 914, a conductor 915a, a conductor 915b, a conductor 916a, and a conductor.
  • 916b Conductor 917, Conductor 918, Conductor 919, Conductor 920, Conductor 921, Conductor 922, Conductor 923, Conductor 924, Conductor 925, Conductor It has 926, a conductor 927, a conductor 928, a conductor 929, a conductor 930, a conductor 931 and a conductor 772.
  • the conductor 911 and the conductor 912 can be formed in the same process.
  • the semiconductor 913 and the semiconductor 914 are formed in the same process, and can be formed in a process after the conductor 911 and the conductor 912.
  • the conductor 915a and the conductor 915b, and the conductor 916a and the conductor 916b are formed in the same step, and can be formed in a step after the conductor 911 and the conductor 912.
  • the conductor 917 and the conductor 918 are formed in the same process, and can be formed in a process after the semiconductor 913 and the semiconductor 914, and the conductor 915a, the conductor 915b, the conductor 916a, and the conductor 916b.
  • the conductors 919 to 923 are formed in the same step, and can be formed in a step after the conductor 917 and the conductor 918.
  • the conductor 924 can be formed in a step after the conductor 919 to the conductor 923.
  • the conductors 925 to 928 are formed in the same step, and can be formed in a step after the conductor 924.
  • the conductors 929 to 931 are formed in the same step, and can be formed in a step after the conductors 925 to 928.
  • the conductor 772 can be formed in a step after the conductor 929 to the conductor 931.
  • the elements formed in the same process are provided in the same layer.
  • the conductor 911 and the conductor 912 can be formed in the same process, it can be said that the conductor 911 and the conductor 912 are provided in the same layer.
  • the element formed in the later step is provided in a higher layer than the element formed in the previous step.
  • the conductor 929 to the conductor 931 can be formed in a step after the conductor 925 to the conductor 928, the conductor 929 to the conductor 931 is provided in a layer higher than the conductor 925 to the conductor 928. It can be said.
  • the conductor 911 has a function as a back gate electrode of the transistor 552.
  • the semiconductor 913 has a channel forming region of the transistor 552.
  • the conductor 915a has a function as one of a source electrode and a drain electrode of the transistor 552.
  • the conductor 915b has a function as the other of the source electrode and the drain electrode of the transistor 552.
  • the conductor 917 has a function as a gate electrode of the transistor 552.
  • the conductor 912 has a function as a back gate electrode of the transistor 554.
  • the semiconductor 914 has a channel forming region of the transistor 554.
  • the conductor 916a has a function as one of a source electrode and a drain electrode of the transistor 554.
  • the conductor 916b has a function as the other of the source electrode and the drain electrode of the transistor 554.
  • the conductor 918 has a function as a gate electrode of the transistor 554.
  • the conductor 919 has a function as one electrode of the capacitive element 562.
  • the conductor 924 has a function as the other electrode of the capacitive element 562.
  • the conductor 925 corresponds to the wiring 31 having a function as a scanning line.
  • the conductor 929 corresponds to the wiring 32 having a function as a data line.
  • the conductor 930 corresponds to the wiring 35a having a function as a power line.
  • the conductor 772 has a function as one electrode of the light emitting element 572.
  • the conductor 911 is electrically connected to the conductor 920.
  • the conductor 912 is electrically connected to the conductor 923.
  • the conductor 915a is electrically connected to the conductor 921.
  • the conductor 915b is electrically connected to the conductor 919.
  • the conductor 916a is electrically connected to the conductor 922.
  • the conductor 916b is electrically connected to the conductor 923. That is, the conductor 912 that functions as the back gate electrode of the transistor 554 and the conductor 916b that functions as the other of the source electrode or the drain electrode of the transistor 554 are electrically connected via the conductor 923. To.
  • the conductor 917 is electrically connected to the conductor 920. That is, the conductor 911 having a function as a back gate electrode of the transistor 552 and the conductor 917 having a function as a gate electrode of the transistor 552 are electrically connected via the conductor 920.
  • the conductor 920 is electrically connected to the conductor 925. That is, the conductor 917 having a function as a gate electrode of the transistor 552 and the conductor 925 having a function as a scanning line are electrically connected via the conductor 920.
  • the conductor 918 is electrically connected to the conductor 919.
  • the conductor 921 is electrically connected to the conductor 926.
  • the conductor 922 is electrically connected to the conductor 927.
  • the conductor 923 is electrically connected to the conductor 928.
  • the conductor 924 is electrically connected to the conductor 928.
  • the conductor 926 is electrically connected to the conductor 929. That is, the conductor 915a having a function as one of the source electrode or the drain electrode of the transistor 552 and the conductor 929 having a function as a data line are electrically connected via the conductor 921 and the conductor 926. To.
  • the conductor 927 is electrically connected to the conductor 930. That is, the conductor 916a having a function as one of the source electrode or the drain electrode of the transistor 554 and the conductor 930 having a function as a power supply line are electrically connected via the conductor 922 and the conductor 927. Will be done.
  • the conductor 928 is electrically connected to the conductor 931.
  • the conductor 931 is electrically connected to the conductor 772.
  • the semiconductor 913 and the semiconductor 914 can have, for example, a metal oxide. Therefore, the transistor 552 and the transistor 554 can be OS transistors.
  • FIG. 25 is a top view showing a configuration example of the pixel 902 configured by the sub-pixel 901 having the configuration shown in FIG. 24B.
  • the sub-pixel 901R shows a sub-pixel 901 having a function of emitting red light
  • the sub-pixel 901G shows a sub-pixel 901 having a function of emitting green light
  • the sub-pixel 901B has a function of emitting blue light.
  • the sub-pixel 901 having the As shown in FIG. 25, the sub-pixel 901R, the sub-pixel 901G, and the sub-pixel 901B constitute the pixel 902.
  • one pixel 902 is composed of the sub-pixel 901R and the sub-pixel 901B provided in the upper row and the sub-pixel 901G provided in the lower row. Further, one pixel 902 is composed of the sub-pixel 901G provided in the upper stage, the sub-pixel 901R and the sub-pixel 901B provided in the lower stage.
  • the sub-pixel 901R, the sub-pixel 901G, and the sub-pixel 901B provided in the upper row and the sub-pixel 901R, the sub-pixel 901G, and the sub-pixel 901B provided in the lower row are respectively inverted left and right. It has become.
  • the sub-pixels 901 of the same color can be alternately arranged in the stretching direction of the conductor 925 having a function as a scanning line.
  • the sub-pixel 901 having a function of emitting light of the same color can be electrically connected to one data line. That is, it is possible to suppress that two or more types of sub-pixels 901 among the sub-pixels 901R, sub-pixels 901G, and sub-pixels 901B are electrically connected to one data line.
  • FIG. 26 is a cross-sectional view of the portion shown by the alternate long and short dash line in FIG. 24B.
  • a transistor 552 and a transistor 554 are provided on the insulator 1021. Further, an insulator 1022 is provided on the transistor 552 and the transistor 554, and an insulator 1023 is provided on the insulator 1022.
  • a substrate is provided below the insulator 1021. Further, between the substrate and the insulator 1021, the component of the layer 20 (gate driver circuit 21, data driver circuit 22, circuit 40, etc.) and the component of the layer 80 (demultiplexer) shown in FIG. 1B or the like. Circuit 81 etc.) can be provided.
  • conductors provided in different layers are electrically connected to each other via a conductor 990 having a function as a plug.
  • the conductor 915a and the conductor 921 provided above the conductor 915a are electrically connected via the conductor 990.
  • the conductor 990 includes a conductor 853, a conductor 805, a conductor 453, a conductor 305, a conductor 337, a conductor 353, a conductor 355, a conductor 357, a conductor 301a, a conductor 301b, as shown in FIG. It can have the same configuration as the conductor 331, the conductor 351 and the conductor 333, and the conductor 335.
  • An insulator 1024 is provided on the conductors 919 to 923 and on the insulator 1023.
  • a conductor 924 is provided on the insulator 1024.
  • the capacitive element 562 is composed of the conductor 919, the insulator 1024, and the conductor 924.
  • An insulator 1025 is provided on the conductor 924 and the insulator 1024.
  • An insulator 1026 is provided on the conductors 925 to 928 and on the insulator 1025.
  • Insulator 1027 is provided on the conductors 929 to 931 and on the insulator 1026.
  • a conductor 772 and an insulator 730 are provided on the insulator 1027.
  • the insulator 730 can be configured to cover a part of the conductor 772.
  • the light emitting element 572 is composed of the conductor 772, the EL layer 786, and the conductor 788.
  • An adhesive layer 991 is provided on the conductor 788, and an insulator 992 is provided on the adhesive layer 991.
  • the insulator 992 on the adhesive layer 991 can be formed by the following procedure. First, the insulator 992 is formed on a substrate different from the substrate on which the light emitting element 572 and the like are formed. Next, the conductor 788 and the insulator 992 are bonded by the adhesive layer 991. Then, the substrate on which the insulator 992 is formed is peeled off. As described above, the insulator 992 can be formed on the conductor 788.
  • a colored layer 993 is provided on the insulator 992.
  • the colored layer 993a and the colored layer 993b are shown as the colored layer 993.
  • a substrate 995 is bonded to the colored layer 993 by an adhesive layer 994.
  • the colored layer 993b has a function of transmitting light of a color different from that of the colored layer 993a.
  • the pixel 902 is composed of a sub-pixel 901R having a function of emitting red light, a sub-pixel 901G having a function of emitting green light, and a sub-pixel 901B having a function of emitting blue light
  • the colored layer 993a is composed of red light.
  • the colored layer 993b has a function of transmitting green light or blue light when it has a function of transmitting the above.
  • the alignment of the colored layer 993 and the light emitting element 572 can be easily performed. Thereby, the pixel density of the display device of one aspect of the present invention can be increased.
  • FIG. 27A to 27E are diagrams showing a configuration example of the light emitting element 572.
  • FIG. 27A shows a structure (single structure) in which the EL layer 786 is sandwiched between the conductor 772 and the conductor 788.
  • the EL layer 786 contains a light emitting material, for example, a light emitting material which is an organic compound.
  • FIG. 27B is a diagram showing a laminated structure of the EL layer 786.
  • the conductor 772 has a function as an anode
  • the conductor 788 has a function as a cathode.
  • the EL layer 786 has a structure in which the hole injection layer 721, the hole transport layer 722, the light emitting layer 723, the electron transport layer 724, and the electron injection layer 725 are sequentially laminated on the conductor 772.
  • the conductor 772 has a function as a cathode and the conductor 788 has a function as an anode, the stacking order is reversed.
  • the light emitting layer 723 has a light emitting material or a plurality of materials in an appropriate combination, and can be configured to obtain fluorescent light emission or phosphorescent light emission exhibiting a desired light emitting color. Further, the light emitting layer 723 may have a laminated structure having different light emitting colors. In this case, different materials may be used for the luminescent substance and other substances used for each of the laminated light emitting layers.
  • the conductor 772 shown in FIG. 27B is used as a reflecting electrode
  • the conductor 788 is used as a semi-transmissive / semi-reflective electrode
  • the EL layer 786 has a micro-optical resonator (microcavity) structure.
  • the light emitted from the light emitting layer 723 can be resonated between both electrodes to enhance the light emitted through the conductor 788.
  • the conductor 772 of the light emitting element 572 is a reflective electrode having a laminated structure of a conductive material having reflectivity and a conductive material having translucency (transparent conductive film)
  • the thickness of the transparent conductive film is formed.
  • Optical adjustment can be performed by controlling. Specifically, the distance between the electrodes of the conductor 772 and the conductor 788 is adjusted to be close to m ⁇ / 2 (where m is a natural number) with respect to the wavelength ⁇ of the light obtained from the light emitting layer 723. Is preferable.
  • the light emitting region referred to here refers to a recombination region of holes and electrons in the light emitting layer 723.
  • the spectrum of a specific monochromatic light obtained from the light emitting layer 723 can be narrowed, and light emission with good color purity can be obtained.
  • the optical distance between the conductor 772 and the conductor 788 can be said to be strictly the total thickness from the reflection region of the conductor 772 to the reflection region of the conductor 788.
  • the above-mentioned effect can be sufficiently obtained by assuming an arbitrary position of the conductor 772 and the conductor 788 as the reflection region. It shall be possible.
  • the optical distance between the conductor 772 and the light emitting layer from which the desired light can be obtained is, strictly speaking, the optical distance between the reflection region of the conductor 772 and the light emitting region in the light emitting layer where the desired light can be obtained. be able to.
  • the reflection region in the conductor 772 and the light emission region in the light emitting layer from which the desired light can be obtained can be obtained at an arbitrary position of the conductor 772 and the desired light can be obtained. It is assumed that the above-mentioned effect can be sufficiently obtained by assuming that an arbitrary position of the light emitting layer is a light emitting region.
  • the light emitting element 572 shown in FIG. 27B has a microcavity structure, light of different wavelengths (monochromatic light) can be extracted even if it has the same EL layer. Therefore, it is not necessary to separately paint (for example, RGB) to obtain different emission colors. Therefore, it is easy to realize high definition. It can also be combined with a colored layer. Further, since it is possible to increase the emission intensity in the front direction of a specific wavelength, it is possible to reduce the power consumption.
  • the light emitting element 572 shown in FIG. 27B does not have to have a microcavity structure.
  • the light emitting layer 723 has a structure that emits white light, and by providing the colored layer, light of a predetermined color (for example, RGB) can be extracted. Further, when forming the EL layer 786, if different coatings are performed to obtain different emission colors, light of a predetermined color can be taken out without providing a colored layer.
  • At least one of the conductor 772 and the conductor 788 can be a translucent electrode (transparent electrode, semi-transmissive / semi-reflective electrode, etc.).
  • the electrode having translucency is a transparent electrode
  • the transmittance of visible light of the transparent electrode is 40% or more.
  • the reflectance of visible light of the semi-transmissive / semi-reflective electrode is 20% or more and 80% or less, preferably 40% or more and 70% or less.
  • the resistivity of these electrodes is preferably 1 ⁇ 10 -2 ⁇ cm or less.
  • the visible light reflectance of the reflective electrode is 40% or more and 100% or less, preferably 70% or more and 100% or less. And.
  • the resistivity of this electrode is preferably 1 ⁇ 10 -2 ⁇ cm or less.
  • the configuration of the light emitting element 572 may be the configuration shown in FIG. 27C.
  • two EL layers (EL layer 786a and EL layer 786b) are provided between the conductor 772 and the conductor 788, and a charge generation layer 792 is provided between the EL layer 786a and the EL layer 786b.
  • the light emitting element 572 having a laminated structure (tandem structure) is shown.
  • the current efficiency and the external quantum efficiency of the light emitting element 572 can be improved. Therefore, a high-luminance image can be displayed on the display device 10.
  • the power consumption of the display device 10 can be reduced.
  • the EL layer 786a and the EL layer 786b can have the same configuration as the EL layer 786 shown in FIG. 27B.
  • the charge generation layer 792 injects electrons into one of the EL layer 786a and the EL layer 786b, and injects holes into the other.
  • the charge generation layer 792 injects electrons into one of the EL layer 786a and the EL layer 786b, and injects holes into the other.
  • a voltage is supplied so that the potential of the conductor 772 is higher than the potential of the conductor 788, electrons are injected from the charge generation layer 792 into the EL layer 786a, and holes are injected from the charge generation layer 792 into the EL layer 786b. Will be done.
  • the charge generation layer 792 preferably transmits visible light (specifically, the visible light transmittance of the charge generation layer 792 is 40% or more) from the viewpoint of light extraction efficiency. Further, the conductivity of the charge generation layer 792 may be lower than the conductivity of the conductor 772 or the conductivity of the conductor 788.
  • the configuration of the light emitting element 572 may be the configuration shown in FIG. 27D.
  • three EL layers (EL layer 786a, EL layer 786b, and EL layer 786c) are provided between the conductor 772 and the conductor 788, and between the EL layer 786a and the EL layer 786b, And a tandem-structured light emitting device 572 having a charge generation layer 792 between the EL layer 786b and the EL layer 786c is shown.
  • the EL layer 786a, the EL layer 786b, and the EL layer 786c can have the same configuration as the EL layer 786 shown in FIG. 27B.
  • the configuration of the light emitting element 572 may be the configuration shown in FIG. 27E.
  • an n-layer EL layer (EL layer 786 (1) to EL layer 786 (n)) is provided between the conductor 772 and the conductor 788, and an electric charge is generated between the respective EL layers 786.
  • the tandem structure light emitting element 572 having the layer 792 is shown.
  • the EL layer 786 (1) to the EL layer 786 (n) can have the same configuration as the EL layer 786 shown in FIG. 27B.
  • FIG. 27E shows the EL layer 786 (1), the EL layer 786 (m), the EL layer 786 (m + 1), and the EL layer 786 (n) among the EL layers 786.
  • n is an integer larger than m.
  • Conductor 772 and Conductor 788 The following materials can be appropriately combined and used for the conductor 772 and the conductor 788 as long as the functions of the anode and the cathode can be satisfied.
  • metals, alloys, electrically conductive compounds, mixtures thereof and the like can be appropriately used. Specific examples thereof include In—Sn oxide (also referred to as ITO), In—Si—Sn oxide (also referred to as ITSO), In—Zn oxide, and In—W—Zn oxide.
  • Other elements belonging to Group 1 or Group 2 of the Periodic Table of Elements eg, Lithium (Li), Cesium (Cs), Calcium (Ca), Strontium (Sr)), Europium (Eu), Ytterbium Rare earth metals such as (Yb), alloys containing these in appropriate combinations, and other graphenes can be used.
  • the hole injection layer 721 is a layer for injecting holes into the EL layer 786 from the conductor 772 which is an anode or the charge generation layer 792, and is a layer containing a material having a high hole injection property.
  • the EL layer 786 includes an EL layer 786a, an EL layer 786b, an EL layer 786c, and an EL layer 786 (1) to an EL layer 786 (n).
  • Examples of materials having high hole injection properties include transition metal oxides such as molybdenum oxide, vanadium oxide, ruthenium oxide, tungsten oxide, and manganese oxide.
  • phthalocyanine compounds such as phthalocyanine (abbreviation: H 2 Pc) and copper phthalocyanine (abbreviation: CuPc), 4,4'-bis [N- (4-diphenylaminophenyl) -N-phenylamino] biphenyl ( Abbreviation: DPAB), N, N'-bis ⁇ 4- [bis (3-methylphenyl) amino] phenyl ⁇ -N, N'-diphenyl- (1,1'-biphenyl) -4,4'-diamine ( Aromatic amine compounds such as abbreviation: DNTPD), polymers such as poly (3,4-ethylenedioxythiophene) / poly (styrenesulfonic acid) (abbreviation: PEDOT / PSS), and the like
  • a composite material containing a hole transporting material and an acceptor material can also be used as the material having high hole injection property.
  • electrons are extracted from the hole transporting material by the acceptor material, holes are generated in the hole injection layer 721, and holes are injected into the light emitting layer 723 via the hole transport layer 722.
  • the hole injection layer 721 may be formed of a single layer composed of a composite material containing a hole transporting material and an acceptor material (electron acceptor material), but the hole transporting material and the acceptor material (acceptor material) may be formed.
  • the electron acceptor material may be laminated and formed in separate layers.
  • the hole transport layer 722 is a layer that transports the holes injected from the conductor 772 to the light emitting layer 723 by the hole injection layer 721.
  • the hole transport layer 722 is a layer containing a hole transport material.
  • oxides of metals belonging to Group 4 to Group 8 in the Periodic Table of the Elements can be used. Specific examples thereof include molybdenum oxide, vanadium oxide, niobium oxide, tantalum oxide, chromium oxide, tungsten oxide, manganese oxide and renium oxide. Of these, molybdenum oxide is particularly preferable because it is stable in the atmosphere, has low hygroscopicity, and is easy to handle.
  • organic acceptors such as quinodimethane derivatives, chloranil derivatives, and hexaazatriphenylene derivatives can be used.
  • a substance having a hole mobility of 10-6 cm 2 / Vs or more is preferable. Any substance other than these can be used as long as it is a substance having a higher hole transport property than electrons.
  • a ⁇ -electron excess type heteroaromatic compound for example, a carbazole derivative or an indole derivative
  • an aromatic amine compound is preferable, and specific examples thereof are 4,4'-bis [N- (1-naphthyl).
  • NPB or ⁇ -NPD N, N'-bis (3-methylphenyl) -N, N'-diphenyl- [1,1'-biphenyl] -4,4 '-Diamine (abbreviation: TPD), 4,4'-bis [N- (spiro-9,9'-bifluoren-2-yl) -N-phenylamino] biphenyl (abbreviation: BSPB), 4-phenyl-4 '-(9-Phenylfluoren-9-yl) triphenylamine (abbreviation: BPAFLP), 4-phenyl-3'-(9-phenylfluoren-9-yl) triphenylamine (abbreviation: mBPAFLP), 4-phenyl -4'-(9-phenyl-9H-carbazole-3-yl) triphenylamine (abbreviation: PCBA1BP),
  • poly (N-vinylcarbazole) (abbreviation: PVK), poly (4-vinyltriphenylamine) (abbreviation: PVTPA), poly [N- (4- ⁇ N'-[4- (4-diphenylamino)) Phenyl] phenyl-N'-phenylamino ⁇ phenyl) methacrylamide] (abbreviation: PTPDMA), poly [N, N'-bis (4-butylphenyl) -N, N'-bis (phenyl) benzidine] (abbreviation: A polymer compound such as Poly-TPD) can also be used.
  • PVK poly (N-vinylcarbazole)
  • PVTPA poly (4-vinyltriphenylamine)
  • PTPDMA poly [N- (4- ⁇ N'-[4- (4-diphenylamino) Phenyl] phenyl-N'-phenylamino ⁇ phenyl) methacrylamide]
  • the hole transporting material is not limited to the above, and various known materials can be used as the hole transporting material for the hole injection layer 721 and the hole transporting layer 722 by combining one or a plurality of known materials. ..
  • the hole transport layer 722 may be formed of a plurality of layers. That is, for example, the first hole transport layer and the second hole transport layer may be laminated.
  • the light emitting layer 723 is a layer containing a light emitting substance.
  • a substance exhibiting a luminescent color such as blue, purple, bluish purple, green, yellowish green, yellow, orange, and red is appropriately used.
  • FIGS. 27C to 27E when the light emitting element 572 has a plurality of EL layers, different light emitting substances are used for the light emitting layers 723 provided in each EL layer to exhibit different light emitting colors. (For example, white light emission obtained by combining emission colors having a complementary color relationship). For example, when the light emitting element 572 has the configuration shown in FIG.
  • the light emitting substance used for the light emitting layer 723 provided on the EL layer 786a and the light emitting substance used for the light emitting layer 723 provided on the EL layer 786b are different from each other.
  • the emission color exhibited by the EL layer 786a and the emission color exhibited by the EL layer 786b can be made different.
  • one light emitting layer may have a laminated structure having different light emitting substances.
  • the light emitting layer 723 may have one or more kinds of organic compounds (host material, assist material) in addition to the light emitting substance (guest material). Further, as one or more kinds of organic compounds, one or both of a hole transporting material and an electron transporting material can be used.
  • the luminescent substance that can be used for the light emitting layer 723 is not particularly limited, and a luminescent substance that converts singlet excitation energy into light emission in the visible light region or a luminescent substance that converts triplet excitation energy into light emission in the visible light region is used. be able to.
  • Examples of the luminescent substance include the following.
  • the luminescent substance that converts the single-term excitation energy into light emission examples include a substance that emits fluorescence (fluorescent material).
  • examples thereof include quinoxalin derivatives, quinoxalin derivatives, pyridine derivatives, pyrimidine derivatives, phenanthrene derivatives, naphthalene derivatives and the like.
  • the pyrene derivative is preferable because it has a high emission quantum yield.
  • pyrene derivative examples include N, N'-bis (3-methylphenyl) -N, N'-bis [3- (9-phenyl-9H-fluoren-9-yl) phenyl] pyrene-1,6. -Diamine (abbreviation: 1,6 mM FLPAPrn), N, N'-diphenyl-N, N'-bis [4- (9-phenyl-9H-fluoren-9-yl) phenyl] pyrene-1,6-diamine (abbreviation) : 1,6FLPAPrn), N, N'-bis (dibenzofuran-2-yl) -N, N'-diphenylpyrene-1,6-diamine (abbreviation: 1,6FrAPrn), N, N'-bis (dibenzothiophene) -2-yl) -N, N'-diphenylpyrene-1,6-diamine (abbreviation: 1,6
  • Examples of the light emitting substance that converts triplet excitation energy into light emission include a substance that emits phosphorescence (phosphorescent material) and a thermally activated delayed fluorescence (TADF) material that exhibits thermal activated delayed fluorescence. ..
  • the phosphorescent material examples include an organometallic complex, a metal complex (platinum complex), and a rare earth metal complex. Since these exhibit different emission colors (emission peaks) for each substance, they are appropriately selected and used as necessary.
  • Examples of the phosphorescent material having a blue or green color and a peak wavelength of the emission spectrum of 450 nm or more and 570 nm or less include the following substances.
  • Examples of the phosphorescent material having a green or yellow color and a peak wavelength of 495 nm or more and 590 nm or less in the emission spectrum include the following substances.
  • tris (4-methyl-6-phenylpyrimidinato) iridium (III) (abbreviation: [Ir (mppm) 3 ]
  • tris (4-t-butyl-6-phenylpyrimidinato) iridium (III) (abbreviation: [Ir (mppm) 3 ])
  • tris (4-t-butyl-6-phenylpyrimidinato) iridium (III) tris (4-t-butyl-6-phenylpyrimidinato) iridium (III).
  • Iridium (III) Acetylacetoneate (abbreviation: [Ir (dpo) 2 (acac)]), Bis ⁇ 2- [4'-(perfluorophenyl) phenyl] pyridinato-N, C 2' ⁇ Iridium ( III) Acetylacetoneate (abbreviation: [Ir (p-PF-ph) 2 (acac)]), bis (2-phenylbenzothiazolato-N, C 2' ) iridium (III) acetylacetoneate (abbreviation:: In addition to organic metal complexes such as [Ir (bt) 2 (acac)]), such as tris (acetylacetoneto) (monophenanthrolin) terbium (III) (abbreviation: [Tb (acac) 3 (Phen)]). Rare earth metal complex can be mentioned.
  • the organometallic iridium complex having a pyridine skeleton (particularly a phenylpyridine skeleton) or a pyrimidine skeleton is a group of compounds useful for achieving green chromaticity in one aspect of the present invention.
  • Examples of the phosphorescent material having a yellow or red color and a peak wavelength of 570 nm or more and 750 nm or less in the emission spectrum include the following substances.
  • the organometallic iridium complex having a pyrazine skeleton is a group of compounds useful for achieving the chromaticity of red in one aspect of the present invention.
  • an organometallic iridium complex having a cyano group such as [Ir (dmdppr-dmCP) 2 (dpm)] is preferable because of its high stability.
  • a substance having a peak wavelength of photoluminescence of 430 nm or more and 470 nm or less, more preferably 430 nm or more and 460 nm or less may be used.
  • a substance having a peak wavelength of photoluminescence of 500 nm or more and 540 nm or less, more preferably 500 nm or more and 530 nm or less may be used.
  • a substance having a peak wavelength of photoluminescence of 610 nm or more and 680 nm or less, more preferably 620 nm or more and 680 nm or less may be used.
  • the photoluminescence measurement may be either a solution or a thin film.
  • the film thickness of the semi-transmissive / semi-reflective electrode (metal thin film portion) required to obtain the microcavity effect is preferably 20 nm or more and 40 nm or less. More preferably, it is larger than 25 nm and 40 nm or less. If it exceeds 40 nm, the efficiency may decrease.
  • the organic compound (host material, assist material) used for the light emitting layer 723 one or a plurality of substances having an energy gap larger than the energy gap of the light emitting substance (guest material) may be selected and used.
  • the hole-transporting material described above and the electron-transporting material described later can also be used as a host material or an assist material, respectively.
  • the luminescent material is a fluorescent material
  • an organic compound having a large energy level in the singlet excited state and a small energy level in the triplet excited state as the host material.
  • an anthracene derivative or a tetracene derivative Specifically, 9-phenyl-3- [4- (10-phenyl-9-anthryl) phenyl] -9H-carbazole (abbreviation: PCzPA), 3- [4- (1-naphthyl) -phenyl] -9.
  • an organic compound having a triplet excitation energy larger than the triplet excitation energy (energy difference between the ground state and the triplet excited state) of the luminescent material may be selected as the host material.
  • an organic compound having a triplet excitation energy larger than the triplet excitation energy (energy difference between the ground state and the triplet excited state) of the luminescent material may be selected as the host material.
  • the host material in addition to zinc and aluminum-based metal complexes, oxadiazole derivatives, triazole derivatives, benzoimidazole derivatives, quinoxalin derivatives, dibenzoquinoxalin derivatives, dibenzothiophene derivatives, dibenzofuran derivatives, pyrimidine derivatives, triazine derivatives, and pyridine derivatives , Bipyridine derivatives, phenanthroline derivatives, etc., aromatic amines, carbazole derivatives, etc. can be used.
  • condensed polycyclic aromatic compounds such as anthracene derivatives, phenanthrene derivatives, pyrene derivatives, chrysene derivatives, and dibenzo [g, p] chrysene derivatives can be mentioned, and specific examples thereof include 9,10-diphenylanthracene (abbreviation: DPAnth).
  • N, N-diphenyl-9- [4- (10-phenyl-9-anthracene) phenyl] -9H-carbazole-3-amine (abbreviation: CzA1PA), 4- (10-phenyl-9-anthracene) triphenyl Amin (abbreviation: DPhPA), YGAPA, PCAPA, N, 9-diphenyl-N- ⁇ 4- [4- (10-phenyl-9-anthracene) phenyl] phenyl ⁇ -9H-carbazole-3-amine (abbreviation: PCAPBA) ), 9,10-Diphenyl-2- [N-phenyl-N- (9-phenyl-9H-carbazole-3-yl) amino] anthracene (abbreviation: 2PCAPA), 6,12-dimethoxy-5,11-diphenyl Anthracene, N, N, N', N', N', N'', N'''''
  • the compound forming the excitation complex When a plurality of organic compounds are used in the light emitting layer 723, it is preferable to mix the compound forming the excitation complex with the light emitting substance.
  • various organic compounds can be appropriately combined and used, but in order to efficiently form an excitation complex, a compound that easily receives holes (hole transporting material) and a compound that easily receives electrons (electrons) can be used. It is particularly preferable to combine it with a transportable material).
  • the hole transporting material and the electron transporting material the materials shown in the present embodiment can be used.
  • a TADF material is a material that can up-convert a triplet excited state to a singlet excited state (intersystem crossing) with a small amount of thermal energy, and efficiently exhibits light emission (fluorescence) from the singlet excited state. is there. Further, as a condition for efficiently obtaining thermally activated delayed fluorescence, the energy difference between the triplet excitation level and the singlet excitation level is 0 eV or more and 0.2 eV or less, preferably 0 eV or more and 0.1 eV or less. Can be mentioned.
  • delayed fluorescence in TADF materials refers to emission that has a spectrum similar to that of normal fluorescence but has a significantly long lifetime. Its life is 10-6 seconds or longer, preferably 10-3 seconds or longer.
  • Examples of the TADF material include fullerenes and derivatives thereof, acridine derivatives such as proflavine, and eosin.
  • Examples thereof include metal-containing porphyrins containing magnesium (Mg), zinc (Zn), cadmium (Cd), tin (Sn), platinum (Pt), indium (In), palladium (Pd) and the like.
  • Examples of the metal-containing porphyrin include a protoporphyrin-tin fluoride complex (SnF 2 (Proto IX)), a mesoporphyrin-tin fluoride complex (SnF 2 (Meso IX)), and a hematoporphyrin-tin fluoride complex (SnF 2).
  • a substance in which a ⁇ -electron-rich heteroaromatic ring and a ⁇ -electron-deficient heteroaromatic ring are directly bonded has a stronger donor property of the ⁇ -electron-rich heteroaromatic ring and a stronger acceptability of the ⁇ -electron-deficient heteroaromatic ring. , It is particularly preferable because the energy difference between the singlet excited state and the triplet excited state becomes small.
  • TADF material When a TADF material is used, it can also be used in combination with other organic compounds.
  • Electron transport layer 724 is a layer that transports the electrons injected from the conductor 788 to the light emitting layer 723 by the electron injection layer 725.
  • the electron transport layer 724 is a layer containing an electron transport material.
  • the electron-transporting material used for the electron-transporting layer 724 is preferably a substance having an electron mobility of 1 ⁇ 10-6 cm 2 / Vs or more. Any substance other than these can be used as long as it is a substance having a higher electron transport property than holes.
  • the electron-transporting material examples include a metal complex having a quinoline ligand, a benzoquinoline ligand, an oxazole ligand, or a thiazole ligand, an oxadiazole derivative, a triazole derivative, a phenanthroline derivative, a pyridine derivative, a bipyridine derivative, and the like. Can be mentioned.
  • a ⁇ -electron-deficient complex aromatic compound such as a nitrogen-containing complex aromatic compound can also be used.
  • Alq 3 tris (4-methyl-8-quinolinolato) aluminum (III) (abbreviation: Almq 3 ), bis (10-hydroxybenzo [h] quinolinato) berylium (abbreviation: BeBq 2 ), BAlq, Metal complexes such as Zn (BOX) 2 , bis [2- (2-hydroxyphenyl) benzothiazolate] zinc (II) (abbreviation: Zn (BTZ) 2 ), 2- (4-biphenylyl) -5- (4-tert) -Butylphenyl) -1,3,4-oxadiazole (abbreviation: PBD), 1,3-bis [5- (p-tert-butylphenyl) -1,3,4-oxadiazol-2-yl ] Benzene (abbreviation: OXD-7), 3- (4'-tert-butylphenyl) -4-phenyl-5- (4 ′′ -biphenyl) -1
  • poly (2,5-pyridinediyl) (abbreviation: PPy)
  • poly [(9,9-dihexylfluorene-2,7-diyl) -co- (pyridine-3,5-diyl)] (abbreviation: PF).
  • PPy poly [(9,9-dihexylfluorene-2,7-diyl) -co- (pyridine-3,5-diyl)]
  • PF-Py poly [(9,9-dioctylfluorene-2,7-diyl) -co- (2,2'-bipyridine-6,6'-diyl)]
  • PF-BPy Molecular compounds
  • the electron transport layer 724 is not limited to a single layer, but may have a structure in which two or more layers made of the above substances are laminated.
  • Electron injection layer 725 is a layer containing a substance having a high electron injection property.
  • the electron injection layer 725 lithium fluoride (LiF), cesium fluoride (CsF), calcium fluoride (CaF 2), alkali metal such as lithium oxide (LiO x), alkaline earth metal, or their Compounds can be used.
  • rare earth metal compounds such as erbium fluoride (ErF 3 ) can be used.
  • an electlide may be used for the electron injection layer 725. Examples of the electride include a substance in which a high concentration of electrons is added to a mixed oxide of calcium and aluminum.
  • the substance constituting the electron transport layer 724 described above can also be used.
  • a composite material formed by mixing an organic compound and an electron donor (donor) may be used for the electron injection layer 725.
  • Such a composite material is excellent in electron injection property and electron transport property because electrons are generated in the organic compound by the electron donor.
  • the organic compound is preferably a material excellent in transporting generated electrons, and specifically, for example, an electron transporting material (metal complex, complex aromatic compound, etc.) used for the above-mentioned electron transport layer 724. ) Can be used.
  • the electron donor may be any substance that exhibits electron donating property to the organic compound.
  • alkali metals, alkaline earth metals and rare earth metals are preferable, and lithium, cesium, magnesium, calcium, erbium, ytterbium and the like can be mentioned.
  • alkali metal oxides and alkaline earth metal oxides are preferable, and lithium oxides, calcium oxides, barium oxides and the like can be mentioned.
  • a Lewis base such as magnesium oxide can also be used.
  • an organic compound such as tetrathiafulvalene (abbreviation: TTF) can also be used.
  • Charge generation layer 792 When a voltage is applied between the conductor 772 and the conductor 788, the charge generation layer 792 is attached to the EL layer 786 on the side closer to the conductor 772 of the two EL layers 786 in contact with the charge generation layer 792. It has a function of injecting electrons and injecting holes into the EL layer 786 on the side close to the conductor 788.
  • the charge generation layer 792 has a function of injecting electrons into the EL layer 786a and injecting holes into the EL layer 786b.
  • the charge generation layer 792 may have a structure in which an electron acceptor (acceptor) is added to the hole transporting material or an electron donor (donor) added to the electron transporting material. Good. Moreover, both of these configurations may be laminated. By forming the charge generation layer 792 using the above-mentioned material, it is possible to suppress an increase in the drive voltage of the display device 10 when the EL layers are laminated.
  • the electron acceptor when an electron acceptor is added to the hole transporting material, the electron acceptor is 7,7,8,8-tetracyano-2,3,5,6-tetrafluoro.
  • quinodimethane abbreviation: F 4 -TCNQ
  • chloranil and the like can be given.
  • oxides of metals belonging to Group 4 to Group 8 in the Periodic Table of the Elements can be mentioned. Specific examples thereof include vanadium oxide, niobium oxide, tantalum oxide, chromium oxide, molybdenum oxide, tungsten oxide, manganese oxide, and renium oxide.
  • the electron donor when an electron donor is added to the electron transporting material, the electron donor is an alkali metal, an alkaline earth metal, a rare earth metal, or a group 2 or 13 in the periodic table of elements.
  • Metals belonging to the above, oxides thereof, and carbonates can be used. Specifically, it is preferable to use lithium (Li), cesium (Cs), magnesium (Mg), calcium (Ca), ytterbium (Yb), indium (In), lithium oxide, cesium carbonate and the like.
  • an organic compound such as tetrathianaphthalene may be used as an electron donor.
  • a vacuum process such as a thin-film deposition method or a solution process such as a spin coating method or an inkjet method can be used to manufacture the light emitting element 572.
  • a physical vapor deposition method such as a sputtering method, an ion plating method, an ion beam vapor deposition method, a molecular beam deposition method, or a vacuum vapor deposition method, or a chemical vapor deposition method (CVD method) is used. be able to.
  • the functional layers (hole injection layer, hole transport layer, light emitting layer, electron transport layer, electron injection layer) and charge generation layer included in the EL layer of the light emitting element are subjected to a vapor deposition method (vacuum vapor deposition method, etc.) and coating.
  • a vapor deposition method vacuum vapor deposition method, etc.
  • Method dip coating method, die coating method, bar coating method, spin coating method, spray coating method, etc.
  • printing method inkprint method, screen (hole plate printing) method, offset (flat plate printing) method, flexo (convex printing) method, It can be formed by a method such as a gravure method or a microcontact method).
  • the functional layers (hole injection layer, hole transport layer, light emitting layer, electron transport layer, electron injection layer) and the charge generation layer constituting the EL layer of the light emitting device shown in the present embodiment are made of the above-mentioned materials.
  • the materials are not limited to the above, and other materials can be used in combination as long as they can satisfy the functions of each layer.
  • high molecular weight compounds oligomers, dendrimers, polymers, etc.
  • medium molecular weight compounds compounds in the intermediate region between low molecular weight and high molecular weight: molecular weight 400 to 4000
  • inorganic compounds quantum dot materials, etc.
  • the quantum dot material a colloidal quantum dot material, an alloy type quantum dot material, a core / shell type quantum dot material, a core type quantum dot material, or the like can be used.
  • This embodiment can be carried out in combination with at least a part thereof as appropriate with other embodiments described in the present specification.
  • Transistor configuration example 1> 28A, 28B, and 28C are a top view and a cross-sectional view of the transistor 200A and the periphery of the transistor 200A that can be used in the display device according to one aspect of the present invention.
  • a transistor 200A can be applied to the display device of one aspect of the present invention.
  • FIG. 28A is a top view of the transistor 200A.
  • 28B and 28C are cross-sectional views of the transistor 200A.
  • FIG. 28B is a cross-sectional view of the portion shown by the alternate long and short dash line of A1-A2 in FIG. 28A, and is also a cross-sectional view of the transistor 200A in the channel length direction.
  • FIG. 28C is a cross-sectional view of the portion shown by the alternate long and short dash line of A3-A4 in FIG. 28A, and is also a cross-sectional view of the transistor 200A in the channel width direction.
  • some elements are omitted for the sake of clarity.
  • the conductor 200A is composed of a metal oxide 230a arranged on a substrate (not shown), a metal oxide 230b arranged on the metal oxide 230a, and a metal oxide 230b.
  • Insulator 280 arranged above the conductors 242a and 242b separated from each other, and placed on the conductors 242a and 242b and having an opening formed between the conductors 242a and the conductors 242b.
  • the conductor 260 arranged in the opening, the metal oxide 230b, the conductor 242a, the conductor 242b, the insulator 280, the insulator 250 arranged between the conductor 260, and the metal.
  • the conductor 242a and the conductor 242b may be collectively referred to as a conductor 242.
  • the side surfaces of the conductor 242a and the conductor 242b on the conductor 260 side have a substantially vertical shape.
  • the transistor 200A shown in FIG. 28 is not limited to this, and the angle formed by the side surface and the bottom surface of the conductor 242a and the conductor 242b is 10 ° or more and 80 ° or less, preferably 30 ° or more and 60 ° or less. May be. Further, the opposing side surfaces of the conductor 242a and the conductor 242b may have a plurality of surfaces.
  • an insulator 254 is formed between the insulator 224, the metal oxide 230a, the metal oxide 230b, the conductor 242a, the conductor 242b, the metal oxide 230c, and the insulator 280. It is preferably arranged.
  • the insulator 254 includes a side surface of the metal oxide 230c, an upper surface and a side surface of the conductor 242a, an upper surface and a side surface of the conductor 242b, a metal oxide 230a and a metal oxide 230b. It is preferable to be in contact with the side surface of the insulator and the upper surface of the insulator 224.
  • the transistor 200A has a configuration in which three layers of a metal oxide 230a, a metal oxide 230b, and a metal oxide 230c are laminated in a region where a channel is formed (hereinafter, also referred to as a channel formation region) and in the vicinity thereof.
  • a two-layer structure of the metal oxide 230b and the metal oxide 230c, or a laminated structure of four or more layers may be provided.
  • the conductor 260 is shown as a two-layer laminated structure, but the present invention is not limited to this.
  • the conductor 260 may have a single-layer structure or a laminated structure of three or more layers.
  • each of the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c may have a laminated structure of two or more layers.
  • the metal oxide 230c has a laminated structure composed of a first metal oxide and a second metal oxide on the first metal oxide
  • the first metal oxide is a metal oxide 230b. It has a similar composition
  • the second metal oxide preferably has the same composition as the metal oxide 230a.
  • the conductor 260 functions as a gate electrode of the transistor, and the conductor 242a and the conductor 242b function as a source electrode or a drain electrode, respectively.
  • the conductor 260 is formed so as to be embedded in the opening of the insulator 280 and the region sandwiched between the conductor 242a and the conductor 242b.
  • the arrangement of the conductor 260, the conductor 242a, and the conductor 242b is self-consistently selected with respect to the opening of the insulator 280. That is, in the transistor 200A, the gate electrode can be arranged in a self-aligned manner between the source electrode and the drain electrode. Therefore, since the conductor 260 can be formed without providing the alignment margin, the occupied area of the transistor 200A can be reduced. As a result, the pixel density of the display device can be increased. Further, the display device can be made into a narrow frame.
  • the conductor 260 may have a conductor 260a provided inside the insulator 250 and a conductor 260b provided so as to be embedded inside the conductor 260a. preferable.
  • the transistor 200A includes an insulator 214 arranged on a substrate (not shown), an insulator 216 arranged on the insulator 214, and a conductor arranged so as to be embedded in the insulator 216. It is preferable to have 205, an insulator 222 arranged on the insulator 216 and the conductor 205, and an insulator 224 arranged on the insulator 222. It is preferable that the metal oxide 230a is arranged on the insulator 224.
  • the insulator 274 that functions as an interlayer film and the insulator 281 are arranged on the transistor 200A.
  • the insulator 274 is arranged in contact with the upper surface of the conductor 260, the insulator 250, the insulator 254, the metal oxide 230c, and the insulator 280.
  • the insulator 222, the insulator 254, and the insulator 274 preferably have a function of suppressing the diffusion of at least one hydrogen (for example, hydrogen atom, hydrogen molecule, etc.).
  • the insulator 222, the insulator 254, and the insulator 274 preferably have lower hydrogen permeability than the insulator 224, the insulator 250, and the insulator 280.
  • the insulator 222 and the insulator 254 have a function of suppressing the diffusion of oxygen (for example, oxygen atom, oxygen molecule, etc.).
  • the insulator 222 and the insulator 254 preferably have lower oxygen permeability than the insulator 224, the insulator 250, and the insulator 280.
  • the insulator 224, the metal oxide 230, and the insulator 250 are separated from the insulator 280 and the insulator 281 by the insulator 254 and the insulator 274. Therefore, it is possible to prevent impurities such as hydrogen contained in the insulator 280 and the insulator 281 and excess oxygen from being mixed into the insulator 224, the metal oxide 230, and the insulator 250.
  • a conductor 240 (conductor 240a and conductor 240b) that is electrically connected to the transistor 200A and functions as a plug is provided.
  • An insulator 241 (insulator 241a and insulator 241b) is provided in contact with the side surface of the conductor 240 that functions as a plug. That is, the insulator 254, the insulator 280, the insulator 274, and the insulator 241 are provided in contact with the inner wall of the opening of the insulator 281. Further, the first conductor of the conductor 240 may be provided in contact with the side surface of the insulator 241, and the second conductor of the conductor 240 may be provided inside.
  • the height of the upper surface of the conductor 240 and the height of the upper surface of the insulator 281 can be made about the same.
  • the transistor 200A shows a configuration in which the first conductor of the conductor 240 and the second conductor of the conductor 240 are laminated, but the present invention is not limited to this.
  • the conductor 240 may be provided as a single layer or a laminated structure having three or more layers. When the structure has a laminated structure, an ordinal number may be given in the order of formation to distinguish them.
  • the transistor 200A is a metal oxide 230 (metal oxide 230a, metal oxide 230b, and metal oxide 230c) containing a channel forming region, and a metal oxide that functions as an oxide semiconductor (hereinafter, also referred to as an oxide semiconductor). It is preferable to use.
  • a metal oxide serving as the channel forming region of the metal oxide 230 it is preferable to use a metal oxide having a band gap of 2 eV or more, preferably 2.5 eV or more.
  • the metal oxide contains at least indium (In) or zinc (Zn). In particular, it preferably contains indium (In) and zinc (Zn). Further, in addition to these, it is preferable that the element M is contained.
  • Elements M include aluminum (Al), gallium (Ga), ittrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), and zirconium. From (Zr), molybdenum (Mo), lantern (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), cobalt (Co), etc. It can be one or more selected species.
  • the element M is preferably aluminum (Al), gallium (Ga), yttrium (Y), or tin (Sn).
  • the film thickness of the region of the metal oxide 230b that does not overlap with the conductor 242 may be thinner than the film thickness of the region that overlaps with the conductor 242. This is formed by removing a part of the upper surface of the metal oxide 230b when forming the conductor 242a and the conductor 242b.
  • a region having low resistance may be formed in the vicinity of the interface with the conductive film. As described above, by removing the region having low resistance located between the conductor 242a and the conductor 242b on the upper surface of the metal oxide 230b, it is possible to prevent the formation of a channel in the region.
  • a display device having a transistor having a small size and a high pixel density it is possible to provide a display device having a transistor having a large on-current and a high brightness.
  • a display device having a fast-moving transistor and fast-moving it is possible to provide a highly reliable display device having a transistor having stable electrical characteristics.
  • a display device having a transistor having a small off-current and low power consumption it is possible to provide.
  • transistor 200A A detailed configuration of the transistor 200A that can be used in the display device according to one aspect of the present invention will be described.
  • the conductor 205 is arranged so as to have a region overlapping with the metal oxide 230 and the conductor 260. Further, it is preferable that the conductor 205 is embedded in the insulator 216. Here, it is preferable to improve the flatness of the upper surface of the conductor 205.
  • the average surface roughness (Ra) of the upper surface of the conductor 205 may be 1 nm or less, preferably 0.5 nm or less, and more preferably 0.3 nm or less.
  • the flatness of the insulator 224 formed on the conductor 205 can be improved, and the crystallinity of the metal oxide 230b and the metal oxide 230c can be improved.
  • the conductor 260 may function as a first gate (also referred to as a top gate) electrode.
  • the conductor 205 may function as a second gate (also referred to as a bottom gate) electrode.
  • the Vth of the transistor 200A can be controlled by changing the potential applied to the conductor 205 independently without interlocking with the potential applied to the conductor 260.
  • the Vth of the transistor 200A can be made larger than 0V, and the off-current can be reduced. Therefore, when a negative potential is applied to the conductor 205, the drain current when the potential applied to the conductor 260 is 0 V can be made smaller than when it is not applied.
  • the conductor 205 may be provided larger than the channel forming region in the metal oxide 230.
  • the conductor 205 is also stretched in a region outside the end portion intersecting the channel width direction of the metal oxide 230. That is, it is preferable that the conductor 205 and the conductor 260 are superimposed via an insulator on the outside of the side surface of the metal oxide 230 in the channel width direction.
  • the channel forming region of the metal oxide 230 is formed by the electric field of the conductor 260 having a function as a first gate electrode and the electric field of the conductor 205 having a function as a second gate electrode. Can be electrically surrounded.
  • the conductor 205 is stretched to function as wiring.
  • the present invention is not limited to this, and a conductor that functions as wiring may be provided under the conductor 205.
  • the conductor 205 it is preferable to use a conductive material containing tungsten, copper or aluminum as a main component.
  • a conductive material containing tungsten, copper or aluminum as a main component.
  • the conductor 205 is shown as a single layer, it may have a laminated structure, for example, titanium or titanium nitride may be laminated with the conductive material.
  • the hydrogen atoms under the conductor 205 the hydrogen molecules, water molecules, nitrogen atom, a nitrogen molecule, nitric oxide molecule (N 2 O, NO, NO 2 , etc.), a function of suppressing diffusion of impurities such as copper atoms
  • a conductor having (the above impurities are difficult to permeate) may be used.
  • a conductor having a function of suppressing the diffusion of oxygen for example, oxygen atom, oxygen molecule, etc.
  • the function of suppressing the diffusion of impurities or oxygen is a function of suppressing the diffusion of any one or all of the above impurities or the above oxygen.
  • the conductor 205 By using a conductor having a function of suppressing the diffusion of oxygen under the conductor 205, it is possible to prevent the conductor 205 from being oxidized and the conductivity from being lowered.
  • the conductor having a function of suppressing the diffusion of oxygen for example, tantalum, tantalum nitride, ruthenium, ruthenium oxide and the like are preferably used. Therefore, as the conductor 205, the conductive material may be a single layer or a laminated material.
  • the insulator 214 preferably functions as a barrier insulating film that prevents impurities such as water and hydrogen from being mixed into the transistor 200A from the substrate side.
  • the insulator 214 has a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, nitric oxide molecule (N 2 O, NO, NO 2 , etc.), a function of suppressing diffusion of impurities such as copper atoms (It is difficult for the above impurities to permeate.)
  • an insulating material it is preferable to use an insulating material.
  • an insulating material having a function of suppressing the diffusion of oxygen for example, oxygen atom, oxygen molecule, etc.
  • the insulator 214 it is preferable to use aluminum oxide, silicon nitride, or the like as the insulator 214. As a result, it is possible to prevent impurities such as water and hydrogen from diffusing from the substrate side to the transistor 200A side of the insulator 214. Alternatively, it is possible to prevent oxygen contained in the insulator 224 or the like from diffusing toward the substrate side of the insulator 214.
  • the insulator 216, the insulator 280, and the insulator 281 that function as an interlayer film preferably have a lower relative permittivity than the insulator 214.
  • a material having a low relative permittivity as an interlayer film, it is possible to reduce the parasitic capacitance generated between the wirings.
  • silicon oxide, silicon oxide nitride, silicon nitride oxide, silicon nitride, silicon oxide added with fluorine, silicon oxide added with carbon, carbon and nitrogen were added. Silicon oxide, silicon oxide having pores, or the like may be appropriately used.
  • the insulator 222 and the insulator 224 have a function as a gate insulator.
  • the insulator 224 in contact with the metal oxide 230 desorbs oxygen by heating.
  • oxygen released by heating may be referred to as excess oxygen.
  • the insulator 224 silicon oxide, silicon oxide nitride, or the like may be appropriately used.
  • an oxide material in which a part of oxygen is desorbed by heating it is preferable to use an oxide material in which a part of oxygen is desorbed by heating.
  • An oxide that desorbs oxygen by heating means that the amount of oxygen desorbed in terms of oxygen atoms is 1.0 ⁇ 10 18 atoms / cm 3 or more, preferably 1 in TDS (Thermal Desorption Spectroscopy) analysis.
  • the surface temperature of the film during the TDS analysis is preferably in the range of 100 ° C. or higher and 700 ° C. or lower, or 100 ° C. or higher and 400 ° C. or lower.
  • the film thickness of the region where the insulator 224 does not overlap with the insulator 254 and does not overlap with the metal oxide 230b may be thinner than the film thickness in the other regions.
  • the film thickness of the region that does not overlap with the insulator 254 and does not overlap with the metal oxide 230b is preferably a film thickness that can sufficiently diffuse the oxygen.
  • the insulator 222 preferably functions as a barrier insulating film that prevents impurities such as water and hydrogen from being mixed into the transistor 200A from the substrate side.
  • the insulator 222 preferably has a lower hydrogen permeability than the insulator 224.
  • the insulator 222 has a function of suppressing the diffusion of oxygen (for example, oxygen atom, oxygen molecule, etc.) (the oxygen is difficult to permeate).
  • the insulator 222 preferably has lower oxygen permeability than the insulator 224. Since the insulator 222 has a function of suppressing the diffusion of oxygen and impurities, it is possible to reduce the diffusion of oxygen contained in the metal oxide 230 toward the substrate side, which is preferable. Further, it is possible to suppress the conductor 205 from reacting with the oxygen contained in the insulator 224 and the metal oxide 230.
  • the insulator 222 it is preferable to use an insulator containing oxides of one or both of aluminum and hafnium, which are insulating materials.
  • the insulator containing one or both oxides of aluminum and hafnium it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate) and the like.
  • the insulator 222 releases oxygen from the metal oxide 230 and mixes impurities such as hydrogen from the peripheral portion of the transistor 200A into the metal oxide 230. It functions as a suppressing layer.
  • aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, and zirconium oxide may be added to these insulators.
  • these insulators may be nitrided. Silicon oxide, silicon oxide or silicon nitride may be laminated on the above insulator.
  • the insulator 222 may be, for example, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO 3 ) or (Ba, Sr) TiO 3 (BST) or the like. Insulators containing so-called high-k materials may be used in single layers or in layers. As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulator. By using a high-k material for an insulator that functions as a gate insulator, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.
  • the insulator 222 and the insulator 224 may have a laminated structure of two or more layers.
  • the laminated structure is not limited to the same material, and may be a laminated structure made of different materials.
  • an insulator similar to the insulator 224 may be provided under the insulator 222.
  • the metal oxide 230 has a metal oxide 230a, a metal oxide 230b on the metal oxide 230a, and a metal oxide 230c on the metal oxide 230b.
  • the metal oxide 230a under the metal oxide 230b, it is possible to suppress the diffusion of impurities from the structure formed below the metal oxide 230a to the metal oxide 230b.
  • the metal oxide 230c on the metal oxide 230b, it is possible to suppress the diffusion of impurities from the structure formed above the metal oxide 230c to the metal oxide 230b.
  • the metal oxide 230 preferably has a laminated structure of a plurality of oxide layers having different atomic number ratios of each metal atom.
  • the metal oxide 230 contains at least indium (In) and the element M
  • the number of atoms of the element M contained in the metal oxide 230a is relative to the number of atoms of all the elements constituting the metal oxide 230a.
  • the ratio is preferably higher than the ratio of the number of atoms of the element M contained in the metal oxide 230b to the number of atoms of all the elements constituting the metal oxide 230b.
  • the atomic number ratio of the element M contained in the metal oxide 230a to In is larger than the atomic number ratio of the element M contained in the metal oxide 230b to In.
  • the metal oxide 230c a metal oxide that can be used for the metal oxide 230a or the metal oxide 230b can be used.
  • the energy at the lower end of the conduction band of the metal oxide 230a and the metal oxide 230c is higher than the energy at the lower end of the conduction band of the metal oxide 230b.
  • the electron affinity of the metal oxide 230a and the metal oxide 230c is smaller than the electron affinity of the metal oxide 230b.
  • the metal oxide 230c it is preferable to use a metal oxide that can be used for the metal oxide 230a.
  • the ratio of the number of atoms of the element M contained in the metal oxide 230c to the number of atoms of all the elements constituting the metal oxide 230c is the metal with respect to the number of atoms of all the elements constituting the metal oxide 230b. It is preferably higher than the ratio of the number of atoms of the element M contained in the oxide 230b. Further, it is preferable that the atomic number ratio of the element M contained in the metal oxide 230c to In is larger than the atomic number ratio of the element M contained in the metal oxide 230b to In.
  • the energy level at the lower end of the conduction band changes gently.
  • the energy level at the lower end of the conduction band at the junction of the metal oxide 230a, the metal oxide 230b, and the metal oxide 230c is continuously changed or continuously bonded.
  • the metal oxide 230a and the metal oxide 230b, and the metal oxide 230b and the metal oxide 230c have a common element (main component) other than oxygen, so that the defect level density is low.
  • a mixed layer can be formed.
  • the metal oxide 230b is an In-Ga-Zn oxide, In-Ga-Zn oxide, Ga-Zn oxide, gallium oxide or the like may be used as the metal oxide 230a and the metal oxide 230c. ..
  • the metal oxide 230c may have a laminated structure.
  • a laminated structure with gallium oxide can be used.
  • a laminated structure of an In-Ga-Zn oxide and an oxide containing no In may be used as the metal oxide 230c.
  • the metal oxide 230c has a laminated structure
  • the main path of the carrier is the metal oxide 230b.
  • the defect level density at the interface between the metal oxide 230a and the metal oxide 230b and the interface between the metal oxide 230b and the metal oxide 230c can be determined. Can be lowered. Therefore, the influence of interfacial scattering on carrier conduction is reduced, and the transistor 200A can obtain high on-current and high frequency characteristics.
  • the constituent elements of the metal oxide 230c are It is expected to suppress diffusion to the insulator 250 side.
  • the metal oxide 230c has a laminated structure and the oxide containing no In is positioned above the laminated structure, In that can be diffused to the insulator 250 side can be suppressed. Since the insulator 250 functions as a gate insulator, if In is diffused, the characteristics of the transistor become poor. Therefore, by forming the metal oxide 230c in a laminated structure, it is possible to provide a highly reliable display device.
  • a conductor 242 (conductor 242a and conductor 242b) that functions as a source electrode and a drain electrode is provided on the metal oxide 230b.
  • the conductors 242 include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, berylium, indium, ruthenium, iridium, and strontium. It is preferable to use a metal element selected from lanterns, an alloy containing the above-mentioned metal element as a component, an alloy in which the above-mentioned metal element is combined, or the like.
  • tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, and the like are used. Is preferable.
  • tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are difficult to oxidize. It is preferable because it is a conductive material or a material that maintains conductivity even if it absorbs oxygen.
  • the oxygen concentration may be reduced in the vicinity of the conductor 242 of the metal oxide 230. Further, in the vicinity of the conductor 242 of the metal oxide 230, a metal compound layer containing the metal contained in the conductor 242 and the component of the metal oxide 230 may be formed. In such a case, the carrier density increases in the region near the conductor 242 of the metal oxide 230, and the region becomes a low resistance region.
  • the region between the conductor 242a and the conductor 242b is formed so as to overlap the opening of the insulator 280.
  • the conductor 260 can be arranged in a self-aligned manner between the conductor 242a and the conductor 242b.
  • the insulator 250 functions as a gate insulator.
  • the insulator 250 is preferably arranged in contact with the upper surface of the metal oxide 230c.
  • silicon oxide, silicon oxide nitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, and silicon oxide having pores are used. be able to.
  • silicon oxide and silicon nitride nitride are preferable because they are stable against heat.
  • the insulator 250 preferably has a reduced concentration of impurities such as water and hydrogen in the insulator 250.
  • the film thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less.
  • a metal oxide may be provided between the insulator 250 and the conductor 260.
  • the metal oxide preferably suppresses oxygen diffusion from the insulator 250 to the conductor 260. As a result, the oxidation of the conductor 260 by oxygen of the insulator 250 can be suppressed.
  • the metal oxide may have a function as a part of a gate insulator. Therefore, when silicon oxide, silicon oxide nitride, or the like is used for the insulator 250, it is preferable to use a metal oxide which is a high-k material having a high relative permittivity.
  • a metal oxide which is a high-k material having a high relative permittivity.
  • a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium and the like can be used. it can.
  • the conductor 260 is shown as a two-layer structure in FIG. 28, it may have a single-layer structure or a laminated structure of three or more layers.
  • Conductor 260a is described above, hydrogen atoms, hydrogen molecules, water molecules, nitrogen atom, a nitrogen molecule, nitric oxide molecule (N 2 O, NO, NO 2 , etc.), a function of suppressing diffusion of impurities such as copper atoms It is preferable to use a conductor having the same. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, oxygen atom, oxygen molecule, etc.).
  • the conductor 260a has a function of suppressing the diffusion of oxygen, it is possible to prevent the conductor 260b from being oxidized by the oxygen contained in the insulator 250 to reduce the conductivity.
  • the conductive material having a function of suppressing the diffusion of oxygen for example, tantalum, tantalum nitride, ruthenium, ruthenium oxide and the like are preferably used.
  • the conductor 260b it is preferable to use a conductive material containing tungsten, copper or aluminum as a main component. Further, since the conductor 260 also functions as wiring, it is preferable to use a conductor having high conductivity. For example, a conductive material containing tungsten, copper, or aluminum as a main component can be used. Further, the conductor 260b may have a laminated structure, for example, a laminated structure of titanium or titanium nitride and the conductive material.
  • the side surface of the metal oxide 230 is covered with the conductor 260 in the region that does not overlap with the conductor 242 of the metal oxide 230b, that is, in the channel forming region of the metal oxide 230. It is arranged like this.
  • the electric field of the conductor 260 having a function as the first gate electrode can be easily applied to the side surface of the metal oxide 230. Therefore, the on-current of the transistor 200A can be increased and the frequency characteristics can be improved.
  • the insulator 254 preferably functions as a barrier insulating film that suppresses impurities such as water and hydrogen from being mixed into the transistor 200A from the insulator 280 side.
  • the insulator 254 preferably has lower hydrogen permeability than the insulator 224.
  • the insulator 254 is the side surface of the metal oxide 230c, the upper surface and the side surface of the conductor 242a, the upper surface and the side surface of the conductor 242b, the metal oxide 230a and the metal oxide 230b. It is preferable to contact the side surface and the upper surface of the insulator 224.
  • the insulator 254 has a function of suppressing the diffusion of oxygen (for example, oxygen atom, oxygen molecule, etc.) (the oxygen is difficult to permeate).
  • the insulator 254 preferably has lower oxygen permeability than the insulator 280 or the insulator 224.
  • the insulator 254 is preferably formed by a sputtering method.
  • oxygen can be added to the vicinity of the region of the insulator 224 in contact with the insulator 254. Thereby, oxygen can be supplied from the region into the metal oxide 230 via the insulator 224.
  • the insulator 254 has a function of suppressing the diffusion of oxygen upward, it is possible to prevent oxygen from diffusing from the metal oxide 230 to the insulator 280.
  • the insulator 222 has a function of suppressing the diffusion of oxygen downward, it is possible to prevent oxygen from diffusing from the metal oxide 230 toward the substrate side. In this way, oxygen is supplied to the channel forming region of the metal oxide 230. As a result, the oxygen deficiency of the metal oxide 230 can be reduced and the normalization of the transistor can be suppressed.
  • an insulator containing oxides of one or both of aluminum and hafnium may be formed.
  • the insulator containing one or both oxides of aluminum and hafnium it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate) and the like.
  • the insulator 280 is covered by the insulator 254, and the insulator 224, the metal oxide 230, And separated from the insulator 250.
  • impurities such as hydrogen from the outside of the transistor 200A, so that the transistor 200A can be provided with good electrical characteristics and reliability.
  • the insulator 280 is provided on the insulator 224, the metal oxide 230, and the conductor 242 via the insulator 254.
  • silicon oxide, silicon oxide nitride, silicon nitride oxide, silicon oxide added with fluorine, silicon oxide added with carbon, silicon oxide added with carbon and nitrogen, silicon oxide having pores, or the like can be used as the insulator 280. It is preferable to have. In particular, silicon oxide and silicon oxide nitride are preferable because they are thermally stable. In particular, materials such as silicon oxide, silicon oxide nitride, and silicon oxide having pores are preferable because a region containing oxygen desorbed by heating can be easily formed.
  • the concentration of impurities such as water and hydrogen in the insulator 280 is reduced. Further, the upper surface of the insulator 280 may be flattened.
  • the insulator 274 preferably functions as a barrier insulating film that prevents impurities such as water and hydrogen from being mixed into the insulator 280 from above.
  • the insulator 274 for example, an insulator that can be used for the insulator 214, the insulator 254, or the like may be used.
  • the insulator 281 that functions as an interlayer film on the insulator 274.
  • the insulator 281 preferably has a reduced concentration of impurities such as water and hydrogen in the film.
  • the conductor 240a and the conductor 240b are arranged in the openings formed in the insulator 281, the insulator 274, the insulator 280, and the insulator 254.
  • the conductor 240a and the conductor 240b are provided so as to face each other with the conductor 260 interposed therebetween.
  • the height of the upper surfaces of the conductor 240a and the conductor 240b may be flush with the upper surface of the insulator 281.
  • An insulator 241a is provided in contact with the inner wall of the opening of the insulator 281, the insulator 274, the insulator 280, and the insulator 254, and the first conductor of the conductor 240a is formed in contact with the side surface thereof. ing.
  • the conductor 242a is located at least a part of the bottom of the opening, and the conductor 240a is in contact with the conductor 242a.
  • the insulator 241b is provided in contact with the inner wall of the opening of the insulator 281, the insulator 274, the insulator 280, and the insulator 254, and the first conductor of the conductor 240b is formed in contact with the side surface thereof.
  • the conductor 242b is located at least a part of the bottom of the opening, and the conductor 240b is in contact with the conductor 242b.
  • the conductor 240a and the conductor 240b it is preferable to use a conductive material containing tungsten, copper, or aluminum as a main component. Further, the conductor 240a and the conductor 240b may have a laminated structure.
  • the conductors in contact with the metal oxide 230a, the metal oxide 230b, the conductor 242, the insulator 254, the insulator 280, the insulator 274, and the insulator 281 are described above.
  • a conductor having a function of suppressing the diffusion of impurities such as water and hydrogen For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide and the like are preferably used.
  • the conductive material having a function of suppressing the diffusion of impurities such as water and hydrogen may be used in a single layer or in a laminated state.
  • the conductive material By using the conductive material, it is possible to prevent oxygen added to the insulator 280 from being absorbed by the conductor 240a and the conductor 240b. Further, it is possible to prevent impurities such as water and hydrogen from being mixed into the metal oxide 230 from the layer above the insulator 281 through the conductor 240a and the conductor 240b.
  • the insulator 241a and the insulator 241b for example, an insulator that can be used for the insulator 254 or the like may be used. Since the insulator 241a and the insulator 241b are provided in contact with the insulator 254, it is possible to prevent impurities such as water or hydrogen from the insulator 280 and the like from being mixed into the metal oxide 230 through the conductor 240a and the conductor 240b. can do. Further, it is possible to prevent oxygen contained in the insulator 280 from being absorbed by the conductor 240a and the conductor 240b.
  • a conductor that functions as wiring may be arranged in contact with the upper surface of the conductor 240a and the upper surface of the conductor 240b.
  • the conductor that functions as wiring it is preferable to use a conductive material containing tungsten, copper, or aluminum as a main component.
  • the conductor may have a laminated structure, for example, titanium or titanium nitride may be laminated with the conductive material.
  • the conductor may be formed so as to be embedded in an opening provided in the insulator.
  • ⁇ Transistor configuration example 2> 29A, 29B, and 29C are a top view and a cross-sectional view of the transistor 200B and the periphery of the transistor 200B that can be used in the display device according to one aspect of the present invention.
  • the transistor 200B is a modification of the transistor 200A.
  • FIG. 29A is a top view of the transistor 200B.
  • 29B and 29C are cross-sectional views of the transistor 200B.
  • FIG. 29B is a cross-sectional view of the portion shown by the alternate long and short dash line of B1-B2 in FIG. 29A, and is also a cross-sectional view of the transistor 200B in the channel length direction.
  • FIG. 29C is a cross-sectional view of the portion shown by the alternate long and short dash line of B3-B4 in FIG. 29A, and is also a cross-sectional view of the transistor 200B in the channel width direction.
  • some elements are omitted for the sake of clarity.
  • the conductor 242a and the conductor 242b have a region overlapping the metal oxide 230c, the insulator 250, and the conductor 260.
  • the transistor 200B can be a transistor having a high on-current.
  • the transistor 200B can be a transistor that is easy to control.
  • the conductor 260 that functions as a gate electrode has a conductor 260a and a conductor 260b on the conductor 260a.
  • the conductor 260a it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms.
  • a conductive material having a function of suppressing the diffusion of oxygen for example, oxygen atom, oxygen molecule, etc.
  • the conductor 260a Since the conductor 260a has a function of suppressing the diffusion of oxygen, the material selectivity of the conductor 260b can be improved. That is, by having the conductor 260a, it is possible to suppress the oxidation of the conductor 260b and prevent the conductivity from being lowered.
  • the insulator 254 it is preferable to provide the insulator 254 so as to cover the upper surface and the side surface of the conductor 260, the side surface of the insulator 250, and the side surface of the metal oxide 230c.
  • the insulator 254 it is preferable to use an insulating material having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen.
  • the oxidation of the conductor 260 can be suppressed. Further, by having the insulator 254, it is possible to suppress the diffusion of impurities such as water and hydrogen contained in the insulator 280 to the transistor 200B.
  • Transistor configuration example 3> 30A, 30B, and 30C are a top view and a cross-sectional view of the transistor 200C and the periphery of the transistor 200C that can be used in the display device according to one aspect of the present invention.
  • the transistor 200C is a modification of the transistor 200A.
  • FIG. 30A is a top view of the transistor 200C.
  • 30B and 30C are cross-sectional views of the transistor 200C.
  • FIG. 30B is a cross-sectional view of the portion shown by the alternate long and short dash line of C1-C2 in FIG. 30A, and is also a cross-sectional view of the transistor 200C in the channel length direction.
  • FIG. 30C is a cross-sectional view of the portion shown by the alternate long and short dash line of C3-C4 in FIG. 30A, and is also a cross-sectional view of the transistor 200C in the channel width direction.
  • some elements are omitted for the sake of clarity.
  • the transistor 200C has an insulator 250 on the metal oxide 230c and a metal oxide 252 on the insulator 250. Further, it has a conductor 260 on the metal oxide 252 and an insulator 270 on the conductor 260. Further, the insulator 271 is provided on the insulator 270.
  • the metal oxide 252 preferably has a function of suppressing oxygen diffusion.
  • the metal oxide 252 that suppresses the diffusion of oxygen between the insulator 250 and the conductor 260 the diffusion of oxygen into the conductor 260 is suppressed. That is, it is possible to suppress a decrease in the amount of oxygen supplied to the metal oxide 230.
  • the oxidation of the conductor 260 by oxygen can be suppressed.
  • the metal oxide 252 may have a function as a part of the gate electrode.
  • an oxide semiconductor that can be used as the metal oxide 230 can be used as the metal oxide 252.
  • the conductor 260 by forming the conductor 260 into a film by a sputtering method, the electric resistance value of the metal oxide 252 can be lowered to form a conductor. This can be called an OC (Oxide Conductor) electrode.
  • the metal oxide 252 may have a function as a part of the gate insulator. Therefore, when silicon oxide, silicon oxide nitride, or the like is used for the insulator 250, it is preferable to use a metal oxide which is a high-k material having a high relative permittivity as the metal oxide 252.
  • a metal oxide which is a high-k material having a high relative permittivity as the metal oxide 252.
  • EOT equivalent oxide film thickness
  • the metal oxide 252 is shown as a single layer, but a laminated structure of two or more layers may be used.
  • a metal oxide that functions as a part of the gate electrode and a metal oxide that functions as a part of the gate insulator may be laminated and provided.
  • the on-current of the transistor 200C can be improved without weakening the influence of the electric field from the conductor 260.
  • the physical thickness of the insulator 250 and the metal oxide 252 keeps the distance between the conductor 260 and the metal oxide 230, so that the conductor 260 and the metal Leakage current with the oxide 230 can be suppressed. Therefore, by providing the laminated structure of the insulator 250 and the metal oxide 252, the physical distance between the conductor 260 and the metal oxide 230 and the electric field strength applied from the conductor 260 to the metal oxide 230 can be determined. , Can be easily adjusted.
  • an oxide semiconductor having a low resistance which can be used for the metal oxide 230, can be used.
  • a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium and the like can be used.
  • hafnium oxide an oxide containing aluminum and hafnium (hafnium aluminate), which is an insulating layer containing one or both oxides of aluminum or hafnium.
  • hafnium aluminate has higher heat resistance than hafnium oxide. Therefore, it is preferable because it is difficult to crystallize in the heat treatment in the subsequent step.
  • the metal oxide 252 is not an essential configuration. It may be appropriately designed according to the desired transistor characteristics.
  • the insulator 270 it is preferable to use an insulating material having a function of suppressing the permeation of impurities such as water and hydrogen and oxygen.
  • an insulating material having a function of suppressing the permeation of impurities such as water and hydrogen and oxygen For example, it is preferable to use aluminum oxide, hafnium oxide or the like. As a result, it is possible to suppress the oxidation of the conductor 260 by oxygen from above the insulator 270. Further, it is possible to prevent impurities such as water or hydrogen from above the insulator 270 from being mixed into the metal oxide 230 via the conductor 260 and the insulator 250.
  • the insulator 271 functions as a hard mask.
  • the side surface of the conductor 260 is substantially vertical, specifically, the angle formed by the side surface of the conductor 260 and the surface of the substrate is 75 degrees or more and 100 degrees or less. It can be preferably 80 degrees or more and 95 degrees or less.
  • the insulator 271 By using an insulating material having a function of suppressing the permeation of impurities such as water and hydrogen and oxygen as the insulator 271, the insulator may also function as a barrier layer. In that case, the insulator 270 does not have to be provided.
  • the insulator 271 As a hard mask and selectively removing a part of the insulator 270, the conductor 260, the metal oxide 252, the insulator 250, and the metal oxide 230c, these aspects are substantially matched. It is possible to expose a part of the surface of the metal oxide 230b.
  • the transistor 200C has a region 243a and a region 243b on a part of the surface of the exposed metal oxide 230b.
  • One of the regions 243a or 243b functions as a source region, and the other of the regions 243a or 243b functions as a drain region.
  • the regions 243a and 243b are formed by introducing an impurity element such as phosphorus or boron into the surface of the exposed metal oxide 230b by using, for example, an ion implantation method, an ion doping method, a plasma imaging ion implantation method, or plasma treatment. It can be realized by doing.
  • the “impurity element” refers to an element other than the main component element.
  • a metal film is formed after exposing a part of the surface of the metal oxide 230b, and then heat treatment is performed to diffuse the elements contained in the metal film into the metal oxide 230b to diffuse the elements contained in the metal oxide 230b into the regions 243a and 243b. Can also be formed.
  • the region 243a and the region 243b may be referred to as an "impurity region” or a "low resistance region”.
  • the region 243a and the region 243b can be formed in a self-aligned manner. Therefore, the region 243a and / or the region 243b and the conductor 260 do not overlap, and the parasitic capacitance can be reduced. Further, an offset region is not formed between the channel forming region and the source / drain region (region 243a or region 243b). By forming the region 243a and the region 243b in a self-aligned manner, it is possible to increase the on-current, reduce the threshold voltage, improve the operating frequency, and the like.
  • the transistor 200C has an insulator 271, an insulator 270, a conductor 260, a metal oxide 252, an insulator 250, and an insulator 272 on the side surface of the metal oxide 230c.
  • the insulator 272 is preferably an insulator having a low relative permittivity.
  • silicon oxide, silicon oxide, silicon nitride oxide, and silicon oxide having pores for the insulator 272 because an excess oxygen region can be easily formed in the insulator 272 in a later step.
  • silicon oxide and silicon oxide nitride are preferable because they are thermally stable.
  • the insulator 272 preferably has a function of diffusing oxygen.
  • An offset region may be provided between the channel formation region and the source / drain region in order to further reduce the off-current.
  • the offset region is a region having a high electrical resistivity and is a region in which the above-mentioned impurity elements are not introduced.
  • the formation of the offset region can be realized by introducing the above-mentioned impurity element after the formation of the insulator 272.
  • the insulator 272 also functions as a mask in the same manner as the insulator 271 and the like. Therefore, the impurity element is not introduced into the region of the metal oxide 230b that overlaps with the insulator 272, and the electrical resistivity of the region can be kept high.
  • the transistor 200C has an insulator 272 and an insulator 254 on the metal oxide 230.
  • the insulator 254 is preferably formed by a sputtering method. By using the sputtering method, an insulator having few impurities such as water or hydrogen can be formed.
  • the oxide film using the sputtering method may extract hydrogen from the structure to be filmed. Therefore, the insulator 254 absorbs hydrogen and water from the metal oxide 230 and the insulator 272, so that the hydrogen concentration of the metal oxide 230 and the insulator 272 can be reduced.
  • Transistor constituent materials The constituent materials that can be used for the transistor will be described.
  • an insulator substrate for example, an insulator substrate, a semiconductor substrate, or a conductor substrate may be used.
  • the insulator substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (yttria-stabilized zirconia substrate, etc.), a resin substrate, and the like.
  • the semiconductor substrate include semiconductor substrates such as silicon and germanium, and compound semiconductor substrates made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, and gallium oxide.
  • the conductor substrate includes a graphite substrate, a metal substrate, an alloy substrate, a conductive resin substrate and the like.
  • the substrate having a metal nitride there are a substrate having a metal oxide, and the like.
  • a substrate in which a conductor or a semiconductor is provided in an insulator substrate a substrate in which a conductor or an insulator is provided in a semiconductor substrate, a substrate in which a semiconductor or an insulator is provided in a conductor substrate, and the like.
  • those on which an element is provided may be used.
  • Elements provided on the substrate include capacitive elements, resistance elements, switch elements, light emitting elements, storage elements, and the like.
  • Insulator examples include oxides, nitrides, oxide nitrides, nitride oxides, metal oxides, metal oxide nitrides, metal nitride oxides and the like having insulating properties.
  • the material may be selected according to the function of the insulator.
  • Examples of the insulator having a high specific dielectric constant include gallium oxide, hafnium oxide, zirconium oxide, oxides having aluminum and hafnium, nitrides having aluminum and hafnium, oxides having silicon and hafnium, silicon and hafnium. There are nitrides having oxides, or nitrides having silicon and hafnium.
  • Examples of insulators having a low relative permittivity include silicon oxide, silicon oxide, silicon nitride, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, and empty. There are silicon oxide having holes, resin, and the like.
  • the transistor using the oxide semiconductor is surrounded by an insulator (insulator 214, insulator 222, insulator 254, insulator 274, etc.) having a function of suppressing the permeation of impurities such as hydrogen and oxygen.
  • the electrical characteristics of the transistor can be stabilized.
  • the insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen include boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, and zirconium.
  • Lantern, neodymium, hafnium, or tantalum-containing insulator may be used in a single layer or in a laminated manner.
  • an insulator having a function of suppressing the permeation of impurities such as hydrogen and oxygen aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, etc.
  • a metal oxide such as tantalum oxide, or a metal nitride such as aluminum nitride, aluminum nitride titanium, titanium nitride, silicon nitride or silicon nitride can be used.
  • the insulator that functions as a gate insulator is preferably an insulator having a region containing oxygen that is desorbed by heating.
  • the oxygen deficiency of the metal oxide 230 can be compensated.
  • Conductors include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, berylium, indium, ruthenium, iridium, strontium, and lanthanum. It is preferable to use a metal element selected from the above, an alloy containing the above-mentioned metal element as a component, an alloy in which the above-mentioned metal element is combined, or the like.
  • tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, and the like are used. Is preferable.
  • tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are difficult to oxidize.
  • a plurality of conductors formed of the above materials may be laminated and used.
  • a laminated structure may be formed in which the above-mentioned material containing a metal element and a conductive material containing oxygen are combined.
  • a laminated structure may be formed in which the above-mentioned material containing a metal element and a conductive material containing nitrogen are combined.
  • a laminated structure may be formed in which the above-mentioned material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen are combined.
  • the conductor functioning as the gate electrode uses a laminated structure in which the above-mentioned material containing a metal element and a conductive material containing oxygen are combined. Is preferable.
  • a conductive material containing oxygen may be provided on the channel forming region side.
  • the conductor that functions as the gate electrode it is preferable to use a conductive material containing a metal element and oxygen contained in the metal oxide in which the channel is formed.
  • the above-mentioned conductive material containing a metal element and nitrogen may be used.
  • a conductive material containing nitrogen such as titanium nitride and tantalum nitride may be used.
  • indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and silicon were added.
  • Indium tin oxide may be used.
  • indium gallium zinc oxide containing nitrogen may be used.
  • This embodiment can be carried out in combination with at least a part thereof as appropriate with other embodiments described in the present specification.
  • FIG. 31A is a diagram illustrating classification of crystal structures of oxide semiconductors, typically IGZO (metal oxides containing In, Ga, and Zn).
  • IGZO metal oxides containing In, Ga, and Zn
  • oxide semiconductors are roughly classified into “Amorphous (amorphous)", “Crystalline”, and “Crystal”.
  • Amorphous includes “completable amorphous”.
  • Crystalline includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned composite).
  • single crystal, poly crystal, and single crystal amorphous are excluded from the classification of "Crystalline”.
  • “Crystal” includes single crystal and poly crystal.
  • the structure in the thick frame shown in FIG. 31A is an intermediate state between "Amorphous” and “Crystal", and is a structure belonging to a new boundary region (New crystal line phase). .. That is, the structure can be rephrased as a structure completely different from the energetically unstable "Amorphous” and "Crystal".
  • the crystal structure of the film or substrate can be evaluated using an X-ray diffraction (XRD: X-Ray Diffraction) spectrum.
  • XRD X-ray diffraction
  • the GIXD method is also referred to as a thin film method or a Seemann-Bohlin method.
  • the XRD spectrum obtained by the GIXD measurement shown in FIG. 31B will be simply referred to as an XRD spectrum.
  • the thickness of the CAAC-IGZO film shown in FIG. 31B is 500 nm.
  • a peak showing clear crystallinity is detected in the XRD spectrum of the CAAC-IGZO film.
  • the crystal structure of the film or substrate can be evaluated by a diffraction pattern (also referred to as a microelectron diffraction pattern) observed by a micro electron diffraction method (NBED: Nano Beam Electron Diffraction).
  • the diffraction pattern of the CAAC-IGZO film is shown in FIG. 31C.
  • FIG. 31C is a diffraction pattern observed by the NBED in which the electron beam is incident parallel to the substrate.
  • electron beam diffraction is performed with the probe diameter set to 1 nm.
  • oxide semiconductors may be classified differently from FIG. 31A.
  • oxide semiconductors are divided into single crystal oxide semiconductors and other non-single crystal oxide semiconductors.
  • the non-single crystal oxide semiconductor include the above-mentioned CAAC-OS and nc-OS.
  • the non-single crystal oxide semiconductor includes a polycrystalline oxide semiconductor, a pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like oxide semiconductor), an amorphous oxide semiconductor, and the like.
  • CAAC-OS CAAC-OS
  • nc-OS nc-OS
  • a-like OS the details of the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described.
  • CAAC-OS is an oxide semiconductor having a plurality of crystal regions, the plurality of crystal regions having the c-axis oriented in a specific direction.
  • the specific direction is the thickness direction of the CAAC-OS film, the normal direction of the surface to be formed of the CAAC-OS film, or the normal direction of the surface of the CAAC-OS film.
  • the crystal region is a region having periodicity in the atomic arrangement. When the atomic arrangement is regarded as a lattice arrangement, the crystal region is also a region in which the lattice arrangement is aligned. Further, the CAAC-OS has a region in which a plurality of crystal regions are connected in the ab plane direction, and the region may have distortion.
  • the strain refers to a region in which a plurality of crystal regions are connected in which the orientation of the lattice arrangement changes between a region in which the lattice arrangement is aligned and a region in which another grid arrangement is aligned.
  • CAAC-OS is an oxide semiconductor that is c-axis oriented and not clearly oriented in the ab plane direction.
  • Each of the plurality of crystal regions is composed of one or a plurality of minute crystals (crystals having a maximum diameter of less than 10 nm).
  • the maximum diameter of the crystal region is less than 10 nm.
  • the size of the crystal region may be about several tens of nm.
  • CAAC-OS has indium (In) and oxygen. It tends to have a layered crystal structure (also referred to as a layered structure) in which a layer (hereinafter, In layer) and a layer having elements M, zinc (Zn), and oxygen (hereinafter, (M, Zn) layer) are laminated. There is. Indium and element M can be replaced with each other. Therefore, the (M, Zn) layer may contain indium. In addition, the In layer may contain the element M. In addition, Zn may be contained in the In layer.
  • the layered structure is observed as a lattice image in, for example, a high-resolution TEM image.
  • the position of the peak indicating the c-axis orientation may vary depending on the type and composition of the metal elements constituting CAAC-OS.
  • a plurality of bright spots are observed in the electron diffraction pattern of the CAAC-OS film. Note that a certain spot and another spot are observed at point-symmetrical positions with the spot of the incident electron beam passing through the sample (also referred to as a direct spot) as the center of symmetry.
  • the lattice arrangement in the crystal region is based on a hexagonal lattice, but the unit lattice is not limited to a regular hexagon and may be a non-regular hexagon. Further, in the above strain, it may have a lattice arrangement such as a pentagon or a heptagon.
  • a clear grain boundary cannot be confirmed even in the vicinity of strain. That is, it can be seen that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is because the CAAC-OS can tolerate distortion because the arrangement of oxygen atoms is not dense in the ab plane direction and the bond distance between the atoms changes due to the substitution of metal atoms. It is thought that this is the reason.
  • CAAC-OS for which no clear crystal grain boundary is confirmed, is one of the crystalline oxides having a crystal structure suitable for the semiconductor layer of the transistor.
  • a configuration having Zn is preferable.
  • In-Zn oxide and In-Ga-Zn oxide are more suitable than In oxide because they can suppress the generation of grain boundaries.
  • CAAC-OS is an oxide semiconductor having high crystallinity and no clear grain boundary is confirmed. Therefore, it can be said that CAAC-OS is unlikely to cause a decrease in electron mobility due to grain boundaries. Further, since the crystallinity of the oxide semiconductor may be lowered due to the mixing of impurities or the generation of defects, CAAC-OS can be said to be an oxide semiconductor having few impurities and defects (oxygen deficiency, etc.). Therefore, the oxide semiconductor having CAAC-OS has stable physical properties. Therefore, the oxide semiconductor having CAAC-OS is resistant to heat and has high reliability. CAAC-OS is also stable against high temperatures in the manufacturing process (so-called thermal budget). Therefore, if CAAC-OS is used for the OS transistor, the degree of freedom in the manufacturing process can be expanded.
  • nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less).
  • nc-OS has tiny crystals. Since the size of the minute crystal is, for example, 1 nm or more and 10 nm or less, particularly 1 nm or more and 3 nm or less, the minute crystal is also referred to as a nanocrystal.
  • nc-OS does not show regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed in the entire film.
  • the nc-OS may be indistinguishable from the a-like OS and the amorphous oxide semiconductor depending on the analysis method.
  • a peak indicating crystallinity is not detected in the Out-of-plane XRD measurement using a ⁇ / 2 ⁇ scan.
  • electron beam diffraction also referred to as limited field electron diffraction
  • a diffraction pattern such as a halo pattern is performed. Is observed.
  • electron diffraction also referred to as nanobeam electron diffraction
  • an electron beam having a probe diameter for example, 1 nm or more and 30 nm or less
  • An electron diffraction pattern in which a plurality of spots are observed in a ring-shaped region centered on a direct spot may be acquired.
  • the a-like OS is an oxide semiconductor having a structure between nc-OS and an amorphous oxide semiconductor.
  • the a-like OS has a void or low density region. That is, the a-like OS has lower crystallinity than the nc-OS and CAAC-OS.
  • a-like OS has a higher hydrogen concentration in the membrane than nc-OS and CAAC-OS.
  • CAC-OS relates to the material composition.
  • CAC-OS is, for example, a composition of a material in which the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or a size close thereto.
  • the metal oxide one or more metal elements are unevenly distributed, and the region having the metal element has a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or a size close thereto.
  • the mixed state is also called a mosaic shape or a patch shape.
  • CAC-OS has a structure in which a material is separated into a first region and a second region to form a mosaic shape, and the first region is distributed in a film (hereinafter, also referred to as a cloud shape). It says.). That is, CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.
  • the atomic number ratios of In, Ga, and Zn with respect to the metal elements constituting CAC-OS in the In-Ga-Zn oxide are expressed as [In], [Ga], and [Zn], respectively.
  • the first region is a region in which [In] is larger than [In] in the composition of the CAC-OS film.
  • the second region is a region in which [Ga] is larger than [Ga] in the composition of the CAC-OS film.
  • the first region is a region in which [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region.
  • the second region is a region in which [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.
  • the first region is a region in which indium oxide, indium zinc oxide, or the like is the main component.
  • the second region is a region in which gallium oxide, gallium zinc oxide, or the like is the main component. That is, the first region can be rephrased as a region containing In as a main component. Further, the second region can be rephrased as a region containing Ga as a main component.
  • a region containing In as a main component (No. 1) by EDX mapping acquired by using energy dispersive X-ray spectroscopy (EDX: Energy Dispersive X-ray spectroscopy). It can be confirmed that the region (1 region) and the region containing Ga as a main component (second region) have a structure in which they are unevenly distributed and mixed.
  • EDX Energy Dispersive X-ray spectroscopy
  • CAC-OS When CAC-OS is used for a transistor, the conductivity caused by the first region and the insulating property caused by the second region act in a complementary manner to switch the switching function (On / Off function). Can be added to CAC-OS. That is, the CAC-OS has a conductive function in a part of the material and an insulating function in a part of the material, and has a function as a semiconductor in the whole material. By separating the conductive function and the insulating function, both functions can be maximized. Therefore, by using CAC-OS for the transistor, high on-current ( Ion ), high field effect mobility ( ⁇ ), and good switching operation can be realized.
  • Ion on-current
  • ⁇ high field effect mobility
  • Oxide semiconductors have various structures, and each has different characteristics.
  • the oxide semiconductor according to one aspect of the present invention has two or more of amorphous oxide semiconductor, polycrystalline oxide semiconductor, a-like OS, CAC-OS, nc-OS, and CAAC-OS. You may.
  • the oxide semiconductor as a transistor, a transistor having high field effect mobility can be realized. Moreover, a highly reliable transistor can be realized.
  • the carrier concentration of the oxide semiconductor is 1 ⁇ 10 17 cm -3 or less, preferably 1 ⁇ 10 15 cm -3 or less, more preferably 1 ⁇ 10 13 cm -3 or less, and more preferably 1 ⁇ 10 11 cm ⁇ . It is 3 or less, more preferably less than 1 ⁇ 10 10 cm -3 , and more than 1 ⁇ 10 -9 cm -3 .
  • the impurity concentration in the oxide semiconductor film may be lowered to lower the defect level density.
  • a low impurity concentration and a low defect level density is referred to as high-purity intrinsic or substantially high-purity intrinsic.
  • An oxide semiconductor having a low carrier concentration may be referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor.
  • the trap level density may also be low.
  • the charge captured at the trap level of the oxide semiconductor takes a long time to disappear, and may behave as if it were a fixed charge. Therefore, a transistor in which a channel forming region is formed in an oxide semiconductor having a high trap level density may have unstable electrical characteristics.
  • Impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon and the like.
  • the concentration of silicon and carbon in the oxide semiconductor and the concentration of silicon and carbon near the interface with the oxide semiconductor are set to 2. ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 17 atoms / cm 3 or less.
  • the oxide semiconductor contains an alkali metal or an alkaline earth metal
  • defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal tends to have a normally-on characteristic. Therefore, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor obtained by SIMS is set to 1 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 16 atoms / cm 3 or less.
  • the nitrogen concentration in the oxide semiconductor obtained by SIMS is less than 5 ⁇ 10 19 atoms / cm 3 , preferably 5 ⁇ 10 18 atoms / cm 3 or less, more preferably 1 ⁇ 10 18 atoms / cm 3 or less. , More preferably 5 ⁇ 10 17 atoms / cm 3 or less.
  • hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to become water, which may form an oxygen deficiency.
  • oxygen deficiency When hydrogen enters the oxygen deficiency, electrons that are carriers may be generated.
  • a part of hydrogen may be combined with oxygen that is bonded to a metal atom to generate an electron as a carrier. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have a normally-on characteristic. Therefore, it is preferable that hydrogen in the oxide semiconductor is reduced as much as possible.
  • the hydrogen concentration obtained by SIMS is less than 1 ⁇ 10 20 atoms / cm 3 , preferably less than 1 ⁇ 10 19 atoms / cm 3 , more preferably 5 ⁇ 10 18 atoms / cm. Less than 3 , more preferably less than 1 ⁇ 10 18 atoms / cm 3 .
  • This embodiment can be carried out in combination with at least a part thereof as appropriate with other embodiments described in the present specification.
  • FIG. 32A is a diagram showing the appearance of the camera 8000 with the finder 8100 attached.
  • the camera 8000 is provided with an imaging device.
  • the camera 8000 can be, for example, a digital camera.
  • the camera 8000 and the finder 8100 are separate electronic devices, and these are detachable.
  • a finder having a display device may be built in the housing 8001 of the camera 8000.
  • the camera 8000 includes a housing 8001, a display unit 8002, an operation button 8003, a shutter button 8004, and the like.
  • a removable lens 8006 is attached to the camera 8000.
  • the camera 8000 has a configuration in which the lens 8006 can be removed from the housing 8001 and replaced, but the lens 8006 and the housing may be integrated.
  • the camera 8000 can take an image by pressing the shutter button 8004. Further, the display unit 8002 has a function as a touch panel, and it is possible to take an image by touching the display unit 8002.
  • the housing 8001 of the camera 8000 has a mount having electrodes, and can be connected to a finder 8100, a strobe device, and the like.
  • the finder 8100 includes a housing 8101, a display unit 8102, a button 8103, and the like.
  • the finder 8100 can be an electronic viewfinder.
  • the housing 8101 has a mount that engages with the mount of the camera 8000, and the finder 8100 can be attached to the camera 8000. Further, the mount has electrodes, and an image or the like received from the camera 8000 can be displayed on the display unit 8102 via the electrodes.
  • Button 8103 has a function as a power button. With the button 8103, the display of the display unit 8102 can be switched on / off.
  • the display device of one aspect of the present invention can be applied to the display unit 8002 of the camera 8000 and the display unit 8102 of the finder 8100. Since the display device of one aspect of the present invention has an extremely high pixel density, even if the distance between the display unit 8002 or the display unit 8102 and the user is short, the pixels are not visually recognized by the user and are more realistic. An image with a high feeling can be displayed on the display unit 8002 or the display unit 8102. In particular, since the image displayed on the display unit 8102 provided on the finder 8100 is visually recognized by bringing the user's eyes close to the eyepiece of the finder 8100, the distance between the user and the display unit 8102. Becomes very close.
  • the display device of one aspect of the present invention it is particularly preferable to apply the display device of one aspect of the present invention to the display unit 8102.
  • the resolution of the image that can be displayed on the display unit 8102 can be 4K, 5K, or higher.
  • the resolution of the image that can be captured by the imaging device provided in the camera 8000 is equal to or higher than the resolution of the image that can be displayed on the display unit 8002 or the display unit 8102.
  • the display unit 8102 can display an image having a resolution of 4K
  • the camera 8000 is provided with an imaging device capable of capturing an image of 4K or more.
  • an imaging device capable of capturing an image of 5K or more it is preferable that the camera 8000 is provided with an imaging device capable of capturing an image of 5K or more.
  • FIG. 32B is a diagram showing the appearance of the head-mounted display 8200.
  • the head-mounted display 8200 includes a mounting unit 8201, a lens 8202, a main body 8203, a display unit 8204, a cable 8205, and the like. Further, the mounting portion 8201 has a built-in battery 8206.
  • the cable 8205 supplies power from the battery 8206 to the main body 8203.
  • the main body 8203 is provided with a wireless receiver or the like, and an image corresponding to the received image data or the like can be displayed on the display unit 8204.
  • the camera provided on the main body 8203 captures the movement of the user's eyeballs and eyelids, and the coordinates of the user's line of sight are calculated based on the information, so that the user's line of sight can be used as an input means. it can.
  • the mounting portion 8201 may be provided with a plurality of electrodes at positions where it touches the user.
  • the main body 8203 may have a function of recognizing the line of sight of the user by detecting the current flowing through the electrodes with the movement of the eyeball of the user. Further, it may have a function of monitoring the pulse of the user by detecting the current flowing through the electrode.
  • the mounting unit 8201 may have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor, and may have a function of displaying the biometric information of the user on the display unit 8204. Further, the movement of the user's head or the like may be detected, and the image displayed on the display unit 8204 may be changed according to the movement.
  • a display device can be applied to the display unit 8204.
  • the head-mounted display 8200 can be narrowed to a narrow frame, a high-quality image can be displayed on the display unit 8204, and an image with a high sense of presence can be displayed.
  • the head-mounted display 8300 includes a housing 8301, a display unit 8302, a band-shaped fixture 8304, and a pair of lenses 8305.
  • the user can visually recognize the display of the display unit 8302 through the lens 8305. It is preferable that the display unit 8302 is arranged in a curved shape. By arranging the display unit 8302 in a curved shape, the user can feel a high sense of presence.
  • the configuration in which one display unit 8302 is provided has been illustrated, but the present invention is not limited to this, and for example, a configuration in which two display units 8302 may be provided may be used. In this case, if one display unit is arranged in one eye of the user, it is possible to perform three-dimensional display or the like using parallax.
  • the display device of one aspect of the present invention can be applied to the display unit 8302. Since the display device of one aspect of the present invention has an extremely high pixel density, even if the display device is magnified using the lens 8305 as shown in FIG. 32E, the pixels are not visually recognized by the user, and an image with a higher sense of presence can be obtained. Can be displayed.
  • FIGS. 33A to 33G an example of an electronic device different from the electronic device shown in FIGS. 32A to 32E is shown in FIGS. 33A to 33G.
  • the electronic devices shown in FIGS. 33A to 33G include a housing 9000, a display unit 9001, a speaker 9003, an operation key 9005 (including a power switch or an operation switch), a connection terminal 9006, and a sensor 9007 (force, displacement, position, speed). , Acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, voice, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, smell, or infrared rays. It has a function to measure), a microphone 9008 and the like.
  • the electronic devices shown in FIGS. 33A to 33G have various functions. For example, a function to display various information (still images, moving images, text images, etc.) on the display unit, a touch panel function, a function to display a calendar, date, or time, etc., and a function to control processing by various software (programs).
  • Wireless communication function function to connect to various computer networks using wireless communication function, function to transmit or receive various data using wireless communication function, read program or data recorded on recording medium It can have a function of displaying on a display unit, and the like.
  • the functions that the electronic devices shown in FIGS. 33A to 33G can have are not limited to these, and can have various functions. Further, although not shown in FIGS.
  • the electronic device may have a configuration having a plurality of display units.
  • the electronic device is provided with a camera or the like, a function of shooting a still image, a function of shooting a moving image, a function of saving the shot image in a recording medium (external or built in the camera), and displaying the shot image on the display unit. It may have a function to perform.
  • FIGS. 33A to 33G Details of the electronic devices shown in FIGS. 33A to 33G will be described below.
  • FIG. 33A is a perspective view showing the television device 9100.
  • the television device 9100 can incorporate a large screen, for example, a display unit 9001 having a size of 50 inches or more, or 100 inches or more.
  • the display device of one aspect of the present invention can be applied to the display unit 9001 included in the television device 9100.
  • the television device 9100 can be narrowed to a narrow frame, a high-quality image can be displayed on the display unit 9001, and an image with a high sense of presence can be displayed.
  • FIG. 33B is a perspective view showing a mobile information terminal 9101.
  • the mobile information terminal 9101 has one or more functions selected from, for example, a telephone, a notebook, an information browsing device, and the like. Specifically, it can be used as a smartphone.
  • the mobile information terminal 9101 may be provided with a speaker 9003, a connection terminal 9006, a sensor 9007, and the like. Further, the mobile information terminal 9101 can display characters and images on a plurality of surfaces thereof.
  • three operation buttons 9050 also referred to as operation icons or simply icons
  • the information 9051 indicated by the broken line rectangle can be displayed on another surface of the display unit 9001.
  • information 9051 a display notifying an incoming call of e-mail, SNS (social networking service), telephone, etc., a title of e-mail, SNS, etc., a sender name of e-mail, SNS, etc., date and time, time. , Battery level, antenna reception strength, etc.
  • the operation button 9050 or the like may be displayed instead of the information 9051 at the position where the information 9051 is displayed.
  • the display device of one aspect of the present invention can be applied to the display unit 9001 included in the portable information terminal 9101.
  • the mobile information terminal 9101 can be miniaturized, a high-quality image can be displayed on the display unit 9001, and an image with a high sense of presence can be displayed.
  • FIG. 33C is a perspective view showing a mobile information terminal 9102.
  • the mobile information terminal 9102 has a function of displaying information on three or more surfaces of the display unit 9001.
  • information 9052, information 9053, and information 9054 are displayed on different surfaces.
  • the user of the mobile information terminal 9102 can check the display (here, information 9053) with the mobile information terminal 9102 stored in the chest pocket of the clothes.
  • the telephone number or name of the caller of the incoming call is displayed at a position that can be observed from above the mobile information terminal 9102.
  • the user can check the display and determine whether or not to receive the call without taking out the mobile information terminal 9102 from the pocket.
  • the display device of one aspect of the present invention can be applied to the display unit 9001 included in the portable information terminal 9102.
  • the mobile information terminal 9102 can be miniaturized, a high-quality image can be displayed on the display unit 9001, and an image with a high sense of presence can be displayed.
  • FIG. 33D is a perspective view showing a wristwatch-type portable information terminal 9200.
  • the personal digital assistant 9200 can execute various applications such as mobile phone, e-mail, text viewing and creation, music playback, Internet communication, and computer games.
  • the display unit 9001 is provided with a curved display surface, and can display along the curved display surface.
  • the personal digital assistant 9200 can execute short-range wireless communication standardized for communication. For example, by communicating with a headset capable of wireless communication, it is possible to make a hands-free call.
  • the mobile information terminal 9200 has a connection terminal 9006, and can directly exchange data with another information terminal via a connector. It is also possible to charge via the connection terminal 9006. The charging operation may be performed by wireless power supply without going through the connection terminal 9006.
  • the display device of one aspect of the present invention can be applied to the display unit 9001 included in the portable information terminal 9200.
  • the mobile information terminal 9200 can be narrowed to a narrow frame, a high-quality image can be displayed on the display unit 9001, and an image with a high sense of presence can be displayed.
  • FIG. 33E to 33G are perspective views showing a foldable mobile information terminal 9201. Further, FIG. 33E is a perspective view of the mobile information terminal 9201 in an unfolded state, and FIG. 33F is a perspective view of a state in which the mobile information terminal 9201 is in the process of being changed from one of the expanded or folded states to the other. FIG. 33G is a perspective view of the mobile information terminal 9201 in a folded state.
  • the mobile information terminal 9201 is excellent in portability in the folded state, and is excellent in display listability due to a wide seamless display area in the unfolded state.
  • the display unit 9001 included in the mobile information terminal 9201 is supported by three housings 9000 connected by a hinge 9055.
  • the mobile information terminal 9201 can be reversibly deformed from the unfolded state to the folded state.
  • the personal digital assistant 9201 can be bent with a radius of curvature of 1 mm or more and 150 mm or less.
  • the display device of one aspect of the present invention can be applied to the display unit 9001 included in the portable information terminal 9201.
  • the mobile information terminal 9201 can be narrowed to a narrow frame, a high-quality image can be displayed on the display unit 9001, and an image with a high sense of presence can be displayed.
  • This embodiment can be carried out in combination with at least a part thereof as appropriate with other embodiments described in the present specification.

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PCT/IB2020/053958 2019-05-10 2020-04-28 表示装置 Ceased WO2020229917A1 (ja)

Priority Applications (8)

Application Number Priority Date Filing Date Title
KR1020217038378A KR20220006547A (ko) 2019-05-10 2020-04-28 표시 장치
CN202080033476.9A CN113785346A (zh) 2019-05-10 2020-04-28 显示装置
JP2021519023A JPWO2020229917A1 (https=) 2019-05-10 2020-04-28
DE112020002322.2T DE112020002322T5 (de) 2019-05-10 2020-04-28 Anzeigevorrichtung
US17/609,497 US11626052B2 (en) 2019-05-10 2020-04-28 Display device
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