WO2019149148A1 - 印制电路板、印制电路板的制作方法及移动终端 - Google Patents

印制电路板、印制电路板的制作方法及移动终端 Download PDF

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Publication number
WO2019149148A1
WO2019149148A1 PCT/CN2019/073168 CN2019073168W WO2019149148A1 WO 2019149148 A1 WO2019149148 A1 WO 2019149148A1 CN 2019073168 W CN2019073168 W CN 2019073168W WO 2019149148 A1 WO2019149148 A1 WO 2019149148A1
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WO
WIPO (PCT)
Prior art keywords
conductive
pcb
conductive layer
recess
printed circuit
Prior art date
Application number
PCT/CN2019/073168
Other languages
English (en)
French (fr)
Inventor
唐后勋
Original Assignee
维沃移动通信有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 维沃移动通信有限公司 filed Critical 维沃移动通信有限公司
Priority to AU2019215528A priority Critical patent/AU2019215528B2/en
Priority to BR112020015576-4A priority patent/BR112020015576A2/pt
Priority to JP2020540770A priority patent/JP2021511675A/ja
Priority to US16/963,433 priority patent/US11490520B2/en
Priority to KR1020207022390A priority patent/KR102488402B1/ko
Priority to EP19748194.8A priority patent/EP3749070A4/en
Publication of WO2019149148A1 publication Critical patent/WO2019149148A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3485—Applying solder paste, slurry or powder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3494—Heating methods for reflowing of solder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09509—Blind vias, i.e. vias having one side closed
    • H05K2201/09518—Deep blind vias, i.e. blind vias connecting the surface circuit to circuit layers deeper than the first buried circuit layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1453—Applying the circuit pattern before another process, e.g. before filling of vias with conductive paste, before making printed resistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present disclosure relates to the field of electronic product technologies, and in particular, to a printed circuit board, a method of manufacturing a printed circuit board, and a mobile terminal.
  • Thinning is the current development direction of mobile terminals.
  • power management modules are increasingly used in mobile terminal development.
  • a charging circuit a power supply network of a main chip, a driving circuit of a display screen, and the like.
  • Most of these power management modules use a switching power supply implementation. In switching power supplies, the size of the devices required is large, such as power inductors.
  • the shield is usually made of a metal material (such as copper, stainless steel), so there is a need to leave a certain safety gap inside the shield to prevent short circuit between the high device's pin and the shield body.
  • the mobile terminal in the related art has a problem that the internal structure setting affects the thickness, the failure is easily caused in the static pressure scene, and the additional added via holes bring impedance and loss.
  • the embodiments of the present disclosure provide a printed circuit board, a manufacturing method of the printed circuit board, and a mobile terminal, so as to solve the related art, the internal structure of the mobile terminal has an influence on the thickness, the static pressure scene is easy to cause failure, and the additional via hole is added. The problem of impedance and loss.
  • an embodiment of the present disclosure provides a printed circuit board, including:
  • a PCB board body a recess is disposed on the first surface of the PCB board body
  • the PCB device comprising a connection terminal, a part of the PCB device being located in the recess, the connection terminal comprising a first portion located in the recess and a second portion located outside the recess, and the first portion is electrically connected to the conductive layer in the PCB body connection.
  • an embodiment of the present disclosure provides a method for fabricating a printed circuit board, including:
  • connection terminal of the PCB device includes a first portion located in the recess and a second portion located outside the recess, and the first portion and the PCB
  • the conductive layers in the body are electrically connected.
  • an embodiment of the present disclosure provides a mobile terminal, including the above printed circuit board.
  • a recess is disposed on a first surface of the PCB body, and a portion of the PCB device is located inside the recess, and the connection terminal included in the PCB device includes a first portion located in the recess and the recess The second part is externally connected to the conductive layer in the PCB body.
  • the electrical connection of at least two conductive layers can reduce the arrangement of via holes between the conductive layers, thereby reducing the impedance and loss due to the via holes.
  • FIG. 1 is a schematic view showing a groove on a PCB board body according to an embodiment of the present disclosure
  • FIG. 2 shows a schematic view 1 of a printed circuit board according to an embodiment of the present disclosure
  • FIG. 3 is a schematic view showing the second recess of the PCB board body according to the embodiment of the present disclosure.
  • FIG. 4 shows a schematic diagram 2 of a printed circuit board according to an embodiment of the present disclosure
  • FIG. 5 is a flow chart showing a method of fabricating a printed circuit board according to an embodiment of the present disclosure
  • FIG. 6 is a schematic view of a PCB board body according to an embodiment of the present disclosure.
  • the embodiment of the present disclosure provides a printed circuit board, as shown in FIG. 1 , FIG. 2 , FIG. 3 and FIG. 4 , including:
  • a PCB board body 1 a first surface of the PCB board body 1 is provided with a recess 11; a PCB device 2, the PCB device 2 includes a connection terminal 21, a part of the PCB device 2 is located in the recess 11, and the connection terminal 21 is disposed in the recess
  • the first portion 211 in the 11 and the second portion 212 outside the recess 11 are electrically connected to the conductive layer 12 in the PCB body 1.
  • the printed circuit board provided by the embodiment of the present disclosure includes a PCB board body 1 having a surface providing recess 11 and a PCB device 2 partially located inside the recess 11, wherein the PCB device 2 includes a device body 22 and a connection terminal 21, and the connection terminal 21
  • a first portion 211 which is located within the recess 11 and electrically connected to the conductive layer 12 within the PCB body 1, further includes a second portion 212 located outside of the recess 11.
  • the height of the surface of the PCB device 2 protruding from the PCB board body 1 can be reduced, thereby reducing the height of the assembled structure formed by the PCB board body 1 and the electronic device after assembly, and can also be at the same height.
  • the safety gap between the device body 22 and the shield body is increased, and the ability of the assembly structure to resist external static pressure is improved, thereby improving the reliability of the mobile terminal.
  • the PCB board body 1 includes a plurality of conductive layers 12, a dielectric layer 13 is disposed between adjacent conductive layers 12, and a layer structure adjacent to the first surface of the PCB board body 1 is a first conductive layer.
  • the layer structure adjacent to the second surface of the PCB board body 1 is a second conductive layer, and the first surface is opposite to the second surface.
  • the PCB board body 1 includes a conductive layer 12 and a dielectric layer 13 disposed in parallel.
  • the conductive layer 12 and the dielectric layer 13 are sequentially arranged.
  • a dielectric layer 13 is disposed between adjacent conductive layers 12, and a conductive layer is disposed between adjacent dielectric layers 13. 12, and the top layer and the bottom layer of the PCB board body 1 are both conductive layers 12.
  • the top layer of the PCB board body 1 is a layer structure close to the first surface, and the bottom layer of the PCB board body 1 is a layer structure close to the second surface.
  • the dielectric layer 13 is made of a non-conductive material. Generally, a material having a flame resistant material grade code of FR-4 may be used, and the conductive layer 12 may be a copper foil.
  • the second portion 212 of the connecting terminal 21 is connected to the first conductive layer through the conductive member 3.
  • the conductive member 3 used in the embodiment of the present disclosure may be a soldering agent, and the connecting terminal 21 located outside the recess 11 is realized by a soldering agent.
  • the second portion 212 is adhered to the first conductive layer, and then the second portion 212 of the connection terminal 21 is connected to the first conductive layer by soldering, wherein the solder may be a solder paste.
  • the sidewall of the recess 11 is composed of at least one conductive layer 12 and at least one dielectric layer 13, and the bottom surface of the recess 11 is composed of a conductive layer 12. And the middle portion of the bottom surface is a dielectric portion, and the two ends form a conductive portion.
  • the recess 11 formed on the first surface of the PCB board body 1 causes at least one conductive layer 12 in the PCB board body 1 to form a fracture with at least one dielectric layer 13.
  • the first portion 211 of the connection terminal 21 located inside the recess 11 is connected to the conductive layer 12 at the break, and is also in contact with the dielectric layer 13 at the break.
  • the middle portion of the bottom surface of the groove 11 formed on the first surface of the PCB board body 1 is a dielectric portion, and both ends of the bottom surface of the groove 11 are conductive portions, so that the bottom end and the groove of the first portion 211 of the connection terminal 21 can be made. 11
  • the conductive portion of the bottom surface is in contact.
  • the conductive medium of the portion of the bottom surface of the conductive layer 12 overlapping the fracture position of the recess 11 is removed during the process of fabricating the PCB body 1, and the rejected portion is filled with the medium, wherein the rejected portion is The central portion where the fracture positions overlap, and thus the structure in which the middle portion of the bottom surface of the groove 11 is the medium portion and the conductive portions are formed at both ends can be formed.
  • the sidewall of the recess 11 may be composed of a conductive layer 12 and a cross section of the dielectric layer 13, and may also be composed of two conductive layers 12 and two dielectric layers 13, or other numbers of conductive layers 12 and corresponding
  • the cross section of the dielectric layer 13 is composed.
  • the bottom surface of the groove 11 is a structural form in which both ends are conductive portions and the middle portion is a dielectric portion.
  • the area of the conductive portion formed at both ends needs to be greater than or equal to the area of the bottom end of the first portion 211 of the connection terminal 21.
  • the embodiment of the present disclosure provides a structure in which the first portion 211 of the connection terminal 21 is connected to the cross section of the first conductive layer and is connected to the conductive portion of the bottom surface of the recess 11.
  • the sidewall of the recess 11 is composed of a conductive layer 12 and a cross section of a dielectric layer 13, that is, a fracture is formed on the first conductive layer and the first dielectric layer, and the first dielectric layer is adjacent to the first conductive layer.
  • the fourth conductive layer adjacent to the first dielectric layer forms a bottom surface of the recess 11 , and the central portion of the fourth conductive layer overlapping the fracture position is a dielectric portion, and both ends are conductive portions.
  • the first conductive layer in the PCB board body 1 forms a fracture with the corresponding first dielectric layer, and the fourth conductive layer adjacent to the first conductive layer and sequentially arranged with the first dielectric layer forms the bottom surface of the recess 11.
  • the conductive medium of the partial region where the fourth conductive layer overlaps with the fracture position is rejected during the process of fabricating the PCB body 1, and the rejected portion is filled with the medium.
  • the conductive medium of the central region in which the fourth conductive layer overlaps with the fracture position is rejected, and the conductive medium at the opposite ends of the fourth conductive layer and the fracture position is retained, thereby forming a central region in which the fourth conductive layer overlaps with the fracture position.
  • the two ends are conductive parts.
  • the conductive portions at both ends of the fourth conductive layer and the fracture position overlap with the first conductive layer, so that the fourth conductive layer overlaps with the fracture position.
  • the conductive portion of the end forms a connection region, and the connection terminal 21 can be supported by the connection region.
  • the side wall of the first portion 211 of the connection terminal 21 is electrically connected to the section of the first conductive layer. Since the size of the top end position and the bottom end position of the connection terminal 21 is smaller than the size of the intermediate position, the side wall of the first portion 211 of the connection terminal 21 can be It is in contact with or not in contact with the cross-sectional portion of the first dielectric layer.
  • the bottom end of the first portion 211 of the connection terminal 21 is connected to the fourth conductive layer. Specifically, the bottom end of the first portion 211 is connected to the connection region. It should be noted that by forming the dielectric portion on the fourth conductive layer, the occurrence of a short circuit can be avoided.
  • the first portion 211 of the connection terminal 21 is connected to the conductive portion of the bottom surface of the recess 11 through the conductive member 3.
  • a conductive portion is formed at both ends of the bottom surface of the recess 11.
  • the conductive member 3 is a solder
  • the bottom end of the first portion 211 of the connection terminal 21 located in the recess 11 is adhered to the conductive portion at the bottom surface of the recess 11 by a solder, and then the connection terminal 21 is realized by soldering.
  • the bottom end of the first portion 211 is connected to the conductive portion at the bottom surface of the recess 11,
  • the solder may be a solder paste.
  • connection terminals 21 located in the recess 11 are electrically connected to the at least two conductive layers 12 in the PCB body 1, and it is not necessary to additionally provide a via hole between the two conductive layers 12 to reduce Impedance and loss due to vias.
  • the PCB board body 1 includes a conductive structure 14 disposed on the conductive structure 14; the conductive structure 14 includes: a portion of the first conductive layer and a conductive medium filled between a portion of the first conductive layer and a portion of the third conductive layer, the third conductive layer being adjacent to or spaced apart from the first conductive layer by a predetermined number of conductive layers; and a portion of the third conductive layer forming a bottom surface of the recess 11
  • the middle portion of the bottom surface is a dielectric portion, and the two ends form a conductive portion, and the cross section of the conductive structure 14 forms a sidewall of the recess 11.
  • a conductive structure 14 inside the PCB board body 1 Forming a conductive structure 14 inside the PCB board body 1, wherein the conductive structure 14 includes a portion of the first conductive layer and a conductive medium filled between the portion of the first conductive layer and a portion of the third conductive layer, where the third conductive layer can A conductive layer adjacent to the first conductive layer may also be spaced apart from the first conductive layer by a predetermined number of conductive layers.
  • part of the first conductive layer is a first region intercepted in the first conductive layer, and a corresponding portion of the third conductive layer is a first region intercepted in the third conductive layer, and after the interception is completed, the first region is located The portion between them is filled with a conductive medium, at which point the conductive structure 14 can be formed.
  • a recess 11 can then be formed in the conductive structure 14, wherein the sidewall of the recess 11 formed is a cross section of the conductive structure 14, and the bottom surface of the recess 11 formed is a portion of the third conductive layer.
  • the bottom surface of the recess 11 has a structure in which the middle portion is a dielectric portion and both ends are conductive portions.
  • a blind hole is disposed between the first conductive layer and the third conductive layer of the PCB body 1, wherein the diameter of the blind hole needs to be larger than the length of the opened groove 11.
  • the conductive medium is plated in the blind hole such that a portion of the first conductive layer and a portion of the third conductive layer are filled with a conductive medium.
  • a portion of the first conductive layer overlapping the blind hole position and a conductive medium in the blind hole form the conductive structure 14.
  • the recess 11 is disposed in the middle of the conductive structure 14.
  • the conductive medium of the partial region where the third conductive layer overlaps the recess 11 is removed, and the rejected area is removed.
  • the length of the region formed by stripping the conductive medium is smaller than the length of the recess 11, so that the bottom surface of the recess 11 has a structure in which the middle portion is a dielectric portion and both ends are conductive portions.
  • the first portion 211 of the connection terminal 21 is connected to the sidewall of the recess 11 through the conductive member 3 while being electrically connected to the conductive portion of the bottom surface of the recess 11 through the conductive member 3.
  • the first portion 211 of the connecting terminal 21 disposed in the recess 11 is respectively connected to the sidewall of the recess 11 and the bottom surface of the recess 11, wherein the side of the first portion 211 is connected to the sidewall of the recess 11 through the conductive member 3,
  • the bottom end of the portion 211 is connected to the conductive portion of the bottom surface of the recess 11 by the conductive member 3.
  • the conductive member 3 is a solder
  • the bottom end of the first portion 211 of the connection terminal 21 located in the recess 11 can be adhered to the conductive portion at the bottom surface of the recess 11 by a solder, and then the connection terminal 21 is realized by soldering.
  • the bottom end of the first portion 211 is connected to the conductive portion at the bottom surface of the recess 11, wherein the solder may be a solder paste.
  • the above structural form of the embodiment of the present disclosure can further reduce the overcurrent capability of the adjacent layer and improve the welding while reducing the height of the surface of the PCB protruding body of the device and reducing the impedance and loss caused by the via hole.
  • the bonding area between the agent and the connecting terminal ensures the firmness of the connection.
  • the PCB device 2 includes two connecting terminals 21 disposed opposite to each other, and the two connecting terminals 21 each include a first portion 211 located in the recess 11 and two connecting terminals.
  • the first portion 211 of the 21 is electrically connected to the conductive layer 12 in the PCB body 1, and the conductive layer 12 connected to the two first portions 211 is disposed separately.
  • the PCB device 2 includes a device body 22 and two opposite connection terminals 21, wherein the connection terminals 21 are located on both sides of the device body 22, and the two connection terminals 21 have the same structure, and are formed in a structure partially disposed inside the groove 11. And the first portion 211 of the connection terminal 21 is located inside the recess 11, and the second portion 212 of the connection terminal 21 is located outside the recess 11.
  • the specific structure is: the two connection terminals 21 are the first with the PCB board body 1
  • the conductive layer is connected to the fourth conductive layer
  • the first conductive layer is a top layer of the PCB board body 1
  • the fourth conductive layer is spaced apart from the first conductive layer by a first dielectric layer
  • a portion of the fourth conductive layer is formed as a recess 11
  • both ends of the bottom surface of the groove 11 are conductive portions
  • the middle portion is a dielectric portion.
  • the first portion 211 of the two connection terminals 21 located in the recess 11 is connected to the cross section of the first conductive layer and the conductive portion of the fourth conductive layer.
  • the first conductive layer has two sections and is disposed separately; the fourth conductive layer has two conductive portions, and the two conductive portions are also disposed separately.
  • the sidewall of the first portion 211 of the connection terminal 21 located in the recess 11 is connected to the cross section of the first conductive layer, and the bottom end of the first portion 211 of the connection terminal 21 located in the recess 11 is connected to the conductive portion of the fourth conductive layer.
  • the bottom end of the first portion 211 of the connecting terminal 21 is adhered to the bottom of the recess 11 through the conductive member 3, and the second portion 212 of the connecting terminal 21 is adhered to the first conductive layer of the PCB board body 1 through the conductive member 3, and the conductive member 3 That is, the soldering agent is fixedly connected by a soldering process after the bonding is achieved by the soldering agent, and the soldering agent here may be a solder paste.
  • the inside of the PCB body 1 includes a conductive structure 14 , and the groove 11 is disposed on the conductive structure 14 .
  • the first portion 211 of the connection terminal 21 and the sidewall of the groove 11 are connected by the conductive member 3 while being opposite to the bottom surface of the groove 11 .
  • the side walls of the first portion 211 of the two connection terminals 21 are both connected to the side walls of the recess 11, and the bottom ends of the first portions 211 of the two connection terminals 21 are connected to the bottom of the recess 11.
  • the bottom end of the connecting terminal 21 is adhered to the conductive portion of the bottom surface of the recess 11 through the conductive member 3, and the sidewall of the first portion 211 of the connecting terminal 21 is adhered to the inner wall of the recess 11 through the conductive member 3, and the second portion of the connecting terminal 21 is connected. 212 is adhered to the first conductive layer of the PCB board body 1 through the conductive member 3.
  • the conductive member 3 is a soldering agent. After the bonding is achieved by the soldering agent, a fixed connection is achieved by a soldering process, and the soldering agent here may be a solder paste.
  • an OSP Organic Solderability Preservatives
  • the OSP can be removed by solder during the soldering process to ensure the implementation of the soldering process.
  • the ink on the first conductive layer on the top of the top of the PCB board body 1 and the second conductive layer on the bottom it is required to cover the ink on the first conductive layer on the top of the top of the PCB board body 1 and the second conductive layer on the bottom.
  • the position where the first conductive layer is connected to the connection terminal 21 can remove the ink.
  • the printed circuit board provided by the embodiment of the present disclosure has a recess disposed on the first surface of the PCB body, a portion of the PCB device is located inside the recess, and the connecting terminal included in the PCB device includes the first portion located in the recess And a second portion located outside the recess, and the first portion is electrically connected to the conductive layer in the PCB body.
  • the above structure can reduce the height of the surface of the device protruding from the PCB board, thereby reducing the formation of the printed circuit board and the electronic device after assembly.
  • the height of the assembled structure can also increase the safety gap between the device body and the shield body under the premise of the same height, and improve the ability of the assembled structure to resist external static pressure, thereby improving the reliability of the mobile terminal, and the PCB device and the PCB.
  • the electrical connection of at least two conductive layers in the board body can reduce the arrangement of the via holes between the conductive layers, thereby reducing the impedance and loss due to the via holes. Further, it is also possible to increase the overcurrent capability between the adjacent layers while increasing the bonding area of the soldering agent and the connection terminal, and ensuring the firmness of the connection.
  • Embodiments of the present disclosure also provide a mobile terminal including the above printed circuit board.
  • the embodiment of the present disclosure further provides a method for manufacturing a printed circuit board, as shown in FIG. 5, including:
  • Step 501 Making a groove on the PCB body.
  • the inside of the PCB board body includes a conductive layer and a dielectric layer disposed in parallel, the conductive layer and the dielectric layer are sequentially arranged, a dielectric layer is disposed between adjacent conductive layers, a conductive layer is disposed between the adjacent dielectric layers, and the PCB board body is Both the top layer and the bottom layer are conductive layers.
  • the dielectric layer is made of non-conductive material, usually made of FR-4 material, and the conductive layer can be copper foil. Since the groove formed on the PCB body needs to accommodate part of the PCB device, in order to ensure the effectiveness of the PCB device, it is necessary to realize the connection between the PCB device and the conductive layer in the PCB body.
  • the step of making a groove on the PCB body includes: forming a groove on the first surface of the PCB body of the completed line and the drilled hole by using a laser.
  • a groove on the PCB body including the plurality of conductive layers, forming a cross section of at least one conductive layer and at least one dielectric layer in the body of the PCB to form an inner wall of the groove, and forming a conductive layer to form a bottom surface of the groove, wherein The middle portion of the bottom surface is a dielectric portion, and both ends form a conductive portion.
  • a fracture is provided on at least one conductive layer and at least one dielectric layer of the PCB board body, and after forming the fracture, the inner wall of the groove may be formed by using the section at the fracture. Since the recess needs to accommodate part of the PCB device, in order to ensure the connection efficiency of the PCB device, it is necessary to make one of the conductive layers in the body of the PCB form the bottom surface of the groove. At this time, at least two conductive layers and two conductive layers are required. A dielectric layer is formed to form a groove.
  • a fracture may be formed on the first conductive layer and the first dielectric layer of the PCB body, and the fourth conductive layer of the PCB body is used as the bottom surface of the groove, and the first conductive layer and the first dielectric layer are cut at the fracture An inner wall of the groove is formed, and a portion of the fourth conductive layer forms a bottom surface of the groove.
  • the first conductive layer in the embodiment of the present disclosure is a top layer of the PCB board body
  • the second conductive layer is a bottom layer of the PCB board body
  • the first dielectric layer is adjacent to the first conductive layer
  • the fourth conductive layer and the first dielectric layer Adjacent is
  • the conductive medium of the partial region where the fourth conductive layer overlaps the fracture position at this time is rejected during the process of fabricating the PCB body, and the rejected portion is filled with the medium.
  • the length of the portion from which the conductive medium is removed is smaller than the length of the fracture, and the overlapped portion of the portion of the conductive medium with the fracture is in the middle of the fracture, so that both ends of the bottom surface of the groove formed by the fourth conductive layer are still conductive medium.
  • the bottom surface of the formed groove and the first conductive layer have non-overlapping regions, wherein the non-overlapping region is a conductive portion, which can support the connection terminal and the connection terminal Electrical connection.
  • the PCB device includes a device body and two connection terminals disposed at opposite ends of the device body.
  • the above process can form a medium region in the middle of the bottom surface of the groove, thereby avoiding the occurrence of a short circuit condition.
  • the corresponding manufacturing process is as follows: a conductive layer and a dielectric layer are used as a reference, and the two ends are arranged in accordance with the principle that the conductive layer and the dielectric layer are sequentially arranged to form a PCB board body, and the formed body is formed.
  • the top and bottom layers of the PCB body are both conductive layers.
  • the fourth conductive layer is formed, a part of the conductive medium on the fourth conductive layer is removed and filled with the medium to form the first conductive And removing a portion of the conductive medium on the first conductive layer, and the culled portion has a overlapping region with the culled portion of the fourth conductive layer, the culling region of the first conductive layer is larger than the fourth conductive layer, and the fourth conductive layer is The culling region is located in the middle of the culling region of the first conductive layer.
  • the specific structure is as shown in FIG. 6, wherein the area indicated by reference numeral 131 is a medium area, and the area indicated by reference numeral 121 is a conductive area. The above structure can facilitate the fabrication of subsequent grooves and avoid short circuit faults.
  • the circuit and the hole are required to be fabricated on the PCB according to the conventional PCB board manufacturing method.
  • the area indicated by the reference numeral 15 is the line on the PCB board, and the area indicated by the reference numeral 16 is on the PCB board.
  • the resulting drill hole is formed.
  • a groove may then be provided on the body of the PCB, wherein the state in which the groove is formed on the body of the PCB is as shown in FIG. 1, and the area indicated by reference numeral 11 is a groove.
  • the process of making the groove also includes:
  • a blind via on the PCB board body including the plurality of conductive layers, the blind vias connecting the first conductive layer and the third conductive layer, wherein the first conductive layer is a conductive layer adjacent to the first surface of the PCB board body, and the third conductive layer Adjacent or spaced apart from the first conductive layer by a predetermined number of conductive layers; filling the conductive medium with the conductive medium such that the predetermined area of the first conductive layer forms an integral conductive structure with the conductive medium in the blind hole, the preset area A region corresponding to the blind hole on the first conductive layer; a groove is disposed on the conductive structure.
  • the conductive structure disposed inside the PCB body is formed by a predetermined area of the first conductive layer and a conductive medium in the blind hole, and a groove is formed in the conductive structure, and a connection terminal of the PCB device is located in the groove.
  • the inner wall of the recess is electrically connected while being connected to a portion of the bottom surface of the recess.
  • the inner wall of the groove is a conductive medium, and the third conductive layer may be adjacent to the first conductive layer or may be spaced apart from the first conductive layer by a predetermined number of conductive layers.
  • a blind hole is disposed between the first conductive layer and the third conductive layer of the PCB body formed by the circuit and the hole, wherein the diameter of the blind hole is larger than the length of the groove to be opened, and the diameter of the blind hole is equal to the preset The length of the area.
  • the conductive medium is plated in the blind via such that a conductive medium is filled between the predetermined region of the first conductive layer and a portion of the third conductive layer.
  • the predetermined area of the first conductive layer overlapping the blind hole position forms an integral conductive structure with the conductive medium in the blind hole.
  • a groove is then provided on the conductive structure.
  • the recess is disposed in the middle of the conductive structure.
  • the conductive medium in the middle portion of the third conductive layer and the recess is removed, and the rejected region is filled with the medium.
  • the two ends of the third conductive layer overlapping the groove are conductive media, and the connecting terminals are supported by the conductive medium at both ends of the third conductive layer and the groove.
  • a state in which a groove is formed in the conductive portion is as shown in FIG. 3, and a region indicated by reference numeral 11 is a groove.
  • Such a structure can reduce the height of the surface of the PCB board body and reduce the impedance and loss caused by the via hole, and can further increase the overcurrent capability between the adjacent layers while improving the soldering agent and the connection terminal.
  • the joint area ensures the firmness of the connection.
  • Step 502 The PCB device is disposed in the recess such that a portion of the PCB device is located inside the recess, wherein the connection terminal of the PCB device includes a first portion located in the recess and a second portion located outside the recess, and the first portion It is electrically connected to the conductive layer in the body of the PCB.
  • the process of disposing the PCB device in the recess is: placing the PCB device in the recess by the mounter; and passing the second portion of the connection terminal of the PCB device through the conductive member and the first conductive portion adjacent to the first surface of the PCB board body Layer connection; the PCB board body and the PCB device are passed through a reflow oven to form a PCB device and a PCB board body to form a solder.
  • the second portion of the connection terminal outside the groove can be connected to the first conductive layer adjacent to the first surface of the PCB board body through the conductive member, and the PCB device and the PCB board body are welded, and the conductive member is For soldering agents.
  • a printed circuit board manufacturing method provided by an embodiment of the present disclosure provides a recess on a first surface of a PCB board body such that a portion of the PCB device is located inside the recess, and the first portion of the connection terminal of the PCB device is located in the recess and Electrically connecting with the conductive layer in the PCB board body, the second portion of the connection terminal of the PCB device is located outside the recess and is connected with the conductive layer on the surface of the PCB board body, which can reduce the height of the surface of the PCB board body protruding from the device, thereby reducing printing
  • the height of the assembled structure formed by the assembly of the circuit board and the electronic device can also increase the safety gap between the device body and the shield body under the premise of the same height, thereby improving the ability of the assembled structure to resist external static pressure, thereby improving the movement.
  • the reliability of the terminal, and the electrical connection between the PCB device and at least two conductive layers in the PCB body can reduce the arrangement of the via holes between the conductive layers, thereby reducing the impedance and loss caused by the via holes. Further, different groove arrangement manners can also increase the overcurrent capability between the adjacent layers while increasing the bonding area of the soldering agent and the connection terminal, thereby ensuring the firmness of the connection.
  • Embodiments of the present disclosure provide a method for fabricating a printed circuit board and a printed circuit board, which is not limited to a high-device application scenario, and may be diverged to reduce the height, or increase the overcurrent capability of the adjacent layer in the region where the device is located, and the device soldering strength.
  • An application scenario that ensures its maintainability.

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Abstract

本公开提供了一种印制电路板、印制电路板的制作方法及移动终端，印制电路板包括PCB板本体，PCB板本体的第一表面上设置有一凹槽；PCB器件，PCB器件包括连接端子，PCB器件的一部分位于凹槽内，连接端子包括位于凹槽内的第一部分和位于凹槽外的第二部分，且第一部分与PCB板本体内的导电层电连接。

Description

印制电路板、印制电路板的制作方法及移动终端
相关申请的交叉引用
本申请主张在2018年1月30日在中国提交的中国专利申请号No.201810089210.0的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及电子产品技术领域，尤其涉及一种印制电路板、印制电路板的制作方法及移动终端。
背景技术
轻薄化是移动终端目前的发展方向。但是随着移动终端实现功能的多样化以及对设备性能要求的不断提高，在移动终端开发中会越来越多的使用电源管理模块。例如充电电路，主芯片的供电网络，显示屏的驱动电路等等。在这些电源管理模块中，大部分都采用了开关电源的实现方式。在开关电源中，所需要使用的器件的尺寸都较大，比如功率电感。
同时由于开关电源存在开关噪声的问题，功率电感也存在磁辐射的问题。这些都会对周围的其他电路功能模块造成干扰影响，因此需要将开关电源和功率电感放置于屏蔽罩内部。屏蔽罩通常由金属材料(如洋白铜、不锈钢)制成，因此需要在屏蔽罩内部留有一定的安全间隙来防止高器件的管脚与屏蔽罩本体接触发生短路。
上述情况导致了特定区域的高度突出于印制电路板(Printed Circuit Board，PCB)上其他区域的高度，并且通常会成为高度瓶颈，进而影响整个移动终端的厚度。同时由于高器件的位置通常会与对面的大尺寸芯片重叠，并且周围没有支撑，在静压力场景时会对器件本体以及对应的芯片焊点造成损害从而导致移动终端失效。
此外，由于此类模块中与大器件相连的部分均有大电流的过流要求，因此需要在相邻层线路之间增加大量的过孔来保证过流能力与减小阻抗值，但增加过孔又会带来额外阻抗与损耗。
综上所述，相关技术中的移动终端存在内部结构设置影响厚度、在静压力场景下容易导致失效以及额外添加过孔带来阻抗与损耗的问题。
发明内容
本公开实施例提供一种印制电路板、印制电路板的制作方法及移动终端，以解决相关技术中移动终端存在内部结构设置影响厚度、在静压力场景下容易导致失效以及额外添加过孔带来阻抗与损耗的问题。
为了解决上述问题，本公开实施例是这样实现的：
第一方面，本公开实施例提供一种印制电路板，包括：
PCB板本体，PCB板本体的第一表面上设置有一凹槽；
PCB器件，PCB器件包括连接端子，PCB器件的一部分位于凹槽内，连接端子包括位于凹槽内的第一部分和位于凹槽外的第二部分，且第一部分与PCB板本体内的导电层电连接。
第二方面，本公开实施例提供一种印制电路板的制作方法，包括：
在PCB板本体上制作凹槽；
将PCB器件设置于凹槽内，使PCB器件的其中一部分位于凹槽内部，其中PCB器件的连接端子包括位于凹槽内的第一部分和位于凹槽外的第二部分，且第一部分与PCB板本体内的导电层电连接。
第三方面，本公开实施例提供一种移动终端，包括上述的印制电路板。
在本公开实施例中，在PCB板本体的第一表面上设置有一凹槽，PCB器件的一部分位于凹槽的内部，PCB器件所包含的连接端子包括位于凹槽内的第一部分和位于凹槽外的第二部分，且第一部分与PCB板本体内的导电层电连接，上述结构可以降低器件突出PCB板本体表面的高度，进而降低印制电路板与电子器件组装后所形成的组装结构的高度，还可以在相同高度的前提下增加器件本体与屏蔽罩本体之间的安全间隙，提升组装结构抗外界静压力的能力，从而提升移动终端的可靠性，同时PCB器件与PCB板本体内的至少两导电层电连接，可以减少导电层间过孔的设置，进而减小由于过孔所带来的阻抗和损耗。
附图说明
图1表示本公开实施例的PCB板本体上开设凹槽示意图一；
图2表示本公开实施例的印制电路板示意图一；
图3表示本公开实施例的PCB板本体上开设凹槽示意图二。
图4表示本公开实施例的印制电路板示意图二；
图5表示本公开实施例的印制电路板制作方法流程图；
图6表示本公开实施例的PCB板本体示意图。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
本公开实施例提供一种印制电路板，如图1、图2、图3和图4所示，包括：
PCB板本体1，PCB板本体1的第一表面上设置有一凹槽11；PCB器件2，PCB器件2包括连接端子21，PCB器件2的一部分位于凹槽11内，连接端子21包括位于凹槽11内的第一部分211和位于凹槽11外的第二部分212，且第一部分211与PCB板本体1内的导电层12电连接。
本公开实施例提供的印制电路板包括表面设置凹槽11的PCB板本体1，以及部分位于凹槽11内部的PCB器件2，其中PCB器件2包括器件本体22以及连接端子21，连接端子21包括位于凹槽11内的与PCB板本体1内的导电层12电连接的第一部分211，还包括位于凹槽11外的第二部分212。
通过将PCB器件2设置于凹槽11内，可以降低PCB器件2突出PCB板本体1表面的高度，进而降低PCB板本体1与电子器件组装后所形成的组装结构的高度，还可以在相同高度的前提下增加器件本体22与屏蔽罩本体之间的安全间隙，提升组装结构抗外界静压力的能力，从而提升移动终端的可靠性。
在本公开实施例中，PCB板本体1包括多个导电层12，相邻导电层12 之间设置有介质层13，且靠近PCB板本体1的第一表面的层结构为第一导电层，靠近PCB板本体1的第二表面的层结构为第二导电层，第一表面与第二表面相对。
PCB板本体1包括平行设置的导电层12和介质层13，导电层12与介质层13依次排列，相邻导电层12之间设置一介质层13，相邻介质层13之间设置一导电层12，且PCB板本体1的顶层与底层均为导电层12。PCB板本体1的顶层为靠近第一表面的层结构，PCB板本体1的底层为靠近第二表面的层结构。其中，介质层13为非导电材质，通常可采用耐燃材料等级代号为FR-4的材料，导电层12可以为铜箔。
其中，连接端子21的第二部分212通过导电件3与第一导电层连接，本公开实施例中所使用的导电件3可以为焊接剂，通过焊接剂实现位于凹槽11外的连接端子21的第二部分212与第一导电层的粘连，然后通过焊接实现连接端子21的第二部分212与第一导电层的连接，其中焊接剂可以为锡膏。
在本公开一实施例中，如图1和图2所示，凹槽11的侧壁由至少一导电层12和至少一介质层13的断面组成，凹槽11的底面由导电层12构成，且底面的中部为介质部分、两端形成导电部分。
在PCB板本体1的第一表面上所形成的凹槽11使得PCB板本体1内的至少一个导电层12与至少一个介质层13形成断口。其中位于凹槽11内部的连接端子21的第一部分211与断口处的导电层12连接，同时还可以与断口处的介质层13接触。
在PCB板本体1的第一表面上所形成的凹槽11的底面中部为介质部分，其凹槽11的底面两端为导电部分，可以使得连接端子21的第一部分211的底端与凹槽11底面的导电部分接触。
其中，凹槽11的底面的导电层12与断口位置重叠的部分区域的导电介质在PCB板本体1制作的过程中被剔除，且被剔除的部分被介质填充，其中被剔除的部分区域为与断口位置重叠的中部区域，因而可以形成凹槽11底面的中部为介质部分、两端形成导电部分的结构。
其中，凹槽11的侧壁可以由一个导电层12和一个介质层13的断面组成，还可以由两个导电层12和两个介质层13的断面组成，或者其他数量的导电 层12和对应的介质层13的断面组成。不论凹槽11的断面如何形成，凹槽11的底面均为两端为导电部分，中部为介质部分的结构形式。其中两端所形成的导电部分的面积需要大于或者等于连接端子21的第一部分211的底端的面积。
在上述结构的基础上，本公开实施例提供一种结构：连接端子21的第一部分211与第一导电层的断面连接，同时与凹槽11底面的导电部分连接。
此时凹槽11的侧壁由一个导电层12和一个介质层13的断面组成，即在第一导电层和第一介质层上开设断口，第一介质层为与第一导电层相邻的层结构。其中与第一介质层相邻的第四导电层形成凹槽11的底面，且该第四导电层与断口位置相重叠的中部区域为介质部分，两端为导电部分。
下面对此种结构的形式方式进行介绍：
PCB板本体1内的第一导电层与对应的第一介质层形成断口，与第一导电层相邻且与第一介质层依次排列的第四导电层形成凹槽11的底面。需要说明的是，第四导电层与断口位置重叠的部分区域的导电介质在PCB板本体1制作的过程中被剔除，且被剔除的部分被介质填充。其中第四导电层与断口位置重叠的中部区域的导电介质被剔除，第四导电层与断口位置重叠的两端区域的导电介质保留，进而可以形成第四导电层与断口位置相重叠的中部区域为介质部分，两端为导电部分。
进一步而言，在PCB板本体1的厚度方向上，第四导电层与断口位置相重叠的两端的导电部分，与第一导电层非重叠设置，因此第四导电层与断口位置相重叠的两端的导电部分形成连接区域，可以利用连接区域对连接端子21进行支撑。
连接端子21的第一部分211的侧壁与第一导电层的断面电连接，由于连接端子21顶端位置和底端位置的尺寸小于中间位置的尺寸，因此连接端子21的第一部分211的侧壁可以与第一介质层的断面部分接触或者不接触。连接端子21的第一部分211的底端与第四导电层连接，具体为：第一部分211的底端与连接区域连接。需要说明的是，通过在第四导电层上形成介质部分，可以避免短路情况的发生。
在本公开实施例中，连接端子21的第一部分211通过导电件3与凹槽11 底面的导电部分连接。
凹槽11的底面两端形成导电部分，在连接端子21位于凹槽11内的第一部分211的底端与凹槽11的底面连接时，连接端子21的第一部分211可以通过导电件3实现与凹槽11底面的导电部分的连接。
其中这里的导电件3为焊接剂，通过焊接剂实现位于凹槽11内的连接端子21的第一部分211的底端与凹槽11的底面处的导电部分粘连，然后通过焊接实现连接端子21的第一部分211的底端与凹槽11的底面处的导电部分连接，
其中焊接剂可以为锡膏。
在上述实施例的结构中，位于凹槽11内的连接端子21与PCB板本体1内的至少两个导电层12电连接，可以不用在两个导电层12之间额外设置过孔，减小由于过孔所带来的阻抗和损耗。
在本公开另一实施例中，如图3和图4所示，PCB板本体1内部包括一导电结构14，凹槽11设置于导电结构14上；导电结构14包括：部分第一导电层以及填充于部分第一导电层与部分第三导电层之间的导电介质，第三导电层与第一导电层相邻或间隔预设数目个导电层；部分第三导电层形成凹槽11的底面，底面的中部为介质部分、两端形成导电部分，导电结构14的断面形成凹槽11的侧壁。
在PCB板本体1的内部形成一导电结构14，其中导电结构14包括部分第一导电层以及填充于部分第一导电层与部分第三导电层之间的导电介质，这里的第三导电层可以为与第一导电层相邻的导电层，也可以与第一导电层之间间隔预设数目个导电层。
这里的部分第一导电层为在第一导电层中截取第一区域，相应的部分第三导电层为在第三导电层中截取第一区域，在截取完成后，将位于两个第一区域之间的部分均填充导电介质，此时可形成导电结构14。
然后可以在导电结构14上开设凹槽11，其中所形成的凹槽11的侧壁为导电结构14的断面，所形成的凹槽11的底面为部分第三导电层。凹槽11的底面形成中部为介质部分、两端为导电部分的结构。
下面对上述结构的形成方式进行介绍：
在PCB板本体1的第一导电层与第三导电层之间设置一盲孔，其中盲孔的直径需要大于所开设的凹槽11长度。在盲孔内电镀导电介质，使得部分第一导电层与部分第三导电层之间填充导电介质。在PCB板本体1的厚度方向上，与盲孔位置重叠的部分第一导电层以及盲孔内的导电介质形成导电结构14。
需要说明的是，凹槽11设置于导电结构14的中部，在PCB板本体1的厚度方向上，第三导电层与凹槽11重叠的部分区域的导电介质被剔除，且被剔除的区域被介质填充。其中被剔除导电介质而形成的区域的长度小于凹槽11的长度，使得凹槽11的底面形成中部为介质部分，两端为导电部分的结构。
其中，连接端子21的第一部分211与凹槽11的侧壁通过导电件3连接，同时与凹槽11底面的导电部分通过导电件3连接。
设置于凹槽11内的连接端子21的第一部分211分别与凹槽11的侧壁以及凹槽11的底面连接，其中第一部分211的侧面通过导电件3与凹槽11的侧壁连接，第一部分211的底端通过导电件3与凹槽11的底面的导电部分连接。
这里的导电件3为焊接剂，通过焊接剂可以实现位于凹槽11内的连接端子21的第一部分211的底端与凹槽11的底面处的导电部分粘连，然后通过焊接实现连接端子21的第一部分211的底端与凹槽11的底面处的导电部分连接，其中焊接剂可以为锡膏。
本公开实施例的上述结构形式，可以在降低器件突出PCB板本体表面的高度，减小由于过孔所带来的阻抗和损耗的基础上，进一步增加邻层间的过流能力，同时提升焊接剂与连接端子的结合面积，保证连接的牢固性。
在本公开实施例中，如图2和图4所示，PCB器件2包括相对设置的两个连接端子21，两个连接端子21均包括位于凹槽11内的第一部分211，两个连接端子21的第一部分211与PCB板本体1内的导电层12电连接，且与两个第一部分211连接的导电层12分离设置。
PCB器件2包括器件本体22以及相对设置的两个连接端子21，其中连接端子21位于器件本体22的两侧，两个连接端子21的结构相同，均形成为部分设置于凹槽11内部的结构，且连接端子21的第一部分211位于凹槽11 内部，连接端子21的第二部分212位于凹槽11的外部。
其中，针对连接端子21的第一部分211与第一导电层的断面连接，同时与凹槽11底面的导电部分连接的情况，具体结构为：两个连接端子21均与PCB板本体1的第一导电层和第四导电层连接，第一导电层为PCB板本体1的顶层，第四导电层与第一导电层之间间隔第一介质层，且部分第四导电层形成为凹槽11的底面，凹槽11底面的两端为导电部分，中部为介质部分。两个连接端子21位于凹槽11内的第一部分211均与第一导电层的断面和第四导电层的导电部分连接。其中第一导电层的断面为两个，且分离设置；第四导电层的导电部分也为两个，两个导电部分也分离设置。连接端子21位于凹槽11内的第一部分211的侧壁与第一导电层的断面连接，连接端子21位于凹槽11内的第一部分211的底端与第四导电层的导电部分连接。
其中连接端子21的第一部分211的底端通过导电件3与凹槽11的底部粘连，连接端子21的第二部分212通过导电件3与PCB板本体1的第一导电层粘连，导电件3即为焊接剂，在通过焊接剂实现粘连后，利用焊接工艺实现固定连接，这里的焊接剂可以为锡膏。
其中针对PCB板本体1内部包括一导电结构14，凹槽11设置于导电结构14上，连接端子21的第一部分211与凹槽11的侧壁通过导电件3连接，同时与凹槽11底面的导电部分通过导电件3连接的情况，具体的结构形式为：
两个连接端子21的第一部分211的侧壁均与凹槽11的侧壁连接，两个连接端子21的第一部分211的底端均与凹槽11的底部连接。
其中连接端子21的底端通过导电件3与凹槽11底面的导电部分粘连，连接端子21的第一部分211的侧壁通过导电件3与凹槽11的内壁粘连，连接端子21的第二部分212通过导电件3与PCB板本体1的第一导电层粘连。导电件3即为焊接剂，在通过焊接剂实现粘连后，利用焊接工艺实现固定连接，这里的焊接剂可以为锡膏。
在本公开实施例中，在导电层与连接端子接触的表面位置，在设置焊接剂之前，需要在导电层的表面设置OSP(Organic Solderability Preservatives，有机保护膜)，以对导电层进行保护。其中OSP在焊接的过程中可被焊接剂清除，以保证焊接过程的实施。
在本公开实施例中，在PCB板本体1顶部的第一导电层上和底部的第二导电层上需要覆盖油墨，当然第一导电层与连接端子21连接的位置可以清除油墨。
本公开实施例提供的印制电路板，在PCB板本体的第一表面上设置有一凹槽，PCB器件的一部分位于凹槽的内部，PCB器件所包含的连接端子包括位于凹槽内的第一部分和位于凹槽外的第二部分，且第一部分与PCB板本体内的导电层电连接，上述结构可以降低器件突出PCB板本体表面的高度，进而降低印制电路板与电子器件组装后所形成的组装结构的高度，还可以在相同高度的前提下增加器件本体与屏蔽罩本体之间的安全间隙，提升组装结构抗外界静压力的能力，从而提升移动终端的可靠性，同时PCB器件与PCB板本体内的至少两导电层电连接，可以减少导电层间过孔的设置，进而减小由于过孔所带来的阻抗和损耗。进一步的，还可以增加邻层间的过流能力同时提升焊接剂与连接端子的结合面积，保证连接的牢固性。
本公开实施例还提供一种移动终端，包括上述的印制电路板。
本公开实施例还提供一种印制电路板的制作方法，如图5所示，包括：
步骤501、在PCB板本体上制作凹槽。
首先在PCB板本体上制作凹槽，在制作凹槽之前需要对PCB板的结构进行了解。PCB板本体的内部包括平行设置的导电层和介质层，导电层与介质层依次排列，相邻导电层之间设置一介质层，相邻介质层之间设置一导电层，且PCB板本体的顶层与底层均为导电层。介质层为非导电材质，通常采用FR-4材质，导电层可以为铜箔。由于在PCB板本体上制作的凹槽需要容纳部分PCB器件，为了保证PCB器件的有效性，需要实现PCB器件与PCB板本体内导电层的连接。
在PCB板本体上制作凹槽的步骤包括：利用激光在完成线路与钻孔的PCB板本体的第一表面上制作凹槽。
在制作凹槽时，需要选用完成线路与钻孔制作的PCB板本体，然后利用激光在选用的PCB板本体的第一表面进行凹槽制作，在制作过程中根据预设的尺寸信息进行制作。
下面对凹槽的制作过程进行介绍：
在包括多个导电层的PCB板本体上制作凹槽，使PCB板本体内的至少一导电层和至少一介质层的断面形成凹槽的内壁，且使一导电层形成凹槽的底面，其中底面的中部为介质部分、两端形成导电部分。
具体为：在PCB板本体的至少一个导电层和至少一介质层上设置断口，在形成断口之后，可以利用断口处的断面形成凹槽的内壁。由于凹槽需要容置部分PCB器件，为了保证PCB器件的连接有效性，需要使得PCB板本体内的其中一导电层形成凹槽的底面，此时至少需要两个导电层以及位于两导电层之间的介质层来形成凹槽。
可以在PCB板本体的第一导电层和第一介质层上形成断口，利用PCB板本体的第四导电层作为凹槽的底面，此时断口处的第一导电层、第一介质层的断面形成凹槽的内壁，部分第四导电层形成凹槽的底面。其中本公开实施例中的第一导电层为PCB板本体的顶层，第二导电层为PCB板本体的底层，第一介质层与第一导电层相邻，第四导电层与第一介质层相邻。
需要说明的是，此时的第四导电层与断口位置重叠的部分区域的导电介质在PCB板本体制作的过程中被剔除，且被剔除的部分被介质填充。其中被剔除导电介质的部分的长度小于断口的长度，且被剔除导电介质的部分与断口的重叠位置在断口的中部，使得第四导电层所形成的凹槽底面的两端仍为导电介质。进一步而言，在PCB板本体的厚度方向上，所形成的凹槽的底面与第一导电层存在非重叠区域，这里的非重叠区域为导电部分，可以实现对连接端子的支撑以及与连接端子的电连接。
其中PCB器件包括器件本体以及设置于器件本体相对两端的两个连接端子。上述过程可以使得凹槽的底面中部形成介质区域，进而可以避免短路情况的发生。
针对PCB板本体而言，其对应的制作过程为：以一导电层和介质层为基准，分别向两端按照导电层和介质层依次排列的原则进行叠加，形成PCB板本体，且所形成的PCB板本体的顶层与底层均为导电层。针对本实施例利用第一导电层和第四导电层形成凹槽的实例而言，在形成第四导电层之后，剔除第四导电层上的部分导电介质，并用介质填充，在形成第一导电层时，剔除第一导电层上的部分导电介质，且剔除的部分与第四导电层上剔除的部分 有重合区域，第一导电层的剔除区域大于第四导电层，且第四导电层的剔除区域位于第一导电层的剔除区域的中部。具体结构如图6所示，其中标号131所指代的区域为介质区域，标号121所指代的区域为导电区域。上述结构可以便于后续凹槽的制作，以及避免发生短路故障。
在形成PCB板之后，需要在PCB板上按照传统的PCB板制作方式制作线路与钻孔，标号15所指代的区域为PCB板上的线路，标号16所指代的区域为在PCB板上形成的钻孔。至此形成了完成线路与钻孔制作的PCB板本体。然后可以在PCB板本体上设置凹槽，其中在PCB板本体上形成凹槽的状态如图1所示，标号11所指代的区域为凹槽。
凹槽的制作过程还包括：
在包括多个导电层的PCB板本体上制作盲孔，盲孔使第一导电层以及第三导电层连通，其中第一导电层为靠近PCB板本体第一表面的导电层，第三导电层与第一导电层相邻或间隔预设数目个导电层；在盲孔内部填充导电介质，使得第一导电层的预设区域与盲孔内的导电介质形成一整体的导电结构，预设区域为第一导电层上与盲孔对应的区域；在导电结构上设置凹槽。
具体为：设置于PCB板本体内部的导电结构由第一导电层的预设区域以及盲孔内的导电介质形成，在导电结构上开设凹槽，PCB器件的连接端子位于凹槽内的部分与凹槽的内壁电连接，同时与凹槽的部分底面连接。其中凹槽的内壁均为导电介质，第三导电层可以与第一导电层相邻，也可以与第一导电层间隔预设数目的导电层。
下面以第一导电层、第三导电层为相邻两导电层为例进行说明。
在完成线路与钻孔制作的PCB板本体的第一导电层与第三导电层之间设置一盲孔，其中盲孔的直径需大于所要开设的凹槽长度，且盲孔的直径等于预设区域对应的长度。在盲孔内电镀导电介质，使得第一导电层的预设区域与部分第三导电层之间填充导电介质。与盲孔位置重叠的第一导电层的预设区域与盲孔内的导电介质形成整体的导电结构。然后在导电结构上设置凹槽。
需要说明的是，凹槽设置于导电结构的中部，在PCB板本体厚度方向上，第三导电层与凹槽重叠的中部区域的导电介质被剔除，且被剔除的区域被介质填充。第三导电层与凹槽重叠的两端为导电介质，利用第三导电层与凹槽 重叠的两端的导电介质可以对连接端子进行支撑。在导电部分上开设凹槽的状态如图3所示，标号11所指代的区域为凹槽。
此种结构，可以在降低器件突出PCB板本体表面的高度，减小由于过孔所带来的阻抗和损耗的基础上，可以进一步增加邻层间的过流能力同时提升焊接剂与连接端子的结合面积，保证连接的牢固性。
步骤502、将PCB器件设置于凹槽内，使PCB器件的其中一部分位于凹槽内部，其中PCB器件的连接端子包括位于凹槽内的第一部分和位于凹槽外的第二部分，且第一部分与PCB板本体内的导电层电连接。
其中在将PCB器件设置于凹槽内之前，还需要使用钢网印刷或者喷涂方式在凹槽内与连接端子连接的位置设置焊接剂。
将PCB器件设置于凹槽内的过程为：通过贴片机将PCB器件放置在凹槽内；将PCB器件的连接端子的第二部分通过导电件与靠近PCB板本体第一表面的第一导电层连接；将PCB板本体以及PCB器件通过回流焊炉，使得PCB器件与PCB板本体形成焊接。
通过上述操作，可以实现连接端子位于凹槽外部的第二部分通过导电件与靠近PCB板本体第一表面的第一导电层连接，以及使得PCB器件与PCB板本体形成焊接，上述的导电件即为焊接剂。
本公开实施例提供的印制电路板制作方法，在PCB板本体的第一表面上设置凹槽，使得PCB器件的一部分位于凹槽的内部，PCB器件的连接端子的第一部分位于凹槽内且与PCB板本体内的导电层电连接，PCB器件的连接端子的第二部分位于凹槽外且与PCB板本体的表面的导电层连接，可以降低器件突出PCB板本体表面的高度，进而降低印制电路板与电子器件组装后所形成的组装结构的高度，还可以在相同高度的前提下增加器件本体与屏蔽罩本体之间的安全间隙，提升组装结构抗外界静压力的能力，从而提升移动终端的可靠性，同时PCB器件与PCB板本体内的至少两导电层电连接，可以减少导电层间过孔的设置，进而减小由于过孔所带来的阻抗和损耗。进一步的，不同的凹槽设置方式，还可以增加邻层间的过流能力同时提升焊接剂与连接端子的结合面积，保证连接的牢固性。
本公开实施例提供印制电路板、印制电路板的制作方法，不限于高器件 的应用场景，还可以发散至需要降低高度，或者增加器件所在区域相邻层过流能力以及器件焊接强度同时确保其可维修性的应用场景。
本说明书中的各个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似的部分互相参见即可。
尽管已描述了本公开实施例的优选实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例做出另外的变更和修改。所以，所附权利要求意欲解释为包括优选实施例以及落入本公开实施例范围的所有变更和修改。
最后，还需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者移动终端不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者移动终端所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者移动终端中还存在另外的相同要素。
以上所述的是本公开的优选实施方式，应当指出对于本技术领域的普通人员来说，在不脱离本公开所述的原理前提下还可以作出若干改进和润饰，这些改进和润饰也在本公开的保护范围内。

Claims (17)

  1. 一种印制电路板，包括：
    PCB板本体，所述PCB板本体的第一表面上设置有一凹槽；
    PCB器件，所述PCB器件包括连接端子，所述PCB器件的一部分位于所述凹槽内，所述连接端子包括位于所述凹槽内的第一部分和位于所述凹槽外的第二部分，且所述第一部分与所述PCB板本体内的导电层电连接。
  2. 根据权利要求1所述的印制电路板，其中，所述PCB板本体包括多个导电层，相邻导电层之间设置有介质层，且靠近所述PCB板本体的第一表面的层结构为第一导电层，靠近所述PCB板本体的第二表面的层结构为第二导电层，所述第一表面与所述第二表面相对。
  3. 根据权利要求2所述的印制电路板，其中，所述连接端子的第二部分通过导电件与所述第一导电层连接。
  4. 根据权利要求2所述的印制电路板，其中，所述凹槽的侧壁由至少一导电层和至少一介质层的断面组成，所述凹槽的底面由导电层构成，且所述底面的中部为介质部分、两端形成导电部分。
  5. 根据权利要求4所述的印制电路板，其中，所述连接端子的第一部分与所述第一导电层的断面连接，同时与所述凹槽底面的导电部分连接。
  6. 根据权利要求5所述的印制电路板，其中，所述连接端子的第一部分通过导电件与所述凹槽底面的导电部分连接。
  7. 根据权利要求2所述的印制电路板，其中，所述PCB板本体内部包括一导电结构，所述凹槽设置于所述导电结构上；
    所述导电结构包括：部分第一导电层以及填充于所述部分第一导电层与部分第三导电层之间的导电介质，所述第三导电层与所述第一导电层相邻或间隔预设数目个导电层；
    所述部分第三导电层形成所述凹槽的底面，所述底面的中部为介质部分、两端形成导电部分，所述导电结构的断面形成所述凹槽的侧壁。
  8. 根据权利要求7所述的印制电路板，其中，所述连接端子的第一部分与所述凹槽的侧壁通过导电件连接，同时与所述凹槽底面的导电部分通过所 述导电件连接。
  9. 根据权利要求3、6或8所述的印制电路板，其中，所述导电件为焊接剂。
  10. 根据权利要求1所述的印制电路板，其中，所述PCB器件包括相对设置的两个连接端子，两个所述连接端子均包括位于所述凹槽内的第一部分，两个所述连接端子的第一部分与所述PCB板本体内的导电层电连接，且与两个所述第一部分连接的导电层分离设置。
  11. 一种印制电路板的制作方法，包括：
    在PCB板本体上制作凹槽；
    将PCB器件设置于所述凹槽内，使所述PCB器件的其中一部分位于所述凹槽内部，其中所述PCB器件的连接端子包括位于所述凹槽内的第一部分和位于所述凹槽外的第二部分，且所述第一部分与所述PCB板本体内的导电层电连接。
  12. 根据权利要求11所述的方法，其中，在PCB板本体上制作凹槽的步骤包括：
    利用激光在完成线路与钻孔的所述PCB板本体的第一表面上制作凹槽。
  13. 根据权利要求11所述的方法，其中，在PCB板本体上制作凹槽的步骤，包括：
    在包括多个导电层的所述PCB板本体上制作所述凹槽，使所述PCB板本体内的至少一导电层和至少一介质层的断面形成所述凹槽的内壁，且使一导电层形成所述凹槽的底面，其中所述底面的中部为介质部分、两端形成导电部分。
  14. 根据权利要求11所述的方法，其中，在PCB板本体上制作凹槽的步骤，包括：
    在包括多个导电层的所述PCB板本体上制作盲孔，所述盲孔使第一导电层以及第三导电层连通，其中所述第一导电层为靠近所述PCB板本体第一表面的导电层，所述第三导电层与所述第一导电层相邻或间隔预设数目个导电层；
    在所述盲孔内部填充导电介质，使得所述第一导电层的预设区域与所述 盲孔内的导电介质形成一整体的导电结构，所述预设区域为所述第一导电层上与所述盲孔对应的区域；
    在所述导电结构上设置所述凹槽。
  15. 根据权利要求11所述的方法，在将PCB器件设置于所述凹槽内之前，还包括：
    使用钢网印刷或者喷涂方式在所述凹槽内与所述连接端子连接的位置设置焊接剂。
  16. 根据权利要求11所述的方法，其中，将PCB器件设置于所述凹槽内的步骤包括：
    通过贴片机将所述PCB器件放置在所述凹槽内；
    将所述PCB器件的连接端子的第二部分通过导电件与靠近所述PCB板本体第一表面的第一导电层连接；
    将所述PCB板本体以及所述PCB器件通过回流焊炉，使得所述PCB器件与所述PCB板本体形成焊接。
  17. 一种移动终端，包括如权利要求1至10中任一项所述的印制电路板。
PCT/CN2019/073168 2018-01-30 2019-01-25 印制电路板、印制电路板的制作方法及移动终端 WO2019149148A1 (zh)

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AU2019215528A AU2019215528B2 (en) 2018-01-30 2019-01-25 Printed circuit board, manufacturing method for printed circuit board, and mobile terminal
BR112020015576-4A BR112020015576A2 (pt) 2018-01-30 2019-01-25 placa de circuito impresso, método de fabricação da mesma e terminal móvel.
JP2020540770A JP2021511675A (ja) 2018-01-30 2019-01-25 プリント回路基板、プリント回路基板の作製方法及びモバイル端末
US16/963,433 US11490520B2 (en) 2018-01-30 2019-01-25 Printed circuit board, method of manufacturing the same, and mobile terminal
KR1020207022390A KR102488402B1 (ko) 2018-01-30 2019-01-25 인쇄 회로 기판, 인쇄 회로 기판의 제작 방법 및 이동 단말
EP19748194.8A EP3749070A4 (en) 2018-01-30 2019-01-25 CIRCUIT BOARD, MANUFACTURING METHOD FOR CIRCUIT BOARD AND MOBILE TERMINAL DEVICE

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