WO2019038857A1 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- WO2019038857A1 WO2019038857A1 PCT/JP2017/030127 JP2017030127W WO2019038857A1 WO 2019038857 A1 WO2019038857 A1 WO 2019038857A1 JP 2017030127 W JP2017030127 W JP 2017030127W WO 2019038857 A1 WO2019038857 A1 WO 2019038857A1
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- Prior art keywords
- pin
- heat sink
- semiconductor device
- cavity
- manufacturing
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- 239000004065 semiconductor Substances 0.000 title claims description 47
- 238000004519 manufacturing process Methods 0.000 title claims description 34
- 239000011347 resin Substances 0.000 claims abstract description 28
- 229920005989 resin Polymers 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 claims abstract description 9
- 238000000465 moulding Methods 0.000 claims abstract description 7
- 238000007789 sealing Methods 0.000 claims abstract description 6
- 238000002347 injection Methods 0.000 claims description 4
- 239000007924 injection Substances 0.000 claims description 4
- 238000000748 compression moulding Methods 0.000 claims description 3
- 230000000694 effects Effects 0.000 description 4
- 238000004140 cleaning Methods 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 238000012423 maintenance Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000008187 granular material Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4871—Bases, plates or heatsinks
- H01L21/4882—Assembly of heatsink parts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/293—Organic, e.g. plastic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
Definitions
- the present invention relates to a method of manufacturing a semiconductor device in which a heat sink is sealed with a mold resin.
- a heat sink having a step on the bottom corner is used.
- this positioning method there are positioning by a fixed pin and positioning by a movable pin (see, for example, Patent Document 1).
- the fixing pin In positioning by the fixing pin, displacement of the heat sink due to mold resin flow does not occur. However, it is necessary to provide a U-shaped or round hole in the heat sink to fit on the fixing pin.
- the fixing pin also plays a role in forming a screw hole for tightening after molding. However, the positioning by the fixing pin can not be applied to a heat sink having a rectangular planar shape.
- the rectangular heat sink can be positioned by surrounding the outer periphery of the heat sink with the movable pin.
- the resin is injected in a state in which the movable pin protrudes, and the tip end of the pin is lowered to the bottom of the cavity after the injection is completed.
- the maximum value of the movable range is about 0.5 mm.
- the movable pin can not be protruded to a sufficient height with respect to a thick heat sink with a step. Therefore, the positioning by the movable pin can not be applied to the stepped heat sink.
- the present invention has been made to solve the above-described problems, and an object thereof is a semiconductor device capable of positioning a heat sink having a rectangular planar shape having a step on a bottom corner and sealing it with a mold resin.
- the method of manufacturing is a semiconductor device capable of positioning a heat sink having a rectangular planar shape having a step on a bottom corner and sealing it with a mold resin.
- a heat sink having a rectangular planar shape having a step at a bottom corner is disposed inside a cavity of a mold, and a first pin is projected from the bottom of the cavity Positioning the second pin protruding from the bottom surface of the cavity on the step of the heat sink positioned after positioning the heat sink to the bottom surface of the cavity up to the bottom surface of the cavity And d) and sealing the heat sink with a molding resin while protruding the second pin.
- the first pin is protruded to position the heat sink
- the first pin is lowered, and the heat sink is sealed with the molding resin while the second pin disposed on the step of the heat sink is protruded. Accordingly, it is possible to position the heat sink having a rectangular planar shape having a step on the bottom corner and seal it with the molding resin.
- FIG. 7 is a plan view showing the method of manufacturing a semiconductor device according to the first embodiment of the present invention.
- FIG. 7 is a cross-sectional view showing the method of manufacturing the semiconductor device of the first embodiment of the present invention.
- FIG. 7 is a cross-sectional view showing the method of manufacturing the semiconductor device of the first embodiment of the present invention.
- FIG. 7 is a cross-sectional view showing the method of manufacturing the semiconductor device of the first embodiment of the present invention.
- FIG. 14 is a cross-sectional view showing the method of manufacturing the semiconductor device of the second embodiment of the present invention. It is a top view which shows the manufacturing method of the semiconductor device concerning Embodiment 3 of this invention.
- FIG. 7 is a plan view showing the method of manufacturing a semiconductor device according to the first embodiment of the present invention.
- FIG. 7 is a cross-sectional view showing the method of manufacturing the semiconductor device of the first embodiment of the present invention.
- FIG. 7 is a cross-sectional view showing the method of manufacturing the semiconductor device of the
- FIG. 14 is a cross-sectional view showing the method of manufacturing the semiconductor device of the third embodiment of the present invention.
- FIG. 14 is a cross-sectional view showing the method of manufacturing the semiconductor device of the third embodiment of the present invention.
- FIG. 14 is a cross-sectional view showing the method of manufacturing the semiconductor device of the third embodiment of the present invention.
- FIG. 19 is a cross-sectional view showing the method of manufacturing the semiconductor device of the fourth embodiment of the present invention.
- FIG. 26 is a cross-sectional view showing the method of manufacturing the semiconductor device of the fifth embodiment of the present invention.
- FIG. 1 is a flowchart of a method of manufacturing a semiconductor device according to the first embodiment of the present invention.
- FIG. 2 is a plan view showing a method of manufacturing a semiconductor device according to the first embodiment of the present invention.
- 3 to 5 are cross-sectional views showing the method of manufacturing the semiconductor device according to the first embodiment of the present invention.
- the lower mold 1 is provided with a first pin 2 and a second pin 3 which are movable pins.
- a metal heat sink 4 is disposed inside the cavity 5 of the mold 1 and the first pin 2 is protruded from the bottom of the cavity 5 to position the heat sink 4 (step S1).
- the heat sink 4 has a step on the bottom corner and has a rectangular planar shape.
- the protruding height of the first pin 2 is made equivalent to the thickness of the heat sink 4, and the side wall of the heat sink 4 is pressed against the first pin 2 to position the heat sink 4.
- the second pin 3 protruding from the bottom surface of the cavity 5 is disposed on the step of the heat sink 4 positioned.
- the semiconductor chip 6 and the lead frame 7 are provided on the positioned heat sink 4.
- a mold 8 is disposed on the mold 1 so as to cover them.
- the first pin 2 is lowered to the bottom of the cavity 5 (step S2).
- the mold resin 10 is injected into the cavity 5 through the runner 9 provided between the molds 1 and 8 and the heat sink 4 is held while the second pin 3 is protruded. It seals with mold resin 10 (Step S3). At this time, the heat sink 4 is fixed by the second pin 3 to prevent misalignment. After the resin sealing is completed, the second pin 3 is lowered to the bottom of the cavity 5 (step S4).
- the first pin 2 is lowered to perform resin sealing.
- the first pin 2 can be protruded to a sufficient height with respect to the thick heat sink 4 with a step, so that the heat sink 4 with a step can be positioned.
- heat sink 4 with a rectangular planar shape can be used. Since the heat sink 4 having a rectangular planar shape is easy to process, it is low in cost.
- the heat sink 4 is sealed with the mold resin 10 while the second pin 3 disposed in the step protrudes. Thereby, position shift of the heat sink 4 at the time of injection
- FIG. 6 is a cross-sectional view showing a method of manufacturing a semiconductor device according to the second embodiment of the present invention.
- the second pin 3 is a fixing pin. This reduces the mold production cost because the movable pin is reduced. Furthermore, since the resin burr cleaning frequency around the movable pin is also reduced, the maintenance cost is reduced.
- the second pin 3 may have a cylindrical shape, it is preferable that the tip of the second pin 3 be tapered. Thereby, even if the bottom surface of the heat sink 4 rides on the second pin 3, it slides down along the taper and returns to the bottom surface of the cavity 5.
- Other configurations and effects are the same as in the first embodiment.
- FIG. 7 is a plan view showing a method of manufacturing a semiconductor device according to the third embodiment of the present invention.
- 8 to 10 are cross-sectional views showing a method of manufacturing a semiconductor device according to the third embodiment of the present invention. 7 to 10 correspond to FIGS. 2 to 5 of the first embodiment, respectively.
- the second pin 3 is not provided on the side on which the runner 9 is located, which is the injection port of the mold resin 10 to the cavity 5. .
- the resin burr cleaning frequency around the movable pin is also reduced, the maintenance cost is reduced.
- the second pins 3 are disposed along the other three sides of the heat sink 4. Other configurations and effects are the same as in the first embodiment.
- FIG. 11 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the fourth embodiment of the present invention.
- the movable pin plate 11 and the ejector pin plate 12 are attached to the stopper plate 13 and move individually with respect to the stopper plate 13.
- the first pin 2 is fixed to the movable pin plate 11.
- the ejector pin 14 is fixed to the ejector pin plate 12.
- the ejector pin 14 is protruded from the bottom of the cavity 5 to take out the heat sink 4 sealed with the mold resin 10.
- the second pin 3 is fixed to the ejector pin plate 12 together with the ejector pin 14 and interlocked with the operation of the ejector pin 14. Thereby, 2nd pin 3 itself becomes an ejector pin. Moreover, it is not necessary to newly add a plate for moving the second pin 3 and can be implemented with a small scale modification.
- the first pin 2 may be fixed to the ejector pin plate 12 and the second pin 3 may be fixed to the movable pin plate 11. Other configurations and effects are the same as in the first embodiment.
- FIG. 12 is a cross-sectional view showing a method of manufacturing a semiconductor device according to the fifth embodiment of the present invention.
- the heat sink 4 is sealed by a compression molding process. Specifically, first, the heat sink 4 is positioned on the bottom of the cavity of the upper mold 1 as in the first to fourth embodiments. Next, the mold resin 10 of the granules is melted by the lower mold 8 and pushed up by the movable cavity component 15 to seal the heat sink 4 with the mold resin 10. Even with such a compression molding process, the same effects as in the first to fourth embodiments can be obtained.
- the semiconductor chip 6 is a MOSFET, an SBD, an IGBT or a PN diode.
- the semiconductor chip 6 is not limited to one formed of silicon, and may be formed of a wide band gap semiconductor having a larger band gap than silicon.
- the wide band gap semiconductor is, for example, silicon carbide, gallium nitride based material, or diamond.
- a semiconductor chip formed of such a wide band gap semiconductor can be miniaturized because of high voltage resistance and allowable current density. By using this miniaturized semiconductor chip, it is possible to miniaturize a semiconductor device incorporating this semiconductor chip. Further, since the heat resistance of the semiconductor chip is high, the radiation fin of the heat sink can be miniaturized, and the water cooling portion can be air cooled, so that the semiconductor device can be further miniaturized. Further, since the power loss of the semiconductor chip is low and the efficiency is high, the efficiency of the semiconductor device can be increased.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Moulds For Moulding Plastics Or The Like (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
図1は、本発明の実施の形態1に係る半導体装置の製造方法のフローチャートである。図2は、本発明の実施の形態1に係る半導体装置の製造方法を示す平面図である。図3から図5は、本発明の実施の形態1に係る半導体装置の製造方法を示す断面図である。
図6は、本発明の実施の形態2に係る半導体装置の製造方法を示す断面図である。本実施の形態では第2のピン3が固定ピンである。これにより、可動ピンが減るため、金型製作コストが下がる。さらに、可動ピン外周の樹脂バリ清掃頻度も減るため、メンテナンスコストが下がる。
図7は、本発明の実施の形態3に係る半導体装置の製造方法を示す平面図である。図8から図10は、本発明の実施の形態3に係る半導体装置の製造方法を示す断面図である。これらの図7から図10はそれぞれ実施の形態1の図2から図5に対応する。
図11は、本発明の実施の形態4に係る半導体装置の製造方法を示す断面図である。可動ピンプレート11とエジェクタピンプレート12が、ストッパープレート13に取り付けられ、それぞれストッパープレート13に対して個別に可動する。第1のピン2は可動ピンプレート11に固定されている。エジェクタピン14がエジェクタピンプレート12に固定されている。キャビティ5の底面からエジェクタピン14を突き出すことで、モールド樹脂10で封止した前記ヒートシンク4を取り出す。
図12は、本発明の実施の形態5に係る半導体装置の製造方法を示す断面図である。本実施の形態では、コンプレッションモールドプロセスによりヒートシンク4を封止する。具体的には、まず、実施の形態1~4と同様に、上側のモールド金型1のキャビティ底面においてヒートシンク4を位置決めする。次に、顆粒のモールド樹脂10を下側のモールド金型8で溶かし、可動キャビティ部品15により押し上げることで、ヒートシンク4をモールド樹脂10で封止する。このようなコンプレッションモールドプロセスでも実施の形態1~4と同様の効果を得ることができる。
Claims (7)
- 底面角部に段差を有する平面形状が矩形のヒートシンクをモールド金型のキャビティの内部に配置し、前記キャビティの底面から第1のピンを突き出して前記ヒートシンクを位置決めする工程と、
前記キャビティの前記底面から突き出した第2のピンを、位置決めした前記ヒートシンクの前記段差に配置する工程と、
前記ヒートシンクを位置決めした後に前記第1のピンを前記キャビティの底面まで下降させ、前記第2のピンを突き出したまま前記ヒートシンクをモールド樹脂で封止する工程とを備えることを特徴とする半導体装置の製造方法。 - 前記第2のピンは固定ピンであることを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記第2のピンの先端にテーパーが設けられていることを特徴とする請求項2に記載の半導体装置の製造方法。
- 前記ヒートシンクの矩形の平面形状の4辺のうち、前記キャビティへの前記モールド樹脂の注入口がある側の辺に沿って前記第2のピンが設けられていないことを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記ヒートシンクの回転による位置ずれを防ぐように前記第2のピンを配置することを特徴とする請求項4に記載の半導体装置の製造方法。
- 前記キャビティの前記底面からエジェクタピンを突き出すことで、前記モールド樹脂で封止した前記ヒートシンクを取り出す工程を更に備え、
前記第1のピン又は前記第2のピンは、前記エジェクタピンと共にエジェクタピンプレートに固定され、前記エジェクタピンの動作と連動することを特徴とする請求項1に記載の半導体装置の製造方法。 - コンプレッションモールドプロセスにより前記ヒートシンクを封止することを特徴とする請求項1~6の何れか1項に記載の半導体装置の製造方法。
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CN201780094019.9A CN110998812B (zh) | 2017-08-23 | 2017-08-23 | 半导体装置的制造方法 |
JP2019537483A JP6721128B2 (ja) | 2017-08-23 | 2017-08-23 | 半導体装置の製造方法 |
DE112017007957.8T DE112017007957B4 (de) | 2017-08-23 | 2017-08-23 | Verfahren zum Herstellen einer Halbleitervorrichtung |
KR1020207004265A KR102321556B1 (ko) | 2017-08-23 | 2017-08-23 | 반도체 장치의 제조 방법 |
US16/500,856 US11062916B2 (en) | 2017-08-23 | 2017-08-23 | Method for manufacturing semiconductor device |
PCT/JP2017/030127 WO2019038857A1 (ja) | 2017-08-23 | 2017-08-23 | 半導体装置の製造方法 |
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PCT/JP2017/030127 WO2019038857A1 (ja) | 2017-08-23 | 2017-08-23 | 半導体装置の製造方法 |
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2017
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JP2000183279A (ja) * | 1998-10-05 | 2000-06-30 | Fuji Electric Co Ltd | 半導体素子のパッケージおよびその製造方法 |
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CN110998812B (zh) | 2023-08-18 |
CN110998812A (zh) | 2020-04-10 |
JPWO2019038857A1 (ja) | 2020-01-09 |
US20200176273A1 (en) | 2020-06-04 |
DE112017007957T5 (de) | 2020-07-09 |
JP6721128B2 (ja) | 2020-07-08 |
KR20200029009A (ko) | 2020-03-17 |
KR102321556B1 (ko) | 2021-11-03 |
US11062916B2 (en) | 2021-07-13 |
DE112017007957B4 (de) | 2023-01-26 |
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