WO2018193554A1 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
WO2018193554A1
WO2018193554A1 PCT/JP2017/015723 JP2017015723W WO2018193554A1 WO 2018193554 A1 WO2018193554 A1 WO 2018193554A1 JP 2017015723 W JP2017015723 W JP 2017015723W WO 2018193554 A1 WO2018193554 A1 WO 2018193554A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor device
semiconductor wafer
manufacturing
range
mesa groove
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PCT/JP2017/015723
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English (en)
French (fr)
Japanese (ja)
Inventor
小笠原　淳
浩二 伊東
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新電元工業株式会社
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Application filed by 新電元工業株式会社 filed Critical 新電元工業株式会社
Priority to PCT/JP2017/015723 priority Critical patent/WO2018193554A1/ja
Priority to CN201780000855.6A priority patent/CN109121423B/zh
Priority to JP2017540673A priority patent/JP6396598B1/ja
Priority to TW106126889A priority patent/TWI657512B/zh
Publication of WO2018193554A1 publication Critical patent/WO2018193554A1/ja

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D13/00—Electrophoretic coating characterised by the process
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D13/00—Electrophoretic coating characterised by the process
    • C25D13/02—Electrophoretic coating characterised by the process with inorganic material
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D13/00—Electrophoretic coating characterised by the process
    • C25D13/10—Electrophoretic coating characterised by the process characterised by the additives used
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D13/00—Electrophoretic coating characterised by the process
    • C25D13/12—Electrophoretic coating characterised by the process characterised by the article coated

Definitions

  • the present invention relates to a method for manufacturing a semiconductor device.
  • lead-free glass fine particles not containing lead are deposited on a mesa groove of a semiconductor wafer by electrophoretic deposition (EPD), and then the lead deposited in the mesa groove.
  • the passivation film of the semiconductor device is formed by baking the free glass fine particles to vitrify.
  • lead-free glass fine particles are deposited on the bottom of the mesa groove of the semiconductor wafer in the glass film forming step by electrophoretic deposition.
  • a passivation film obtained by firing a deposit of lead-free glass fine particles and vitrifying it is also formed at the bottom of the mesa groove.
  • the silicon of the semiconductor wafer and the glass that is a passivation film, that is, a plurality of different materials are used. Need to be cut.
  • the lead-free glass fine particles that cause cracks at the time of cutting of the semiconductor wafer are formed at the bottom of the mesa groove of the semiconductor wafer. There is also a problem of being deposited.
  • the present invention by controlling the characteristics of the suspension used in the glass film forming step, at least a part of the bottom of the mesa groove is exposed (the lead-free glass fine particles are partially formed on at least a part of the bottom of the mesa groove.
  • the glass film of the lead-free glass fine particle deposit can be accurately formed to a predetermined thickness so as to cover the periphery of the opening end of the mesa groove and the side wall of the mesa groove.
  • a method for manufacturing a semiconductor device includes: A semiconductor wafer preparation step of preparing a semiconductor wafer having mesa grooves formed on a glass coating formation surface, and a suspension in which lead-free glass fine particles are suspended in a solvent, the first electrode plate and the second electrode plate are A state in which the semiconductor wafer is placed between the first electrode plate and the second electrode plate while facing each other while being immersed in the suspension, and the glass film forming surface faces the first electrode plate side A glass film forming step of forming a glass film on the glass film forming surface by electrophoretic deposition, and a method for manufacturing a semiconductor device, In the glass film forming step, at least a part of the bottom of the mesa groove is exposed, the glass film that is a deposit of the lead-free glass fine particles is formed around the opening end of the mesa groove and the side wall of the mesa groove.
  • the suspension used in the glass film forming step is After controlling the dielectric constant of the solvent containing the lead-free glass fine particles to the first range, a mixed liquid containing an organic solvent and nitric acid as an electrolyte is added to the solvent, and the electric conductivity is set to a second value. Suspension controlled to range The first range of the dielectric constant of the solvent is in the range of 5-7; The second range of the electric conductivity of the suspension is 20 nS / cm to 100 nS / cm.
  • the electrical conductivity of the suspension is controlled in the second range by adjusting the mixed solution.
  • the mixture Before being added to the solvent, the mixture is controlled in electrical conductivity to a third range, and the third range of electrical conductivity of the mixture is 90 ⁇ S / cm to 130 ⁇ S / cm. It is a range.
  • the organic solvent is isopropyl alcohol or ethyl acetate.
  • the electrical conductivity of the mixed liquid is controlled to the third range by adjusting a ratio of the nitric acid in the mixed liquid.
  • the solvent is a mixed solvent containing isopropyl alcohol and ethyl acetate.
  • the dielectric constant of the solvent is controlled to the first range by adjusting a ratio of the ethyl acetate in the mixed solvent.
  • the lead-free glass fine particles are lead-free glass fine particles containing at least one of SiO 2 , Al 2 O 3 , CaO, MgO, ZnO, B 2 O 3 , and BaO.
  • the semiconductor wafer preparation step Preparing a semiconductor wafer having a pn junction parallel to the main surface; Forming an exposed portion of the pn junction on the inner surface of the mesa groove by forming a mesa groove having a depth exceeding the pn junction from one surface of the semiconductor wafer; And a step of forming a base insulating film 121 on the inner surface of the mesa groove so as to cover the exposed portion of the pn junction.
  • the suspension is characterized by not containing a surfactant.
  • the semiconductor wafer preparation step includes a step of forming an exposed portion of a pn junction of a side wall of the mesa groove on the surface of the semiconductor wafer, and forming a base insulating film on the surface of the semiconductor wafer so as to cover the exposed portion of the pn junction And a step of performing.
  • the glass coating forming step is characterized in that the glass coating is formed on the surface of the base insulating film around the opening end of the mesa groove and on the side wall of the mesa groove.
  • the method further comprises forming an anode electrode between two adjacent mesa grooves on the one surface of the semiconductor wafer and forming a cathode electrode on the other surface of the semiconductor wafer.
  • the glass coating covers an exposed portion of the pn junction through the base insulating film.
  • the method further includes a semiconductor wafer cutting step of cutting the semiconductor wafer along the vicinity of the center of the bottom portion of the mesa groove where the glass coating is not formed to form the semiconductor wafer into chips.
  • a method of manufacturing a semiconductor device includes a semiconductor wafer preparation step of preparing a semiconductor wafer W having mesa grooves formed on a glass film forming surface, and a suspension in which lead-free glass fine particles are suspended in a solvent.
  • the first electrode plate and the second electrode plate are placed facing each other in a state of being immersed in the suspension, and the glass film forming surface is disposed between the first electrode plate and the second electrode plate.
  • the glass film forming step at least a part of the bottom of the mesa groove is exposed so that the glass film, which is a deposit of lead-free glass fine particles, covers the periphery of the opening end of the mesa groove and the side wall of the mesa groove.
  • the suspension used in the glass coating formation step is a mixed solution containing an organic solvent and nitric acid as an electrolyte in the solvent after controlling the dielectric constant of the solvent containing lead-free glass fine particles to the first range. (Electrolyte solution) is added and the electric conductivity is controlled to be in the second range. Furthermore, the first range of the dielectric constant of the solvent is in the range of 5-7. Furthermore, the second range of electrical conductivity of the suspension is in the range of 20 nS / cm to 100 nS / cm.
  • the glass film of the lead-free glass fine particle deposit is accurately coated to a predetermined thickness so as to cover the periphery of the opening end of the mesa groove and the side wall of the mesa groove. Can be formed.
  • FIG. 1 is a diagram illustrating a process of a method for manufacturing a semiconductor device according to the first embodiment.
  • FIG. 2 is a diagram illustrating steps of the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 1.
  • FIG. 3 is a diagram illustrating steps of the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 2.
  • FIG. 4 is a diagram illustrating steps of the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 3.
  • FIG. 5 is a diagram illustrating steps of the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 4.
  • FIG. 6 is a diagram illustrating steps in the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 5.
  • FIG. 5 is a diagram illustrating steps in the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 5.
  • FIG. 7 is a diagram illustrating steps of the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 6.
  • FIG. 8 is a diagram illustrating steps of the method for manufacturing the semiconductor device according to the first embodiment, which are subsequent to FIG. 7.
  • FIG. 9 is a cross-sectional view of the glass film forming apparatus 1 as seen from the lateral direction.
  • FIG. 10 is a diagram illustrating an example of the composition of the suspension 12 used in the electrophoretic deposition method of the semiconductor device manufacturing method according to the first embodiment.
  • FIG. 11 is a diagram showing an example of the relationship between the dielectric constant and the ratio of isopropyl alcohol to ethyl acetate in the solvent (1) which is a mixed solvent containing isopropyl alcohol and ethyl acetate.
  • FIG. 12 is a diagram illustrating an example of the relationship between the electrical conductivity of the suspension 12 and the adhesion state of the deposit on the bottom 120 a of the mesa groove 120.
  • FIG. 13 is a photograph of the upper surface of the semiconductor wafer in a state where the glass coating 124 before firing is formed in the glass coating formation step.
  • FIG. 14 is a photograph of a cross section of the mesa groove 120 including the glass coating 124 after firing in the glass coating forming step.
  • the method of manufacturing a semiconductor device according to the first embodiment includes a “semiconductor wafer preparation step”, a “glass film formation step”, an “oxide film removal step”, and a “roughened region”.
  • the “forming process”, “electrode forming process”, and “semiconductor wafer cutting process” are performed in this order.
  • the semiconductor device manufacturing method according to the embodiment will be described below in the order of steps.
  • a p + type diffusion layer 112 is formed by diffusion of p type impurities from one surface of an n ⁇ type semiconductor wafer (for example, an n ⁇ type silicon wafer having a diameter of 4 inches) 110,
  • An n + -type diffusion layer 114 is formed by diffusion of n-type impurities from the other surface to prepare a semiconductor wafer W in which a pn junction parallel to the main surface is formed (FIG. 1).
  • oxide films 116 and 118 are formed on the surfaces of the p + type diffusion layer 112 and the n + type diffusion layer 114 by thermal oxidation (FIG. 1).
  • a predetermined opening is formed in a predetermined portion of the oxide film 116 by a photoetching method.
  • the semiconductor wafer is subsequently etched to form a groove (mesa groove) 120 having a depth exceeding the pn junction from one surface of the semiconductor wafer (FIG. 2).
  • the exposed portion A of the pn junction is formed on the inner surface (side wall) of the groove 120. That is, the exposed portion A of the pn junction of the side wall of the mesa groove 120 is formed on the surface of the semiconductor wafer.
  • a base insulating film 121 made of a silicon oxide film is formed on the inner surface of the groove 120 by a thermal oxidation method using dry oxygen (DryO 2 ) (FIG. 3). That is, the base insulating film 121 is formed on the surface of the semiconductor wafer (the inner surface of the groove 120) so as to cover the exposed portion A of the pn junction.
  • DryO 2 dry oxygen
  • the mesa groove 120 has a bottom portion 120a, an opening end 120b, and a side wall 120c.
  • the bottom 120 a, the opening end 120 b, and the sidewall 120 c indicate the surface of the base insulating film 121.
  • a part of the bottom 120a, the opening end 120b, and the side wall 120c of the mesa groove 120 are simply defined as a part of the glass film forming surface.
  • the inner surface of the mesa groove 120 indicates the surface of the p + type diffusion layer 112 and the n ⁇ type diffusion layer 114.
  • the thickness of the base insulating film 121 is, for example, in the range of 5 nm to 60 nm (for example, 20 nm).
  • the base insulating film 121 is formed by placing the semiconductor wafer in a diffusion furnace and then treating it at a temperature of 900 ° C. for 10 minutes while flowing an oxygen gas. If the thickness of the base insulating film 121 is less than 5 nm, the effect of reducing the BT resistance may not be obtained. On the other hand, if the thickness of the base insulating film 121 exceeds 60 nm, it may not be possible to form a glass film by electrophoretic deposition in the next glass film forming process.
  • the semiconductor wafer W having the mesa groove 120 formed on the glass film forming surface is prepared.
  • the glass film 124 which is a deposit of lead-free glass fine particles, is opened in the mesa groove 120 by electrophoretic deposition with at least a part of the bottom 120a of the mesa groove 120 exposed.
  • the glass coating 124 is densified by forming it so as to cover the periphery of the end 120b and the side wall 120c (the surface of the base insulating film 121) of the mesa groove 120 and baking the glass coating 124 (FIG. 4).
  • the fired glass film is also denoted by the same reference numeral 124 as that of the glass film before firing.
  • the glass coating 124 covers the periphery of the opening end 120 b of the mesa groove 120 and the side wall 120 c (surface of the base insulating film 121) of the mesa groove 120 and is adjacent to the side wall 120 c of the mesa groove 120.
  • a part of the bottom 120a of the mesa groove 120 (for example, near the center of the bottom 120a) is also covered (at least a part of the bottom 120a of the mesa groove 120 is exposed).
  • the glass film 124 is formed on the surface of the base insulating film 121 around the opening end 120b of the mesa groove 120 and the side wall 120c of the mesa groove 120.
  • the glass coating 124 covers the exposed portion A of the pn junction via the base insulating film 121.
  • a glass film forming apparatus having the following configuration, that is, a tank 10 for storing a suspension 12 in which lead-free glass fine particles are suspended in a solvent, is opposed to each other.
  • the first and second electrode plates 14 and 16 installed in the tank 10 in a state and the first and second electrode plates 14 and 16 are disposed between the first electrode plate 14 and the second electrode plate 16, and the semiconductor wafer W is disposed at a predetermined position.
  • a glass film forming apparatus provided with a semiconductor wafer placement jig (not shown) for powering and a power supply device 20 for applying a potential to the first electrode plate 14 and the second electrode plate 16 is used (FIG. 9).
  • the first electrode plate 14 connected to the plus terminal and the minus terminal are connected to the inside of the tank 10 storing the suspension 12 in which the lead-free glass fine particles are suspended in the solvent.
  • the second electrode plate 16 is placed oppositely in a state of being immersed in the suspension 12, and the semiconductor wafer W is placed between the first electrode plate 14 and the second electrode plate 16 on the surface on which the glass film is to be formed (
  • the glass coating 124 is formed on the glass coating formation planned surface by the electrophoretic deposition method in a state where the inner surface of the groove) is arranged in a posture facing the first electrode plate 14 side.
  • a voltage of 10 V to 800 V (for example, 400 V) is applied as a voltage applied between the first electrode plate 14 and the second electrode plate 16.
  • this glass film forming step is a glass film that is a deposit of lead-free glass fine particles with at least a part of the bottom 120a of the mesa groove 120 (the surface of the base oxide film 121 in the bottom 120a) exposed. Is formed so as to cover the periphery of the opening end 120b of the mesa groove and the side wall 120c of the mesa groove.
  • the suspension 12 used in this glass film forming step is controlled in the first range of the dielectric constant of the solvent (1) containing the lead-free glass fine particles, and then the organic solvent and the solvent (1).
  • This is a suspension obtained by adding a mixed solution (electrolyte solution (2)) containing nitric acid as an electrolyte and controlling the electric conductivity (EC: Electro Conductivity) within the second range (see FIG. 10).
  • this suspension 12 does not contain surface activity.
  • the lead-free glass particles made of lead-free glass include, for example, at least one of the following glass particles, that is, SiO 2 , Al 2 O 3 , CaO, MgO, ZnO, B 2 O 3 , BaO. And lead-free glass particles prepared from a melt obtained by melting a raw material containing substantially no Pb.
  • the solvent (1) is a mixed solvent of isopropyl alcohol and ethyl acetate.
  • the dielectric constant of the solvent (1) is controlled to the first range described above by adjusting the ratio of ethyl acetate in the mixed solvent.
  • the first range of the dielectric constant of the solvent (1) is in the range of 5-7.
  • FIG. 11 is a diagram showing an example of the relationship between the dielectric constant and the ratio of isopropyl alcohol to ethyl acetate in the solvent (1) which is a mixed solvent containing isopropyl alcohol and ethyl acetate.
  • the dielectric constant of the solvent (1) can be adjusted to the first range described above by adjusting the ratio of ethyl acetate in the mixed solvent.
  • the electrolyte (2) is a mixed solution of an organic solvent (isopropyl alcohol (IPA)) and nitric acid (HNO 3 ).
  • the volume ratio of the organic solvent and nitric acid in this mixed solution is, for example, 1000: 1 to 5.
  • IPA isopropyl alcohol
  • HNO 3 nitric acid
  • the organic solvent ethyl acetate, acetone, ethanol, and other organic solvents can be selected as long as desired characteristics can be obtained.
  • the electric conductivity of the suspension 12 is controlled to the second range described above by adjusting the above-described mixed solution (electrolyte solution (2)).
  • the second range of the electrical conductivity of the suspension 12 is in the range of 20 nS / cm to 100 nS / cm.
  • the electrical conductivity (conductivity) of the suspension in which the lead glass powder is suspended is 150. ⁇ 50 ⁇ S / cm (refer to the above-mentioned JP-A-57-143832).
  • the lead glass powder is commercially available under the trade name IP760 from Innotech, USA (see the lower right column on page 1 of JP-A-57-143832).
  • the electrical conductivity condition (150 ⁇ 50 ⁇ S / cm) of this conventional suspension is compared with the second range (20 nS / cm to 100 nS / cm) of the electrical conductivity of the suspension 12 of the present application described above. Differ greatly (in the range of high electrical conductivity).
  • Japanese Patent Application Laid-Open No. 57-143832 discloses that when the conductivity of the suspension is 100 ⁇ S / cm or less, not only the surface where the PN junction end of the mesa semiconductor element is exposed, but also other It is described that a glass film is also formed on this portion, for example, a SiO 2 film, and this has an adverse effect in the subsequent manufacturing process.
  • the conventional electrophoretic deposition method for depositing lead glass powder containing lead described in JP-A-57-143832 is used by setting the conductivity of the suspension to 100 ⁇ S / cm or less. Not supposed to do.
  • the second range of the electric conductivity of the suspension 12 is the mesa groove with high accuracy in a state where at least a part of the bottom 120a of the mesa groove 120 is exposed to the lead-free glass fine particles.
  • the condition for depositing on 120 is set to a very low range of 20 nS / cm to 100 nS / cm, which is not used in the above-mentioned conventional technique, and is 100 ⁇ S / cm or less.
  • the lead-free glass applied in the present embodiment cannot be deposited in the mesa groove of the semiconductor element by the electrophoretic deposition method under the above-described conventional electrical conductivity condition of the suspension (150 ⁇ 50 ⁇ S / cm). Has been confirmed.
  • the electrical conductivity of the mixed solution is controlled in the third range before being added to the solvent (1) described above.
  • the electrical conductivity of the mixed solution is controlled to the third range described above by adjusting the ratio of nitric acid in the mixed solution.
  • the third range of the electric conductivity of this mixed solution is in the range of 90 ⁇ S / cm to 130 ⁇ S / cm.
  • the electrolyte solution (2) is about 30 to 40 cc.
  • the dielectric constant of the solvent containing the lead-free glass fine particles is controlled within the first range (5 to 11), and then the dielectric constant is changed to the first dielectric constant.
  • Electrolytic solution (2) was added to the solvent controlled to the range (mixed solvent of isopropyl alcohol (IPA) and ethyl acetate) to control the electric conductivity to the second range (20 nS / cm to 100 nS / cm).
  • the lead-free glass particles in the suspension are deposited on the mesa grooves of the semiconductor wafer by electrophoretic deposition using the suspension.
  • the electric conductivity of the electrolyte (2) is controlled within the third range (90 ⁇ S / cm to 130 ⁇ S / cm).
  • the thickness of the lead-free glass fine particles deposited in the mesa groove formed in the semiconductor wafer can be controlled to a predetermined thickness with high accuracy.
  • the thickness of the lead-free glass particulate deposit is controlled to a predetermined thickness
  • the thickness of the passivation film obtained by firing and depositing the deposit is also controlled to a predetermined thickness. It is possible to improve the reliability of the semiconductor device by reducing variations in the insulating properties (reverse characteristics) of the passivation film of the semiconductor device cut and separated from the semiconductor wafer.
  • Electrode formation step Ni plating is performed on the semiconductor wafer W to form the anode electrode 134 on the roughened region 132 (between two adjacent mesa grooves 120 on one surface of the semiconductor wafer W). Then, the cathode electrode 136 is formed on the other surface of the semiconductor wafer W (FIG. 7).
  • (F) Semiconductor wafer cutting step Next, the semiconductor wafer is cut into chips by cutting the semiconductor wafer along the vicinity of the center of the bottom 120a of the mesa groove 120 where the glass coating 124 is not formed by dicing, laser, or the like.
  • a semiconductor device (mesa type pn diode) 100 is manufactured (FIG. 8).
  • the glass coating 124 of the lead-free glass fine particle deposit is formed so as to cover the periphery of the opening end 120b of the mesa groove 120 and the side wall 120c of the mesa groove 120. It is formed to a predetermined thickness with high accuracy.
  • the glass (glass coating 124) as the passivation film is cut. There is no need.
  • the semiconductor device (mesa type pn diode) 100 can be manufactured.
  • FIG. 12 is a diagram showing an example of the relationship between the electrical conductivity of the suspension 12 and the adhesion state of the deposit on the bottom 120a of the mesa groove 120.
  • FIG. 13 is a photograph of the upper surface of the semiconductor wafer in a state where the glass coating 124 before firing is formed in the glass coating formation step.
  • FIG. 14 is a photograph of a cross section of the mesa groove 120 including the fired glass coating 124 in the glass coating formation step.
  • the second range of the electrical conductivity of the suspension 12 is set to a range of 20 nS / cm to 100 nS / cm, so that the lead-free glass fine particles can be removed at least from the bottom 120a of the mesa groove 120. It can be deposited in the mesa groove 120 accurately with a part (for example, near the center of the bottom 120a) exposed.
  • the glass film forming step before firing, at least a part of the bottom 120a of the mesa groove 120 (for example, near the center of the bottom 120a) is exposed, It has been confirmed that the glass coating 124 is formed so as to cover the periphery of the opening end 120 b of the mesa groove 120 and the side wall 120 c of the mesa groove 120.
  • the glass coating 124 is opened in the mesa groove 120 in a state where at least a part of the bottom 120 a of the mesa groove 120 is exposed after firing in the glass film forming step according to the embodiment. It can be confirmed that it is formed so as to cover the periphery of the end 120 b and the side wall 120 c of the mesa groove 120.
  • the adherence of lead-free glass particles to the semiconductor wafer is not stable, and the thickness of the lead-free glass particles deposited in the mesa groove is accurately adjusted. It cannot be controlled to a predetermined thickness.
  • the glass film of the lead-free glass fine particle deposit is opened in the mesa groove with at least a part of the bottom of the mesa groove exposed. It can be accurately formed to a predetermined thickness so as to cover the periphery of the end and the side wall of the mesa groove.
  • the adherence of lead-free glass particles to the semiconductor wafer is stable, and the thickness of the deposit of lead-free glass particles deposited in the mesa groove can be accurately controlled to a predetermined thickness.
  • a method for manufacturing a semiconductor device includes a semiconductor wafer preparation step of preparing a semiconductor wafer W having a mesa groove formed on a glass film formation surface, and a lead-free glass fine particle suspended in a solvent.
  • the first electrode plate and the second electrode plate are placed opposite to each other in the suspended suspension and the semiconductor wafer is placed between the first electrode plate and the second electrode plate.
  • a glass film forming step of forming a glass film on the glass film forming surface by electrophoretic deposition with the glass film forming surface facing the first electrode plate.
  • the glass film which is a deposit of lead-free glass fine particles, is covered with the periphery of the opening end 120b of the mesa groove and the side wall of the mesa groove with at least a part of the bottom of the mesa groove exposed.
  • the suspension used in the glass film forming step is prepared by controlling the dielectric constant of the solvent containing lead-free glass fine particles in the first range, and then adding the organic solvent and the nitric acid that is an electrolyte to the solvent.
  • a mixed liquid (electrolyte solution) containing and a suspension whose electric conductivity is controlled in the second range the first range of the dielectric constant of the solvent is in the range of 5-7,
  • the second range of electrical conductivity of the suspension is in the range of 20 nS / cm to 100 nS / cm.
  • the glass film of the lead-free glass fine particle deposit is accurately coated to a predetermined thickness so as to cover the periphery of the opening end of the mesa groove and the side wall of the mesa groove. Can be formed.
  • a semiconductor wafer plate made of silicon is used as the semiconductor wafer, but the present invention is not limited to this.
  • a semiconductor wafer made of SiC, GaN, GaO or the like can be used.

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PCT/JP2017/015723 2017-04-19 2017-04-19 半導体装置の製造方法 WO2018193554A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/JP2017/015723 WO2018193554A1 (ja) 2017-04-19 2017-04-19 半導体装置の製造方法
CN201780000855.6A CN109121423B (zh) 2017-04-19 2017-04-19 半导体装置的制造方法
JP2017540673A JP6396598B1 (ja) 2017-04-19 2017-04-19 半導体装置の製造方法
TW106126889A TWI657512B (zh) 2017-04-19 2017-08-09 半導體裝置的製造方法

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JP2023507407A (ja) * 2019-12-20 2023-02-22 スリーエム イノベイティブ プロパティズ カンパニー 光制御フィルム及びその製造方法
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