WO2018166166A1 - 半导体器件、阵列基板和半导体器件的制造方法 - Google Patents

半导体器件、阵列基板和半导体器件的制造方法 Download PDF

Info

Publication number
WO2018166166A1
WO2018166166A1 PCT/CN2017/102862 CN2017102862W WO2018166166A1 WO 2018166166 A1 WO2018166166 A1 WO 2018166166A1 CN 2017102862 W CN2017102862 W CN 2017102862W WO 2018166166 A1 WO2018166166 A1 WO 2018166166A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
electrode
thin film
film transistor
semiconductor device
Prior art date
Application number
PCT/CN2017/102862
Other languages
English (en)
French (fr)
Inventor
孙建明
黄睿
吴慧利
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to JP2018519022A priority Critical patent/JP7077222B2/ja
Priority to EP17854185.0A priority patent/EP3598497A4/en
Priority to US15/767,605 priority patent/US10431701B2/en
Priority to KR1020187011232A priority patent/KR102102195B1/ko
Publication of WO2018166166A1 publication Critical patent/WO2018166166A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G06V40/13—Sensors therefor
    • G06V40/1318—Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022466—Electrodes made of transparent conductive layers, e.g. TCO, ITO layers
    • H01L31/022483—Electrodes made of transparent conductive layers, e.g. TCO, ITO layers composed of zinc oxide [ZnO]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/1443—Devices controlled by radiation with at least one potential jump or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/1446—Devices controlled by radiation in a repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78642—Vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/1013—Devices sensitive to infrared, visible or ultraviolet radiation devices sensitive to two or more wavelengths, e.g. multi-spectrum radiation detection devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/1016—Devices sensitive to infrared, visible or ultraviolet radiation comprising transparent or semitransparent devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/105—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PIN type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1884—Manufacture of transparent electrodes, e.g. TCO, ITO

Definitions

  • This disclosure relates to the field of semiconductor technology. More specifically, it relates to a semiconductor device, an array substrate, and a method of fabricating a semiconductor device.
  • Light detection technology is applied to the display field including semiconductor devices.
  • an external light source can affect the visual effect of the screen, so adjusting the brightness of the light source of the screen according to the brightness of the external light source can improve the visual effect of the screen.
  • Optical detectors can be used in fingerprint recognition technology.
  • optical detectors are more demanding, requiring a larger light detection area to be able to detect higher photocurrents.
  • the integration of fingerprint recognition technology on the TFT-LCD display requires higher light detection requirements.
  • Embodiments of the present disclosure provide a semiconductor device, an array substrate, and a method of fabricating a semiconductor device, which can at least solve the problem that the light detection cannot be effectively integrated with a thin film transistor in the prior art, and at least can increase the photosensitive area of the device without Affect the aperture ratio.
  • a first aspect of the present disclosure provides a semiconductor device.
  • the semiconductor device includes: a substrate, a thin film transistor formed on the substrate, and a first photo detecting structure adjacent to the thin film transistor, wherein the first photo detecting structure includes a first bottom electrode, a top electrode and a first photosensitive portion disposed between the first bottom electrode and the first top electrode, the thin film crystal
  • the first photo detecting structure includes a first bottom electrode, a top electrode and a first photosensitive portion disposed between the first bottom electrode and the first top electrode, the thin film crystal
  • One of a source electrode and a drain electrode of the tube is disposed in the same layer as the first bottom electrode of the first photodetecting structure; in the source electrode and the drain electrode of the thin film transistor The other is used as the first top electrode.
  • the first photosensitive portion has a bottom surface, a top surface, a first side surface facing the thin film transistor, and a second side surface away from the thin film transistor
  • the semiconductor device further comprising: disposed at a first spacer layer between the thin film transistor and the first photo detecting structure, wherein the first spacer layer covers the first side surface and the one of the source and drain electrodes One is spaced apart from the first bottom electrode.
  • the semiconductor device further includes a second light detecting structure adjacent to the second side surface of the first light detecting structure, wherein the second light detecting structure includes a second bottom electrode, a second top electrode and a second photosensitive portion disposed between the second bottom electrode and the second top electrode, wherein the second bottom electrode is integral with the first bottom electrode;
  • the two photosensitive portions extend on the second side surface.
  • the semiconductor device further includes: a second spacer layer disposed between the first light detecting structure and the second light detecting structure, wherein the second spacer layer covers the first The two side surfaces and the first top electrode are spaced apart from the second photosensitive portion.
  • the semiconductor device further includes an insulating layer, wherein the insulating layer has a first portion, a second portion, and a third portion, the first portion being disposed on an active layer and a gate of the thin film transistor Between the poles, the second portion covers the first top electrode shown, and the third portion covers the second photosensitive portion.
  • the first photosensitive portion comprises a visible light sensitive material and the first top electrode comprises a transparent conductive material.
  • the first photosensitive portion comprises a PIN photosensitive structure.
  • the second photosensitive portion comprises an ultraviolet light sensitive material and the second top electrode comprises a transparent conductive material.
  • the active layer of the thin film transistor and the second photosensitive portion of the second photodetecting structure comprise indium gallium zinc oxide.
  • Another object of the present disclosure is to provide an array substrate.
  • a second aspect of the present disclosure provides an array substrate.
  • the array substrate includes the semiconductor device shortened as above.
  • a third aspect of the present disclosure provides a method of fabricating a semiconductor device.
  • the manufacturing method of the semiconductor device includes: forming a thin film transistor on a substrate and a first photo detecting structure adjacent to the thin film transistor, wherein the first photo detecting structure includes a first bottom electrode and a first top electrode And a first photosensitive portion disposed between the first bottom electrode and the first top electrode, one of a source electrode and a drain electrode of the thin film transistor and the first portion of the first light detecting structure A bottom electrode is disposed in the same layer; the other of the source electrode and the drain electrode of the thin film transistor is used as the first top electrode.
  • the method further includes forming a second light detecting structure adjacent to a second side surface of the first light detecting structure, wherein the second light detecting structure includes a second bottom electrode, a second top electrode and a second photosensitive portion disposed between the second bottom electrode and the second top electrode, wherein the second bottom electrode is integral with the first bottom electrode;
  • the second photosensitive portion extends on the second side surface.
  • the thin film transistor and the second photodetecting structure are formed simultaneously.
  • forming the thin film transistor, the first photo detecting structure, and the second photo detecting structure include: forming one of a source electrode and a drain electrode as a thin film transistor on a substrate a first sub-conductive layer and a second sub-conductive layer as a first bottom electrode of the first photo-detecting structure, wherein the first sub-conductive layer and the second sub-conductive layer have a space therebetween; Forming the first photosensitive portion on the conductive layer; forming a second conductive layer on the first photosensitive portion to serve as the first top electrode; forming a first spacer layer on the first photosensitive portion and a spacer layer, wherein the first spacer layer covers the first side surface of the first photosensitive portion and the spacer, and the second spacer layer covers the second side of the first photosensitive portion a surface and a portion of the first top electrode; forming a first semiconductor layer and a second semiconductor layer on the first spacer layer and the second spacer layer, wherein the first semiconductor layer covers the On a spacer layer and in contact with the first
  • forming the first sub-conductive layer and the second sub-conductive layer on the substrate comprises:
  • Forming the first spacer layer and forming the second spacer layer includes:
  • the first cover layer has a first opening on the top surface of the first top electrode to form the first spacer layer and the second spacer layer separated by the first opening,
  • Forming the first semiconductor layer and the second semiconductor layer includes: forming a semiconductor material layer on the first spacer layer and the second spacer layer; patterning the semiconductor material layer such that the patterned semiconductor material layer has a second opening on the top surface of the first top electrode to form the first semiconductor layer and the second semiconductor layer separated by the second opening, and wherein the second The opening is smaller than the first opening to bring the first semiconductor layer into contact with the first top electrode.
  • a fourth aspect of the present disclosure provides a display panel.
  • the display panel includes the array substrate as described above.
  • a fifth aspect of the present disclosure provides a display device.
  • the display device includes a display panel as described above.
  • FIG. 1 is a schematic diagram of a semiconductor device in accordance with an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of a semiconductor device in accordance with an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of a semiconductor device in accordance with an embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of a semiconductor device in accordance with an embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of a semiconductor device in accordance with an embodiment of the present disclosure.
  • FIG. 6 is a flow chart of a method of fabricating a semiconductor device in accordance with an embodiment of the present disclosure
  • FIG. 7(a)-7(h) are process schematic diagrams of a method of fabricating a semiconductor device in accordance with an embodiment of the present disclosure
  • FIG. 8 is a schematic flow chart of a method of manufacturing the semiconductor of FIG. 6;
  • FIG. 9 is an equivalent circuit schematic diagram of a semiconductor device in accordance with an embodiment of the present disclosure.
  • FIG. 10 is a schematic diagram of an array substrate in accordance with an embodiment of the present disclosure.
  • FIG. 11 is a schematic diagram of a display panel in accordance with an embodiment of the present disclosure.
  • FIG. 12 is a schematic diagram of a display device in accordance with an embodiment of the present disclosure.
  • the terms “upper”, “lower”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom” and The derivative should refer to the public text.
  • the terms “overlay”, “on top of”, “positioned on” or “positioned on top of” mean the first such as the first structure
  • An element exists on a second element such as a second structure, wherein an intermediate element such as an interface structure may exist between the first element and the second element.
  • the term “contacting” means connecting a first element such as a first structure and a second element such as a second structure, with or without other elements at the interface of the two elements.
  • FIG. 1 is a schematic diagram of a semiconductor device in accordance with an embodiment of the present disclosure.
  • a semiconductor device may include a substrate 1, a thin film transistor TFT formed on a substrate, and a first photo detecting structure DT1 adjacent to the thin film transistor.
  • the first photodetecting structure DT1 includes a first bottom electrode 21, a first top electrode 22, and a first photosensitive portion 23 disposed between the first bottom electrode and the first top electrode, and a source electrode and a drain electrode of the thin film transistor.
  • One of the source electrodes 11 is disposed in the same layer as the first bottom electrode 21 of the first photodetecting structure; the other of the source and drain electrodes of the thin film transistor is used as the first top electrode.
  • the first light detecting structure includes a first bottom electrode, a first top electrode, and is disposed in the a first photosensitive portion between the first bottom electrode and the first top electrode, one of a source electrode and a drain electrode of the thin film transistor being in the same layer as the first bottom electrode of the first light detecting structure
  • the other of the source electrode and the drain electrode of the thin film transistor is used as the first top electrode, and at least the thin film transistor and the photodetecting structure can be integrated into one device, and at least Light detection is achieved without the need for additional equipment, reducing manufacturing costs and increasing aperture ratio.
  • the first photosensitive portion 23 has a bottom surface, a top surface, a first side surface S1 facing the thin film transistor, and a second side surface S2 away from the thin film transistor, the semiconductor device further comprising: a thin film transistor TFT and a first spacer layer 120 between the first photo detecting structures DT1, wherein the first spacer layer 120 covers the first side surface S1 and one of the source and drain electrodes 11 and the first bottom electrode 21 Interspersed.
  • FIG. 3 is a schematic diagram of a semiconductor device in accordance with an embodiment of the present disclosure.
  • the semiconductor device further includes a second photo detecting structure DT2 adjacent to the second side surface S2 of the first photo detecting structure, wherein the second photo detecting structure DT2 includes a second bottom electrode 31 and a second top An electrode 32 and a second photosensitive portion 33 disposed between the second bottom electrode 31 and the second top electrode 32, wherein the second bottom electrode 32 is integral with the first bottom electrode 21; the second photosensitive portion 33 is at The two side surfaces S2 extend.
  • the semiconductor device further includes: a second spacer layer 230 disposed between the first photo detecting structure DT1 and the second photo detecting structure DT2, wherein the second spacer layer 230 covers the second side surface S2 and The first top electrode 22 is spaced apart from the second photosensitive portion 33.
  • FIG. 5 is a schematic diagram of a semiconductor device in accordance with an embodiment of the present disclosure.
  • the semiconductor device further includes an insulating layer 123, wherein the insulating layer has a first portion P1, a second portion P2, and a third portion P3, and the first portion P1 is disposed on the active layer 13 and the gate electrode 14 of the thin film transistor. Between the second portion is covered on the first top electrode 22 and the third portion is overlaid on the second photosensitive portion 33.
  • the thin film transistor shown in Fig. 5 has a long length in the longitudinal direction (i.e., the direction perpendicular to the upper surface of the substrate).
  • the aperture ratio of the display device can be improved.
  • the first light detecting structure may be a visible light detecting structure.
  • the first photosensitive portion may include a visible light sensitive material
  • the first top electrode may include a transparent conductive material.
  • the first photosensitive portion can include a PIN photosensitive structure.
  • a light detecting structure such as a PIN photosensitive structure can detect the optical power incident on its surface.
  • the transparent conductive material may include Indium Tin Oxide (ITO).
  • the second photosensitive portion may comprise an ultraviolet sensitive material and the second top electrode may comprise a transparent conductive material such as ITO.
  • the conductivity of the ultraviolet sensitive material as the photosensitive portion changes.
  • the corresponding ultraviolet light intensity can be obtained based on the output current of the second photodetecting structure at this time.
  • the molybdenum may include (Mo), molybdenum-niobium alloy (MoNb), aluminum (Al), aluminum-niobium alloy (AlNd). a single layer or a plurality of layers formed of one or more of titanium (Ti) and copper (Cu).
  • the first spacer layer, the second spacer layer, and the insulating layer may include one of silicon oxide (SiOx), silicon nitride (SiNx), germanium oxide (HfOx), silicon oxynitride (SiON), and the like. Single or multiple layers of either or both materials.
  • the material of the active layer of the thin film transistor and the second photosensitive portion of the second photodetecting structure may include indium gallium zinc oxide (IGZO).
  • the semiconductor device is capable of integrating the thin film transistor and the photodetecting structure in one device, can realize light detection without an additional device, reduces manufacturing cost, and increases aperture ratio.
  • the visible light detection structure can be used for fingerprint recognition and detection of external light source size.
  • the UV detection structure detects the intensity of the UV light and meets the need to detect UV intensity without the need for additional equipment or the risk of product damage due to additional equipment.
  • Embodiments of the present disclosure also provide an array substrate.
  • a semiconductor device as described above is included.
  • a method of fabricating a semiconductor device may include forming a thin film transistor on a substrate and a first photo detecting structure adjacent to the thin film transistor, wherein the first photo detecting structure includes a first bottom electrode a first top electrode and a first photosensitive portion disposed between the first bottom electrode and the first top electrode, one of a source electrode and a drain electrode of the thin film transistor and the first light detecting The first bottom electrode of the structure is disposed in the same layer; the other of the source electrode and the drain electrode of the thin film transistor is used as the first top electrode.
  • the method of fabricating a semiconductor device further includes: forming a second light detecting structure adjacent to a second side surface of the first light detecting structure, wherein the second light detecting junction The second bottom electrode, the second top electrode, and a second photosensitive portion disposed between the second bottom electrode and the second top electrode, wherein the second bottom electrode and the first bottom The electrode is unitary; the second photosensitive portion extends over the second side surface.
  • the thin film transistor can be formed simultaneously with the second photodetecting structure.
  • FIG. 6 is a flow chart of a method of fabricating a semiconductor device in accordance with an embodiment of the present disclosure.
  • 7(a)-7(h) are process schematic diagrams of a method of fabricating a semiconductor device in accordance with an embodiment of the present disclosure.
  • a method of manufacturing a semiconductor device according to an embodiment of the present disclosure will be described below with reference to FIGS. 6 and 7(a) to 7(h).
  • forming the thin film transistor, the first light detecting structure, and the second light detecting structure includes:
  • a first sub-conducting layer 11A as one of a source electrode and a drain electrode of the thin film transistor and a first photodetecting structure as a first photodetecting structure are formed on the substrate 1.
  • a first spacer layer 120 and a second spacer layer 230 are formed on the first photosensitive portion 23, wherein the first spacer layer 120 covers the first side surface S1 of the first photosensitive portion 23. And a spacing SP, the second spacer layer 230 covers the second side surface S2 of the first photosensitive portion and a portion of the first top electrode 22;
  • a first semiconductor layer 13A and a second semiconductor layer 33A are formed on the first spacer layer 120 and the second spacer layer 230, wherein the first semiconductor layer 13A covers the first spacer layer 120 and in contact with the first top electrode 22 to serve as the active layer 13 of the thin film transistor, the second semiconductor layer 33A overlying the second spacer layer to serve as the second photosensitive portion 33 of the second light detecting structure;
  • a second cover layer 123A as an insulating layer 123 is formed on the first semiconductor layer 13A and the second semiconductor layer 33A;
  • a fourth conductive layer 32A is formed on the second cap layer 123A, wherein the fourth conductive layer 32A is in contact with the second semiconductor layer 33A to serve as the second top electrode 32.
  • FIG. 8 is a schematic flow chart of a method of manufacturing the semiconductor of FIG. 6.
  • forming the first sub-conductive layer and the second sub-conductive layer on the substrate includes:
  • Forming the first spacer layer and forming the second spacer layer includes:
  • Forming the first semiconductor layer and the second semiconductor layer includes:
  • the third conductive layer serving as the gate of the thin film transistor may be formed by patterning, and the fourth conductive layer acting on the second top electrode may also be formed by patterning.
  • the patterning process may include photolithography, wet etching, dry etching, etc., and will not be described here.
  • the first conductive layer and the third conductive layer may include one or more of molybdenum (Mo), molybdenum-niobium alloy (MoNb), aluminum (Al), aluminum-niobium alloy (AlNd), titanium (Ti), and copper (Cu).
  • Mo molybdenum
  • MoNb molybdenum-niobium alloy
  • Al aluminum-niobium alloy
  • Ti titanium
  • Cu copper
  • the first photosensitive portion may include, for example, a PIN structure for detecting visible light.
  • the second photosensitive portion may include, for example, an ultraviolet light sensitive material for detecting ultraviolet light.
  • the second conductive layer and the fourth conductive layer may include a transparent conductive material such as ITO.
  • First cover layer and second The cap layer may include a single layer of one or both of silicon oxide (SiOx), silicon nitride (SiNx), germanium oxide (HfOx), silicon oxynitride (SiON), or the like or Multi-layered.
  • SiOx silicon oxide
  • SiNx silicon nitride
  • HfOx germanium oxide
  • SiON silicon oxynitride
  • the material of the active layer of the thin film transistor and the second photosensitive portion of the second photodetecting structure may include indium gallium zinc oxide IGZO in consideration of the driving function of the thin film transistor and the photosensitive function of the photodetector.
  • FIG. 9 is an equivalent circuit schematic of a semiconductor device in accordance with an embodiment of the present disclosure.
  • a voltage V1 (for example, -3 V) may be applied to the first photodetection structure DT1 and the second photodetection structure DT2, and a timing voltage V2 may be applied to the TFT. Therefore, fingerprint detection and intensity detection of an external light source can be realized by detecting the current i1, and the intensity of the external ultraviolet light can be detected by detecting the current i2.
  • FIG. 10 is a schematic diagram of a display device in accordance with an embodiment of the present disclosure.
  • an array substrate 2000 in accordance with an embodiment of the present disclosure includes a semiconductor device 1000 in accordance with the present disclosure.
  • the semiconductor device 1000 may include the semiconductor device as shown in FIGS. 1, 2, 3, 4, and 5.
  • FIG. 11 is a schematic diagram of a display panel in accordance with an embodiment of the present disclosure.
  • a display panel 3000 according to an embodiment of the present disclosure includes an array substrate 2000 according to the present disclosure.
  • the array substrate may include an array substrate as shown in FIG.
  • FIG. 12 is a schematic diagram of a display device in accordance with an embodiment of the present disclosure.
  • a display device 4000 according to an embodiment of the present disclosure includes a display panel 3000 according to the present disclosure.
  • the display panel 3000 may include a display panel as described in FIG.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Human Computer Interaction (AREA)
  • Multimedia (AREA)
  • Theoretical Computer Science (AREA)
  • Thin Film Transistor (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Light Receiving Elements (AREA)

Abstract

一种半导体器件、阵列基板和半导体器件的制造方法。所述半导体器件包括：衬底（1），形成在所述衬底（1）上的薄膜晶体管和与所述薄膜晶体管相邻的第一光检测结构，其中，所述第一光检测结构包括第一底电极（31）、第一顶电极（32）和设置在所述第一底电极（31）和第一顶电极（32）之间的第一光敏部（23），所述薄膜晶体管的源极电极和漏极电极中的一者与（11）所述第一光检测结构的所述第一底电极（31）同层设置；所述薄膜晶体管的所述源极电极和所述漏极电极中的另一者（22）被用作所述第一顶电极。

Description

半导体器件、阵列基板和半导体器件的制造方法
相关申请的交叉引用
本申请要求于2017年03月13日递交的中国专利申请第201710146018.6号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开文本涉及半导体技术领域。更具体地，涉及一种半导体器件、阵列基板和半导体器件的制造方法。
背景技术
光检测技术被应用于包括半导体器件的显示领域。例如，外部光源会影响屏幕的视觉效果，因此，根据外部光源的亮度来调整屏幕的光源的亮度可以改善屏幕的视觉效果。
光学检测器可以用于指纹识别技术。对于采用光学探测器的指纹识别，对光学探测器件要求较高，其需要较大的光探测面积以能够探测较高的光电流。尤其是将指纹识别技术集成在TFT-LCD显示屏上，对光探测要求会更高。
发明内容
本公开文本的实施例提供一种半导体器件、阵列基板和半导体器件的制造方法，至少能够解决现有技术中光检测不能和薄膜晶体管有效的集成的问题，且至少能够增加器件的感光面积而不影响开口率。
本公开文本的第一方面提供了一种半导体器件。所述半导体器件包括：衬底，形成在所述衬底上的薄膜晶体管和与所述薄膜晶体管相邻的第一光检测结构，其中，所述第一光检测结构包括第一底电极、第一顶电极和设置在所述第一底电极和第一顶电极之间的第一光敏部，所述薄膜晶体 管的源极电极和漏极电极中的一者与所述第一光检测结构的所述第一底电极同层设置；所述薄膜晶体管的所述源极电极和所述漏极电极中的另一者被用作所述第一顶电极。
在一个实施例中，所述第一光敏部具有底表面、顶表面、朝向所述薄膜晶体管的第一侧表面和远离所述薄膜晶体管的第二侧表面，所述半导体器件还包括：设置在所述薄膜晶体管和所述第一光检测结构之间的第一间隔层，其中，所述第一间隔层覆盖所述第一侧表面并且将所述源极电极和漏极电极中的所述一者与所述第一底电极间隔开。
在一个实施例中，所述半导体器件还包括与所述第一光检测结构的第二侧表面相邻的第二光检测结构，其中，所述第二光检测结构包括第二底电极、第二顶电极和设置在所述第二底电极和所述第二顶电极之间的第二光敏部，其中，所述第二底电极和与所述第一底电极是一体的；所述第二光敏部在所述第二侧表面上延伸。
在一个实施例中，所述半导体器件还包括：设置在所述第一光检测结构和所述第二光检测结构之间的第二间隔层，其中，所述第二间隔层覆盖所述第二侧表面并且将所述第一顶电极与所述第二光敏部间隔开。
在一个实施例中，所述半导体器件还包括绝缘层，其中，所述绝缘层具有第一部分、第二部分和第三部分，所述第一部分被设置在所述薄膜晶体管的有源层和栅极之间，所述第二部分覆盖在所示第一顶电极上，所述第三部分覆盖在所述第二光敏部上。
在一个实施例中，所述第一光敏部包括可见光敏感材料，所述第一顶电极包括透明导电材料。
在一个实施例中，所述第一光敏部包括PIN光敏结构。
在一个实施例中，所述第二光敏部包括紫外光敏感材料，所述第二顶电极包括透明导电材料。
在一个实施例中，所述薄膜晶体管的有源层和所述第二光检测结构的第二感光部包括铟镓锌氧化物。
本公开文本的另一个目的在于提供一种阵列基板。
本公开文本的第二方面提供了一种阵列基板。所述阵列基板包括如上缩短的半导体器件。
本公开文本的又一个目的在于提供一种半导体器件的制造方法。
本公开文本的第三方面提供了一种半导体器件的制造方法。所述半导体器件的制造方法包括：在衬底上形成薄膜晶体管和与所述薄膜晶体管相邻的第一光检测结构，其中，所述第一光检测结构包括第一底电极、第一顶电极和设置在所述第一底电极和第一顶电极之间的第一光敏部，所述薄膜晶体管的源极电极和漏极电极中的一者与所述第一光检测结构的所述第一底电极同层设置；所述薄膜晶体管的所述源极电极和所述漏极电极中的另一者被用作所述第一顶电极。
在一个实施例中，所述方法还包括：形成与所述第一光检测结构的第二侧表面相邻的第二光检测结构，其中，所述第二光检测结构包括第二底电极、第二顶电极和设置在所述第二底电极和所述第二顶电极之间的第二光敏部，其中，所述第二底电极和与所述第一底电极是一体的；所述第二光敏部在所述第二侧表面上延伸。
在一个实施例中，所述薄膜晶体管与所述第二光检测结构被同时形成。
在一个实施例中，形成所述薄膜晶体管、所述第一光检测结构和所述第二光检测结构包括：在衬底上形成作为薄膜晶体管的源极电极和漏极电极中的一者的第一子导电层和作为第一光检测结构的第一底电极的第二子导电层，其中，所述第一子导电层和第二子导电层之间具有间隔；在所述第二子导电层上形成所述第一光敏部；在所述第一光敏部上形成第二导电层，以用作所述第一顶电极；在所述第一光敏部上形成第一间隔层和第二间隔层，其中，所述第一间隔层覆盖所述第一光敏部的所述第一侧表面和所述间隔，所述第二间隔层覆盖所述第一光敏部的所述第二侧表面和所述第一顶电极的一部分；在所述第一间隔层和所述第二间隔层上形成第一半导体层和第二半导体层，其中，所述第一半导体层覆盖在所述第一间隔层上且与所述第一顶电极接触以用作所述薄膜晶体管的有源层，所述第二 半导体层覆盖在所述第二间隔层上以用作所述第二光检测结构的所述第二光敏部；在所述第一半导体层和所述第二半导体层上形成第二覆盖层；在所述第二覆盖层上形成第三导电层，以形成所述薄膜晶体管的栅极；在所述第二覆盖层上形成第四导电层，其中，所述第四导电层与所述第二半导体层接触以用作所述第二顶电极。
在一个实施例中，在衬底上形成第一子导电层和第二子导电层包括：
在所述衬底上形成第一导电层；对所述第一导电层进行构图，以形成通过所述间隔而隔开的所述第一子导电层和所述第二子导电层，
形成第一间隔层和形成第二间隔层包括：
在所述间隔、所述第一侧表面、所述第一顶电极的顶表面和所述第二侧表面上设置第一覆盖层；对所述第一覆盖层进行构图，使得被构图后的第一覆盖层在所述第一顶电极的所述顶表面上具有第一开口，以形成通过所述第一开口隔开的所述第一间隔层和所述第二间隔层，
形成第一半导体层和第二半导体层包括：在所述第一间隔层和所述第二间隔层上形成半导体材料层；对所述半导体材料层进行构图，使得被构图后的半导体材料层具有在所述第一顶电极的所述顶表面上的第二开口，以形成通过所述第二开口隔开的所述第一半导体层和所述第二半导体层，并且其中，所述第二开口小于所述第一开口，以使得所述第一半导体层和所述第一顶电极接触。
本公开文本的又一个目的在于提供一种显示面板。
本公开文本的第四方面提供了一种显示面板。所述显示面板包括如上所述的阵列基板。
本公开文本的还一个目的在于提供一种显示装置。
本公开文本的第五方面提供了一种显示装置。所述显示装置包括如上所述的显示面板。
附图说明
为了更清楚地说明本公开文本的实施例的技术方案，下面将对实施例的附图进行简要说明，应当知道，以下描述的附图仅仅涉及本公开文本的一些实施例，而非对本公开文本的限制，其中：
图1为根据本公开文本的实施例的半导体器件的示意图；
图2为根据本公开文本的实施例的半导体器件的示意图；
图3为根据本公开文本的实施例的半导体器件的示意图；
图4为根据本公开文本的实施例的半导体器件的示意图；
图5为根据本公开文本的实施例的半导体器件的示意图；
图6为根据本公开文本的实施例的半导体器件的制造方法的流程图；
图7(a)-图7(h)为根据本公开文本的实施例的半导体器件的制造方法的工艺示意图；
图8为图6的半导体的制造方法的进一步流程示意图；
图9为根据本公开文本的实施例的半导体器件的等效电路示意图；
图10为根据本公开文本的一个实施例的阵列基板的示意图；
图11为根据本公开文本的一个实施例的显示面板的示意图；
图12为根据本公开文本的一个实施例的显示装置的示意图。
具体实施方式
为了使本公开文本的实施例的目的、技术方案和优点更加清楚，下面将接合附图，对本公开文本的实施例的技术方案进行清楚、完整的描述。显然，所描述的实施例是本公开文本的一部分实施例，而不是全部的实施例。基于所描述的本公开文本的实施例，本领域技术人员在无需创造性劳动的前提下所获得的所有其他实施例，也都属于本公开文本保护的范围。
当介绍本公开文本的元素及其实施例时，除非上下文中另外明确地指出，否则在本文和所附权利要求中所使用的词语的单数形式包括复数，反之亦然。因而，当提及单数时，通常包括相应术语的复数。用语“包含”、“包括”、“含有”和“具有”旨在包括性的并且表示可以存在除所列要素之外的另外的要素。
出于下文表面描述的目的，如其在附图中被标定方向那样，术语“上”、“下”、“左”、“右”“垂直”、“水平”、“顶”、“底”及其派生词应涉及公开文本。术语“上覆”、“在......顶上”、“定位在......上”或者“定位在......顶上”意味着诸如第一结构的第一要素存在于诸如第二结构的第二要素上，其中，在第一要素和第二要素之间可存在诸如界面结构的中间要素。术语“接触”意味着连接诸如第一结构的第一要素和诸如第二结构的第二要素，而在两个要素的界面处可以有或者没有其它要素。
图1为根据本公开文本的实施例的半导体器件的示意图。如图1所示，根据本公开文本的实施例的半导体器件可以包括：衬底1，形成在衬底上的薄膜晶体管TFT和与薄膜晶体管相邻的第一光检测结构DT1。第一光检测结构DT1包括第一底电极21、第一顶电极22和设置在第一底电极和第一顶电极之间的第一光敏部23，薄膜晶体管的源极电极和漏极电极中的一者11与第一光检测结构的第一底电极21同层设置；薄膜晶体管的源极电极和漏极电极中的另一者12被用作第一顶电极。
通过形成在所述衬底上的薄膜晶体管和与所述薄膜晶体管相邻的第一光检测结构，其中，所述第一光检测结构包括第一底电极、第一顶电极和设置在所述第一底电极和第一顶电极之间的第一光敏部，所述薄膜晶体管的源极电极和漏极电极中的一者与所述第一光检测结构的所述第一底电极同层设置；所述薄膜晶体管的所述源极电极和所述漏极电极中的另一者被用作所述第一顶电极，至少能够将薄膜晶体管和光检测结构集成于一个器件之中，可以至少实现光检测而无需另外的装置，降低了制造成本，并且增大开口率。
图2为根据本公开文本的实施例的半导体器件的示意图。为了简便起见，在图2中省略了薄膜晶体管TFT的若干部分。如图2所示，第一光敏部23具有底表面、顶表面、朝向薄膜晶体管的第一侧表面S1和远离薄膜晶体管的第二侧表面S2，该半导体器件还包括：设置在薄膜晶体管TFT和第一光检测结构DT1之间的第一间隔层120，其中，第一间隔层120覆盖第一侧表面S1并且将源极电极和漏极电极中的一者11与第一底电极21 间隔开。
图3为根据本公开文本的实施例的半导体器件的示意图。如图3所示，半导体器件还包括与第一光检测结构的第二侧表面S2相邻的第二光检测结构DT2，其中，第二光检测结构DT2包括第二底电极31、第二顶电极32和设置在第二底电极31和第二顶电极32之间的第二光敏部33，其中，第二底电极32和与第一底电极21是一体的；第二光敏部33在第二侧表面S2上延伸。
图4为根据本公开文本的实施例的半导体器件的示意图。如图4所示，半导体器件还包括：设置在第一光检测结构DT1和第二光检测结构DT2之间的第二间隔层230，其中，第二间隔层230覆盖第二侧表面S2并且将第一顶电极22与第二光敏部33间隔开。
图5为根据本公开文本的实施例的半导体器件的示意图。如图5所示，半导体器件还包括绝缘层123，其中，绝缘层具有第一部分P1、第二部分P2和第三部分P3，第一部分P1被设置在薄膜晶体管的有源层13和栅极14之间，第二部分覆盖在第一顶电极22上，第三部分覆盖在第二光敏部33上。可以看出，图5所示的薄膜晶体管在纵向(即，垂直于衬底的上表面的方向)上具有较长的长度。从而，当将图5的半导体器件用于显示装置时，能够提高显示装置的开口率。
在一种实施方式中，第一光检测结构可以为可见光检测结构。在该种情况下，第一光敏部可以包括可见光敏感材料，第一顶电极可以包括透明导电材料。例如，第一光敏部可以包括PIN光敏结构。诸如PIN光敏结构的光检测结构可以检测入射于其表面上的光功率。透明导电材料可以包括氧化铟锡(Indium Tin Oxide，ITO)。当手指触摸设置有本公开文本的实施例的半导体器件的装置时，由于手指的折射，会改变光的光路，使得第一光敏部的电阻发生变化。第一光敏部的电阻变化会导致第一光检测结构输出的电流发生变化，从而能够进行指纹识别。
在一种实施方式中，第二光敏部可以包括紫外敏感材料，第二顶电极可以包括诸如ITO的透明导电材料。在第二光敏部接收到不同强度的紫外 光时，作为光敏部的紫外敏感材料的导电性能会发生变化。可以基于此时的第二光检测结构的输出电流而得到相应的紫外光强度。
薄膜晶体的源极和漏极中与第一底电极被同层设置的一者和第一底电极可以钼包括(Mo)、钼铌合金(MoNb)、铝(Al)、铝钕合金(AlNd)、钛(Ti)和铜(Cu)中的一种或多种材料形成的单层或多层。第一间隔层、第二间隔层和绝缘层可以包括硅的氧化物(SiOx)、硅的氮化物(SiNx)、铪的氧化物(HfOx)、硅的氮氧化物(SiON)等中的一种或两种材料形成的单层或多层。
考虑到薄膜晶体管的驱动功能和光检测器的感光功能，薄膜晶体管的有源层和第二光检测结构的第二光敏部的材料可以包括铟镓锌氧化物(indium gallium zinc oxide，IGZO)。
根据本公开文本的实施例的半导体器件能够将薄膜晶体管和光检测结构集成于一个器件之中，可以实现光检测而无需另外的装置，降低了制造成本，并且增大开口率。可见光检测结构能够用于指纹识别和外部光源大小的检测。紫外光检测结构可以检测出紫外光的强度，能够满足检测紫外线强度的需求，而无需另外的装置，也不会有附加另外的装置导致产品损坏的风险。
本公开文本的实施例还提供了一种阵列基板。包括如上所述的半导体器件。
本公开文本的实施例还提供了一种半导体器件的制造方法。在一个实施例中，半导体器件的制造方法可以包括：在衬底上形成薄膜晶体管和与所述薄膜晶体管相邻的第一光检测结构，其中，所述第一光检测结构包括第一底电极、第一顶电极和设置在所述第一底电极和第一顶电极之间的第一光敏部，所述薄膜晶体管的源极电极和漏极电极中的一者与所述第一光检测结构的所述第一底电极同层设置；所述薄膜晶体管的所述源极电极和所述漏极电极中的另一者被用作所述第一顶电极。
在一个实施例中，半导体器件的制造方法还包括：形成与所述第一光检测结构的第二侧表面相邻的第二光检测结构，其中，所述第二光检测结 构包括第二底电极、第二顶电极和设置在所述第二底电极和所述第二顶电极之间的第二光敏部，其中，所述第二底电极和与所述第一底电极是一体的；所述第二光敏部在所述第二侧表面上延伸。
在一种实施方式中，薄膜晶体管可以和第二光检测结构被同时形成。
图6为根据本公开文本的实施例的半导体器件的制造方法的流程图。图7(a)-图7(h)为根据本公开文本的实施例的半导体器件的制造方法的工艺示意图。下面将结合图6和图7(a)-图7(h)对根据本公开文本的实施例的半导体器件的制造方法进行说明。如图6和图7(a)-图7(h)所示，形成所述薄膜晶体管、第一光检测结构和第二光检测结构包括：
S1、如图7(a)所示，在衬底1上形成作为薄膜晶体管的源极电极和漏极电极中的一者11的第一子导电层11A和作为第一光检测结构的第一底电极21的第二子导电层21A，其中，第一子导电层11A和第二子导电层之间具有间隔SP；
S3、如图7(b)所示，在第二子导电层上形成第一光敏部23；
S5、如图7(c)所示，在第一光敏部上形成第二导电层22A，以形成第一顶电极22；
S7、如图7(d)所示，在第一光敏部23上形成第一间隔层120和第二间隔层230，其中，第一间隔层120覆盖第一光敏部23的第一侧表面S1和间隔SP，第二间隔层230覆盖第一光敏部的第二侧表面S2和第一顶电极22的一部分；
S9、如图7(e)所示，在第一间隔层120和第二间隔层230上形成第一半导体层13A和第二半导体层33A，其中，第一半导体层13A覆盖在第一间隔层120上且与第一顶电极22接触以用作薄膜晶体管的有源层13，第二半导体层33A覆盖在第二间隔层上以用作第二光检测结构的第二光敏部33；
S11、如图7(f)所示，在第一半导体层13A和第二半导体层33A上形成作为绝缘层123的第二覆盖层123A；
S13、如图7(g)所示，在第二覆盖层123A上形成第三导电层14A， 以形成薄膜晶体管的栅极14；
S15、如图7(h)所示，在第二覆盖层123A上形成第四导电层32A，其中，第四导电层32A与第二半导体层33A接触以用作第二顶电极32。
图8为图6的半导体的制造方法的进一步流程示意图。如图8所示，在衬底上形成第一子导电层和第二子导电层包括：
S101、在衬底上形成第一导电层；
S102、对所述第一导电层进行构图，以形成通过间隔而隔开的第一子导电层和第二子导电层，
形成第一间隔层和形成第二间隔层包括：
S701、在间隔、第一侧表面第一顶电极的顶表面和第二侧表面上设置第一覆盖层；
S702、对所述第一覆盖层进行构图，使得被构图后的第一覆盖层在所述第一顶电极的所述顶表面上具有第一开口，以形成通过所述第一开口隔开的所述第一间隔层和所述第二间隔层，
形成第一半导体层和第二半导体层包括：
S901、在第一间隔层和第二间隔层上形成半导体材料层；
S902、对半导体材料层进行构图，使得被构图后的半导体材料层具有在第一顶电极的顶表面上的第二开口，以形成通过第二开口隔开的第一半导体层和第二半导体层，并且其中，第二开口和第一开口相对准，以使得第一半导体层和第一顶电极接触。
用作薄膜晶体管的栅极的第三导电层可以通过构图而形成，作用第二顶电极的第四导电层也可以通过构图而形成。构图的工艺可以包括光刻、湿法刻蚀、干法刻蚀等，这里不再冗述。
第一导电层和第三导电层可以钼包括(Mo)、钼铌合金(MoNb)、铝(Al)、铝钕合金(AlNd)、钛(Ti)和铜(Cu)中的一种或多种材料形成的单层或多层。第一光敏部可以包括，例如，用于检测可见光的PIN结构。第二光敏部可以包括，例如，用于检测紫外光的紫外光敏感材料。第二导电层和第四导电层可以包括诸如ITO的透明导电材料。第一覆盖层和第二 覆盖层可以包括硅的氧化物(SiOx)、硅的氮化物(SiNx)、铪的氧化物(HfOx)、硅的氮氧化物(SiON)等中的一种或两种材料形成的单层或多层。
考虑到薄膜晶体管的驱动功能和光检测器的感光功能，薄膜晶体管的有源层和第二光检测结构的第二光敏部的材料可以包括铟镓锌氧化物IGZO。
图9为根据本公开文本的实施例的半导体器件的等效电路示意图。如图9所示，可以向第一光检结构DT1和第二光检测结构DT2测施加电压V1(例如-3V)，向TFT施加时序电压V2。从而通过检测电流i1可以实现指纹识别和外部光源的强度检测，通过检测电流i2可以检测出外部紫外线的强度。
图10为根据本公开文本的一个实施例的显示装置的示意图。如图10所示，根据本公开文本的实施例的阵列基板2000包括根据本公开文本的半导体器件1000。半导体器件1000可以包括如图1、图2、图3、图4和图5中所示的半导体器件。
图11为根据本公开文本的一个实施例的显示面板的示意图。如图11所示，根据本公开文本的实施例的显示面板3000包括根据本公开文本的阵列基板2000。阵列基板可以包括如图10所示的阵列基板。
图12为根据本公开文本的一个实施例的显示装置的示意图。如图12所示，根据本公开文本的实施例的显示装置4000包括根据本公开文本的显示面板3000。显示面板3000可以包括如图11所述的显示面板。
已经描述了某特定实施例，这些实施例仅通过举例的方式展现，而且不旨在限制本公开文本的范围。事实上，本文所描述的新颖实施例可以以各种其它形式来实施；此外，可在不脱离本公开文本的精神下，做出以本文所描述的实施例的形式的各种省略、替代和改变。所附权利要求以及它们的等价物旨在覆盖落在本公开文本范围和精神内的此类形式或者修改。

Claims (17)

  1. 一种半导体器件，包括：衬底，形成在所述衬底上的薄膜晶体管和与所述薄膜晶体管相邻的第一光检测结构，其中，所述第一光检测结构包括第一底电极、第一顶电极和设置在所述第一底电极和第一顶电极之间的第一光敏部，
    所述薄膜晶体管的源极电极和漏极电极中的一者与所述第一光检测结构的所述第一底电极同层设置；
    所述薄膜晶体管的所述源极电极和所述漏极电极中的另一者被用作所述第一顶电极。
  2. 根据权利要求1所述的半导体器件，其中，所述第一光敏部具有底表面、顶表面、朝向所述薄膜晶体管的第一侧表面和远离所述薄膜晶体管的第二侧表面，所述半导体器件还包括：
    设置在所述薄膜晶体管和所述第一光检测结构之间的第一间隔层，其中，所述第一间隔层覆盖所述第一侧表面并且将所述源极电极和漏极电极中的所述一者与所述第一底电极间隔开。
  3. 根据权利要求2所述的半导体器件，所述半导体器件还包括与所述第一光检测结构的第二侧表面相邻的第二光检测结构，其中，
    所述第二光检测结构包括第二底电极、第二顶电极和设置在所述第二底电极和所述第二顶电极之间的第二光敏部，其中，
    所述第二底电极和与所述第一底电极是一体的；
    所述第二光敏部在所述第二侧表面上延伸。
  4. 根据权利要求3所述的半导体器件，所述半导体器件还包括：
    设置在所述第一光检测结构和所述第二光检测结构之间的第二间隔层，其中，所述第二间隔层覆盖所述第二侧表面并且将所述第一顶电极与所述第二光敏部间隔开。
  5. 根据权利要求4所述的半导体器件，所述半导体器件还包括绝缘层，其中，所述绝缘层具有第一部分、第二部分和第三部分，所述第一部分被设置在所述薄膜晶体管的有源层和栅极之间，所述第二部分覆盖在所示第 一顶电极上，所述第三部分覆盖在所述第二光敏部上。
  6. 根据权利要求1-5中任一项所述的半导体器件，其中，所述第一光敏部包括可见光敏感材料，所述第一顶电极包括透明导电材料。
  7. 根据权利要求1-6中任一项所述的半导体器件，其中，所述第一光敏部包括PIN光敏结构。
  8. 根据权利要求3-5中任一项所述的半导体器件，其中，所述第二光敏部包括紫外光敏感材料，所述第二顶电极包括透明导电材料。
  9. 根据权利要求3-8中任一项所述的半导体器件，其中，所述薄膜晶体管的有源层和所述第二光检测结构的第二感光部包括铟镓锌氧化物。
  10. 一种阵列基板，包括根据权利要求1-9中任一项所述的半导体器件。
  11. 一种半导体器件的制造方法，包括：在衬底上形成薄膜晶体管和与所述薄膜晶体管相邻的第一光检测结构，其中，所述第一光检测结构包括第一底电极、第一顶电极和设置在所述第一底电极和第一顶电极之间的第一光敏部，
    所述薄膜晶体管的源极电极和漏极电极中的一者与所述第一光检测结构的所述第一底电极同层设置；
    所述薄膜晶体管的所述源极电极和所述漏极电极中的另一者被用作所述第一顶电极。
  12. 根据权利要求11所述的半导体器件的制造方法，所述方法还包括：形成与所述第一光检测结构的第二侧表面相邻的第二光检测结构，其中，所述第二光检测结构包括第二底电极、第二顶电极和设置在所述第二底电极和所述第二顶电极之间的第二光敏部，其中，
    所述第二底电极和与所述第一底电极是一体的；
    所述第二光敏部在所述第二侧表面上延伸。
  13. 根据权利要求12所述的半导体器件的制造方法，其中，所述薄膜晶体管与所述第二光检测结构被同时形成。
  14. 根据权利要求13所述的半导体器件的制造方法，形成所述薄膜晶 体管、所述第一光检测结构和所述第二光检测结构包括：
    在衬底上形成作为薄膜晶体管的源极电极和漏极电极中的一者的第一子导电层和作为第一光检测结构的第一底电极的第二子导电层，其中，所述第一子导电层和第二子导电层之间具有间隔；
    在所述第二子导电层上形成所述第一光敏部；
    在所述第一光敏部上形成第二导电层，以用作所述第一顶电极；
    在所述第一光敏部上形成第一间隔层和第二间隔层，其中，所述第一间隔层覆盖所述第一光敏部的所述第一侧表面和所述间隔，所述第二间隔层覆盖所述第一光敏部的所述第二侧表面和所述第一顶电极的一部分；
    在所述第一间隔层和所述第二间隔层上形成第一半导体层和第二半导体层，其中，所述第一半导体层覆盖在所述第一间隔层上且与所述第一顶电极接触以用作所述薄膜晶体管的有源层，所述第二半导体层覆盖在所述第二间隔层上以用作所述第二光检测结构的所述第二光敏部；
    在所述第一半导体层和所述第二半导体层上形成第二覆盖层；
    在所述第二覆盖层上形成第三导电层，以形成所述薄膜晶体管的栅极；
    在所述第二覆盖层上形成第四导电层，其中，所述第四导电层与所述第二半导体层接触以用作所述第二顶电极。
  15. 根据权利要求14所述的半导体器件的制造方法，其中，
    在衬底上形成第一子导电层和第二子导电层包括：
    在所述衬底上形成第一导电层；
    对所述第一导电层进行构图，以形成通过所述间隔而隔开的所述第一子导电层和所述第二子导电层，
    形成第一间隔层和形成第二间隔层包括：
    在所述间隔、所述第一侧表面、所述第一顶电极的顶表面和所述第二侧表面上设置第一覆盖层；
    对所述第一覆盖层进行构图，使得被构图后的第一覆盖层在所述第一顶电极的所述顶表面上具有第一开口，以形成通过所述第一开口隔开的所 述第一间隔层和所述第二间隔层，
    形成第一半导体层和第二半导体层包括：
    在所述第一间隔层和所述第二间隔层上形成半导体材料层；
    对所述半导体材料层进行构图，使得被构图后的半导体材料层具有在所述第一顶电极的所述顶表面上的第二开口，以形成通过所述第二开口隔开的所述第一半导体层和所述第二半导体层，
    并且其中，所述第二开口和所述第一开口相对准，以使得所述第一半导体层和所述第一顶电极接触。
  16. 一种显示面板，包括根据权利要求10所述的阵列基板。
  17. 一种显示装置，包括根据权利要求16所述的显示面板。
PCT/CN2017/102862 2017-03-13 2017-09-22 半导体器件、阵列基板和半导体器件的制造方法 WO2018166166A1 (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2018519022A JP7077222B2 (ja) 2017-03-13 2017-09-22 半導体デバイス、アレイ基板及び半導体デバイスの製造方法
EP17854185.0A EP3598497A4 (en) 2017-03-13 2017-09-22 SEMICONDUCTOR DEVICE, NETWORK SUBSTRATE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
US15/767,605 US10431701B2 (en) 2017-03-13 2017-09-22 Semiconductor device, array substrate and method for fabricating semiconductor device
KR1020187011232A KR102102195B1 (ko) 2017-03-13 2017-09-22 반도체, 어레이 기판 및 반도체 디바이스를 제조하는 방법

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710146018.6 2017-03-13
CN201710146018.6A CN106935601B (zh) 2017-03-13 2017-03-13 半导体器件、阵列基板和半导体器件的制造方法

Publications (1)

Publication Number Publication Date
WO2018166166A1 true WO2018166166A1 (zh) 2018-09-20

Family

ID=59432118

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/102862 WO2018166166A1 (zh) 2017-03-13 2017-09-22 半导体器件、阵列基板和半导体器件的制造方法

Country Status (6)

Country Link
US (1) US10431701B2 (zh)
EP (1) EP3598497A4 (zh)
JP (1) JP7077222B2 (zh)
KR (1) KR102102195B1 (zh)
CN (1) CN106935601B (zh)
WO (1) WO2018166166A1 (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106935601B (zh) * 2017-03-13 2019-08-23 京东方科技集团股份有限公司 半导体器件、阵列基板和半导体器件的制造方法
TWI646691B (zh) * 2017-11-22 2019-01-01 友達光電股份有限公司 主動元件基板及其製造方法
CN108231804A (zh) * 2018-01-02 2018-06-29 京东方科技集团股份有限公司 一种光电探测单元及其制造方法、光电探测设备
JP2020004922A (ja) * 2018-07-02 2020-01-09 セイコーエプソン株式会社 光電変換装置、電子機器および光電変換装置の製造方法
CN109166943B (zh) * 2018-09-19 2021-01-26 京东方科技集团股份有限公司 探测基板及其制造方法、探测器
KR102551998B1 (ko) * 2018-11-20 2023-07-06 엘지디스플레이 주식회사 수직 구조 트랜지스터 및 전자장치
CN109599424B (zh) * 2018-12-06 2021-01-29 合肥鑫晟光电科技有限公司 一种显示基板及其制作方法、显示装置
TWI745119B (zh) * 2020-10-14 2021-11-01 友達光電股份有限公司 感光元件
CN112701149B (zh) 2020-12-29 2022-08-02 湖北长江新型显示产业创新中心有限公司 显示面板及显示装置
CN113325625B (zh) * 2021-06-24 2022-07-29 业成科技（成都）有限公司 显示面板的制备方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080297709A1 (en) * 2007-05-29 2008-12-04 Seiko Epson Corporation Liquid crystal device and electronic apparatus
CN102456623A (zh) * 2010-11-02 2012-05-16 乐金显示有限公司 有机电致发光设备的阵列基板及其制造方法
CN105243361A (zh) * 2015-07-31 2016-01-13 友达光电股份有限公司 光学检测装置及其制作方法
CN106129069A (zh) * 2016-07-26 2016-11-16 京东方科技集团股份有限公司 一种指纹识别器、其制作方法及显示装置
CN106935601A (zh) * 2017-03-13 2017-07-07 京东方科技集团股份有限公司 半导体器件、阵列基板和半导体器件的制造方法

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2201544A (en) * 1987-02-27 1988-09-01 Philips Electronic Associated Vertical thin film transistor
JPH01192166A (ja) * 1988-01-27 1989-08-02 Toppan Printing Co Ltd 受光素子
JP3144091B2 (ja) * 1992-09-30 2001-03-07 富士ゼロックス株式会社 ２次元イメージセンサ
JP2001326356A (ja) * 2000-05-15 2001-11-22 Canon Inc Ｔｆｔマトリックスパネル、および、これを用いた画像表示装置、光電変換装置
US6724010B1 (en) * 2000-08-03 2004-04-20 General Electric Company Solid state imager having gated photodiodes and method for making same
JP2002148342A (ja) * 2000-11-07 2002-05-22 Canon Inc 放射線撮像装置
KR100436376B1 (ko) * 2002-03-29 2004-06-19 테스텍 주식회사 접촉발광소자와 ｔｆｔ 지문입력기를 이용한 슬림형지문인식장치
JP4342774B2 (ja) * 2002-07-10 2009-10-14 シャープ株式会社 光電変換量検出方法および光電変換装置、画像入力方法および画像入力装置、２次元イメージセンサおよび２次元イメージセンサの駆動方法
US9577137B2 (en) * 2007-01-25 2017-02-21 Au Optronics Corporation Photovoltaic cells with multi-band gap and applications in a low temperature polycrystalline silicon thin film transistor panel
TWI384277B (zh) * 2007-09-07 2013-02-01 Japan Display West Inc 液晶顯示裝置
KR101579135B1 (ko) * 2008-12-03 2015-12-22 삼성디스플레이 주식회사 박막 트랜지스터 기판 및 그 제조 방법
JP2010225735A (ja) * 2009-03-23 2010-10-07 Mitsubishi Electric Corp フォトセンサー及びその製造方法
TWI410703B (zh) * 2009-06-18 2013-10-01 Au Optronics Corp 光學感測元件、其製作方法及光學式觸控裝置
CN101997010B (zh) * 2009-08-11 2012-12-05 元太科技工业股份有限公司 数字x光探测面板及其制作方法
CN103268891B (zh) * 2013-03-28 2016-08-10 北京京东方光电科技有限公司 一种薄膜晶体管、非晶硅平板探测基板及制备方法
CN104078421B (zh) * 2013-03-29 2018-01-30 北京京东方光电科技有限公司 非晶硅光电二极管基板的制造方法、基板及半导体装置
CN103560135B (zh) * 2013-11-14 2015-12-02 北京京东方光电科技有限公司 一种x射线传感器的阵列基板及其制造方法
CN104897280B (zh) * 2014-03-05 2017-05-03 北京大学深圳研究生院 一种紫外光传感电路及感应系统
US9985061B2 (en) * 2014-03-20 2018-05-29 Sharp Kabushiki Kaisha Light detection device with integrated photodiode and thin film transistor
KR20150114639A (ko) * 2014-04-01 2015-10-13 삼성디스플레이 주식회사 표시 장치
JP2016122732A (ja) * 2014-12-25 2016-07-07 株式会社半導体エネルギー研究所 撮像装置
TWI574374B (zh) * 2015-09-09 2017-03-11 友達光電股份有限公司 製作光學感測元件與薄膜電晶體元件的方法
WO2017150295A1 (ja) * 2016-02-29 2017-09-08 シャープ株式会社 光電変換装置
TWI613804B (zh) * 2017-09-04 2018-02-01 友達光電股份有限公司 光感測裝置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080297709A1 (en) * 2007-05-29 2008-12-04 Seiko Epson Corporation Liquid crystal device and electronic apparatus
CN102456623A (zh) * 2010-11-02 2012-05-16 乐金显示有限公司 有机电致发光设备的阵列基板及其制造方法
CN105243361A (zh) * 2015-07-31 2016-01-13 友达光电股份有限公司 光学检测装置及其制作方法
CN106129069A (zh) * 2016-07-26 2016-11-16 京东方科技集团股份有限公司 一种指纹识别器、其制作方法及显示装置
CN106935601A (zh) * 2017-03-13 2017-07-07 京东方科技集团股份有限公司 半导体器件、阵列基板和半导体器件的制造方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3598497A4 *

Also Published As

Publication number Publication date
US10431701B2 (en) 2019-10-01
EP3598497A1 (en) 2020-01-22
KR20180118595A (ko) 2018-10-31
EP3598497A4 (en) 2020-12-30
US20190044007A1 (en) 2019-02-07
KR102102195B1 (ko) 2020-04-21
CN106935601B (zh) 2019-08-23
JP2020512678A (ja) 2020-04-23
CN106935601A (zh) 2017-07-07
JP7077222B2 (ja) 2022-05-30

Similar Documents

Publication Publication Date Title
WO2018166166A1 (zh) 半导体器件、阵列基板和半导体器件的制造方法
KR102559090B1 (ko) 인셀형 터치 패널을 갖는 백플레인 기판
WO2020211415A1 (zh) 半导体装置、像素电路及其控制方法
JP5174988B2 (ja) 回路基板および表示装置
US20130088460A1 (en) Optical touch screen apparatus and method of manufacturing the optical touch screen apparatus
TWI465979B (zh) 觸控面板
TWI523205B (zh) 畫素結構及顯示面板
US20090278121A1 (en) System for displaying images and fabrication method thereof
US8330880B2 (en) Reflective type touch-sensing display panel and manufacturing method thereof
WO2012137711A1 (ja) 半導体装置および表示装置
KR101955336B1 (ko) 광 센싱 트랜지스터, 이의 제조방법 및 이를 채용한 디스플레이 패널
TW201533891A (zh) 顯示面板及顯示裝置
JP5964738B2 (ja) 薄膜トランジスタを採用したディスプレイパネル
TWI485428B (zh) 電濕潤顯示面板
US8941138B2 (en) Semiconductor structure comprising a stacked dielectric layer
JP2010251496A (ja) イメージセンサー
TWI596793B (zh) 光感測裝置及其製造方法
KR102068275B1 (ko) 박막 트랜지스터 표시판 및 그 제조 방법
TWI439984B (zh) 光感測元件陣列基板及其製造方法
WO2021111805A1 (ja) 半導体装置
KR102138037B1 (ko) 박막트랜지스터, 이를 포함하는 표시패널 및 박막트랜지스터 제조방법
WO2020103090A1 (zh) 光学指纹识别装置、阵列基板及显示装置
KR20110063225A (ko) 전기영동 표시장치 및 이의 제조방법
JP2010093118A (ja) 受光素子および受光装置
US9589986B2 (en) Array substrate, display device and method for fabricating array substrate

Legal Events

Date Code Title Description
ENP Entry into the national phase

Ref document number: 2018519022

Country of ref document: JP

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 20187011232

Country of ref document: KR

Kind code of ref document: A

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17854185

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE