WO2012137711A1 - 半導体装置および表示装置 - Google Patents
半導体装置および表示装置 Download PDFInfo
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- WO2012137711A1 WO2012137711A1 PCT/JP2012/058867 JP2012058867W WO2012137711A1 WO 2012137711 A1 WO2012137711 A1 WO 2012137711A1 JP 2012058867 W JP2012058867 W JP 2012058867W WO 2012137711 A1 WO2012137711 A1 WO 2012137711A1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 108
- 239000010408 film Substances 0.000 claims abstract description 31
- 239000010409 thin film Substances 0.000 claims abstract description 18
- 239000000758 substrate Substances 0.000 claims description 30
- 238000007689 inspection Methods 0.000 claims description 21
- 229910052733 gallium Inorganic materials 0.000 claims description 5
- 229910052738 indium Inorganic materials 0.000 claims description 5
- 229910052725 zinc Inorganic materials 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 117
- 238000000034 method Methods 0.000 description 28
- 238000004519 manufacturing process Methods 0.000 description 17
- 239000004973 liquid crystal related substance Substances 0.000 description 12
- 239000010949 copper Substances 0.000 description 10
- 230000005611 electricity Effects 0.000 description 10
- 230000003068 static effect Effects 0.000 description 10
- 239000010936 titanium Substances 0.000 description 10
- 238000010586 diagram Methods 0.000 description 8
- 239000002356 single layer Substances 0.000 description 5
- 229910021417 amorphous silicon Inorganic materials 0.000 description 4
- 238000005401 electroluminescence Methods 0.000 description 4
- 239000011701 zinc Substances 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 239000004925 Acrylic resin Substances 0.000 description 2
- 229920000178 Acrylic resin Polymers 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
- H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136204—Arrangements to prevent high voltage or static electricity failures
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1365—Active matrix addressed cells in which the switching element is a two-electrode device
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2202/00—Materials and properties
- G02F2202/22—Antistatic materials or arrangements
Definitions
- the present invention relates to a semiconductor device including a thin film transistor (TFT) and a display device having such a semiconductor device.
- TFT thin film transistor
- TFT oxide semiconductor TFT
- oxide semiconductor TFT using an oxide semiconductor layer containing indium (In), zinc (Zn), gallium (Ga), or the like has been actively developed (for example, Patent Documents 1 to 3).
- the oxide semiconductor TFT has a characteristic of high mobility, for example, it is expected that the display quality of a liquid crystal display device including the oxide semiconductor TFT can be improved.
- the manufacturing process of a semiconductor device includes a process that easily generates static electricity, and the characteristics change or electrostatic breakdown is caused by the static electricity, so that the yield rate of semiconductor devices including TFTs decreases.
- the yield rate of semiconductor devices including TFTs decreases.
- Patent Document 4 discloses a TFT substrate provided with various means for preventing damage due to static electricity.
- Patent Document 4 discloses a TFT substrate provided with a diode ring for preventing electrostatic breakdown.
- the present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor device that can prevent damage due to static electricity in a semiconductor device including an oxide semiconductor TFT and a display device including such a semiconductor device. It is to provide.
- a semiconductor device includes an insulating substrate, a plurality of wirings formed on the insulating substrate, a plurality of thin film transistors, and a plurality of diode elements, each of which is two of the plurality of wirings.
- a plurality of diode elements that electrically connect the wirings to each other, wherein each of the plurality of diode elements includes a first electrode formed of the same conductive film as a gate electrode of the thin film transistor; An oxide semiconductor layer formed on the first electrode; and a second electrode and a third electrode formed from the same conductive film as the source electrode of the thin film transistor and in contact with the oxide semiconductor layer,
- the oxide semiconductor layer has an offset region between the first electrode and the second electrode and between the first electrode and the third electrode. It said offset region, when viewed from the normal direction of the insulating substrate do not overlap with the first electrode.
- the offset region does not overlap any of the first, second, and third electrodes when viewed from the normal direction of the insulating substrate.
- the width of the offset region in the direction parallel to the channel direction is 3 ⁇ m or more and 5 ⁇ m or less.
- the plurality of diode elements are electrically connected in parallel in opposite directions.
- the oxide semiconductor layer includes at least one of In, Ga, and Zn.
- the plurality of wirings include a plurality of source wirings and a plurality of gate wirings
- the plurality of diode elements include a diode element and two gate wirings that electrically connect two source wirings to each other. At least one of the diode elements that are electrically connected to each other.
- the plurality of wirings further include any of a plurality of auxiliary capacitance wirings, a common electrode wiring, or a plurality of inspection signal wirings, and the plurality of diode elements electrically connect two source wirings to each other.
- Diode element connected to each other, a diode element electrically connecting the two gate lines to each other, a diode element electrically connecting the gate line and the auxiliary capacity line to each other, and a source line and the auxiliary capacity line to each other electrically Diode element to be connected, diode element to electrically connect auxiliary capacitance line and common electrode line, diode element to electrically connect gate line and common electrode line, source line and common electrode line to each other Connected to each other or a diode element that electrically connects two inspection signal wirings to each other.
- a display device includes the above-described semiconductor device.
- a semiconductor device including an oxide semiconductor TFT
- a semiconductor device capable of preventing damage due to static electricity and a display device including such a semiconductor device are provided.
- (A) is an equivalent circuit diagram of the semiconductor device 100 in the embodiment according to the present invention, and (b) is a graph showing voltage-current characteristics of the diode element 10.
- (A) is a schematic plan view of the semiconductor device 100 including the diode element 10, and (b) is a schematic cross-sectional view taken along the line I-I 'of (a).
- 3 is a graph illustrating electrical characteristics of the diode element 10.
- (A) to (e) are diagrams for explaining a manufacturing process of the diode element 10.
- (A)-(e) is a figure explaining the manufacturing process of TFT for pixels. It is an equivalent circuit diagram explaining inspection signal wiring.
- the TFT substrate in this embodiment includes TFT substrates of various display devices (for example, liquid crystal display devices and EL display devices).
- FIG. 1A is an equivalent circuit diagram of the semiconductor device 100
- FIG. 1B is a graph showing the voltage (V) -current (I) characteristics of the diode element 10.
- V voltage
- I current
- FIG. 1A a liquid crystal capacitor 40 is also shown.
- the semiconductor device 100 is surrounded by a plurality of gate lines 14 arranged in parallel to each other, a plurality of source lines 16 orthogonal to the gate lines 14, and the gate lines 14 and the source lines 16.
- Pixel electrodes (not shown) provided in each rectangular region, and a thin film transistor (also referred to as a pixel TFT) 50 disposed near the intersection of the gate wiring 14 and the source wiring 16.
- the gate wiring 14 and the source wiring 16 are electrically connected to the thin film transistor 50, respectively.
- the gate wiring 14 is electrically connected to the gate terminal 14t
- the source wiring 16 is electrically connected to the source terminal 16t.
- the gate terminal 14t and the source terminal 16t are each electrically connected to an external wiring (not shown).
- the thin film transistor 50 is electrically connected to the pixel electrode and functions as a switching element that applies a voltage to the liquid crystal capacitance (pixel capacitance) 40 of each pixel.
- the liquid crystal capacitor 40 is formed by a pair of electrodes and a liquid crystal layer.
- An electrode connected to the drain electrode of the pixel TFT is a pixel electrode, and the other is a counter electrode.
- the counter electrode is formed on a counter substrate arranged to face the TFT substrate with the liquid crystal layer interposed therebetween. In the case of a liquid crystal display device in an IPS (In-Plane switching) mode or an FFS (Fringe Field switching) mode, a counter electrode is not formed on the counter substrate.
- An oxide semiconductor layer formed of the same oxide semiconductor film as the oxide semiconductor layer of the thin film transistor 50 is provided between two adjacent source wirings (for example, source wirings 16 (m) and 16 (m + 1)).
- the short ring diode elements 10A and 10B are formed.
- the diode elements 10A and 10B exemplified here have a structure in which a source electrode and a gate electrode of a TFT are short-circuited, and are also referred to as “TFT type diodes”.
- the directions of current flow are opposite to each other.
- the diode element 10A (m) passes a current from the source line 16 (m) to the source line 16 (m + 1)
- the diode element 10B (m) passes a current from the source line 16 (m + 1) to the source line 16 (m). Shed.
- the diode elements 10A and 10B are connected in parallel to all of the two source wirings adjacent to each other, so that the short ring 20A configured by the diode element 10A and the diode element 10B are configured.
- the short ring 20B is formed, and the short ring 20A and the short ring 20B constitute the short ring 20.
- the short ring 20 can flow current (diffuse charges) in both directions.
- the diode elements 10A and 10B may be arranged between the gate wiring 14 (n) and the gate wiring 14 (n + 1), and electrically connect the gate wiring 14 (n) and the gate wiring 14 (n + 1). .
- the semiconductor device 100 may further include a plurality of auxiliary capacitance lines, a common electrode line, or a plurality of inspection signal lines.
- the diode elements 10A and 10B are arranged between the gate wiring 14 and the auxiliary capacitance wiring, between the source wiring and the auxiliary capacitance wiring, between the auxiliary capacitance wiring and the common electrode wiring, between the gate wiring and the common electrode wiring, and the source wiring. Further, they may be arranged between the common electrode wirings or between the two inspection signal wirings, and the respective wirings may be electrically connected.
- the common electrode wiring is, for example, a wiring that is electrically connected to a counter electrode formed on a substrate facing the semiconductor device 100 when the semiconductor device 100 is used in a liquid crystal display device.
- the inspection signal wiring is a wiring for inspecting the electrical characteristics of the pixel TFT. Details of the inspection signal wiring are disclosed in Japanese Patent Application Laid-Open No. 2005-122209 and US Pat. No. 6,624,857. For reference, the entire contents disclosed in Japanese Patent Application Laid-Open No. 2005-122209 and US Pat. No. 6,624,857 are incorporated herein by reference.
- FIG. 6 is an equivalent circuit diagram for explaining the inspection signal wiring.
- the semiconductor device 100 is provided with, for example, three inspection signal wirings 26R, 26G, and 26B, an inspection TFT 27a, and an inspection control signal line 28.
- Each of the inspection signal wirings 26R, 26G, and 26B is electrically connected to, for example, the drain electrode of the inspection TFT 27a.
- each source wiring 16 (16 (m) to 16 (m + 3)) is electrically connected to, for example, a source electrode of the inspection TFT 27a.
- the gate electrode of the inspection TFT 27a is electrically connected to the inspection control signal line 28 to control the inspection TFT 27a.
- the diode element 10 is disposed between the source wirings 16 (m) and 16 (m + 3) connected to the inspection TFT 27a electrically connected to the same inspection signal wiring 26R, 26G, and 26B.
- the wiring 16 (m) and the source wiring 16 (m + 3) are connected.
- the graph shown in FIG. 1B is a graph showing the voltage (V) -current (I) characteristics of the diode element 10.
- the varistor voltage of the diode element 10 is 20V or more and 400V or less.
- a voltage equal to or lower than the varistor voltage is applied to the semiconductor layer of the diode element 10
- no current flows through the diode element 10, so that the source line 16 (m) and the source line 16 (m + 1) are insulated. Yes.
- a voltage exceeding the varistor voltage is applied to the semiconductor layer of the diode element 10
- a current flows through the diode element 10 and the source wiring 16 (m) and the source wiring 16 (m + 1) are electrically connected.
- a short ring diode element may be formed between two gate wirings adjacent to each other (for example, gate wirings 14 (n) and 14 (n + 1)). Further, a short ring diode element may be formed between the gate line 14 and the source line 16, and the source line short ring and the gate line short ring may be connected to each other.
- the diode elements 10A and 10B electrically connected to the source wiring 16 (or / and the gate wiring 14).
- the gates are opened, and charges are sequentially diffused toward the adjacent source wiring 16 (or / and gate wiring 14).
- all the source wirings 16 (or / and the gate wirings 14) are equipotential, so that the thin film transistor 50 can be prevented from being damaged by static electricity.
- FIG. 2 is a diagram for explaining the diode element 10 (10A and 10B) for the short ring.
- 2A is a schematic plan view of the diode element 10
- FIG. 2B is a cross-sectional view taken along the line I-I 'of FIG. 2A.
- the diode element 10 includes a conductive film that is the same as the gate electrode of a thin film transistor (for example, a pixel TFT) 50 (not shown) formed on the insulating substrate 1.
- the first electrode 3 (3a and 3b) formed from, the first insulating layer 4 formed on the first electrode 3, and the same as the oxide semiconductor layer of the thin film transistor 50 formed on the first insulating layer 4
- the oxide semiconductor layer 5 (5a and 5b) formed from the oxide semiconductor film and the second electrode 6 and the second electrode 6 formed from the same conductive film as the source electrode of the thin film transistor 50 in contact with the oxide semiconductor layer 5 3 electrodes 7.
- Offset regions 19 are formed between the first electrode 3 and the second electrode 6 of the oxide semiconductor layer 5 and between the first electrode 3 and the third electrode 7, respectively.
- the offset region 19 does not overlap the first electrode 3.
- the second electrode 6 is electrically connected to the source wiring 16 (m)
- the third electrode 7 is electrically connected to the source wiring 16 (m + 1).
- the first electrode 3 a of the diode element 10 ⁇ / b> A is electrically connected to the second electrode 6 by the transparent electrode 11.
- the first electrode 3b of the diode element 10B is electrically connected to the third electrode 7 by the transparent electrode 11.
- a second insulating layer 8 is formed so as to cover the oxide semiconductor layer 5, and a photosensitive organic insulating layer 9 is formed on the second insulating layer 8. Further, an etch stopper layer may be formed on the oxide semiconductor layer 5. Furthermore, the organic insulating layer 9 may not be formed.
- the channel length L of the diode element 10 is, for example, 30 ⁇ m, the channel width W is, for example, 5 ⁇ m, and the width (offset region width) W ′ in the direction parallel to the channel direction of the offset region 19 is, for example, 3 ⁇ m.
- the channel length L is preferably 10 ⁇ m or more and 50 ⁇ m or less, for example, the channel width W is preferably 2 ⁇ m or more and 10 ⁇ m or less, and the offset region width W ′ is preferably 1.5 ⁇ m or more and 5 ⁇ m or less.
- the first electrode 3, the second electrode 6, the third electrode 7, the gate wiring 14 and the source wiring 16 have a laminated structure in which, for example, a lower layer is a Ti (titanium) layer and an upper layer is a Cu (copper) layer.
- the thickness of the lower layer is, for example, 30 nm to 150 nm.
- the thickness of the upper layer is, for example, 200 nm to 500 nm.
- the upper layer may be an Al (aluminum) layer instead of the Cu layer, and the first electrode 3, the second electrode 6, the third electrode 7 and the source wiring 16 have, for example, only a Ti layer. It may have a single layer structure.
- the first insulating layer 4 and the second insulating layer 8 have a single layer structure containing, for example, SiN x (silicon nitride).
- the thicknesses of the first insulating layer 4 and the second insulating layer 8 are each 100 nm to 500 nm, for example.
- the oxide semiconductor layer 5 is an oxide semiconductor layer containing at least one element of, for example, In (indium), Ga (gallium), and Zn (zinc).
- the oxide semiconductor layer 5 is an amorphous oxide semiconductor layer (a-IGZO layer) containing In, Ga, and Zn.
- the thickness of the oxide semiconductor layer 5 is, for example, 20 nm to 200 nm.
- the thickness of the organic insulating layer 9 is 3 ⁇ m, for example.
- the transparent electrode 11 is made of, for example, ITO (Indium Tin Oxide).
- the thickness of the transparent electrode 11 is, for example, 50 nm to 200 nm.
- FIG. 3 is a graph showing the voltage (V) -current (I) characteristics of the element described below.
- a curve C1 in FIG. 3 is a curve showing a gate voltage (V) -current (I) characteristic of an oxide semiconductor TFT for a pixel included in the semiconductor device 100.
- a curve C2 is a curve showing the voltage (V) -current (I) characteristics of the diode element 10.
- a curve C3 shows voltage (V) -current (I) characteristics of a short ring diode element (a-Si diode element) having a generally used amorphous silicon (a-Si) layer as a semiconductor layer. It is a curve.
- the absolute value of the current value increases because the resistance value of the oxide semiconductor layer decreases as the absolute value of the applied voltage increases.
- the oxide semiconductor layer has high mobility, it is difficult to adjust the resistance value of the semiconductor layer to several M ⁇ to several hundred M ⁇ when a high voltage is applied. Therefore, a diode element having a configuration such as a pixel TFT is unlikely to function as a short ring diode element.
- the diode element 10 when the electrical characteristics of the diode element 10 and the electrical characteristics of the a-Si diode element are compared, the curve C2 and the curve C3 are substantially the same, and the diode element 10 can function as a diode element for a short ring. I understand. This is because the diode element 10 has the offset region 19 and the electrical resistance of the oxide semiconductor layer 5 of the diode element 10 is increased.
- FIG. 4 is a diagram for explaining a manufacturing method of the diode element 10
- FIG. 5 is a diagram for explaining a manufacturing method of the pixel TFT.
- the diode element 10 and the pixel TFT described here are formed by a series of processes.
- the method for manufacturing the semiconductor device 100 is not limited to the method described below.
- the diode element 10 can be formed by using a method for manufacturing a semiconductor device disclosed in International Publication No. 2012/011258.
- the entire disclosure of WO2012 / 011258 is incorporated herein by reference.
- a first electrode 3 having a laminated structure in which a lower layer is a Ti layer and an upper layer is a Cu layer is formed on an insulating substrate (for example, a glass substrate) 1 by a known method.
- the first electrode 3 is formed of the same conductive film as the gate electrode 53 of the pixel TFT described later.
- the thickness of the lower layer of the first electrode 3 is, for example, 30 nm to 150 nm.
- the thickness of the upper layer of the first electrode 3 is, for example, 200 nm to 500 nm.
- the upper layer may be, for example, an Al layer instead of the Cu layer, and the first electrode 3 may have a single layer structure formed of, for example, only a Ti layer.
- a first insulating layer 4 containing, for example, SiN x is formed on the first electrode 3 by a known method.
- the thickness of the first insulating layer 4 is, for example, 100 nm to 500 nm.
- an oxide semiconductor film is formed on the first insulating layer 4 by a known method.
- the oxide semiconductor film is formed from, for example, an a-IGZO film.
- the oxide semiconductor film is formed from a semiconductor film that forms a semiconductor layer of the pixel TFT.
- the thickness of the oxide semiconductor film is, for example, 50 nm to 300 nm.
- the oxide semiconductor film is patterned by a known method to form the oxide semiconductor layer 5.
- a conductive film having a laminated structure in which the lower layer is a Ti layer and the upper layer is a Cu layer is formed on the oxide semiconductor layer 5 by a known method.
- the conductive film is formed of the same conductive film as the source electrode 56 of the pixel TFT described later.
- the upper layer may be, for example, an Al layer instead of the Cu layer, and the conductive film may have a single layer structure formed of, for example, only a Ti layer.
- the thickness of the lower layer is, for example, 30 nm to 150 nm.
- the thickness of the upper layer is, for example, 200 nm to 500 nm.
- the conductive film is patterned by a known method to form the second electrode 6 and the third electrode 7.
- an offset region 19 is also formed.
- the offset region 19 is formed so as not to overlap any of the first electrode 3, the second electrode 6, and the third electrode 7.
- a second insulating layer 8 is formed on the second and third electrodes 6 and 7 by a known method.
- the second insulating layer 8 is made of, for example, SiN x (silicon nitride).
- the thickness of the second insulating layer 8 is, for example, 100 nm to 500 nm.
- a photosensitive organic insulating layer 9 is formed on the second insulating layer 8 by a known method.
- the organic insulating layer 9 is made of, for example, a photosensitive acrylic resin.
- the thickness of the organic insulating layer 9 is 3 ⁇ m, for example.
- a transparent electrode 11 is formed on the organic insulating layer 9 by a known method.
- the transparent electrode 11 is made of, for example, ITO.
- the thickness of the transparent electrode 11 is, for example, 50 nm to 200 nm.
- a gate electrode 53 having a laminated structure in which a lower layer is a Ti layer and an upper layer is a Cu layer is formed on an insulating substrate (for example, a glass substrate) 1 by a known method.
- the size of the gate electrode 53 is larger than that of the first electrode 3.
- the first insulating layer 4 containing, for example, SiN x is formed on the gate electrode 53 by a known method.
- the thickness of the first insulating layer 4 is, for example, 100 nm to 500 nm.
- an oxide semiconductor film is formed on the first insulating layer 4 by a known method.
- the oxide semiconductor film is formed from, for example, an a-IGZO film.
- the thickness of the oxide semiconductor film is, for example, 50 nm to 300 nm.
- the oxide semiconductor film is patterned by a known method to form the oxide semiconductor layer 55.
- a conductive film having a stacked structure in which the lower layer is a Ti layer and the upper layer is a Cu layer is formed on the oxide semiconductor layer 55 by a known method.
- the upper layer may be, for example, an Al layer instead of the Cu layer, and the conductive film may have a single-layer structure formed of, for example, only a Ti layer.
- the thickness of the lower layer is, for example, 30 nm to 150 nm.
- the thickness of the upper layer is, for example, 200 nm to 500 nm.
- the conductive film is patterned by a known method to form the source electrode 56 and the drain electrode 57.
- the gate electrode 53 is formed larger than the first electrode 3, the above-described offset region 19 is not formed.
- the second insulating layer 8 is formed on the source electrode 56 and the drain electrode 57 by a known method.
- the second insulating layer 8 is made of, for example, SiN x (silicon nitride).
- the thickness of the second insulating layer 8 is, for example, 100 nm to 500 nm.
- a photosensitive organic insulating layer 9 is formed on the second insulating layer 8 by a known method.
- the organic insulating layer 9 is made of, for example, a photosensitive acrylic resin.
- the thickness of the organic insulating layer 9 is 3 ⁇ m, for example.
- a pixel electrode 61 is formed on the organic insulating layer 9 by a known method.
- the pixel electrode 61 is formed from a transparent electrode, and is formed from, for example, ITO.
- the thickness of the pixel electrode 61 is, for example, 50 nm to 200 nm.
- the diode element 10 and the pixel TFT can be manufactured by a manufacturing process in which at least a part of the processes is a common process. Therefore, the semiconductor device 100 can be manufactured efficiently.
- the semiconductor device and the manufacturing method thereof according to the embodiment of the present invention are not limited to the above example, and include cases where antistatic is desired.
- a semiconductor device manufacturing method capable of preventing damage due to static electricity in a semiconductor device including an oxide semiconductor TFT, and a semiconductor device manufactured by such a manufacturing method.
- the present invention relates to a circuit substrate such as an active matrix substrate, a liquid crystal display device, a display device such as an organic electroluminescence (EL) display device and an inorganic electroluminescence display device, an imaging device such as an image sensor device, an image input device, and a fingerprint.
- a circuit substrate such as an active matrix substrate, a liquid crystal display device, a display device such as an organic electroluminescence (EL) display device and an inorganic electroluminescence display device, an imaging device such as an image sensor device, an image input device, and a fingerprint.
- EL organic electroluminescence
- an imaging device such as an image sensor device
- an image input device an image input device
- a fingerprint a fingerprint detection device
- the present invention can be widely applied to a semiconductor device including a thin film transistor such as a reading device.
Abstract
Description
3、3a、3b 第1電極
4、8、9 絶縁層
5、5a、5b 酸化物半導体層
6 第2電極
7 第3電極
10、10A、10B ダイオード素子
11 透明電極
19 オフセット領域
100 半導体装置
Claims (8)
- 絶縁基板と、
前記絶縁基板上に形成された複数の配線と、
複数の薄膜トランジスタと、
複数のダイオード素子であって、それぞれが前記複数の配線の内の2本の配線を互いに電気的に接続する複数のダイオード素子とを有する半導体装置であって、
前記複数のダイオード素子はそれぞれ、
前記薄膜トランジスタのゲート電極と同一の導電膜から形成された第1電極と、
前記第1電極上に形成された酸化物半導体層と、
前記薄膜トランジスタのソース電極と同一の導電膜から形成され、前記酸化物半導体層と接触する第2電極および第3電極とを有し、
前記酸化物半導体層は、前記第1電極と前記第2電極との間、および、前記第1電極と前記第3電極との間に、それぞれオフセット領域を有し、前記オフセット領域は、前記絶縁基板の法線方向から見たとき、前記第1電極と重なっていない、半導体装置。 - 前記オフセット領域は、前記絶縁基板の法線方向から見たとき、前記第1、第2および第3電極のいずれとも重なっていない、請求項1に記載の半導体装置。
- 前記オフセット領域のチャネル方向と平行な方向の幅は、3μm以上5μm以下である、請求項1または2に記載の半導体装置。
- 前記複数のダイオード素子は、互いに逆方向で並列に電気的に接続されている、請求項1から3のいずれかに記載の半導体装置。
- 前記酸化物半導体層は、In、Ga、およびZnの少なくとも1つを含む、請求項1から4のいずれかに記載の半導体装置。
- 前記複数の配線は、複数のソース配線および複数のゲート配線を含み、
前記複数のダイオード素子は、2本のソース配線を互いに電気的に接続するダイオード素子および2本のゲート配線を互いに電気的に接続するダイオード素子の少なくとも1つを含む、請求項1から5のいずれかに記載の半導体装置。 - 前記複数の配線は、複数の補助容量配線、共通電極配線、または複数の検査信号配線のいずれかをさらに含み、
前記複数のダイオード素子は、2本のソース配線を互いに電気的に接続するダイオード素子、2本のゲート配線を互いに電気的に接続するダイオード素子、ゲート配線と補助容量配線とを互いに電気的に接続するダイオード素子、ソース配線と補助容量配線とを互いに電気的に接続するダイオード素子、補助容量配線と共通電極配線とを互いに電気的に接続するダイオード素子、ゲート配線と共通電極配線とを互いに電気的に接続するダイオード素子、ソース配線と共通電極配線とを互いに電気的に接続するダイオード素子、または2本の検査信号配線を互いに電気的に接続するダイオード素子を含む、請求項1から6のいずれかに記載の半導体装置。 - 請求項1から7のいずれかに記載の半導体装置を有する、表示装置。
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US14/110,194 US20140027769A1 (en) | 2011-04-08 | 2012-04-02 | Semiconductor device and display device |
KR1020137026382A KR101537458B1 (ko) | 2011-04-08 | 2012-04-02 | 반도체 장치 및 표시 장치 |
JP2013503894A JP5284553B2 (ja) | 2011-04-08 | 2012-04-02 | 半導体装置および表示装置 |
CN2012800163262A CN103460391A (zh) | 2011-04-08 | 2012-04-02 | 半导体装置和显示装置 |
EP12767502.3A EP2755239A4 (en) | 2011-04-08 | 2012-04-02 | SEMICONDUCTOR DEVICE AND DISPLAY DEVICE |
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CN103460391A (zh) | 2013-12-18 |
EP2755239A4 (en) | 2015-06-10 |
EP2755239A1 (en) | 2014-07-16 |
KR101537458B1 (ko) | 2015-07-16 |
US20140027769A1 (en) | 2014-01-30 |
KR20140012712A (ko) | 2014-02-03 |
JP5284553B2 (ja) | 2013-09-11 |
JPWO2012137711A1 (ja) | 2014-07-28 |
TW201248864A (en) | 2012-12-01 |
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