WO2017115621A1 - Dispositif de conversion de puissance - Google Patents

Dispositif de conversion de puissance Download PDF

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Publication number
WO2017115621A1
WO2017115621A1 PCT/JP2016/086258 JP2016086258W WO2017115621A1 WO 2017115621 A1 WO2017115621 A1 WO 2017115621A1 JP 2016086258 W JP2016086258 W JP 2016086258W WO 2017115621 A1 WO2017115621 A1 WO 2017115621A1
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WIPO (PCT)
Prior art keywords
switch
power
capacitor
input
state
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PCT/JP2016/086258
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English (en)
Japanese (ja)
Inventor
俊彰 佐藤
淳也 三井
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ダイキン工業株式会社
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Priority claimed from JP2016148393A external-priority patent/JP6168211B2/ja
Application filed by ダイキン工業株式会社 filed Critical ダイキン工業株式会社
Priority to EP16881600.7A priority Critical patent/EP3399638A4/fr
Priority to AU2016381882A priority patent/AU2016381882B2/en
Priority to US15/781,277 priority patent/US10218287B2/en
Priority to CN201680076064.7A priority patent/CN108475996A/zh
Publication of WO2017115621A1 publication Critical patent/WO2017115621A1/fr

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/06—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
    • H02M7/10—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode arranged for operation in series, e.g. for multiplication of voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Definitions

  • the present invention relates to a technique for converting an AC voltage into a DC voltage, and more particularly to a technique using both full-wave rectification and voltage doubler rectification.
  • Patent Document 1 discloses a converter that performs switching between a full-wave rectifier circuit and a voltage doubler rectifier circuit.
  • Patent Document 2 discloses a power converter that performs switching between a booster circuit and a voltage doubler rectifier circuit.
  • Patent Document 3 discloses a power converter that performs switching between a booster circuit, a voltage doubler rectifier circuit, and a full-wave rectifier circuit.
  • the booster circuit can be used in combination with a voltage doubler rectifier circuit or in combination with a full-wave rectifier circuit.
  • Patent Documents 4 to 6 are listed as related to this case.
  • Japanese Patent Laid-Open No. 10-174442 Japanese Patent Laid-Open No. 11-164562 JP 2001-95262 A JP-A-9-266664 JP 2014-113037 A JP 2000-188867 A
  • an object of the present invention is to provide a technique for switching a booster circuit for improving the power factor and switching a full-wave rectifier circuit and a voltage doubler rectifier circuit.
  • the power converter according to the present invention converts a single-phase AC voltage (Va) output from a power source (9) into a DC voltage (Vd) and supplies the DC voltage to a load (3) ( 100).
  • a single-phase full-bridge rectifier circuit (1) having a first output end (17; 18) and a second output end (18; 17) connected to the load, and the first output end and the second output.
  • the first switch (51) that transitions from the conductive state to the non-conductive state once in a half-cycle period that is between and the path of the current flowing through the reactor does not include either the first capacitor or the second capacitor Switching from the first state to the second state including at least one of the first capacitor and the second capacitor in the path is performed when the converted power or the input current is greater than or equal to the first threshold value.
  • the 2nd mode of the power converter concerning this invention is the 1st mode
  • the reactor (7) is at least one of the 1st input end (15) and the 2nd input end (16).
  • the power source (9), the second switch (52) is connected between the first input terminal and the second input terminal, and the second switch is the conversion power or the input
  • the current (Ia) is equal to or greater than the first threshold (W1; W1u; W1d; I1u; I1d)
  • the current state transitions from the conductive state to the non-conductive state at least once in the half cycle period.
  • the 3rd aspect of the power converter device concerning this invention is the 1st aspect, Comprising:
  • the said reactor (7) is at least one of the said 1st input terminal (15) and the said 2nd input terminal (16).
  • the power source (9), and the second switch (52) is connected between the first input terminal and the second input terminal and the first output terminal (17; 18).
  • the second switch is turned off from the conductive state at least once in the half cycle period. Transition to the conductive state.
  • the 4th aspect of the power converter device concerning this invention is the 1st aspect, Comprising: Between the said 1st output terminal (17; 18) and the said connection point (23), the said 1st capacitor
  • the reactor (7) is connected between at least one of the first input end (15) and the second input end (16) and the power source (9).
  • the second switch (52) is connected between the first output terminal (17; 18) and the second output terminal (18; 17). The second switch transitions from a conductive state to a non-conductive state at least once in the half cycle period.
  • the 5th aspect of the power converter device concerning this invention is the 1st aspect, Comprising: A pair of said reactor (7a, 7b) is provided, and one (7a; 7b) and the other (7b; 7a) of the said reactor are provided. ) Are connected to the first output end (17; 18) and the second output end (18; 17), respectively. And between the first output end and the connection point (23), the first capacitor and the one of the reactors are sandwiched between the first capacitor (21; 22) and the one of the reactors. And a diode (52d; 52e) whose forward direction matches the direction in which the current for charging the first capacitor flows. The one of the reactors is sandwiched between the first output end and the diode.
  • the second switch (52) is sandwiched between the one of the reactors and the other of the reactors between the first output end and the second output end, so that the one of the reactors and the reactor The other is connected in series.
  • the second switch transitions from a conductive state to a non-conductive state at least once in the half cycle period.
  • a sixth aspect of the power conversion device is any one of the third and fourth aspects, and is between the second output terminal (18; 17) and the connection point (23).
  • a diode (22) connected in series with the second capacitor (22; 21), whose forward direction coincides with the direction in which a current for charging the second capacitor flows, and is sandwiched between the second output terminal and the second capacitor ( 52e; 52d).
  • the 7th aspect of the power converter device concerning this invention is the 5th aspect, Comprising: Between the said 2nd output terminal (18; 17) and the said connection point (23), the said 2nd capacitor
  • An eighth aspect of the power conversion device is the first aspect, in which the second switch (52) is connected between the first output terminal (17) and the first input terminal (15).
  • a first switch element (52g) connected in between, and a second switch element (52h) connected between the second output terminal (18) and the first input terminal.
  • the first switch element has a potential at the second input terminal (16) that is higher than the first threshold. In the half-cycle period in which the potential of the second input terminal is lower than the potential of the first input terminal, at least once in the half-cycle period higher than the potential of the first input terminal.
  • Non-conducting state When the converted power or the input current is equal to or higher than the first threshold, the second switch element is at least once in the half cycle period in which the potential of the second input terminal is lower than the potential of the first input terminal. A transition is made from a conducting state to a non-conducting state, and the second input terminal is in a non-conducting state during the half cycle period in which the potential of the second input terminal is higher than the potential of the first input terminal.
  • a ninth aspect of the power converter according to the present invention is the eighth aspect, and further includes a first diode (52d; 52e) and a second diode (52e; 52d).
  • the first diode is connected in series with the first capacitor (21; 22) between the first output end (17; 18) and the connection point (23), and the forward direction thereof is the first capacitor. Coincides with the direction in which the current for charging the battery flows, and is sandwiched between the first output terminal and the first capacitor.
  • the second diode is connected in series with the second capacitor (22; 21) between the second output end (18; 17) and the connection point (23), and the forward direction thereof is the second capacitor. Coincides with the direction in which the current for charging the battery flows, and is sandwiched between the second output terminal and the second capacitor.
  • a tenth aspect of the power converter according to the present invention is any one of the first to ninth aspects, wherein the converted power or the input current (Ia) is equal to the first threshold value (W1; W1u; W1d). I1u; I1d) is greater than or equal to a second threshold (W2; W2u; W2d; I2u; I2d) and less than the first threshold, the first switch (51) is once in the half cycle period; Then, the second state is realized without the second switch (52) changing the state from the conductive state to the non-conductive state.
  • An eleventh aspect of the power converter according to the present invention is the tenth aspect, wherein the converted power or the input current (Ia) is less than the second threshold (W2; W2u; W2d; I2u; I2d).
  • the second switch (52) is not switched and the second state is realized.
  • a twelfth aspect of the power conversion device is any one of the first to ninth aspects, wherein when the converted power is less than the first threshold, the first switch (51) is not turned on. The second state is realized without being switched by the second switch (52) in the conducting state.
  • a thirteenth aspect of the power conversion device is any one of the second, sixth, seventh, and ninth aspects, wherein the converted power or the input current (Ia) is the first threshold value.
  • the switching of the second switch (52) is performed when the first switch (51) is in a conductive state.
  • a fourteenth aspect of the power converter according to the present invention is any one of the first to thirteenth aspects, wherein the time point at which the second switch (52) performs the switching is from the start point of the half cycle period. Between the time when 1/6 of the half cycle has elapsed and the time when 5/6 of the half cycle has elapsed from the starting point.
  • a fifteenth aspect of the power converter according to the present invention is any one of the second, sixth, seventh, and ninth aspects, wherein the converted power or the input current (Ia) is the first threshold value.
  • the transition of the first switch (51) from the non-conducting state to the conducting state is performed when the first state is realized.
  • a sixteenth aspect of the power converter according to the present invention is any one of the third to fifth and eighth aspects, wherein the converted power or the input current (Ia) is the first threshold value (W1; W1u). W1d; I1u; I1d) or more, the switching of the second switch (52) is performed when the first switch (51) is in a non-conductive state, and the first switch (51) The transition from the non-conductive state to the conductive state is performed when the second state is realized.
  • the converted power may be power supplied to the load (3), or may be power input to the power converter (100).
  • the operations of the first switch (51) and the second switch (52) may be controlled based on the magnitude of the current (Ia) input to the power conversion device (100). For example, the first threshold value (I1u) when the input current increases is larger than the first threshold value (I1d) when the input current (Ia) decreases.
  • the power factor is improved by expanding the conduction angle of the current flowing through the power source by the second switch, and the energy stored in the reactor is supplied by switching the second switch.
  • the voltage applied to the series connection of the first capacitor and the second capacitor is increased.
  • the conduction angle of the current flowing through the single-phase full-bridge rectifier circuit is widened and the power factor is improved. Is done.
  • the sixth, seventh, and ninth aspects of the power conversion device according to the present invention, even if the first state is realized and the first switch is turned on, the discharge of the first capacitor or the second capacitor is prevented. Is done.
  • the power factor when the conversion power is low, the power factor may be low, but the voltage applied to the load by the pair of capacitors needs to be increased. Loss is reduced by realizing the second state without switching.
  • the power factor when the converted power is even lower, the power factor may be low, and it is not necessary to increase the voltage applied to the load by the pair of capacitors. Loss is reduced by entering the non-conducting state and realizing the second state without switching the second switch.
  • the power factor when the converted power is low, the power factor may be low, and it is not necessary to increase the voltage applied to the load by the pair of capacitors. Loss is reduced by being in a conductive state and realizing the second state without the second switch being switched.
  • the function as the voltage doubler circuit is exhibited at the time when the second switch is switched from the first state to the second state, and the input is performed. Current is unlikely to drop.
  • the reverse recovery phenomenon in the rectifying element constituting the single-phase full-bridge rectifier circuit is avoided, and the deterioration of efficiency is avoided.
  • FIG. 1 is a circuit diagram illustrating the configuration of a power conversion apparatus 100 that is employed in any of the following embodiments.
  • the power conversion device 100 converts the single-phase AC voltage Va into a DC voltage Vd and supplies it to the load 3.
  • the AC voltage Va is output from the power source 9.
  • the converted power of the power converter 100 can be grasped as input power determined by the AC input current Ia, the AC voltage Va, and the power factor supplied from the power source 9 to the power converter 100, It can also be grasped as supplied load power (this is determined by the DC voltage Vd and the impedance of the load 3, or the DC voltage Vd and a current that varies depending on the magnitude of the load).
  • load power is taken as an example of converted power.
  • the power conversion device 100 includes a single-phase full-bridge rectifier circuit 1, a reactor 7, capacitors 21 and 22, a first switch 51, and a second switch 52.
  • the single-phase full-bridge rectifier circuit 1 has a pair of input terminals 15 and 16 and an output terminal 17 and 18 connected to the load 3.
  • the output terminals 17 and 18 are paired on the opposite side of the power supply 9 with respect to the input terminals 15 and 16.
  • the single-phase full-bridge rectifier circuit 1 includes diodes 11, 12, 13, and 14.
  • the anode of the diode 11 is connected to the input terminal 15 together with the cathode of the diode 13
  • the anode of the diode 12 is connected to the input terminal 16 together with the cathode of the diode 14, and the cathode of the diode 11 is connected to the output terminal 17 together with the cathode of the diode 12.
  • the anode of the diode 13 is connected to the output terminal 18 together with the anode of the diode 14.
  • the reactor 7 is connected between at least one of the input terminals 15 and 16 and the power source 9.
  • the reactor 7 is disposed between the power source 9 and the input end 15, but may be disposed between the power source 9 and the input end 16.
  • one reactor may be arranged between the power source 9 and the input end 15 and between the power source 9 and the input end 16. This is because the pair of reactors is electrically equivalent to one reactor 7.
  • the pair of capacitors 21 and 22 are connected in series between the output ends 17 and 18 via the connection point 23.
  • the series connection of the capacitors 21 and 22 supports the DC voltage Vd.
  • the first switch 51 is connected between the input terminal 16 and the connection point 23.
  • the second switch 52 is connected between the input terminals 15 and 16. Since the configuration of the first switch 51 and the configuration of the second switch 52 are known techniques, detailed description thereof will be omitted, but the first switch 51 and the second switch 52 are both bidirectional in the present embodiment. It can be realized with a semiconductor switch.
  • FIG. 1 illustrates a case where both the first switch 51 and the second switch 52 are configured by parallel connection of an IGBT (insulated gate bipolar transistor) and a diode bridge.
  • IGBT insulated gate bipolar transistor
  • the single-phase full-bridge rectifier circuit 1 and the capacitors 21 and 22 constitute a voltage doubler rectifier circuit. Due to the non-conduction state, the single-phase full-bridge rectifier circuit 1 and the capacitors 21 and 22 constitute a full-wave rectifier circuit.
  • the second switch 52 since the second switch 52 is in a conductive state, a first state in which the capacitors 21 and 22 are not included in the path of the current flowing through the reactor 7 (the input current Ia in the present embodiment) is realized. At this time, the reactor 7 accumulates energy due to the current flowing through the second switch 52.
  • a second state is realized in which at least one of the capacitors 21 and 22 is included in the path of the current flowing through the reactor 7. The energy accumulated in the first state is at least stored in the capacitors 21 and 22 via the single-phase full-bridge rectifier circuit 1 in the second state realized by the second switch 52 transitioning from the conductive state to the non-conductive state. Supplied on one side.
  • the reactor 7 and the second switch 52 perform the boosting operation when the second switch 52 switches from the first state to the second state. That is, it can be considered that the second switch 52 constitutes a booster circuit together with the reactor 7, the diodes 11 and 12, and the capacitors 21 and 22.
  • the load 3 is, for example, a combination of an inverter that performs DC / AC conversion and an AC motor that is supplied with AC power from the inverter.
  • FIG. 2 is a graph illustrating the operation of the power conversion apparatus 100 according to this embodiment.
  • a waveform G0 is a waveform of the AC voltage Va and is shown with the polarity of the vertical axis indicating the value reversed from the normal one. The reason why the polarity is reversed is simply to prevent the waveform from interfering with the other waveforms G1, G2, G3 and becoming difficult to see.
  • the waveform G1 is a waveform of the input current Ia (in this case, the current flowing through the reactor 7) when both the first switch 51 and the second switch 52 are in the non-conduction state (first operation). In this case, full-wave rectification is performed without the step-up operation by the second switch 52 and the reactor 7.
  • a waveform G2 is a waveform of the input current Ia when the first switch 51 repeats the conductive state and the non-conductive state and the second switch 52 is in the non-conductive state (second operation). In this case, voltage doubler rectification and full wave rectification without boosting operation by the second switch 52 and the reactor 7 are alternately performed. In the first operation and the second operation, the second state is realized instead of the first state.
  • a waveform G3 is a waveform of the input current Ia when the first switch 51 repeats the conduction state and the non-conduction state and the second switch 52 repeats the conduction state and the non-conduction state (third operation). In this case, voltage doubler rectification and full-wave rectification are alternately performed with a boosting operation by the second switch 52 and the reactor 7.
  • symbols S1 and S2 indicate the ON / OFF states of the first switch 51 and the second switch 52 in the third operation, respectively.
  • the first switch 51 transitions from the conductive state to the non-conductive state once in a half cycle period of the AC voltage Va.
  • the half cycle period is a pair of adjacent time points (time 0, 0.01 (seconds) according to FIG. 2) at which the AC voltage Va takes the median value (value 0 according to FIG. 2). Or between time 0.01 and 0.02 (seconds).
  • the second switch 52 transitions from the conductive state to the non-conductive state at least once in a half cycle period.
  • a period that is half the period of the AC voltage Va (this is not necessarily the half-period period described above).
  • a transition from the non-conductive state to the conductive state is made once.
  • the transition of the first switch 51 from the non-conductive state to the conductive state may be performed at the boundary between a pair of adjacent half-period periods defined above.
  • FIG. 2 illustrates such a transition from the non-conductive state to the conductive state.
  • the cycle of the AC voltage Va is equal to the number of times of transition from the conductive state to the non-conductive state in the half cycle period. Transition from the non-conducting state to the conducting state is performed in a period of 1 ⁇ 2 length. This transition may also be performed at the boundary between a pair of adjacent half-cycle periods.
  • the first switch 51 transits from the non-conducting state to the conducting state at time 0, and transits from the conducting state to the non-conducting state at time 0.005 (seconds).
  • the transition from the non-conduction state to the conduction state is performed at .01 (second), and the transition from the conduction state to the non-conduction state is performed at time 0.015 (second).
  • the second switch 52 transitions from the non-conductive state to the conductive state at time 0, transitions from the conductive state to the non-conductive state at time 0.0025 (seconds), and from the non-conductive state to the conductive state at time 0.01 (seconds). At time 0.0125 (seconds), and transitions from a conductive state to a non-conductive state.
  • FIG. 3 is a graph showing the behavior of the input current Ia in the second operation.
  • the 1st switch 51 changes from a non-conduction state to a conduction
  • symbol S ⁇ b> 1 indicates ON / OFF of the conductive / non-conductive state of the first switch 51 in the second operation.
  • voltage doubler rectification and full wave rectification are alternately performed. Thereby, even if the second state is maintained, the DC voltage Vd can be set higher than the peak value of the AC voltage Va.
  • FIG. 3 also shows the voltage Vc across the capacitor 22.
  • or Vd ⁇ Vc
  • FIGS. 4 and 5 are graphs schematically showing the behavior of the input current Ia in the second operation.
  • > Vc
  • > Vd a current for charging both capacitors 21 and 22 flows.
  • the conduction angle of the input current Ia increases as the DC voltage Vd decreases. Therefore, if the waveform of the AC voltage Va is the same, the conduction angle is narrower when the DC voltage Vd is higher as shown in FIG. 5 than when the DC voltage Vd is lower as shown in FIG. That is, in the second operation, the magnitude (height) of the DC voltage Vd and the power factor are in a trade-off relationship.
  • the third operation as indicated by the waveform G3 in FIG. 2, the input current Ia flows even when the second switch 52 is in the conductive state and the first state is realized, and the conduction angle is the second angle. Wider than operation.
  • the third operation has a higher power factor than the second operation.
  • not only the voltage doubler rectification but also the step-up operation by the second switch 52 and the reactor 7 is performed, so that the obtained DC voltage Vd can be further increased. That is, the third operation increases the DC voltage Vd as compared to the second operation.
  • FIG. 2 illustrates the case where the second switch 52 transits only once from the conductive state to the non-conductive state in the half cycle period.
  • the same effect can be obtained even when such a transition is performed a plurality of times in the half cycle period. In this case, the number of switching increases and the loss increases, but the power factor controllability is improved.
  • the switching frequency of the power conversion device 100 as a whole increases in both the second operation than the first operation and the third operation than the second operation.
  • the increase in the number of times of switching increases the switching loss and conduction loss of the first switch 51 and the second switch 52, and increases the loss in the power conversion device 100.
  • a power factor correction circuit that performs a switching operation over the entire power cycle, such as an interleaved power factor correction circuit or a bridgeless power factor correction circuit (hereinafter referred to as a “full switching type power factor correction circuit”).
  • Tentative name is disadvantageous from the viewpoint of efficiency because the number of times of switching is large even for a load that does not require a high power factor. In other words, for loads that do not require a high power factor, it is desirable to increase the efficiency by reducing the number of times of switching.
  • Patent Document 5 proposes an operation in which switching is not performed in an interleaved power factor correction circuit (see “non-conduction mode” in Patent Document 5). This will increase the switching loss in the inverter placed after the power factor correction circuit. From the viewpoint of reducing the switching loss of the inverter, it is desirable to reduce the DC voltage in a situation where the switch having the boosting function does not perform switching.
  • FIG. 6 is a graph showing a comparison between the bridgeless type power factor correction circuit and the power conversion device 100 of FIG. However, in any case, the portion having the boosting function does not perform the switching operation.
  • a waveform G4 is a bridgeless type power factor correction circuit
  • a waveform G5 is a relationship between the load power and a DC voltage (denoted as “DC voltage” in the figure) of the power converter 100.
  • DC voltage a DC voltage (denoted as “DC voltage” in the figure) of the power converter 100.
  • the DC voltage generated by the power converter 100 decreases as the load increases (the load power increases), whereas the bridgeless power factor correction circuit decreases the DC voltage even when the load power is increased. Is generated, and a DC voltage higher than the DC voltage generated by the power converter 100 is generated.
  • the interleaved power factor correction circuit has the same DC voltage as that of the bridgeless type.
  • a full-switching power factor correction circuit generally has a high switching frequency, so that even if the inductance of the reactor is small, the current is smoothed, and therefore, a reactor having a small inductance is employed.
  • the inductance is selected to be about several hundred ⁇ H. Therefore, the voltage drop caused by the current flowing through it is small, and as a result, the DC voltage is kept high. Furthermore, if the inductance is small, when the switching operation is not performed, the power factor is bad, the peak of the alternating current is increased, and the loss may be increased.
  • the inductance of the reactor is selected to be large (for example, several mH) in the power conversion device 100 that performs the second operation, the voltage drop at the reactor is large and the DC voltage is also low, so the switching loss of the inverter is small. Become.
  • the switching of the first switch 51 and the switching by the second switch 52 are preferably selected according to the magnitude of the load 3 (that is, the load power: the magnitude of the converted power of the power converter 100).
  • the operation of the power conversion apparatus 100 is divided into three operations: a first operation, a second operation, and a third operation.
  • the first operation, the second operation, and the third operation are employed at light load, medium load, and heavy load, respectively.
  • the third operation is performed.
  • the second operation is performed. If it is less than the threshold value, it is desirable that the power converter 100 employs the first operation.
  • the load 3 is a motor driven by an inverter, for example, in order to drive the motor at a high rotational speed and a high torque, it is necessary to further increase the voltage applied to the motor. From such a necessity, it is desirable to perform the third operation for increasing the DC voltage Vd.
  • the load is medium, that is, if the magnitude of the load power is greater than or equal to the second threshold and less than the first threshold, a higher power factor is more important than high efficiency.
  • the load 3 is, for example, a motor driven by an inverter, in order to drive the motor at a high rotational speed and high torque, it is not necessary to perform a so-called field weakening (weakening magnetic flux) operation. It is desirable to increase the DC voltage Vd. Therefore, it is desirable that the second operation is performed in order to increase the DC voltage Vd while the second switch 52 is turned off and the second state is realized.
  • the DC voltage Vd can be increased by lengthening the period in which the first switch 51 is in the conductive state.
  • the period in which the first switch 51 is in a conductive state is set to, for example, about 1/4 of the power supply cycle, and the period in which the second switch 52 is in a conductive state and the first state is realized is increased.
  • the voltage Vd can be increased.
  • the input power to the load 3 is not set without setting the second threshold value. If the magnitude is less than the first threshold, the first operation may be adopted.
  • the transition of the second switch 52 from the conductive state to the non-conductive state occurs during the half cycle period. To be done.
  • the single-phase full-bridge rectifier circuit 1 and the capacitors 21 and 22 are already functioning as a voltage doubler rectifier circuit when the second switch 52 transitions from the conductive state to the non-conductive state. . Therefore, even when the second switch 52 transitions from the conducting state to the non-conducting state, the input current Ia is less likely to be reduced, and a current waveform having a high power factor that is closer to a sine wave is obtained.
  • the time when the second switch 52 transitions from the conductive state to the non-conductive state is later than the time when 1/6 of the half cycle has elapsed from the start point of the half cycle period.
  • Capacitors 21 and 22 functioning as a part of a voltage doubler rectifier circuit are charged with a half value Vd / 2 of the DC voltage Vd. Therefore, in order to allow the input current Ia to flow from the power supply 9 when the second switch 52 is in a non-conductive state,
  • the power factor becomes the best by making the input current Ia a sine wave in phase with the AC voltage Va. Therefore, more preferably, when the second switch 52 transitions from the conducting state to the non-conducting state, it is highly necessary to increase the input current Ia when the phase of the AC voltage Va employing the above-described standard is smaller than 90 degrees. (Until the AC voltage Va reaches its peak).
  • the time when the second switch 52 transitions from the conductive state to the non-conductive state is later than the time when 1/6 of the half cycle has elapsed since the start of the half cycle period, and 5/6 of the half cycle has elapsed.
  • the first switch 51 may be in a non-conducting state at that time.
  • the transition of the first switch 51 from the non-conductive state to the conductive state is realized by the second switch 52 being in the conductive state. Sometimes done.
  • the second switch 52 If the second switch 52 is in the conductive state, the pair of input terminals 15 and 16 are short-circuited. Therefore, whether the first switch 51 is in the conductive state or the non-conductive state depends on the input current Ia and the capacitor 21. , 22 is not affected.
  • the input current Ia flows through the second switch 52 having a lower impedance than the configuration of the single-phase full-bridge rectifier circuit 1 and the capacitors 21 and 22, and the first state is realized. This is because there are no 22 discharge paths.
  • the first switch 51 may transition from the non-conducting state to the conducting state considerably before the time when the second switch 52 transitions from the conducting state to the non-conducting state.
  • the first switch 51 and the second switch 52 may simultaneously transition from a non-conductive state to a conductive state.
  • the first switch 51 is illustrated as a simple switch with a simplified configuration.
  • the second switch 52 is one of the pair of input terminals 15 and 16 and the output terminals 17 and 18 (which can be said in conformity with FIGS. 7 and 8).
  • the configuration connected between the output end 18 and the output end 17) in the case of FIGS. 9 and 10 is shown as a circuit diagram.
  • the second switch 52 is not a bidirectional switch, but is configured as a switch that can flow current in one direction by its conduction.
  • the second switch 52 includes an IGBT 52a and diodes 11a and 12a.
  • the anode of the diode 11 a is connected to the input terminal 15, and the anode of the diode 12 a is connected to the input terminal 16.
  • the cathode of the diode 11 a, the cathode of the diode 12 a, and the collector of the IGBT 52 a are connected in common, and the emitter of the IGBT 52 a is connected to the output terminal 18.
  • the second switch 52 is configured as a switch that can flow current from either the input end 15 or 16 to the output end 18 by its conduction.
  • the second switch 52 includes IGBTs 52b and 52c.
  • the collector of the IGBT 52 b is connected to the input terminal 15, and the collector of the IGBT 52 c is connected to the input terminal 16.
  • the emitter of the IGBT 52b, the emitter of the IGBT 52c, and the output terminal 18 are connected in common. That is, even in the second modification, the second switch 52 is configured as a switch that can flow a current from either the input end 15 or 16 to the output end 18 by its conduction.
  • the second switch 52 includes an IGBT 52i and diodes 13a and 14a.
  • the cathode of the diode 13 a is connected to the input terminal 15, and the cathode of the diode 14 a is connected to the input terminal 16.
  • the anode of the diode 13 a, the anode of the diode 14 a, and the emitter of the IGBT 52 i are connected in common, and the collector of the IGBT 52 i is connected to the output terminal 17.
  • the second switch 52 is configured as a switch that can flow current from the output end 17 to both the input ends 15 and 16 by the conduction.
  • the second switch 52 includes IGBTs 52j and 52f.
  • the emitter of the IGBT 52j is connected to the input terminal 15, and the emitter of the IGBT 52f is connected to the input terminal 16.
  • the collector of the IGBT 52j, the collector of the IGBT 52f, and the output terminal 17 are connected in common. That is, even in the fourth modification, the second switch 52 is configured as a switch that can flow current from the output end 17 to both the input ends 15 and 16 by the conduction.
  • the first modification and the third modification appear to have the same number of elements constituting the second switch 52, and their operations are also equivalent as will be described later. However, when actually applied, the first modification is generally applied for the following reason. That is, in the first modification, since the emitter of the IGBT 52a is connected to the negative potential side of the DC voltage Vd, the driving signal of the IGBT 52a and the reference potential of the driving power source are on the negative potential side of the DC voltage Vd. It can be operated at the same reference potential as a control circuit (not shown) for generating a signal.
  • the drive signal of the IGBT 52i and the reference potential of the drive power supply cannot be set to the same potential as the reference potential (the negative potential side of the DC voltage Vd) of the control circuit.
  • the IGBT driving power source and the driving signal level shift circuit are required. Therefore, it is desirable to apply the first modification rather than the third modification from the viewpoint of avoiding circuit complexity and cost increase.
  • This viewpoint is the same for the second and fourth modifications.
  • the fourth modification since the emitters of the IGBT 52j and the IGBT 52f are not common, two level shifts of the IGBT driving power source and the driving signal are required corresponding to each IGBT. Therefore, the difference between the second deformation and the fourth deformation in the above viewpoint is more conspicuous than the difference between the first deformation and the third deformation in the above viewpoint. For this reason, the case where the second deformation is applied rather than the fourth deformation is common.
  • the second switch 52 is provided between the output terminals 17 and 18, and current flows from the output terminal 17 to the output terminal 18 by the conduction. Can do.
  • the second switch 52 is composed of an IGBT having a collector connected to the output end 17 and an emitter connected to the output end 18.
  • the diode 52 d is connected in series with the capacitor 21 between the output end 17 and the connection point 23.
  • the forward direction of the diode 52d coincides with the direction in which the current for charging the capacitor 21 flows, that is, the direction from the output end 17 toward the capacitor 21.
  • the diode 52 d is sandwiched between the output terminal 17 and the capacitor 21. Specifically, the anode of the diode 52 d is connected to the output terminal 17, and the cathode of the diode 52 d is connected to the connection point 23 via the capacitor 21.
  • the diode 52 e is connected in series with the capacitor 22 between the output end 18 and the connection point 23.
  • the forward direction of the diode 52 e coincides with the direction in which a current for charging the capacitor 22 flows, that is, the direction from the capacitor 22 toward the output terminal 18.
  • the diode 52 e is sandwiched between the output terminal 18 and the capacitor 22. Specifically, the cathode of the diode 52 e is connected to the output terminal 18, and the anode of the diode 52 e is connected to the connection point 23 via the capacitor 22.
  • the operation of the second switch 52 is performed in the same manner as the second switch 52 of the first embodiment, and the third operation can be realized. That is, the transition between the first state and the second state is performed by switching the second switch 52.
  • the first switch 51 is in the non-conductive state. Needs to be done when Therefore, the third operation in the second embodiment in which the transition from the conductive state of the second switch 52 to the non-conductive state is performed in the conductive state of the first switch 51 cannot be realized. Therefore, as compared with the second embodiment, in the first to sixth modifications, the input current Ia is lowered and the power factor is lowered.
  • a diode 52d is present in the charging path of the capacitor 21
  • a diode 52e is present in the charging path of the capacitor 22. Therefore, even when full-wave rectification or voltage doubler rectification is performed, the loss increases by the conduction loss of the diode.
  • the transition of the first switch 51 from the non-conductive state to the conductive state is performed when the second state is realized, here, when the second switch 52 is in the non-conductive state. Need to be done. Therefore, the third operation in the third embodiment in which the transition of the first switch 51 from the non-conductive state to the conductive state is performed in the conductive state of the second switch 52 cannot be realized. Therefore, as compared with the third embodiment, the deformation causes a reverse recovery phenomenon of the diode, which is not desirable from the viewpoint of deteriorating the efficiency.
  • FIG. 13 is a circuit diagram showing a configuration according to the seventh modification
  • FIG. 14 is a circuit diagram showing a configuration according to the eighth modification.
  • the reactor 7 in the fifth modification (FIG. 11) and the sixth modification (FIG. 12) is divided, and the capacitors 21, The structure arrange
  • a pair of reactors 7a and 7b are provided.
  • Reactor 7 a is connected to output end 17, and reactor 7 b is connected to output end 18.
  • the diode 52d is sandwiched between the capacitor 21 and the reactor 7a between the output end 17 and the connection point 23 and connected in series to the capacitor 21 and the reactor 7a.
  • the forward direction of the diode 52d coincides with the direction in which the current for charging the capacitor 21 flows.
  • Reactor 7a is sandwiched between output end 17 and diode 52d. Specifically, the anode of the diode 52 d is connected to the output end 17 via the reactor 7 a, and the cathode of the diode 52 d is connected to the connection point 23 via the capacitor 21.
  • the diode 52e is sandwiched between the capacitor 22 and the reactor 7b between the output end 18 and the connection point 23, and is connected in series with the capacitor 22 and the reactor 7b.
  • the forward direction of the diode 52e coincides with the direction in which the current for charging the capacitor 22 flows.
  • Reactor 7b is sandwiched between output end 18 and diode 52e. Specifically, the cathode of the diode 52e is connected to the output end 18 via the reactor 7b, and the anode of the diode 52e is connected to the connection point 23 via the capacitor 22.
  • the pair of reactors 7a and 7b is connected in series with the power source 9 via the single-phase full-bridge rectifier circuit 1 between both ends of the series connection of the capacitors 21 and 22, as shown in FIGS. 12 is common to the reactor 7 shown in FIG.
  • the second switch 52 is sandwiched between the reactors 7a and 7b between the output ends 17 and 18 in both of the seventh modification (FIG. 13) and the eighth modification (FIG. 14), and is in series with the reactors 7a and 7b. Connected to.
  • the reactors 7a and 7b function similarly to the reactor 7 of FIG.
  • the second switch 52 can be considered to constitute a booster circuit together with the reactors 7a and 7b, the diode 52d (or the diode 52e), and the capacitors 21 and 22.
  • the reactor 7a reduces the discharge current of the capacitor 22 even when both the first switch 51 and the second switch 52 are in a conductive state.
  • the reactor 7b reduces the discharge current of the capacitor 21 even when both the first switch 51 and the second switch 52 are in the conductive state.
  • FIG. 15 is a graph illustrating the operation of the power conversion apparatus 100 in the first to eighth modifications (FIGS. 7 to 14), and corresponds to FIG.
  • the waveform G0 and symbols S1 and S2 are synonymous with the definitions used in the description made with reference to FIG.
  • a waveform G6 shows the waveform of the input current Ia.
  • the first switch 51 changes from the conductive state to the non-conductive state once in a half cycle period of the AC voltage Va.
  • the second switch 52 transitions from the conductive state to the non-conductive state at least once in a half cycle period.
  • the transition of the second switch 52 from the conductive state to the non-conductive state is performed in the half cycle period (this can be regarded as switching from the first state to the second state by the second switch 52). After the first switch 51 has transitioned from the non-conductive state to the conductive state. By such operations of the first switch 51 and the second switch 52, a state in which both are conducted is avoided.
  • the absolute value of the input current Ia decreases and the power factor deteriorates between the time when the second switch 52 is turned off and the time when the first switch 51 is turned on.
  • FIG. 16 shows a configuration according to a ninth modification, which is a further modification applicable to any of the first, second, fifth, and seventh modifications (FIGS. 7, 8, 11, and 13).
  • FIG. FIG. 17 shows a tenth modification which is a further modification applicable to any of the modifications shown in the third, fourth, sixth, and eighth modifications (FIGS. 9, 10, 12, and 14).
  • It is a circuit diagram which shows the structure concerning a deformation
  • FIG. 16 shows only the vicinity where the second switch 52, the capacitor 22, and the diodes 13 and 14 are connected
  • FIG. 17 shows the vicinity where the second switch 52, the capacitor 21, and the diodes 11 and 12 are connected. Only a partial takeout is shown, respectively.
  • the reactor 7b shown in parentheses in FIG. 16 exists when the configuration of FIG. 16 is applied to the configuration according to the seventh modification (FIG. 13), and the first, second, and fifth modifications ( When this is applied to the configuration according to FIGS. 7, 8, and 11), it does not exist and is merely a wiring.
  • the reactor 7a shown in parentheses in FIG. 17 exists when the configuration of FIG. 17 is applied to the configuration according to the eighth modification (FIG. 14), and the third, fourth, sixth It does not exist when applied to the configuration according to the modification (FIGS. 9, 10, and 12), and is merely a wiring.
  • the diode 52e is connected in series with the capacitor 22 between the output end 18 and the connection point 23, whether or not the reactor 7b is present.
  • the forward direction of the diode 52 e coincides with the direction in which a current for charging the capacitor 22 flows, that is, the direction from the capacitor 22 toward the output terminal 18.
  • the diode 52e is sandwiched between the reactor 7b and the capacitor 22 between the output end 18 and the connection point 23, and is connected in series with the reactor 7b and the capacitor 22.
  • the diode 52e sandwiches the reactor 7b together with the output end 18.
  • the diode 52d is connected in series with the capacitor 21 between the output end 17 and the connection point 23 whether or not the reactor 7a is present.
  • the forward direction of the diode 52d coincides with the direction in which the current for charging the capacitor 21 flows, that is, the direction from the output end 17 toward the capacitor 21.
  • the diode 52d When the reactor 7a exists, the diode 52d is sandwiched between the reactor 7a and the capacitor 21 between the output end 17 and the connection point 23, and is connected in series with the reactor 7a and the capacitor 21. The diode 52 d sandwiches the reactor 7 a together with the output end 17.
  • the configuration according to the seventh modification (FIG. 13) and the eighth modification (FIG. 14) is as shown in FIG. Regardless of whether or not the modification shown in FIG. 17 is applied, it is disadvantageous in that the reactor 7b or the reactor 7a is also required when the first switch 51 is turned on and voltage doubler rectification is performed.
  • FIG. 18 is a circuit diagram showing a configuration according to the eleventh modification.
  • the second switch 52 includes switch elements 52g and 52h.
  • the switch element 52 g is connected between the output end 17 and the input end 15, and the switch element 52 h is connected between the output end 18 and the input end 15.
  • the second switch 52 itself is introduced in, for example, Patent Document 6.
  • the switch element 52 g is realized by an IGBT having a collector connected to the output end 17 and an emitter connected to the input end 15, and the switch element 52 h is an emitter connected to the output end 18 and the input end 15.
  • IGBT which has a collector connected to
  • the current can flow from the output end 17 to the input end 15 when the switch element 52g is turned on.
  • a current can flow from the input end 15 to the output end 18 by turning on the switch element 52h.
  • the switch element 52h since the switch element 52h becomes non-conductive during the half cycle period, at least the capacitor 21 is included in the path of the current flowing through the reactor 7, and the second state is realized. If the first switch 51 is conductive, the path includes the capacitor 21, and if the first switch 51 is non-conductive, the path includes the capacitors 21, 22.
  • the switch element 52h switches between the first state and the second state in the half cycle period. Such switching does not depend on conduction / non-conduction of the switch element 52g.
  • the switch element 52g since the switch element 52g becomes non-conductive during the half-cycle period, at least the capacitor 22 is included in the path of the current flowing through the reactor 7, and the second state is realized. If the first switch 51 is conductive, the path includes the capacitor 22, and if the first switch 51 is non-conductive, the path includes the capacitors 21 and 22.
  • the switch element 52g performs switching between the first state and the second state in the half cycle period. Such switching does not depend on conduction / non-conduction of the switch element 52h.
  • the capacitor 22 passes through the switch element 52h and the first switch 51. Is discharged from the input terminals 15 and 16 via the power source 9 and the reactor 7.
  • the switch element 52g conducts in a half cycle period in which the potential of the input terminal 15 is lower than the potential of the input terminal 16, and the first switch 51 further conducts, the capacitor is connected via the switch element 52g and the first switch 51.
  • a current for discharging the electric current 21 flows from the input terminals 15 and 16 through the power source 9 and the reactor 7. Although the current flowing through the reactor 7 (that is, the input current Ia) increases due to these discharge currents, the increase does not contribute to the load power.
  • the situation where both the first switch 51 and the second switch 52 are in the conductive state that is, the first switch. It is desirable to avoid a situation in which both the first switch 51 and the switch element 52g are in a conductive state, or a situation in which both the first switch 51 and the switch element 52h are in a conductive state.
  • FIG. 19 is a graph illustrating the operation of the power conversion apparatus 100 in the eleventh modification (FIG. 18), and corresponds to FIG.
  • Waveforms G0 and G6 and symbol S1 are synonymous with the definitions used in the description made with reference to FIG.
  • Symbols S2g and S2h indicate the ON / OFF states of the switch elements 52g and 52h in the third operation, respectively.
  • the first switch 51 transits from the conductive state to the non-conductive state once in a half cycle period of the AC voltage Va.
  • the second switch 52 transitions from the conducting state to the non-conducting state at least once in a half cycle period (collectively, the switch elements 52g and 52h).
  • the second switch 52 transitions from the conducting state to the non-conducting state (this is the switching from the first state to the second state by the second switch 52).
  • the first switch 51 has transitioned from a non-conducting state to a conducting state.
  • FIG. 20 is a circuit diagram showing a configuration according to the twelfth modification, in which diodes 52d and 52e are added to the configuration according to the eleventh modification.
  • the diode 52 e is sandwiched between the output end 18 and the capacitor 22 between the output end 18 and the connection point 23 and connected in series with the capacitor 22, and the forward direction thereof coincides with the direction in which a current for charging the capacitor 22 flows.
  • the anode of the diode 52 e is connected to the capacitor 22 on the side opposite to the connection point 23, and the cathode of the diode 52 e is connected to the output terminal 18.
  • the diode 52 d is sandwiched between the output end 17 and the capacitor 21 between the output end 17 and the connection point 23 and connected in series with the capacitor 21, and the forward direction thereof coincides with the direction in which the current for charging the capacitor 21 flows. Specifically, the cathode of the diode 52 d is connected to the capacitor 21 on the side opposite to the connection point 23, and the anode of the diode 52 d is connected to the output terminal 17.
  • FIG. 21 is a graph illustrating the operation of the power conversion apparatus 100 in the twelfth modification (FIG. 20), and corresponds to FIG.
  • Waveforms G0, G1, G2, G3 and symbol S1 are synonymous with the definitions used in the description made with reference to FIG. 2, and symbols S2g and S2h are used in the description made with reference to FIG. It is synonymous with the definition.
  • the power factor is improved as compared with the waveform G6 in the eleventh modification.
  • FIG. 22 is a graph showing the relationship between the load power and the input current Ia.
  • the load power is an example of the converted power, and the following explanation is appropriate even if it is read as input power.
  • Curves C1, C2, and C3 indicate the above relationships in the first operation, the second operation, and the third operation with broken lines, respectively. As described above, the power factor is improved (increased) in the second operation than in the first operation, and in the third operation than in the second operation.
  • the power source 9 is usually a commercial power source and is supplied at a constant voltage at which the effective value of the AC voltage Va is stable, the load power is proportional to the product of the input current Ia and the power factor. Therefore, if the load power is equal, the curve C2 is lower than the curve C1, and the curve C3 is lower than the curve C2. Even in the same operating state, the power factor generally increases as the input current Ia increases.
  • the curve G8 indicates that the third operation is performed when the load power is equal to or greater than the first threshold value W1.
  • the curve G8 coincides with the curve C1 when the magnitude of the load power is less than the second threshold W2, the curve C2 when the magnitude of the load power is less than the second threshold W2 and less than the first threshold, and the curve C3 when the magnitude of the load power is more than the first threshold W1.
  • the input current Ia increases.
  • the operation of the power conversion device 100 transitions from the first operation to the second operation, so that the input current Ia decreases from the value I2u to the value I2d. This is because the power factor is improved (increased) by the above transition.
  • the input current Ia further increases.
  • the operation of the power conversion device 100 transitions from the second operation to the third operation, so that the input current Ia decreases from the value I1u to the value I1d.
  • the input current Ia is adopted instead of the load power as a reference for transitioning the operation of the power conversion apparatus 100 between the first operation, the second operation, and the third operation. Can do.
  • the power conversion apparatus 100 performs the first operation. That is, the first switch 51 is in a non-conductive state, and the second switch 52 is not switched and the second state is realized.
  • the power conversion device 100 When the input current Ia rises to reach the value I2u from less than the value I2u, the power conversion device 100 performs the second operation. That is, the second switch 52 is not switched and the first switch 51 changes from the conductive state to the non-conductive state once in a half cycle period while the second state is realized.
  • the power conversion apparatus 100 When the input current Ia rises to reach the value I1u from less than the value I1u, the power conversion apparatus 100 performs the third operation. That is, the first switch 51 transitions from the conducting state to the non-conducting state once in a half cycle period, and the second switch 52 performs switching from the first state to the second state at least once in the half cycle period. . Even if the input current Ia further increases, the third operation is maintained.
  • the operation of the power conversion device 100 transitions from the third operation to the second operation, whereby the input current Ia increases from the value I1d to the value I1u. This is because the power factor is deteriorated (decreased) by the above transition.
  • the input current Ia further decreases.
  • the load power decreases and reaches the second threshold value W2
  • the operation of the power conversion device 100 transitions from the second operation to the first operation, whereby the input current Ia increases from the value I2d to the value I2u.
  • the input current Ia is adopted instead of the load power as a reference for transitioning the operation of the power conversion apparatus 100 between the first operation, the second operation, and the third operation. Can do.
  • the third operation is maintained as long as it is equal to or greater than the value I1d.
  • the operation of the power conversion device 100 transitions from the third operation to the second operation.
  • the operation of the power conversion apparatus 100 transitions from the second operation to the first operation. Further, the first operation is maintained even when the input current Ia decreases.
  • the operations of the first switch 51 and the second switch 52 may be controlled based on the determination that the load power is changed by the input current Ia.
  • I1u> I1d It is desirable that there is a relationship.
  • I2u> I2d It is desirable that there is a relationship of I2u> I2d.
  • FIG. 22 illustrates the case where there is a relationship of I1d> I2u.
  • the third operation is employed as the operation of the power conversion apparatus 100, when the input current Ia is equal to or greater than the value I2u and less than the value I1d, and when the input current Ia is less than the value I2d. be able to.
  • the threshold value of the input current Ia that is the basis of the operation transition is a pair of values I1u and I1d corresponding to the first threshold value W1 of the load power, and a pair of values I2u and I2d with respect to the second threshold value W2.
  • Each is adopted. This can also be considered as follows: When the input current Ia increases, the threshold value of the input current Ia is a value I1u corresponding to the first threshold value W1, and a value I2u corresponding to the second threshold value W2. When the input current Ia decreases, a value I1d corresponding to the first threshold value W1 and a value I2d corresponding to the second threshold value W2 are respectively adopted.
  • the threshold value of the input current Ia for determining the operation of the power conversion device 100 may be different depending on whether the input current Ia increases or decreases and exhibits hysteresis.
  • FIG. 23 is a graph showing the relationship between the load power and the input current Ia when such hysteresis is introduced. Curves C1, C2, and C3 are all described with reference to FIG. In the above-described embodiment or modification, the curve G9 indicates the third operation if the load power is greater than or equal to the first threshold, and the second action if the load power is greater than or equal to the second threshold smaller than the first threshold and less than the first threshold. The relationship between the load power and the input current Ia when the power conversion device 100 employs the first operation if the operation is less than the second threshold is shown.
  • the values W1u and W2u are a first threshold value and a second threshold value when the load power increases, respectively, and the values W1d and W2d are a first threshold value and a second threshold value when the load power decreases, respectively.
  • FIG. 23 illustrates a case where there is a relationship of W1u> W1d> W2u> W2d.
  • the power conversion apparatus 100 when the load power increases, if the load power is less than the value W2u, the power conversion apparatus 100 performs the first operation, and the curve G9 matches the curve C1.
  • the power converter 100 performs the second operation until the load power increases from less than the value W2u to the value W1u, and the curve G9 matches the curve C2. Therefore, when the load power increases, the curve G9 moves from the curve C1 to the curve C2 via the route Gu2 when the load power takes the value W2u. If the load power increases and becomes less than the value W1u to the value W1u or more, the power conversion apparatus 100 performs the third operation, and the curve G9 matches the curve C3. Therefore, when the load power increases, the curve G9 moves from the curve C2 to the curve C3 via the route Gu1 when the load power takes the value W1u.
  • the power conversion apparatus 100 When the load power decreases, if the load power is greater than or equal to the value W1d, the power conversion apparatus 100 performs the third operation, and the curve G9 matches the curve C3.
  • the power converter 100 performs the second operation until the load power decreases from less than the value W1d to the value W2d, and the curve G9 matches the curve C2. Therefore, when the load power decreases, the curve G9 moves from the curve C3 to the curve C2 via the path Gd1 when the load power takes the value W1d. If the load power decreases and becomes less than the value W2d, power converter 100 performs the first operation, and curve G9 matches curve C1. Therefore, when the load power decreases, the curve G9 moves from the curve C2 to the curve C1 via the path Gd2 when the load power takes the value W2d.
  • the input current Ia can be compared with the threshold value in order to determine the operation of the power converter 100.
  • the input current Ia in the first operation when the load power takes the value W2u is set to the value I2u that is the second threshold when the input current Ia rises, and the second when the load power takes the value W2d.
  • the input current Ia in the operation is changed to a value I2d which is the second threshold when the input current Ia decreases, the input current Ia in the second operation when the load power takes the value W1u, and the second value when the input current Ia increases.
  • the input current Ia in the third operation when the load power takes the value W1d can be adopted as the value I1u as the first threshold value, and the value I1d as the first threshold value when the input current Ia decreases.
  • the first switch 51 and the second switch 52 are defined based on their operations.
  • the conduction / non-conduction operation of the first switch 51, the conduction / non-conduction operation of the second switch 52, or the first state and the second state by the second switch 52 It may be grasped as a method for controlling the switching of.
  • FIG. 24 is a block diagram illustrating a configuration for controlling the operations of the first switch 51 and the second switch 52.
  • the internal configuration of the power conversion apparatus 100 is omitted, and the first switch 51 and the second switch 52 are simplified.
  • the control circuit 200 generates a signal J1 for controlling the operation of the first switch 51 and a signal J2 for controlling the second switch 52.
  • the signal J1 is supplied to the first switch 51, and the signal J2 is supplied to the second switch 52.
  • the signal J1 is applied to the gate of the IGBT shown in FIG.
  • the signal J2 is supplied to the gate of the IGBT shown in FIG. 1 or FIGS. 11 to 14 for the second switch 52, for example.
  • the signal J2 is applied to the gates of the IGBTs 52a and 52i (see FIGS. 7 and 9, respectively).
  • the signal J2 is applied to the gates of the IGBTs 52b and 52c (see FIG. 8) or to the gates of the IGBTs 52j and 52f (see FIG. 10).
  • the signal J2 is given to the gates of the IGBTs constituting the switch elements 52g and 52h (see FIGS. 18 and 20), and these IGBTs are turned on exclusively (see symbols S2g and S2h in FIGS. 19 and 21). A pair of signals.
  • the control circuit 200 inputs at least one of an AC voltage Va, an input current Ia, a DC voltage Vd, and a load current Id that is supplied from the power converter 100 to the load 3 as measured by a known technique.
  • the control circuit 200 receives the DC voltage Vd and the load current Id.
  • the control circuit 200 calculates the load power and compares the load power with the first threshold value W1 (or values W1u and W1d), or further compares the load power with the second threshold value W2 (or values W2u and W2d).
  • Signals J1 and J2 are generated.
  • the control circuit 200 receives the AC voltage Va and the input current Ia.
  • the control circuit 200 calculates the input power and compares the input power with the first threshold value W1 (or values W1u and W1d), or further compares the input power with the second threshold value W2 (or values W2u and W2d).
  • Signals J1 and J2 are generated.
  • control circuit receives the input current Ia, compares the input current Ia with at least one of the values I1u and I1d, or further compares the input current Ia with at least one of the values I2u and I2d, and outputs the signals J1, J2 Is generated.
  • the signals J1 and J2 are generated by a known technique in accordance with the operation of the first switch 51 and the second switch 52 shown by the above-described embodiment and modification.
  • the control circuit 200 includes, for example, a microcomputer and a storage device.
  • the microcomputer executes each processing step (in other words, a procedure) described in the program.
  • the storage device is composed of one or more of various storage devices such as a ROM (Read Only Memory), a RAM (Random Access Memory), a rewritable nonvolatile memory (EPROM (Erasable Programmable ROM), etc.), and a hard disk device, for example. Is possible.
  • the storage device stores various information, data, and the like, stores a program executed by the microcomputer, and provides a work area for executing the program. It can be understood that the microcomputer functions as various means corresponding to each processing step described in the program, or can realize that various functions corresponding to each processing step are realized.
  • the control circuit 200 is not limited to this, and various procedures executed by the control circuit 200 or various means or various functions implemented may be realized by hardware.
  • the timing of changing the operation of the power conversion apparatus 100 according to the on / off state of the first switch 51 and the switching of the first state / second state by the second switch 52 according to the value of the converted power or the input current By changing, it becomes possible to adjust the power factor to a higher value in a wide operating range.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)

Abstract

La présente invention réalise une commutation de circuit amplificateur et commute entre un circuit redresseur pleine onde et un circuit redresseur doubleur de tension afin d'améliorer un facteur de puissance. Ce dispositif de conversion de puissance (100) comprend : un circuit redresseur monophasé en pont complet (1) ; un réacteur (7) qui est raccordé à une source d'alimentation (9) en série entre la source d'alimentation (9) et l'un des ports d'entrée (15, 16) du circuit redresseur monophasé en pont complet (1) ; des condensateurs (21, 22) qui sont raccordés, sur un point de raccordement (23), les uns aux autres en série entre des ports de sortie (17, 18) du circuit redresseur monophasé en pont complet (1) ; un premier commutateur (51) qui est raccordé entre un port d'entrée (16) et le point de raccordement (23) ; et un second commutateur (52) qui est raccordé entre les ports d'entrée (15, 16).
PCT/JP2016/086258 2015-12-28 2016-12-06 Dispositif de conversion de puissance WO2017115621A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP16881600.7A EP3399638A4 (fr) 2015-12-28 2016-12-06 Dispositif de conversion de puissance
AU2016381882A AU2016381882B2 (en) 2015-12-28 2016-12-06 Power conversion device
US15/781,277 US10218287B2 (en) 2015-12-28 2016-12-06 Power conversion device
CN201680076064.7A CN108475996A (zh) 2015-12-28 2016-12-06 电力转换装置

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2015-256508 2015-12-28
JP2015256508 2015-12-28
JP2016148393A JP6168211B2 (ja) 2015-12-28 2016-07-28 電力変換装置
JP2016-148393 2016-07-28

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WO2017115621A1 true WO2017115621A1 (fr) 2017-07-06

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CN113206601A (zh) * 2021-04-12 2021-08-03 三峡大学 基于单相ii型三电平伪图腾柱的直流充电器
CN113437887A (zh) * 2021-06-28 2021-09-24 三峡大学 基于多二极管串联双向开关的三电平整流器

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JPH09266674A (ja) 1996-03-28 1997-10-07 Toshiba Corp 直流電源装置及びこの直流電源装置を用いた空気調和機
JPH10174442A (ja) 1996-10-11 1998-06-26 Daikin Ind Ltd コンバータ
JPH11164562A (ja) 1997-09-24 1999-06-18 Toshiba Corp 電力変換装置及びこれを用いた空気調和機
JP2000188867A (ja) 1998-12-22 2000-07-04 Mitsubishi Electric Corp コンバータ回路および直流電圧制御用装置
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JPH09266674A (ja) 1996-03-28 1997-10-07 Toshiba Corp 直流電源装置及びこの直流電源装置を用いた空気調和機
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JPH11164562A (ja) 1997-09-24 1999-06-18 Toshiba Corp 電力変換装置及びこれを用いた空気調和機
JP2000188867A (ja) 1998-12-22 2000-07-04 Mitsubishi Electric Corp コンバータ回路および直流電圧制御用装置
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JP2014113037A (ja) 2012-11-08 2014-06-19 Daikin Ind Ltd スイッチング電源回路制御方法
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113206601A (zh) * 2021-04-12 2021-08-03 三峡大学 基于单相ii型三电平伪图腾柱的直流充电器
CN113437887A (zh) * 2021-06-28 2021-09-24 三峡大学 基于多二极管串联双向开关的三电平整流器

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