WO2017115621A1 - Power conversion device - Google Patents

Power conversion device Download PDF

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Publication number
WO2017115621A1
WO2017115621A1 PCT/JP2016/086258 JP2016086258W WO2017115621A1 WO 2017115621 A1 WO2017115621 A1 WO 2017115621A1 JP 2016086258 W JP2016086258 W JP 2016086258W WO 2017115621 A1 WO2017115621 A1 WO 2017115621A1
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WO
WIPO (PCT)
Prior art keywords
switch
power
capacitor
input
state
Prior art date
Application number
PCT/JP2016/086258
Other languages
French (fr)
Japanese (ja)
Inventor
俊彰 佐藤
淳也 三井
Original Assignee
ダイキン工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2016148393A external-priority patent/JP6168211B2/en
Application filed by ダイキン工業株式会社 filed Critical ダイキン工業株式会社
Priority to EP16881600.7A priority Critical patent/EP3399638A4/en
Priority to AU2016381882A priority patent/AU2016381882B2/en
Priority to CN201680076064.7A priority patent/CN108475996A/en
Priority to US15/781,277 priority patent/US10218287B2/en
Publication of WO2017115621A1 publication Critical patent/WO2017115621A1/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/06—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
    • H02M7/10—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode arranged for operation in series, e.g. for multiplication of voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Definitions

  • the present invention relates to a technique for converting an AC voltage into a DC voltage, and more particularly to a technique using both full-wave rectification and voltage doubler rectification.
  • Patent Document 1 discloses a converter that performs switching between a full-wave rectifier circuit and a voltage doubler rectifier circuit.
  • Patent Document 2 discloses a power converter that performs switching between a booster circuit and a voltage doubler rectifier circuit.
  • Patent Document 3 discloses a power converter that performs switching between a booster circuit, a voltage doubler rectifier circuit, and a full-wave rectifier circuit.
  • the booster circuit can be used in combination with a voltage doubler rectifier circuit or in combination with a full-wave rectifier circuit.
  • Patent Documents 4 to 6 are listed as related to this case.
  • Japanese Patent Laid-Open No. 10-174442 Japanese Patent Laid-Open No. 11-164562 JP 2001-95262 A JP-A-9-266664 JP 2014-113037 A JP 2000-188867 A
  • an object of the present invention is to provide a technique for switching a booster circuit for improving the power factor and switching a full-wave rectifier circuit and a voltage doubler rectifier circuit.
  • the power converter according to the present invention converts a single-phase AC voltage (Va) output from a power source (9) into a DC voltage (Vd) and supplies the DC voltage to a load (3) ( 100).
  • a single-phase full-bridge rectifier circuit (1) having a first output end (17; 18) and a second output end (18; 17) connected to the load, and the first output end and the second output.
  • the first switch (51) that transitions from the conductive state to the non-conductive state once in a half-cycle period that is between and the path of the current flowing through the reactor does not include either the first capacitor or the second capacitor Switching from the first state to the second state including at least one of the first capacitor and the second capacitor in the path is performed when the converted power or the input current is greater than or equal to the first threshold value.
  • the 2nd mode of the power converter concerning this invention is the 1st mode
  • the reactor (7) is at least one of the 1st input end (15) and the 2nd input end (16).
  • the power source (9), the second switch (52) is connected between the first input terminal and the second input terminal, and the second switch is the conversion power or the input
  • the current (Ia) is equal to or greater than the first threshold (W1; W1u; W1d; I1u; I1d)
  • the current state transitions from the conductive state to the non-conductive state at least once in the half cycle period.
  • the 3rd aspect of the power converter device concerning this invention is the 1st aspect, Comprising:
  • the said reactor (7) is at least one of the said 1st input terminal (15) and the said 2nd input terminal (16).
  • the power source (9), and the second switch (52) is connected between the first input terminal and the second input terminal and the first output terminal (17; 18).
  • the second switch is turned off from the conductive state at least once in the half cycle period. Transition to the conductive state.
  • the 4th aspect of the power converter device concerning this invention is the 1st aspect, Comprising: Between the said 1st output terminal (17; 18) and the said connection point (23), the said 1st capacitor
  • the reactor (7) is connected between at least one of the first input end (15) and the second input end (16) and the power source (9).
  • the second switch (52) is connected between the first output terminal (17; 18) and the second output terminal (18; 17). The second switch transitions from a conductive state to a non-conductive state at least once in the half cycle period.
  • the 5th aspect of the power converter device concerning this invention is the 1st aspect, Comprising: A pair of said reactor (7a, 7b) is provided, and one (7a; 7b) and the other (7b; 7a) of the said reactor are provided. ) Are connected to the first output end (17; 18) and the second output end (18; 17), respectively. And between the first output end and the connection point (23), the first capacitor and the one of the reactors are sandwiched between the first capacitor (21; 22) and the one of the reactors. And a diode (52d; 52e) whose forward direction matches the direction in which the current for charging the first capacitor flows. The one of the reactors is sandwiched between the first output end and the diode.
  • the second switch (52) is sandwiched between the one of the reactors and the other of the reactors between the first output end and the second output end, so that the one of the reactors and the reactor The other is connected in series.
  • the second switch transitions from a conductive state to a non-conductive state at least once in the half cycle period.
  • a sixth aspect of the power conversion device is any one of the third and fourth aspects, and is between the second output terminal (18; 17) and the connection point (23).
  • a diode (22) connected in series with the second capacitor (22; 21), whose forward direction coincides with the direction in which a current for charging the second capacitor flows, and is sandwiched between the second output terminal and the second capacitor ( 52e; 52d).
  • the 7th aspect of the power converter device concerning this invention is the 5th aspect, Comprising: Between the said 2nd output terminal (18; 17) and the said connection point (23), the said 2nd capacitor
  • An eighth aspect of the power conversion device is the first aspect, in which the second switch (52) is connected between the first output terminal (17) and the first input terminal (15).
  • a first switch element (52g) connected in between, and a second switch element (52h) connected between the second output terminal (18) and the first input terminal.
  • the first switch element has a potential at the second input terminal (16) that is higher than the first threshold. In the half-cycle period in which the potential of the second input terminal is lower than the potential of the first input terminal, at least once in the half-cycle period higher than the potential of the first input terminal.
  • Non-conducting state When the converted power or the input current is equal to or higher than the first threshold, the second switch element is at least once in the half cycle period in which the potential of the second input terminal is lower than the potential of the first input terminal. A transition is made from a conducting state to a non-conducting state, and the second input terminal is in a non-conducting state during the half cycle period in which the potential of the second input terminal is higher than the potential of the first input terminal.
  • a ninth aspect of the power converter according to the present invention is the eighth aspect, and further includes a first diode (52d; 52e) and a second diode (52e; 52d).
  • the first diode is connected in series with the first capacitor (21; 22) between the first output end (17; 18) and the connection point (23), and the forward direction thereof is the first capacitor. Coincides with the direction in which the current for charging the battery flows, and is sandwiched between the first output terminal and the first capacitor.
  • the second diode is connected in series with the second capacitor (22; 21) between the second output end (18; 17) and the connection point (23), and the forward direction thereof is the second capacitor. Coincides with the direction in which the current for charging the battery flows, and is sandwiched between the second output terminal and the second capacitor.
  • a tenth aspect of the power converter according to the present invention is any one of the first to ninth aspects, wherein the converted power or the input current (Ia) is equal to the first threshold value (W1; W1u; W1d). I1u; I1d) is greater than or equal to a second threshold (W2; W2u; W2d; I2u; I2d) and less than the first threshold, the first switch (51) is once in the half cycle period; Then, the second state is realized without the second switch (52) changing the state from the conductive state to the non-conductive state.
  • An eleventh aspect of the power converter according to the present invention is the tenth aspect, wherein the converted power or the input current (Ia) is less than the second threshold (W2; W2u; W2d; I2u; I2d).
  • the second switch (52) is not switched and the second state is realized.
  • a twelfth aspect of the power conversion device is any one of the first to ninth aspects, wherein when the converted power is less than the first threshold, the first switch (51) is not turned on. The second state is realized without being switched by the second switch (52) in the conducting state.
  • a thirteenth aspect of the power conversion device is any one of the second, sixth, seventh, and ninth aspects, wherein the converted power or the input current (Ia) is the first threshold value.
  • the switching of the second switch (52) is performed when the first switch (51) is in a conductive state.
  • a fourteenth aspect of the power converter according to the present invention is any one of the first to thirteenth aspects, wherein the time point at which the second switch (52) performs the switching is from the start point of the half cycle period. Between the time when 1/6 of the half cycle has elapsed and the time when 5/6 of the half cycle has elapsed from the starting point.
  • a fifteenth aspect of the power converter according to the present invention is any one of the second, sixth, seventh, and ninth aspects, wherein the converted power or the input current (Ia) is the first threshold value.
  • the transition of the first switch (51) from the non-conducting state to the conducting state is performed when the first state is realized.
  • a sixteenth aspect of the power converter according to the present invention is any one of the third to fifth and eighth aspects, wherein the converted power or the input current (Ia) is the first threshold value (W1; W1u). W1d; I1u; I1d) or more, the switching of the second switch (52) is performed when the first switch (51) is in a non-conductive state, and the first switch (51) The transition from the non-conductive state to the conductive state is performed when the second state is realized.
  • the converted power may be power supplied to the load (3), or may be power input to the power converter (100).
  • the operations of the first switch (51) and the second switch (52) may be controlled based on the magnitude of the current (Ia) input to the power conversion device (100). For example, the first threshold value (I1u) when the input current increases is larger than the first threshold value (I1d) when the input current (Ia) decreases.
  • the power factor is improved by expanding the conduction angle of the current flowing through the power source by the second switch, and the energy stored in the reactor is supplied by switching the second switch.
  • the voltage applied to the series connection of the first capacitor and the second capacitor is increased.
  • the conduction angle of the current flowing through the single-phase full-bridge rectifier circuit is widened and the power factor is improved. Is done.
  • the sixth, seventh, and ninth aspects of the power conversion device according to the present invention, even if the first state is realized and the first switch is turned on, the discharge of the first capacitor or the second capacitor is prevented. Is done.
  • the power factor when the conversion power is low, the power factor may be low, but the voltage applied to the load by the pair of capacitors needs to be increased. Loss is reduced by realizing the second state without switching.
  • the power factor when the converted power is even lower, the power factor may be low, and it is not necessary to increase the voltage applied to the load by the pair of capacitors. Loss is reduced by entering the non-conducting state and realizing the second state without switching the second switch.
  • the power factor when the converted power is low, the power factor may be low, and it is not necessary to increase the voltage applied to the load by the pair of capacitors. Loss is reduced by being in a conductive state and realizing the second state without the second switch being switched.
  • the function as the voltage doubler circuit is exhibited at the time when the second switch is switched from the first state to the second state, and the input is performed. Current is unlikely to drop.
  • the reverse recovery phenomenon in the rectifying element constituting the single-phase full-bridge rectifier circuit is avoided, and the deterioration of efficiency is avoided.
  • FIG. 1 is a circuit diagram illustrating the configuration of a power conversion apparatus 100 that is employed in any of the following embodiments.
  • the power conversion device 100 converts the single-phase AC voltage Va into a DC voltage Vd and supplies it to the load 3.
  • the AC voltage Va is output from the power source 9.
  • the converted power of the power converter 100 can be grasped as input power determined by the AC input current Ia, the AC voltage Va, and the power factor supplied from the power source 9 to the power converter 100, It can also be grasped as supplied load power (this is determined by the DC voltage Vd and the impedance of the load 3, or the DC voltage Vd and a current that varies depending on the magnitude of the load).
  • load power is taken as an example of converted power.
  • the power conversion device 100 includes a single-phase full-bridge rectifier circuit 1, a reactor 7, capacitors 21 and 22, a first switch 51, and a second switch 52.
  • the single-phase full-bridge rectifier circuit 1 has a pair of input terminals 15 and 16 and an output terminal 17 and 18 connected to the load 3.
  • the output terminals 17 and 18 are paired on the opposite side of the power supply 9 with respect to the input terminals 15 and 16.
  • the single-phase full-bridge rectifier circuit 1 includes diodes 11, 12, 13, and 14.
  • the anode of the diode 11 is connected to the input terminal 15 together with the cathode of the diode 13
  • the anode of the diode 12 is connected to the input terminal 16 together with the cathode of the diode 14, and the cathode of the diode 11 is connected to the output terminal 17 together with the cathode of the diode 12.
  • the anode of the diode 13 is connected to the output terminal 18 together with the anode of the diode 14.
  • the reactor 7 is connected between at least one of the input terminals 15 and 16 and the power source 9.
  • the reactor 7 is disposed between the power source 9 and the input end 15, but may be disposed between the power source 9 and the input end 16.
  • one reactor may be arranged between the power source 9 and the input end 15 and between the power source 9 and the input end 16. This is because the pair of reactors is electrically equivalent to one reactor 7.
  • the pair of capacitors 21 and 22 are connected in series between the output ends 17 and 18 via the connection point 23.
  • the series connection of the capacitors 21 and 22 supports the DC voltage Vd.
  • the first switch 51 is connected between the input terminal 16 and the connection point 23.
  • the second switch 52 is connected between the input terminals 15 and 16. Since the configuration of the first switch 51 and the configuration of the second switch 52 are known techniques, detailed description thereof will be omitted, but the first switch 51 and the second switch 52 are both bidirectional in the present embodiment. It can be realized with a semiconductor switch.
  • FIG. 1 illustrates a case where both the first switch 51 and the second switch 52 are configured by parallel connection of an IGBT (insulated gate bipolar transistor) and a diode bridge.
  • IGBT insulated gate bipolar transistor
  • the single-phase full-bridge rectifier circuit 1 and the capacitors 21 and 22 constitute a voltage doubler rectifier circuit. Due to the non-conduction state, the single-phase full-bridge rectifier circuit 1 and the capacitors 21 and 22 constitute a full-wave rectifier circuit.
  • the second switch 52 since the second switch 52 is in a conductive state, a first state in which the capacitors 21 and 22 are not included in the path of the current flowing through the reactor 7 (the input current Ia in the present embodiment) is realized. At this time, the reactor 7 accumulates energy due to the current flowing through the second switch 52.
  • a second state is realized in which at least one of the capacitors 21 and 22 is included in the path of the current flowing through the reactor 7. The energy accumulated in the first state is at least stored in the capacitors 21 and 22 via the single-phase full-bridge rectifier circuit 1 in the second state realized by the second switch 52 transitioning from the conductive state to the non-conductive state. Supplied on one side.
  • the reactor 7 and the second switch 52 perform the boosting operation when the second switch 52 switches from the first state to the second state. That is, it can be considered that the second switch 52 constitutes a booster circuit together with the reactor 7, the diodes 11 and 12, and the capacitors 21 and 22.
  • the load 3 is, for example, a combination of an inverter that performs DC / AC conversion and an AC motor that is supplied with AC power from the inverter.
  • FIG. 2 is a graph illustrating the operation of the power conversion apparatus 100 according to this embodiment.
  • a waveform G0 is a waveform of the AC voltage Va and is shown with the polarity of the vertical axis indicating the value reversed from the normal one. The reason why the polarity is reversed is simply to prevent the waveform from interfering with the other waveforms G1, G2, G3 and becoming difficult to see.
  • the waveform G1 is a waveform of the input current Ia (in this case, the current flowing through the reactor 7) when both the first switch 51 and the second switch 52 are in the non-conduction state (first operation). In this case, full-wave rectification is performed without the step-up operation by the second switch 52 and the reactor 7.
  • a waveform G2 is a waveform of the input current Ia when the first switch 51 repeats the conductive state and the non-conductive state and the second switch 52 is in the non-conductive state (second operation). In this case, voltage doubler rectification and full wave rectification without boosting operation by the second switch 52 and the reactor 7 are alternately performed. In the first operation and the second operation, the second state is realized instead of the first state.
  • a waveform G3 is a waveform of the input current Ia when the first switch 51 repeats the conduction state and the non-conduction state and the second switch 52 repeats the conduction state and the non-conduction state (third operation). In this case, voltage doubler rectification and full-wave rectification are alternately performed with a boosting operation by the second switch 52 and the reactor 7.
  • symbols S1 and S2 indicate the ON / OFF states of the first switch 51 and the second switch 52 in the third operation, respectively.
  • the first switch 51 transitions from the conductive state to the non-conductive state once in a half cycle period of the AC voltage Va.
  • the half cycle period is a pair of adjacent time points (time 0, 0.01 (seconds) according to FIG. 2) at which the AC voltage Va takes the median value (value 0 according to FIG. 2). Or between time 0.01 and 0.02 (seconds).
  • the second switch 52 transitions from the conductive state to the non-conductive state at least once in a half cycle period.
  • a period that is half the period of the AC voltage Va (this is not necessarily the half-period period described above).
  • a transition from the non-conductive state to the conductive state is made once.
  • the transition of the first switch 51 from the non-conductive state to the conductive state may be performed at the boundary between a pair of adjacent half-period periods defined above.
  • FIG. 2 illustrates such a transition from the non-conductive state to the conductive state.
  • the cycle of the AC voltage Va is equal to the number of times of transition from the conductive state to the non-conductive state in the half cycle period. Transition from the non-conducting state to the conducting state is performed in a period of 1 ⁇ 2 length. This transition may also be performed at the boundary between a pair of adjacent half-cycle periods.
  • the first switch 51 transits from the non-conducting state to the conducting state at time 0, and transits from the conducting state to the non-conducting state at time 0.005 (seconds).
  • the transition from the non-conduction state to the conduction state is performed at .01 (second), and the transition from the conduction state to the non-conduction state is performed at time 0.015 (second).
  • the second switch 52 transitions from the non-conductive state to the conductive state at time 0, transitions from the conductive state to the non-conductive state at time 0.0025 (seconds), and from the non-conductive state to the conductive state at time 0.01 (seconds). At time 0.0125 (seconds), and transitions from a conductive state to a non-conductive state.
  • FIG. 3 is a graph showing the behavior of the input current Ia in the second operation.
  • the 1st switch 51 changes from a non-conduction state to a conduction
  • symbol S ⁇ b> 1 indicates ON / OFF of the conductive / non-conductive state of the first switch 51 in the second operation.
  • voltage doubler rectification and full wave rectification are alternately performed. Thereby, even if the second state is maintained, the DC voltage Vd can be set higher than the peak value of the AC voltage Va.
  • FIG. 3 also shows the voltage Vc across the capacitor 22.
  • or Vd ⁇ Vc
  • FIGS. 4 and 5 are graphs schematically showing the behavior of the input current Ia in the second operation.
  • > Vc
  • > Vd a current for charging both capacitors 21 and 22 flows.
  • the conduction angle of the input current Ia increases as the DC voltage Vd decreases. Therefore, if the waveform of the AC voltage Va is the same, the conduction angle is narrower when the DC voltage Vd is higher as shown in FIG. 5 than when the DC voltage Vd is lower as shown in FIG. That is, in the second operation, the magnitude (height) of the DC voltage Vd and the power factor are in a trade-off relationship.
  • the third operation as indicated by the waveform G3 in FIG. 2, the input current Ia flows even when the second switch 52 is in the conductive state and the first state is realized, and the conduction angle is the second angle. Wider than operation.
  • the third operation has a higher power factor than the second operation.
  • not only the voltage doubler rectification but also the step-up operation by the second switch 52 and the reactor 7 is performed, so that the obtained DC voltage Vd can be further increased. That is, the third operation increases the DC voltage Vd as compared to the second operation.
  • FIG. 2 illustrates the case where the second switch 52 transits only once from the conductive state to the non-conductive state in the half cycle period.
  • the same effect can be obtained even when such a transition is performed a plurality of times in the half cycle period. In this case, the number of switching increases and the loss increases, but the power factor controllability is improved.
  • the switching frequency of the power conversion device 100 as a whole increases in both the second operation than the first operation and the third operation than the second operation.
  • the increase in the number of times of switching increases the switching loss and conduction loss of the first switch 51 and the second switch 52, and increases the loss in the power conversion device 100.
  • a power factor correction circuit that performs a switching operation over the entire power cycle, such as an interleaved power factor correction circuit or a bridgeless power factor correction circuit (hereinafter referred to as a “full switching type power factor correction circuit”).
  • Tentative name is disadvantageous from the viewpoint of efficiency because the number of times of switching is large even for a load that does not require a high power factor. In other words, for loads that do not require a high power factor, it is desirable to increase the efficiency by reducing the number of times of switching.
  • Patent Document 5 proposes an operation in which switching is not performed in an interleaved power factor correction circuit (see “non-conduction mode” in Patent Document 5). This will increase the switching loss in the inverter placed after the power factor correction circuit. From the viewpoint of reducing the switching loss of the inverter, it is desirable to reduce the DC voltage in a situation where the switch having the boosting function does not perform switching.
  • FIG. 6 is a graph showing a comparison between the bridgeless type power factor correction circuit and the power conversion device 100 of FIG. However, in any case, the portion having the boosting function does not perform the switching operation.
  • a waveform G4 is a bridgeless type power factor correction circuit
  • a waveform G5 is a relationship between the load power and a DC voltage (denoted as “DC voltage” in the figure) of the power converter 100.
  • DC voltage a DC voltage (denoted as “DC voltage” in the figure) of the power converter 100.
  • the DC voltage generated by the power converter 100 decreases as the load increases (the load power increases), whereas the bridgeless power factor correction circuit decreases the DC voltage even when the load power is increased. Is generated, and a DC voltage higher than the DC voltage generated by the power converter 100 is generated.
  • the interleaved power factor correction circuit has the same DC voltage as that of the bridgeless type.
  • a full-switching power factor correction circuit generally has a high switching frequency, so that even if the inductance of the reactor is small, the current is smoothed, and therefore, a reactor having a small inductance is employed.
  • the inductance is selected to be about several hundred ⁇ H. Therefore, the voltage drop caused by the current flowing through it is small, and as a result, the DC voltage is kept high. Furthermore, if the inductance is small, when the switching operation is not performed, the power factor is bad, the peak of the alternating current is increased, and the loss may be increased.
  • the inductance of the reactor is selected to be large (for example, several mH) in the power conversion device 100 that performs the second operation, the voltage drop at the reactor is large and the DC voltage is also low, so the switching loss of the inverter is small. Become.
  • the switching of the first switch 51 and the switching by the second switch 52 are preferably selected according to the magnitude of the load 3 (that is, the load power: the magnitude of the converted power of the power converter 100).
  • the operation of the power conversion apparatus 100 is divided into three operations: a first operation, a second operation, and a third operation.
  • the first operation, the second operation, and the third operation are employed at light load, medium load, and heavy load, respectively.
  • the third operation is performed.
  • the second operation is performed. If it is less than the threshold value, it is desirable that the power converter 100 employs the first operation.
  • the load 3 is a motor driven by an inverter, for example, in order to drive the motor at a high rotational speed and a high torque, it is necessary to further increase the voltage applied to the motor. From such a necessity, it is desirable to perform the third operation for increasing the DC voltage Vd.
  • the load is medium, that is, if the magnitude of the load power is greater than or equal to the second threshold and less than the first threshold, a higher power factor is more important than high efficiency.
  • the load 3 is, for example, a motor driven by an inverter, in order to drive the motor at a high rotational speed and high torque, it is not necessary to perform a so-called field weakening (weakening magnetic flux) operation. It is desirable to increase the DC voltage Vd. Therefore, it is desirable that the second operation is performed in order to increase the DC voltage Vd while the second switch 52 is turned off and the second state is realized.
  • the DC voltage Vd can be increased by lengthening the period in which the first switch 51 is in the conductive state.
  • the period in which the first switch 51 is in a conductive state is set to, for example, about 1/4 of the power supply cycle, and the period in which the second switch 52 is in a conductive state and the first state is realized is increased.
  • the voltage Vd can be increased.
  • the input power to the load 3 is not set without setting the second threshold value. If the magnitude is less than the first threshold, the first operation may be adopted.
  • the transition of the second switch 52 from the conductive state to the non-conductive state occurs during the half cycle period. To be done.
  • the single-phase full-bridge rectifier circuit 1 and the capacitors 21 and 22 are already functioning as a voltage doubler rectifier circuit when the second switch 52 transitions from the conductive state to the non-conductive state. . Therefore, even when the second switch 52 transitions from the conducting state to the non-conducting state, the input current Ia is less likely to be reduced, and a current waveform having a high power factor that is closer to a sine wave is obtained.
  • the time when the second switch 52 transitions from the conductive state to the non-conductive state is later than the time when 1/6 of the half cycle has elapsed from the start point of the half cycle period.
  • Capacitors 21 and 22 functioning as a part of a voltage doubler rectifier circuit are charged with a half value Vd / 2 of the DC voltage Vd. Therefore, in order to allow the input current Ia to flow from the power supply 9 when the second switch 52 is in a non-conductive state,
  • the power factor becomes the best by making the input current Ia a sine wave in phase with the AC voltage Va. Therefore, more preferably, when the second switch 52 transitions from the conducting state to the non-conducting state, it is highly necessary to increase the input current Ia when the phase of the AC voltage Va employing the above-described standard is smaller than 90 degrees. (Until the AC voltage Va reaches its peak).
  • the time when the second switch 52 transitions from the conductive state to the non-conductive state is later than the time when 1/6 of the half cycle has elapsed since the start of the half cycle period, and 5/6 of the half cycle has elapsed.
  • the first switch 51 may be in a non-conducting state at that time.
  • the transition of the first switch 51 from the non-conductive state to the conductive state is realized by the second switch 52 being in the conductive state. Sometimes done.
  • the second switch 52 If the second switch 52 is in the conductive state, the pair of input terminals 15 and 16 are short-circuited. Therefore, whether the first switch 51 is in the conductive state or the non-conductive state depends on the input current Ia and the capacitor 21. , 22 is not affected.
  • the input current Ia flows through the second switch 52 having a lower impedance than the configuration of the single-phase full-bridge rectifier circuit 1 and the capacitors 21 and 22, and the first state is realized. This is because there are no 22 discharge paths.
  • the first switch 51 may transition from the non-conducting state to the conducting state considerably before the time when the second switch 52 transitions from the conducting state to the non-conducting state.
  • the first switch 51 and the second switch 52 may simultaneously transition from a non-conductive state to a conductive state.
  • the first switch 51 is illustrated as a simple switch with a simplified configuration.
  • the second switch 52 is one of the pair of input terminals 15 and 16 and the output terminals 17 and 18 (which can be said in conformity with FIGS. 7 and 8).
  • the configuration connected between the output end 18 and the output end 17) in the case of FIGS. 9 and 10 is shown as a circuit diagram.
  • the second switch 52 is not a bidirectional switch, but is configured as a switch that can flow current in one direction by its conduction.
  • the second switch 52 includes an IGBT 52a and diodes 11a and 12a.
  • the anode of the diode 11 a is connected to the input terminal 15, and the anode of the diode 12 a is connected to the input terminal 16.
  • the cathode of the diode 11 a, the cathode of the diode 12 a, and the collector of the IGBT 52 a are connected in common, and the emitter of the IGBT 52 a is connected to the output terminal 18.
  • the second switch 52 is configured as a switch that can flow current from either the input end 15 or 16 to the output end 18 by its conduction.
  • the second switch 52 includes IGBTs 52b and 52c.
  • the collector of the IGBT 52 b is connected to the input terminal 15, and the collector of the IGBT 52 c is connected to the input terminal 16.
  • the emitter of the IGBT 52b, the emitter of the IGBT 52c, and the output terminal 18 are connected in common. That is, even in the second modification, the second switch 52 is configured as a switch that can flow a current from either the input end 15 or 16 to the output end 18 by its conduction.
  • the second switch 52 includes an IGBT 52i and diodes 13a and 14a.
  • the cathode of the diode 13 a is connected to the input terminal 15, and the cathode of the diode 14 a is connected to the input terminal 16.
  • the anode of the diode 13 a, the anode of the diode 14 a, and the emitter of the IGBT 52 i are connected in common, and the collector of the IGBT 52 i is connected to the output terminal 17.
  • the second switch 52 is configured as a switch that can flow current from the output end 17 to both the input ends 15 and 16 by the conduction.
  • the second switch 52 includes IGBTs 52j and 52f.
  • the emitter of the IGBT 52j is connected to the input terminal 15, and the emitter of the IGBT 52f is connected to the input terminal 16.
  • the collector of the IGBT 52j, the collector of the IGBT 52f, and the output terminal 17 are connected in common. That is, even in the fourth modification, the second switch 52 is configured as a switch that can flow current from the output end 17 to both the input ends 15 and 16 by the conduction.
  • the first modification and the third modification appear to have the same number of elements constituting the second switch 52, and their operations are also equivalent as will be described later. However, when actually applied, the first modification is generally applied for the following reason. That is, in the first modification, since the emitter of the IGBT 52a is connected to the negative potential side of the DC voltage Vd, the driving signal of the IGBT 52a and the reference potential of the driving power source are on the negative potential side of the DC voltage Vd. It can be operated at the same reference potential as a control circuit (not shown) for generating a signal.
  • the drive signal of the IGBT 52i and the reference potential of the drive power supply cannot be set to the same potential as the reference potential (the negative potential side of the DC voltage Vd) of the control circuit.
  • the IGBT driving power source and the driving signal level shift circuit are required. Therefore, it is desirable to apply the first modification rather than the third modification from the viewpoint of avoiding circuit complexity and cost increase.
  • This viewpoint is the same for the second and fourth modifications.
  • the fourth modification since the emitters of the IGBT 52j and the IGBT 52f are not common, two level shifts of the IGBT driving power source and the driving signal are required corresponding to each IGBT. Therefore, the difference between the second deformation and the fourth deformation in the above viewpoint is more conspicuous than the difference between the first deformation and the third deformation in the above viewpoint. For this reason, the case where the second deformation is applied rather than the fourth deformation is common.
  • the second switch 52 is provided between the output terminals 17 and 18, and current flows from the output terminal 17 to the output terminal 18 by the conduction. Can do.
  • the second switch 52 is composed of an IGBT having a collector connected to the output end 17 and an emitter connected to the output end 18.
  • the diode 52 d is connected in series with the capacitor 21 between the output end 17 and the connection point 23.
  • the forward direction of the diode 52d coincides with the direction in which the current for charging the capacitor 21 flows, that is, the direction from the output end 17 toward the capacitor 21.
  • the diode 52 d is sandwiched between the output terminal 17 and the capacitor 21. Specifically, the anode of the diode 52 d is connected to the output terminal 17, and the cathode of the diode 52 d is connected to the connection point 23 via the capacitor 21.
  • the diode 52 e is connected in series with the capacitor 22 between the output end 18 and the connection point 23.
  • the forward direction of the diode 52 e coincides with the direction in which a current for charging the capacitor 22 flows, that is, the direction from the capacitor 22 toward the output terminal 18.
  • the diode 52 e is sandwiched between the output terminal 18 and the capacitor 22. Specifically, the cathode of the diode 52 e is connected to the output terminal 18, and the anode of the diode 52 e is connected to the connection point 23 via the capacitor 22.
  • the operation of the second switch 52 is performed in the same manner as the second switch 52 of the first embodiment, and the third operation can be realized. That is, the transition between the first state and the second state is performed by switching the second switch 52.
  • the first switch 51 is in the non-conductive state. Needs to be done when Therefore, the third operation in the second embodiment in which the transition from the conductive state of the second switch 52 to the non-conductive state is performed in the conductive state of the first switch 51 cannot be realized. Therefore, as compared with the second embodiment, in the first to sixth modifications, the input current Ia is lowered and the power factor is lowered.
  • a diode 52d is present in the charging path of the capacitor 21
  • a diode 52e is present in the charging path of the capacitor 22. Therefore, even when full-wave rectification or voltage doubler rectification is performed, the loss increases by the conduction loss of the diode.
  • the transition of the first switch 51 from the non-conductive state to the conductive state is performed when the second state is realized, here, when the second switch 52 is in the non-conductive state. Need to be done. Therefore, the third operation in the third embodiment in which the transition of the first switch 51 from the non-conductive state to the conductive state is performed in the conductive state of the second switch 52 cannot be realized. Therefore, as compared with the third embodiment, the deformation causes a reverse recovery phenomenon of the diode, which is not desirable from the viewpoint of deteriorating the efficiency.
  • FIG. 13 is a circuit diagram showing a configuration according to the seventh modification
  • FIG. 14 is a circuit diagram showing a configuration according to the eighth modification.
  • the reactor 7 in the fifth modification (FIG. 11) and the sixth modification (FIG. 12) is divided, and the capacitors 21, The structure arrange
  • a pair of reactors 7a and 7b are provided.
  • Reactor 7 a is connected to output end 17, and reactor 7 b is connected to output end 18.
  • the diode 52d is sandwiched between the capacitor 21 and the reactor 7a between the output end 17 and the connection point 23 and connected in series to the capacitor 21 and the reactor 7a.
  • the forward direction of the diode 52d coincides with the direction in which the current for charging the capacitor 21 flows.
  • Reactor 7a is sandwiched between output end 17 and diode 52d. Specifically, the anode of the diode 52 d is connected to the output end 17 via the reactor 7 a, and the cathode of the diode 52 d is connected to the connection point 23 via the capacitor 21.
  • the diode 52e is sandwiched between the capacitor 22 and the reactor 7b between the output end 18 and the connection point 23, and is connected in series with the capacitor 22 and the reactor 7b.
  • the forward direction of the diode 52e coincides with the direction in which the current for charging the capacitor 22 flows.
  • Reactor 7b is sandwiched between output end 18 and diode 52e. Specifically, the cathode of the diode 52e is connected to the output end 18 via the reactor 7b, and the anode of the diode 52e is connected to the connection point 23 via the capacitor 22.
  • the pair of reactors 7a and 7b is connected in series with the power source 9 via the single-phase full-bridge rectifier circuit 1 between both ends of the series connection of the capacitors 21 and 22, as shown in FIGS. 12 is common to the reactor 7 shown in FIG.
  • the second switch 52 is sandwiched between the reactors 7a and 7b between the output ends 17 and 18 in both of the seventh modification (FIG. 13) and the eighth modification (FIG. 14), and is in series with the reactors 7a and 7b. Connected to.
  • the reactors 7a and 7b function similarly to the reactor 7 of FIG.
  • the second switch 52 can be considered to constitute a booster circuit together with the reactors 7a and 7b, the diode 52d (or the diode 52e), and the capacitors 21 and 22.
  • the reactor 7a reduces the discharge current of the capacitor 22 even when both the first switch 51 and the second switch 52 are in a conductive state.
  • the reactor 7b reduces the discharge current of the capacitor 21 even when both the first switch 51 and the second switch 52 are in the conductive state.
  • FIG. 15 is a graph illustrating the operation of the power conversion apparatus 100 in the first to eighth modifications (FIGS. 7 to 14), and corresponds to FIG.
  • the waveform G0 and symbols S1 and S2 are synonymous with the definitions used in the description made with reference to FIG.
  • a waveform G6 shows the waveform of the input current Ia.
  • the first switch 51 changes from the conductive state to the non-conductive state once in a half cycle period of the AC voltage Va.
  • the second switch 52 transitions from the conductive state to the non-conductive state at least once in a half cycle period.
  • the transition of the second switch 52 from the conductive state to the non-conductive state is performed in the half cycle period (this can be regarded as switching from the first state to the second state by the second switch 52). After the first switch 51 has transitioned from the non-conductive state to the conductive state. By such operations of the first switch 51 and the second switch 52, a state in which both are conducted is avoided.
  • the absolute value of the input current Ia decreases and the power factor deteriorates between the time when the second switch 52 is turned off and the time when the first switch 51 is turned on.
  • FIG. 16 shows a configuration according to a ninth modification, which is a further modification applicable to any of the first, second, fifth, and seventh modifications (FIGS. 7, 8, 11, and 13).
  • FIG. FIG. 17 shows a tenth modification which is a further modification applicable to any of the modifications shown in the third, fourth, sixth, and eighth modifications (FIGS. 9, 10, 12, and 14).
  • It is a circuit diagram which shows the structure concerning a deformation
  • FIG. 16 shows only the vicinity where the second switch 52, the capacitor 22, and the diodes 13 and 14 are connected
  • FIG. 17 shows the vicinity where the second switch 52, the capacitor 21, and the diodes 11 and 12 are connected. Only a partial takeout is shown, respectively.
  • the reactor 7b shown in parentheses in FIG. 16 exists when the configuration of FIG. 16 is applied to the configuration according to the seventh modification (FIG. 13), and the first, second, and fifth modifications ( When this is applied to the configuration according to FIGS. 7, 8, and 11), it does not exist and is merely a wiring.
  • the reactor 7a shown in parentheses in FIG. 17 exists when the configuration of FIG. 17 is applied to the configuration according to the eighth modification (FIG. 14), and the third, fourth, sixth It does not exist when applied to the configuration according to the modification (FIGS. 9, 10, and 12), and is merely a wiring.
  • the diode 52e is connected in series with the capacitor 22 between the output end 18 and the connection point 23, whether or not the reactor 7b is present.
  • the forward direction of the diode 52 e coincides with the direction in which a current for charging the capacitor 22 flows, that is, the direction from the capacitor 22 toward the output terminal 18.
  • the diode 52e is sandwiched between the reactor 7b and the capacitor 22 between the output end 18 and the connection point 23, and is connected in series with the reactor 7b and the capacitor 22.
  • the diode 52e sandwiches the reactor 7b together with the output end 18.
  • the diode 52d is connected in series with the capacitor 21 between the output end 17 and the connection point 23 whether or not the reactor 7a is present.
  • the forward direction of the diode 52d coincides with the direction in which the current for charging the capacitor 21 flows, that is, the direction from the output end 17 toward the capacitor 21.
  • the diode 52d When the reactor 7a exists, the diode 52d is sandwiched between the reactor 7a and the capacitor 21 between the output end 17 and the connection point 23, and is connected in series with the reactor 7a and the capacitor 21. The diode 52 d sandwiches the reactor 7 a together with the output end 17.
  • the configuration according to the seventh modification (FIG. 13) and the eighth modification (FIG. 14) is as shown in FIG. Regardless of whether or not the modification shown in FIG. 17 is applied, it is disadvantageous in that the reactor 7b or the reactor 7a is also required when the first switch 51 is turned on and voltage doubler rectification is performed.
  • FIG. 18 is a circuit diagram showing a configuration according to the eleventh modification.
  • the second switch 52 includes switch elements 52g and 52h.
  • the switch element 52 g is connected between the output end 17 and the input end 15, and the switch element 52 h is connected between the output end 18 and the input end 15.
  • the second switch 52 itself is introduced in, for example, Patent Document 6.
  • the switch element 52 g is realized by an IGBT having a collector connected to the output end 17 and an emitter connected to the input end 15, and the switch element 52 h is an emitter connected to the output end 18 and the input end 15.
  • IGBT which has a collector connected to
  • the current can flow from the output end 17 to the input end 15 when the switch element 52g is turned on.
  • a current can flow from the input end 15 to the output end 18 by turning on the switch element 52h.
  • the switch element 52h since the switch element 52h becomes non-conductive during the half cycle period, at least the capacitor 21 is included in the path of the current flowing through the reactor 7, and the second state is realized. If the first switch 51 is conductive, the path includes the capacitor 21, and if the first switch 51 is non-conductive, the path includes the capacitors 21, 22.
  • the switch element 52h switches between the first state and the second state in the half cycle period. Such switching does not depend on conduction / non-conduction of the switch element 52g.
  • the switch element 52g since the switch element 52g becomes non-conductive during the half-cycle period, at least the capacitor 22 is included in the path of the current flowing through the reactor 7, and the second state is realized. If the first switch 51 is conductive, the path includes the capacitor 22, and if the first switch 51 is non-conductive, the path includes the capacitors 21 and 22.
  • the switch element 52g performs switching between the first state and the second state in the half cycle period. Such switching does not depend on conduction / non-conduction of the switch element 52h.
  • the capacitor 22 passes through the switch element 52h and the first switch 51. Is discharged from the input terminals 15 and 16 via the power source 9 and the reactor 7.
  • the switch element 52g conducts in a half cycle period in which the potential of the input terminal 15 is lower than the potential of the input terminal 16, and the first switch 51 further conducts, the capacitor is connected via the switch element 52g and the first switch 51.
  • a current for discharging the electric current 21 flows from the input terminals 15 and 16 through the power source 9 and the reactor 7. Although the current flowing through the reactor 7 (that is, the input current Ia) increases due to these discharge currents, the increase does not contribute to the load power.
  • the situation where both the first switch 51 and the second switch 52 are in the conductive state that is, the first switch. It is desirable to avoid a situation in which both the first switch 51 and the switch element 52g are in a conductive state, or a situation in which both the first switch 51 and the switch element 52h are in a conductive state.
  • FIG. 19 is a graph illustrating the operation of the power conversion apparatus 100 in the eleventh modification (FIG. 18), and corresponds to FIG.
  • Waveforms G0 and G6 and symbol S1 are synonymous with the definitions used in the description made with reference to FIG.
  • Symbols S2g and S2h indicate the ON / OFF states of the switch elements 52g and 52h in the third operation, respectively.
  • the first switch 51 transits from the conductive state to the non-conductive state once in a half cycle period of the AC voltage Va.
  • the second switch 52 transitions from the conducting state to the non-conducting state at least once in a half cycle period (collectively, the switch elements 52g and 52h).
  • the second switch 52 transitions from the conducting state to the non-conducting state (this is the switching from the first state to the second state by the second switch 52).
  • the first switch 51 has transitioned from a non-conducting state to a conducting state.
  • FIG. 20 is a circuit diagram showing a configuration according to the twelfth modification, in which diodes 52d and 52e are added to the configuration according to the eleventh modification.
  • the diode 52 e is sandwiched between the output end 18 and the capacitor 22 between the output end 18 and the connection point 23 and connected in series with the capacitor 22, and the forward direction thereof coincides with the direction in which a current for charging the capacitor 22 flows.
  • the anode of the diode 52 e is connected to the capacitor 22 on the side opposite to the connection point 23, and the cathode of the diode 52 e is connected to the output terminal 18.
  • the diode 52 d is sandwiched between the output end 17 and the capacitor 21 between the output end 17 and the connection point 23 and connected in series with the capacitor 21, and the forward direction thereof coincides with the direction in which the current for charging the capacitor 21 flows. Specifically, the cathode of the diode 52 d is connected to the capacitor 21 on the side opposite to the connection point 23, and the anode of the diode 52 d is connected to the output terminal 17.
  • FIG. 21 is a graph illustrating the operation of the power conversion apparatus 100 in the twelfth modification (FIG. 20), and corresponds to FIG.
  • Waveforms G0, G1, G2, G3 and symbol S1 are synonymous with the definitions used in the description made with reference to FIG. 2, and symbols S2g and S2h are used in the description made with reference to FIG. It is synonymous with the definition.
  • the power factor is improved as compared with the waveform G6 in the eleventh modification.
  • FIG. 22 is a graph showing the relationship between the load power and the input current Ia.
  • the load power is an example of the converted power, and the following explanation is appropriate even if it is read as input power.
  • Curves C1, C2, and C3 indicate the above relationships in the first operation, the second operation, and the third operation with broken lines, respectively. As described above, the power factor is improved (increased) in the second operation than in the first operation, and in the third operation than in the second operation.
  • the power source 9 is usually a commercial power source and is supplied at a constant voltage at which the effective value of the AC voltage Va is stable, the load power is proportional to the product of the input current Ia and the power factor. Therefore, if the load power is equal, the curve C2 is lower than the curve C1, and the curve C3 is lower than the curve C2. Even in the same operating state, the power factor generally increases as the input current Ia increases.
  • the curve G8 indicates that the third operation is performed when the load power is equal to or greater than the first threshold value W1.
  • the curve G8 coincides with the curve C1 when the magnitude of the load power is less than the second threshold W2, the curve C2 when the magnitude of the load power is less than the second threshold W2 and less than the first threshold, and the curve C3 when the magnitude of the load power is more than the first threshold W1.
  • the input current Ia increases.
  • the operation of the power conversion device 100 transitions from the first operation to the second operation, so that the input current Ia decreases from the value I2u to the value I2d. This is because the power factor is improved (increased) by the above transition.
  • the input current Ia further increases.
  • the operation of the power conversion device 100 transitions from the second operation to the third operation, so that the input current Ia decreases from the value I1u to the value I1d.
  • the input current Ia is adopted instead of the load power as a reference for transitioning the operation of the power conversion apparatus 100 between the first operation, the second operation, and the third operation. Can do.
  • the power conversion apparatus 100 performs the first operation. That is, the first switch 51 is in a non-conductive state, and the second switch 52 is not switched and the second state is realized.
  • the power conversion device 100 When the input current Ia rises to reach the value I2u from less than the value I2u, the power conversion device 100 performs the second operation. That is, the second switch 52 is not switched and the first switch 51 changes from the conductive state to the non-conductive state once in a half cycle period while the second state is realized.
  • the power conversion apparatus 100 When the input current Ia rises to reach the value I1u from less than the value I1u, the power conversion apparatus 100 performs the third operation. That is, the first switch 51 transitions from the conducting state to the non-conducting state once in a half cycle period, and the second switch 52 performs switching from the first state to the second state at least once in the half cycle period. . Even if the input current Ia further increases, the third operation is maintained.
  • the operation of the power conversion device 100 transitions from the third operation to the second operation, whereby the input current Ia increases from the value I1d to the value I1u. This is because the power factor is deteriorated (decreased) by the above transition.
  • the input current Ia further decreases.
  • the load power decreases and reaches the second threshold value W2
  • the operation of the power conversion device 100 transitions from the second operation to the first operation, whereby the input current Ia increases from the value I2d to the value I2u.
  • the input current Ia is adopted instead of the load power as a reference for transitioning the operation of the power conversion apparatus 100 between the first operation, the second operation, and the third operation. Can do.
  • the third operation is maintained as long as it is equal to or greater than the value I1d.
  • the operation of the power conversion device 100 transitions from the third operation to the second operation.
  • the operation of the power conversion apparatus 100 transitions from the second operation to the first operation. Further, the first operation is maintained even when the input current Ia decreases.
  • the operations of the first switch 51 and the second switch 52 may be controlled based on the determination that the load power is changed by the input current Ia.
  • I1u> I1d It is desirable that there is a relationship.
  • I2u> I2d It is desirable that there is a relationship of I2u> I2d.
  • FIG. 22 illustrates the case where there is a relationship of I1d> I2u.
  • the third operation is employed as the operation of the power conversion apparatus 100, when the input current Ia is equal to or greater than the value I2u and less than the value I1d, and when the input current Ia is less than the value I2d. be able to.
  • the threshold value of the input current Ia that is the basis of the operation transition is a pair of values I1u and I1d corresponding to the first threshold value W1 of the load power, and a pair of values I2u and I2d with respect to the second threshold value W2.
  • Each is adopted. This can also be considered as follows: When the input current Ia increases, the threshold value of the input current Ia is a value I1u corresponding to the first threshold value W1, and a value I2u corresponding to the second threshold value W2. When the input current Ia decreases, a value I1d corresponding to the first threshold value W1 and a value I2d corresponding to the second threshold value W2 are respectively adopted.
  • the threshold value of the input current Ia for determining the operation of the power conversion device 100 may be different depending on whether the input current Ia increases or decreases and exhibits hysteresis.
  • FIG. 23 is a graph showing the relationship between the load power and the input current Ia when such hysteresis is introduced. Curves C1, C2, and C3 are all described with reference to FIG. In the above-described embodiment or modification, the curve G9 indicates the third operation if the load power is greater than or equal to the first threshold, and the second action if the load power is greater than or equal to the second threshold smaller than the first threshold and less than the first threshold. The relationship between the load power and the input current Ia when the power conversion device 100 employs the first operation if the operation is less than the second threshold is shown.
  • the values W1u and W2u are a first threshold value and a second threshold value when the load power increases, respectively, and the values W1d and W2d are a first threshold value and a second threshold value when the load power decreases, respectively.
  • FIG. 23 illustrates a case where there is a relationship of W1u> W1d> W2u> W2d.
  • the power conversion apparatus 100 when the load power increases, if the load power is less than the value W2u, the power conversion apparatus 100 performs the first operation, and the curve G9 matches the curve C1.
  • the power converter 100 performs the second operation until the load power increases from less than the value W2u to the value W1u, and the curve G9 matches the curve C2. Therefore, when the load power increases, the curve G9 moves from the curve C1 to the curve C2 via the route Gu2 when the load power takes the value W2u. If the load power increases and becomes less than the value W1u to the value W1u or more, the power conversion apparatus 100 performs the third operation, and the curve G9 matches the curve C3. Therefore, when the load power increases, the curve G9 moves from the curve C2 to the curve C3 via the route Gu1 when the load power takes the value W1u.
  • the power conversion apparatus 100 When the load power decreases, if the load power is greater than or equal to the value W1d, the power conversion apparatus 100 performs the third operation, and the curve G9 matches the curve C3.
  • the power converter 100 performs the second operation until the load power decreases from less than the value W1d to the value W2d, and the curve G9 matches the curve C2. Therefore, when the load power decreases, the curve G9 moves from the curve C3 to the curve C2 via the path Gd1 when the load power takes the value W1d. If the load power decreases and becomes less than the value W2d, power converter 100 performs the first operation, and curve G9 matches curve C1. Therefore, when the load power decreases, the curve G9 moves from the curve C2 to the curve C1 via the path Gd2 when the load power takes the value W2d.
  • the input current Ia can be compared with the threshold value in order to determine the operation of the power converter 100.
  • the input current Ia in the first operation when the load power takes the value W2u is set to the value I2u that is the second threshold when the input current Ia rises, and the second when the load power takes the value W2d.
  • the input current Ia in the operation is changed to a value I2d which is the second threshold when the input current Ia decreases, the input current Ia in the second operation when the load power takes the value W1u, and the second value when the input current Ia increases.
  • the input current Ia in the third operation when the load power takes the value W1d can be adopted as the value I1u as the first threshold value, and the value I1d as the first threshold value when the input current Ia decreases.
  • the first switch 51 and the second switch 52 are defined based on their operations.
  • the conduction / non-conduction operation of the first switch 51, the conduction / non-conduction operation of the second switch 52, or the first state and the second state by the second switch 52 It may be grasped as a method for controlling the switching of.
  • FIG. 24 is a block diagram illustrating a configuration for controlling the operations of the first switch 51 and the second switch 52.
  • the internal configuration of the power conversion apparatus 100 is omitted, and the first switch 51 and the second switch 52 are simplified.
  • the control circuit 200 generates a signal J1 for controlling the operation of the first switch 51 and a signal J2 for controlling the second switch 52.
  • the signal J1 is supplied to the first switch 51, and the signal J2 is supplied to the second switch 52.
  • the signal J1 is applied to the gate of the IGBT shown in FIG.
  • the signal J2 is supplied to the gate of the IGBT shown in FIG. 1 or FIGS. 11 to 14 for the second switch 52, for example.
  • the signal J2 is applied to the gates of the IGBTs 52a and 52i (see FIGS. 7 and 9, respectively).
  • the signal J2 is applied to the gates of the IGBTs 52b and 52c (see FIG. 8) or to the gates of the IGBTs 52j and 52f (see FIG. 10).
  • the signal J2 is given to the gates of the IGBTs constituting the switch elements 52g and 52h (see FIGS. 18 and 20), and these IGBTs are turned on exclusively (see symbols S2g and S2h in FIGS. 19 and 21). A pair of signals.
  • the control circuit 200 inputs at least one of an AC voltage Va, an input current Ia, a DC voltage Vd, and a load current Id that is supplied from the power converter 100 to the load 3 as measured by a known technique.
  • the control circuit 200 receives the DC voltage Vd and the load current Id.
  • the control circuit 200 calculates the load power and compares the load power with the first threshold value W1 (or values W1u and W1d), or further compares the load power with the second threshold value W2 (or values W2u and W2d).
  • Signals J1 and J2 are generated.
  • the control circuit 200 receives the AC voltage Va and the input current Ia.
  • the control circuit 200 calculates the input power and compares the input power with the first threshold value W1 (or values W1u and W1d), or further compares the input power with the second threshold value W2 (or values W2u and W2d).
  • Signals J1 and J2 are generated.
  • control circuit receives the input current Ia, compares the input current Ia with at least one of the values I1u and I1d, or further compares the input current Ia with at least one of the values I2u and I2d, and outputs the signals J1, J2 Is generated.
  • the signals J1 and J2 are generated by a known technique in accordance with the operation of the first switch 51 and the second switch 52 shown by the above-described embodiment and modification.
  • the control circuit 200 includes, for example, a microcomputer and a storage device.
  • the microcomputer executes each processing step (in other words, a procedure) described in the program.
  • the storage device is composed of one or more of various storage devices such as a ROM (Read Only Memory), a RAM (Random Access Memory), a rewritable nonvolatile memory (EPROM (Erasable Programmable ROM), etc.), and a hard disk device, for example. Is possible.
  • the storage device stores various information, data, and the like, stores a program executed by the microcomputer, and provides a work area for executing the program. It can be understood that the microcomputer functions as various means corresponding to each processing step described in the program, or can realize that various functions corresponding to each processing step are realized.
  • the control circuit 200 is not limited to this, and various procedures executed by the control circuit 200 or various means or various functions implemented may be realized by hardware.
  • the timing of changing the operation of the power conversion apparatus 100 according to the on / off state of the first switch 51 and the switching of the first state / second state by the second switch 52 according to the value of the converted power or the input current By changing, it becomes possible to adjust the power factor to a higher value in a wide operating range.

Abstract

The present invention performs booster circuit switching and switches between a full-wave rectifier circuit and a voltage-doubler rectifier circuit in order to improve a power factor. This power conversion device (100) comprises: a single-phase full bridge rectifier circuit (1); a reactor (7) that is connected with a power source (9) in series between the power source (9) and one of the input ports (15, 16) of the single-phase full bridge rectifier circuit (1); capacitors (21, 22) that are connected, over a connection point (23), to one another in series between output ports (17, 18) of the single-phase full bridge rectifier circuit (1); a first switch (51) that is connected between an input port (16) and the connection point (23); and a second switch (52) that is connected between the input ports (15, 16).

Description

電力変換装置Power converter
　この発明は交流電圧を直流電圧へ変換する技術に関し、特に全波整流と倍電圧整流とを併用する技術に関する。 The present invention relates to a technique for converting an AC voltage into a DC voltage, and more particularly to a technique using both full-wave rectification and voltage doubler rectification.
　特許文献１には全波整流回路と倍電圧整流回路とを切り替えて行うコンバータが示されている。 Patent Document 1 discloses a converter that performs switching between a full-wave rectifier circuit and a voltage doubler rectifier circuit.
　特許文献２には昇圧回路と倍電圧整流回路とを切り替えて行う電力変換装置が示されている。 Patent Document 2 discloses a power converter that performs switching between a booster circuit and a voltage doubler rectifier circuit.
　特許文献３には昇圧回路と倍電圧整流回路と全波整流回路とを切り替えて行う電力変換装置が示されている。昇圧回路は倍電圧整流回路と併用されることもできるし、全波整流回路と併用されることもできる。 Patent Document 3 discloses a power converter that performs switching between a booster circuit, a voltage doubler rectifier circuit, and a full-wave rectifier circuit. The booster circuit can be used in combination with a voltage doubler rectifier circuit or in combination with a full-wave rectifier circuit.
　なお、本件に関連するものとして、特許文献４～６を挙げる。 In addition, Patent Documents 4 to 6 are listed as related to this case.
特開平１０－１７４４４２号公報Japanese Patent Laid-Open No. 10-174442 特開平１１－１６４５６２号公報Japanese Patent Laid-Open No. 11-164562 特開２００１－９５２６２号公報JP 2001-95262 A 特開平９－２６６６７４号公報JP-A-9-266664 特開２０１４－１１３０３７号公報JP 2014-113037 A 特開２０００－１８８８６７号公報JP 2000-188867 A
　しかしながら特許文献３に記載された技術では、平滑コンデンサの電圧について着目して昇圧回路、全波整流回路、倍電圧整流回路の動作を規定しており、力率を改善するという視点を持たない。よって力率を改善するための昇圧回路の適切なスイッチング、及び全波整流回路、倍電圧整流回路の切り替えについての示唆も無かった。 However, in the technique described in Patent Document 3, the operations of the booster circuit, the full-wave rectifier circuit, and the voltage doubler rectifier circuit are defined by paying attention to the voltage of the smoothing capacitor, and has no viewpoint of improving the power factor. Therefore, there was no suggestion about appropriate switching of the booster circuit for improving the power factor and switching of the full-wave rectifier circuit and the voltage doubler rectifier circuit.
　この発明はかかる視点に基づき、力率を改善するための昇圧回路のスイッチング、及び全波整流回路、倍電圧整流回路の切り替えを行う技術を提供することを目的とする。 Based on this viewpoint, an object of the present invention is to provide a technique for switching a booster circuit for improving the power factor and switching a full-wave rectifier circuit and a voltage doubler rectifier circuit.
　この発明にかかる電力変換装置は、電源（９）から出力される単相の交流電圧（Ｖａ）を直流電圧（Ｖｄ）へ変換して前記直流電圧を負荷（３）に供給する電力変換装置（１００）である。 The power converter according to the present invention converts a single-phase AC voltage (Va) output from a power source (9) into a DC voltage (Vd) and supplies the DC voltage to a load (3) ( 100).
　そしてその第１の態様は、対を成す第１入力端（１５）及び第２入力端（１６）と、前記第１入力端及び前記第２入力端に関して前記電源と反対側で対を成して前記負荷に接続される第１出力端（１７；１８）及び第２出力端（１８；１７）とを有する単相フルブリッジ整流回路（１）と、前記第１出力端と前記第２出力端との間で接続点（２３）を介して互いに直列に接続され、両者で前記直流電圧を支える第１コンデンサ（２１；２２）及び第２コンデンサ（２２；２１）と、前記第１コンデンサと前記第２コンデンサとの直列接続の両端の間で、前記単相フルブリッジ整流回路を介して前記電源と直列に接続されるリアクトル（７；７ａ，７ｂ）と、前記第２入力端（１６）と前記接続点（２３）との間に接続され、前記電力変換装置の変換電力もしくは前記電源から供給される入力電流（Ｉａ）が第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）以上のときに、前記交流電圧がその中央値をとる隣接した一対の時点の間である半周期期間に一回、導通状態から非導通状態へ遷移する第１スイッチ（５１）と、前記リアクトルに流れる電流の経路に前記第１コンデンサ及び前記第２コンデンサのいずれをも含まない第１状態から、前記経路に前記第１コンデンサ及び前記第２コンデンサの少なくとも一方を含む第２状態への切換を、前記変換電力もしくは前記入力電流が前記第１閾値以上のときに、前記半周期期間に少なくとも一回は行う第２スイッチ（５２）とを備える。 And the 1st aspect forms a pair with the 1st input terminal (15) and 2nd input terminal (16) which make a pair, and the said 1st input terminal and the said 2nd input terminal on the opposite side to the said power supply. A single-phase full-bridge rectifier circuit (1) having a first output end (17; 18) and a second output end (18; 17) connected to the load, and the first output end and the second output. A first capacitor (21; 22) and a second capacitor (22; 21) which are connected in series with each other via a connection point (23) and support the DC voltage at both ends, and the first capacitor, A reactor (7; 7a, 7b) connected in series with the power supply via the single-phase full-bridge rectifier circuit between both ends of the series connection with the second capacitor, and the second input end (16) And the connection point (23), the power conversion device When the converted power or the input current (Ia) supplied from the power source is equal to or greater than the first threshold (W1; W1u; W1d; I1u; I1d), The first switch (51) that transitions from the conductive state to the non-conductive state once in a half-cycle period that is between and the path of the current flowing through the reactor does not include either the first capacitor or the second capacitor Switching from the first state to the second state including at least one of the first capacitor and the second capacitor in the path is performed when the converted power or the input current is greater than or equal to the first threshold value. And a second switch (52) that is performed at least once in a period.
　この発明にかかる電力変換装置の第２の態様は、その第１の態様であって、前記リアクトル（７）は前記第１入力端（１５）と前記第２入力端（１６）との少なくとも一方と前記電源（９）との間に接続され、前記第２スイッチ（５２）は前記第１入力端と前記第２入力端との間に接続され、前記第２スイッチは前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）以上のときに、前記半周期期間に少なくとも一回は導通状態から非導通状態へ遷移する。 The 2nd mode of the power converter concerning this invention is the 1st mode, and the reactor (7) is at least one of the 1st input end (15) and the 2nd input end (16). And the power source (9), the second switch (52) is connected between the first input terminal and the second input terminal, and the second switch is the conversion power or the input When the current (Ia) is equal to or greater than the first threshold (W1; W1u; W1d; I1u; I1d), the current state transitions from the conductive state to the non-conductive state at least once in the half cycle period.
　この発明にかかる電力変換装置の第３の態様は、その第１の態様であって、前記リアクトル（７）は前記第１入力端（１５）と前記第２入力端（１６）との少なくとも一方と前記電源（９）との間に接続され、前記第２スイッチ（５２）は前記第１入力端及び前記第２入力端と、前記第１出力端（１７；１８）との間に接続され、前記第２スイッチは前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）以上のときに、前記半周期期間に少なくとも一回は導通状態から非導通状態へ遷移する。 The 3rd aspect of the power converter device concerning this invention is the 1st aspect, Comprising: The said reactor (7) is at least one of the said 1st input terminal (15) and the said 2nd input terminal (16). And the power source (9), and the second switch (52) is connected between the first input terminal and the second input terminal and the first output terminal (17; 18). When the converted power or the input current (Ia) is greater than or equal to the first threshold value (W1; W1u; W1d; I1u; I1d), the second switch is turned off from the conductive state at least once in the half cycle period. Transition to the conductive state.
　この発明にかかる電力変換装置の第４の態様は、その第１の態様であって、前記第１出力端（１７；１８）と前記接続点（２３）との間で前記第１コンデンサ（２１；２２）と直列に接続され、その順方向が前記第１コンデンサを充電する電流が流れる方向と一致し、前記第１出力端と前記第１コンデンサとに挟まれるダイオード（５２ｄ；５２ｅ）を更に備える。前記リアクトル（７）は前記第１入力端（１５）と前記第２入力端（１６）との少なくとも一方と前記電源（９）との間に接続される。前記第２スイッチ（５２）は前記第１出力端（１７；１８）と前記第２出力端（１８；１７）との間に接続される。前記第２スイッチは前記半周期期間に少なくとも一回は導通状態から非導通状態へ遷移する。 The 4th aspect of the power converter device concerning this invention is the 1st aspect, Comprising: Between the said 1st output terminal (17; 18) and the said connection point (23), the said 1st capacitor | condenser (21) 22), and a diode (52d; 52e) sandwiched between the first output terminal and the first capacitor is further connected in series with the direction in which the current for charging the first capacitor flows. Prepare. The reactor (7) is connected between at least one of the first input end (15) and the second input end (16) and the power source (9). The second switch (52) is connected between the first output terminal (17; 18) and the second output terminal (18; 17). The second switch transitions from a conductive state to a non-conductive state at least once in the half cycle period.
　この発明にかかる電力変換装置の第５の態様は、その第１の態様であって、前記リアクトル（７ａ，７ｂ）は一対設けられ、前記リアクトルの一方（７ａ；７ｂ）及び他方（７ｂ；７ａ）は、それぞれ前記第１出力端（１７；１８）及び前記第２出力端（１８；１７）に接続される。そして、前記第１出力端と前記接続点（２３）との間で、前記第１コンデンサ（２１；２２）と前記リアクトルの前記一方とに挟まれて前記第１コンデンサと前記リアクトルの前記一方とに直列に接続され、その順方向が前記第１コンデンサを充電する電流が流れる方向と一致するダイオード（５２ｄ；５２ｅ）を更に備える。前記リアクトルの前記一方は前記第１出力端と前記ダイオードとに挟まれる。前記第２スイッチ（５２）は前記第１出力端と前記第２出力端との間で、前記リアクトルの前記一方と前記リアクトルの前記他方とに挟まれて、前記リアクトルの前記一方と前記リアクトルの前記他方とに直列に接続される。前記第２スイッチは前記半周期期間に少なくとも一回は導通状態から非導通状態へ遷移する。 The 5th aspect of the power converter device concerning this invention is the 1st aspect, Comprising: A pair of said reactor (7a, 7b) is provided, and one (7a; 7b) and the other (7b; 7a) of the said reactor are provided. ) Are connected to the first output end (17; 18) and the second output end (18; 17), respectively. And between the first output end and the connection point (23), the first capacitor and the one of the reactors are sandwiched between the first capacitor (21; 22) and the one of the reactors. And a diode (52d; 52e) whose forward direction matches the direction in which the current for charging the first capacitor flows. The one of the reactors is sandwiched between the first output end and the diode. The second switch (52) is sandwiched between the one of the reactors and the other of the reactors between the first output end and the second output end, so that the one of the reactors and the reactor The other is connected in series. The second switch transitions from a conductive state to a non-conductive state at least once in the half cycle period.
　この発明にかかる電力変換装置の第６の態様は、その第３、第４の態様のいずれかであって、前記第２出力端（１８；１７）と前記接続点（２３）との間で前記第２コンデンサ（２２；２１）と直列に接続され、その順方向が前記第２コンデンサを充電する電流が流れる方向と一致し、前記第２出力端と前記第２コンデンサとに挟まれるダイオード（５２ｅ；５２ｄ）を更に備える。 A sixth aspect of the power conversion device according to the present invention is any one of the third and fourth aspects, and is between the second output terminal (18; 17) and the connection point (23). A diode (22) connected in series with the second capacitor (22; 21), whose forward direction coincides with the direction in which a current for charging the second capacitor flows, and is sandwiched between the second output terminal and the second capacitor ( 52e; 52d).
　この発明にかかる電力変換装置の第７の態様は、その第５の態様であって、前記第２出力端（１８；１７）と前記接続点（２３）との間で、前記第２コンデンサ（２２；２１）と前記リアクトルの前記他方（７ｂ；７ａ）とに挟まれて前記第２コンデンサと前記リアクトルの前記他方とに直列に接続され、前記リアクトルの前記他方を前記第２出力端と共に挟み、その順方向が前記第２コンデンサを充電する電流が流れる方向と一致するダイオード（５２ｅ；５２ｄ）を更に備える。 The 7th aspect of the power converter device concerning this invention is the 5th aspect, Comprising: Between the said 2nd output terminal (18; 17) and the said connection point (23), the said 2nd capacitor | condenser ( 22; 21) and the other of the reactors (7b; 7a) and connected in series with the second capacitor and the other of the reactors, and the other of the reactors is sandwiched with the second output end. And a diode (52e; 52d) whose forward direction coincides with the direction in which the current for charging the second capacitor flows.
　この発明にかかる電力変換装置の第８の態様は、その第１の態様であって、第２スイッチ（５２）は、前記第１出力端（１７）と前記第１入力端（１５）との間に接続される第１スイッチ要素（５２ｇ）と、前記第２出力端（１８）と前記第１入力端との間に接続される第２スイッチ要素（５２ｈ）とを有する。前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）以上のときに前記第１スイッチ要素は、前記第２入力端（１６）の電位が前記第１入力端の電位よりも高い前記半周期期間に少なくとも一回は導通状態から非導通状態へ遷移し、前記第２入力端の電位が前記第１入力端の電位よりも低い前記半周期期間において非導通状態である。前記変換電力もしくは前記入力電流が前記第１閾値以上のときに前記第２スイッチ要素は、前記第２入力端の電位が前記第１入力端の電位よりも低い前記半周期期間に少なくとも一回は導通状態から非導通状態へ遷移し、前記第２入力端の電位が前記第１入力端の電位よりも高い前記半周期期間において非導通状態である。 An eighth aspect of the power conversion device according to the present invention is the first aspect, in which the second switch (52) is connected between the first output terminal (17) and the first input terminal (15). A first switch element (52g) connected in between, and a second switch element (52h) connected between the second output terminal (18) and the first input terminal. When the converted power or the input current (Ia) is greater than or equal to the first threshold (W1; W1u; W1d; I1u; I1d), the first switch element has a potential at the second input terminal (16) that is higher than the first threshold. In the half-cycle period in which the potential of the second input terminal is lower than the potential of the first input terminal, at least once in the half-cycle period higher than the potential of the first input terminal. Non-conducting state. When the converted power or the input current is equal to or higher than the first threshold, the second switch element is at least once in the half cycle period in which the potential of the second input terminal is lower than the potential of the first input terminal. A transition is made from a conducting state to a non-conducting state, and the second input terminal is in a non-conducting state during the half cycle period in which the potential of the second input terminal is higher than the potential of the first input terminal.
　この発明にかかる電力変換装置の第９の態様は、その第８の態様であって、第１ダイオード（５２ｄ；５２ｅ）と第２ダイオード（５２ｅ；５２ｄ）とを更に備える。前記第１ダイオードは、前記第１出力端（１７；１８）と前記接続点（２３）との間で前記第１コンデンサ（２１；２２）と直列に接続され、その順方向が前記第１コンデンサを充電する電流が流れる方向と一致し、前記第１出力端と前記第１コンデンサとに挟まれる。前記第２ダイオードは、前記第２出力端（１８；１７）と前記接続点（２３）との間で前記第２コンデンサ（２２；２１）と直列に接続され、その順方向が前記第２コンデンサを充電する電流が流れる方向と一致し、前記第２出力端と前記第２コンデンサとに挟まれる。 A ninth aspect of the power converter according to the present invention is the eighth aspect, and further includes a first diode (52d; 52e) and a second diode (52e; 52d). The first diode is connected in series with the first capacitor (21; 22) between the first output end (17; 18) and the connection point (23), and the forward direction thereof is the first capacitor. Coincides with the direction in which the current for charging the battery flows, and is sandwiched between the first output terminal and the first capacitor. The second diode is connected in series with the second capacitor (22; 21) between the second output end (18; 17) and the connection point (23), and the forward direction thereof is the second capacitor. Coincides with the direction in which the current for charging the battery flows, and is sandwiched between the second output terminal and the second capacitor.
　この発明にかかる電力変換装置の第１０の態様は、その第１～第９の態様のいずれかであって、前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）よりも小さな第２閾値（Ｗ２；Ｗ２ｕ；Ｗ２ｄ；Ｉ２ｕ；Ｉ２ｄ）以上であって前記第１閾値未満であるときには、前記第１スイッチ（５１）は前記半周期期間に一回、導通状態から非導通状態へ遷移し、前記第２スイッチ（５２）が前記切換を行わずに前記第２状態が実現される。 A tenth aspect of the power converter according to the present invention is any one of the first to ninth aspects, wherein the converted power or the input current (Ia) is equal to the first threshold value (W1; W1u; W1d). I1u; I1d) is greater than or equal to a second threshold (W2; W2u; W2d; I2u; I2d) and less than the first threshold, the first switch (51) is once in the half cycle period; Then, the second state is realized without the second switch (52) changing the state from the conductive state to the non-conductive state.
　この発明にかかる電力変換装置の第１１の態様は、その第１０の態様であって、前記変換電力もしくは前記入力電流（Ｉａ）が前記第２閾値（Ｗ２；Ｗ２ｕ；Ｗ２ｄ；Ｉ２ｕ；Ｉ２ｄ）未満であるときには、前記第１スイッチ（５１）は非導通状態にあり、前記第２スイッチ（５２）が前記切換を行わずに前記第２状態が実現される。 An eleventh aspect of the power converter according to the present invention is the tenth aspect, wherein the converted power or the input current (Ia) is less than the second threshold (W2; W2u; W2d; I2u; I2d). When the first switch (51) is in a non-conducting state, the second switch (52) is not switched and the second state is realized.
　この発明にかかる電力変換装置の第１２の態様は、その第１～９の態様のいずれかであって、前記変換電力が前記第１閾値未満であるときには、前記第１スイッチ（５１）は非導通状態にあり、前記第２スイッチ（５２）が前記切換を行わずに前記第２状態が実現される。 A twelfth aspect of the power conversion device according to the present invention is any one of the first to ninth aspects, wherein when the converted power is less than the first threshold, the first switch (51) is not turned on. The second state is realized without being switched by the second switch (52) in the conducting state.
　この発明にかかる電力変換装置の第１３の態様は、その第２、第６、第７、第９の態様のいずれかであって、前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）以上であるときには、前記第２スイッチ（５２）の前記切換は、前記第１スイッチ（５１）が導通状態であるときに行われる。 A thirteenth aspect of the power conversion device according to the present invention is any one of the second, sixth, seventh, and ninth aspects, wherein the converted power or the input current (Ia) is the first threshold value. When (W1; W1u; W1d; I1u; I1d) or more, the switching of the second switch (52) is performed when the first switch (51) is in a conductive state.
　この発明にかかる電力変換装置の第１４の態様は、その第１～１３の態様のいずれかであって、前記第２スイッチ（５２）が前記切換を行う時点は、前記半周期期間の始点から前記半周期の１／６が経過した時点と、前記始点から前記半周期の５／６が経過した時点との間にある。 A fourteenth aspect of the power converter according to the present invention is any one of the first to thirteenth aspects, wherein the time point at which the second switch (52) performs the switching is from the start point of the half cycle period. Between the time when 1/6 of the half cycle has elapsed and the time when 5/6 of the half cycle has elapsed from the starting point.
　この発明にかかる電力変換装置の第１５の態様は、その第２，第６、第７、第９の態様のいずれかであって、前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）以上であるときには、前記第１スイッチ（５１）の非導通状態から導通状態への遷移は、前記第１状態が実現されているときに行われる。 A fifteenth aspect of the power converter according to the present invention is any one of the second, sixth, seventh, and ninth aspects, wherein the converted power or the input current (Ia) is the first threshold value. When (W1; W1u; W1d; I1u; I1d) or more, the transition of the first switch (51) from the non-conducting state to the conducting state is performed when the first state is realized.
　この発明にかかる電力変換装置の第１６の態様は、その第３～５、第８の態様のいずれかであって、前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）以上であるときには、前記第２スイッチ（５２）の前記切換は、前記第１スイッチ（５１）が非導通状態であるときに行われ、前記第１スイッチ（５１）の非導通状態から導通状態への遷移は、前記第２状態が実現されているときに行われる。 A sixteenth aspect of the power converter according to the present invention is any one of the third to fifth and eighth aspects, wherein the converted power or the input current (Ia) is the first threshold value (W1; W1u). W1d; I1u; I1d) or more, the switching of the second switch (52) is performed when the first switch (51) is in a non-conductive state, and the first switch (51) The transition from the non-conductive state to the conductive state is performed when the second state is realized.
　前記変換電力は、前記負荷（３）に供給される電力であってもよいし、前記電力変換装置（１００）に入力する電力であってもよい。前記電力変換装置（１００）に入力する電流（Ｉａ）の大きさに基づいて、前記第１スイッチ（５１）及び前記第２スイッチ（５２）の動作が制御されてもよい。例えば入力電流が上昇するときの前記第１閾値（Ｉ１ｕ）が、前記入力電流（Ｉａ）が低下するときの前記第１閾値（Ｉ１ｄ）よりも大きい。 The converted power may be power supplied to the load (3), or may be power input to the power converter (100). The operations of the first switch (51) and the second switch (52) may be controlled based on the magnitude of the current (Ia) input to the power conversion device (100). For example, the first threshold value (I1u) when the input current increases is larger than the first threshold value (I1d) when the input current (Ia) decreases.
　この発明にかかる電力変換装置によれば、第２スイッチにより電源に流れる電流の導通角を広げて力率が改善されると共に、第２スイッチの切換によって、リアクトルに蓄えられたエネルギーが供給されることにより、第１コンデンサと第２コンデンサとの直列接続に与える電圧を高める。これにより、第１スイッチの導通によって単相フルブリッジ整流回路の一対の出力端に与える電圧が高められている場合でも、単相フルブリッジ整流回路に流れる電流の導通角を広げ、力率が改善される。 According to the power conversion device of the present invention, the power factor is improved by expanding the conduction angle of the current flowing through the power source by the second switch, and the energy stored in the reactor is supplied by switching the second switch. As a result, the voltage applied to the series connection of the first capacitor and the second capacitor is increased. As a result, even when the voltage applied to the pair of output terminals of the single-phase full-bridge rectifier circuit is increased by the conduction of the first switch, the conduction angle of the current flowing through the single-phase full-bridge rectifier circuit is widened and the power factor is improved. Is done.
　この発明にかかる電力変換装置の第６、第７，第９の態様によれば、第１状態が実現され、かつ第１スイッチが導通しても、第１コンデンサあるいは第２コンデンサの放電が阻止される。 According to the sixth, seventh, and ninth aspects of the power conversion device according to the present invention, even if the first state is realized and the first switch is turned on, the discharge of the first capacitor or the second capacitor is prevented. Is done.
　この発明にかかる電力変換装置の第１０の態様によれば、変換電力が低いとき力率は低くても構わないが、一対のコンデンサが負荷に与える電圧は高める必要があるので、第２スイッチが切換をしないで第２状態が実現されることで損失を低減する。 According to the tenth aspect of the power conversion device of the present invention, when the conversion power is low, the power factor may be low, but the voltage applied to the load by the pair of capacitors needs to be increased. Loss is reduced by realizing the second state without switching.
　この発明にかかる電力変換装置の第１１の態様によれば、変換電力が更に低いとき力率は低くても構わず、一対のコンデンサが負荷に与える電圧を高める必要もないので、第１スイッチが非導通状態となり、かつ第２スイッチが切換をしないで第２状態が実現されることで損失を低減する。 According to the eleventh aspect of the power conversion device of the present invention, when the converted power is even lower, the power factor may be low, and it is not necessary to increase the voltage applied to the load by the pair of capacitors. Loss is reduced by entering the non-conducting state and realizing the second state without switching the second switch.
　この発明にかかる電力変換装置の第１２の態様によれば、変換電力が低いとき力率は低くても構わず、一対のコンデンサが負荷に与える電圧を高める必要もないので、第１スイッチが非導通状態となり、かつ第２スイッチが切換をしないで第２状態が実現されることで損失を低減する。 According to the twelfth aspect of the power conversion device of the present invention, when the converted power is low, the power factor may be low, and it is not necessary to increase the voltage applied to the load by the pair of capacitors. Loss is reduced by being in a conductive state and realizing the second state without the second switch being switched.
　この発明にかかる電力変換装置の第１３の態様によれば、第２スイッチによって第１状態から第２状態への切換が行われる時点では倍電電圧回路としての機能が発揮されており、入力する電流が低下しにくい。 According to the thirteenth aspect of the power converter of the present invention, the function as the voltage doubler circuit is exhibited at the time when the second switch is switched from the first state to the second state, and the input is performed. Current is unlikely to drop.
　この発明にかかる電力変換装置の第１４の態様によれば、入力する電流の低下を回避する。 According to the fourteenth aspect of the power conversion device of the present invention, a reduction in input current is avoided.
　この発明にかかる電力変換装置の第１５の態様によれば、単相フルブリッジ整流回路を構成する整流素子における逆回復現象を回避し、以て効率の悪化を回避する。 According to the fifteenth aspect of the power conversion device of the present invention, the reverse recovery phenomenon in the rectifying element constituting the single-phase full-bridge rectifier circuit is avoided, and the deterioration of efficiency is avoided.
　この発明にかかる電力変換装置の第１６の態様によれば、第１コンデンサあるいは第２コンデンサの放電が阻止される。 According to the sixteenth aspect of the power conversion device of the present invention, discharge of the first capacitor or the second capacitor is prevented.
　この発明の目的、特徴、局面、および利点は、以下の詳細な説明と添付図面とによって、より明白となる。 The objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description and the accompanying drawings.
実施の形態のいずれにおいても採用される、電力変換装置の構成を例示する回路図である。It is a circuit diagram which illustrates the composition of the power converter which is adopted in any of the embodiments. 第１の実施の形態における電力変換装置の動作を例示するグラフである。It is a graph which illustrates operation | movement of the power converter device in 1st Embodiment. 第２動作における電流の振る舞いを示すグラフである。It is a graph which shows the behavior of the current in the 2nd operation. 第２動作における電流の振る舞いを模式的に示すグラフである。It is a graph which shows typically behavior of current in the 2nd operation. 第２動作における電流の振る舞いを模式的に示すグラフである。It is a graph which shows typically behavior of current in the 2nd operation. ブリッジレス型の力率改善回路と、図１の電力変換装置との比較を示すグラフである。It is a graph which shows the comparison with a power factor improvement circuit of a bridgeless type, and the power converter device of FIG. 第１の変形にかかる構成を示す回路図である。It is a circuit diagram which shows the structure concerning a 1st modification. 第２の変形にかかる構成を示す回路図である。It is a circuit diagram which shows the structure concerning a 2nd modification. 第３の変形にかかる構成を示す回路図である。It is a circuit diagram which shows the structure concerning a 3rd deformation | transformation. 第４の変形にかかる構成を示す回路図である。It is a circuit diagram which shows the structure concerning a 4th deformation | transformation. 第５の変形にかかる構成を示す回路図である。It is a circuit diagram which shows the structure concerning a 5th modification. 第６の変形にかかる構成を示す回路図である。It is a circuit diagram which shows the structure concerning a 6th modification. 第７の変形にかかる構成を示す回路図である。It is a circuit diagram which shows the structure concerning a 7th modification. 第８の変形にかかる構成を示す回路図である。It is a circuit diagram which shows the structure concerning a 8th modification. 第１～第８の変形にかかる構成における電力変換装置の動作を例示するグラフである。10 is a graph illustrating the operation of the power conversion device in the configuration according to the first to eighth modifications. 第９の変形にかかる構成を示す回路図である。It is a circuit diagram which shows the structure concerning a 9th deformation | transformation. 第１０の変形にかかる構成を示す回路図である。It is a circuit diagram which shows the structure concerning a 10th modification. 第１１の変形にかかる構成を示す回路図である。It is a circuit diagram which shows the structure concerning a 11th modification. 第１１の変形にかかる構成における電力変換装置の動作を例示するグラフである。It is a graph which illustrates operation | movement of the power converter device in the structure concerning a 11th deformation | transformation. 第１２の変形にかかる構成を示す回路図である。It is a circuit diagram which shows the structure concerning a 12th modification. 第１２の変形にかかる構成における電力変換装置の動作を例示するグラフである。It is a graph which illustrates operation | movement of the power converter device in the structure concerning a 12th deformation | transformation. 負荷電力と入力電流との関係を示すグラフである。It is a graph which shows the relationship between load electric power and input current. 負荷電力と入力電流との関係を示すグラフである。It is a graph which shows the relationship between load electric power and input current. 第１スイッチ及び第２スイッチの動作を制御する構成を例示するブロック図である。It is a block diagram which illustrates the composition which controls operation of the 1st switch and the 2nd switch.
　基本的構成．
　図１は下記の実施の形態のいずれにおいても採用される、電力変換装置１００の構成を例示する回路図である。電力変換装置１００は、単相の交流電圧Ｖａを直流電圧Ｖｄへ変換してこれを負荷３に供給する。交流電圧Ｖａは電源９から出力される。 Basic configuration.
FIG. 1 is a circuit diagram illustrating the configuration of a power conversion apparatus 100 that is employed in any of the following embodiments. The power conversion device 100 converts the single-phase AC voltage Va into a DC voltage Vd and supplies it to the load 3. The AC voltage Va is output from the power source 9.
　電力変換装置１００の変換電力は、電源９から電力変換装置１００に供給される交流の入力電流Ｉａと交流電圧Ｖａと力率とで決定される入力電力として把握することもできるし、負荷３に供給される負荷電力（これは直流電圧Ｖｄと負荷３のインピーダンス、あるいは直流電圧Ｖｄと負荷の大きさにより変化する電流とで決定される）として把握することもできる。もちろん、電力変換装置１００での電力損失を無視することにより入力電力と負荷電力とは等しい。電力変換装置１００での電力損失は、入力電力及び負荷電力のいずれに対しても通常は数％程度であり、特に事情が無い限り無視して考えることは妥当である。以下では変換電力として負荷電力を例に取って説明する。 The converted power of the power converter 100 can be grasped as input power determined by the AC input current Ia, the AC voltage Va, and the power factor supplied from the power source 9 to the power converter 100, It can also be grasped as supplied load power (this is determined by the DC voltage Vd and the impedance of the load 3, or the DC voltage Vd and a current that varies depending on the magnitude of the load). Of course, the input power and the load power are equal by ignoring the power loss in the power conversion apparatus 100. The power loss in the power conversion apparatus 100 is normally about several percent for both input power and load power, and it is reasonable to ignore it unless there is a particular circumstance. In the following description, load power is taken as an example of converted power.
　電力変換装置１００は、単相フルブリッジ整流回路１と、リアクトル７と、コンデンサ２１，２２と、第１スイッチ５１及び第２スイッチ５２とを備える。 The power conversion device 100 includes a single-phase full-bridge rectifier circuit 1, a reactor 7, capacitors 21 and 22, a first switch 51, and a second switch 52.
　単相フルブリッジ整流回路１は対を成す入力端１５，１６と、負荷３に接続される出力端１７，１８とを有する。出力端１７，１８は、入力端１５，１６に関して電源９と反対側で対を成す。具体的には単相フルブリッジ整流回路１はダイオード１１，１２，１３，１４を有する。ダイオード１１のアノードはダイオード１３のカソードと共に入力端１５に接続され、ダイオード１２のアノードはダイオード１４のカソードと共に入力端１６に接続され、ダイオード１１のカソードはダイオード１２のカソードと共に出力端１７に接続され、ダイオード１３のアノードはダイオード１４のアノードと共に出力端１８に接続される。 The single-phase full-bridge rectifier circuit 1 has a pair of input terminals 15 and 16 and an output terminal 17 and 18 connected to the load 3. The output terminals 17 and 18 are paired on the opposite side of the power supply 9 with respect to the input terminals 15 and 16. Specifically, the single-phase full-bridge rectifier circuit 1 includes diodes 11, 12, 13, and 14. The anode of the diode 11 is connected to the input terminal 15 together with the cathode of the diode 13, the anode of the diode 12 is connected to the input terminal 16 together with the cathode of the diode 14, and the cathode of the diode 11 is connected to the output terminal 17 together with the cathode of the diode 12. The anode of the diode 13 is connected to the output terminal 18 together with the anode of the diode 14.
　リアクトル７は、入力端１５，１６の少なくとも一方と電源９との間に接続される。図１において、リアクトル７は電源９と入力端１５との間に配置されているが、電源９と入力端１６との間に配置されてもよい。あるいは電源９と入力端１５との間、及び、電源９と入力端１６との間にそれぞれ一つずつのリアクトルが配置されてもよい。これら一対のリアクトルは一つのリアクトル７と電気的に等価だからである。 The reactor 7 is connected between at least one of the input terminals 15 and 16 and the power source 9. In FIG. 1, the reactor 7 is disposed between the power source 9 and the input end 15, but may be disposed between the power source 9 and the input end 16. Alternatively, one reactor may be arranged between the power source 9 and the input end 15 and between the power source 9 and the input end 16. This is because the pair of reactors is electrically equivalent to one reactor 7.
　一対のコンデンサ２１，２２は出力端１７，１８の間で接続点２３を介して互いに直列に接続される。コンデンサ２１，２２の直列接続は直流電圧Ｖｄを支える。 The pair of capacitors 21 and 22 are connected in series between the output ends 17 and 18 via the connection point 23. The series connection of the capacitors 21 and 22 supports the DC voltage Vd.
　第１スイッチ５１は、入力端１６と、接続点２３との間に接続される。本実施の形態において第２スイッチ５２は、入力端１５，１６の間に接続される。第１スイッチ５１の構成及び第２スイッチ５２の構成それ自体は公知の技術であるので詳細な説明は省略するが、第１スイッチ５１及び第２スイッチ５２は、本実施の形態においていずれも双方向半導体スイッチで実現することができる。例えば、図１では、第１スイッチ５１及び第２スイッチ５２のいずれもが、ＩＧＢＴ（絶縁ゲート形バイポーラトランジスタ）とダイオードブリッジとの並列接続で構成される場合が例示される。 The first switch 51 is connected between the input terminal 16 and the connection point 23. In the present embodiment, the second switch 52 is connected between the input terminals 15 and 16. Since the configuration of the first switch 51 and the configuration of the second switch 52 are known techniques, detailed description thereof will be omitted, but the first switch 51 and the second switch 52 are both bidirectional in the present embodiment. It can be realized with a semiconductor switch. For example, FIG. 1 illustrates a case where both the first switch 51 and the second switch 52 are configured by parallel connection of an IGBT (insulated gate bipolar transistor) and a diode bridge.
　特許文献１，２，３から公知な通り、第１スイッチ５１が導通状態にあることにより単相フルブリッジ整流回路１とコンデンサ２１，２２とは倍電圧整流回路を構成し、第１スイッチ５１が非導通状態にあることにより単相フルブリッジ整流回路１とコンデンサ２１，２２とは全波整流回路を構成する。 As known from Patent Documents 1, 2, and 3, when the first switch 51 is in a conductive state, the single-phase full-bridge rectifier circuit 1 and the capacitors 21 and 22 constitute a voltage doubler rectifier circuit. Due to the non-conduction state, the single-phase full-bridge rectifier circuit 1 and the capacitors 21 and 22 constitute a full-wave rectifier circuit.
　また第２スイッチ５２が導通状態にあることにより、リアクトル７に流れる電流（本実施の形態では入力電流Ｉａ）の経路にコンデンサ２１，２２を含まない第１状態が実現される。このときリアクトル７には第２スイッチ５２を介して流れる電流によるエネルギーが蓄積される。第２スイッチ５２が非導通状態にあることにより、リアクトル７に流れる電流の経路にコンデンサ２１，２２の少なくとも一方を含む第２状態が実現される。第１状態において蓄積されたエネルギーは、第２スイッチ５２が導通状態から非導通状態へ遷移して実現される第２状態において、単相フルブリッジ整流回路１を経由してコンデンサ２１，２２の少なくとも一方に供給される。これによりコンデンサ２１，２２の少なくとも一方の両端電圧が上昇する。このようにリアクトル７と第２スイッチ５２とは、第２スイッチ５２が第１状態から第２状態への切換を行うことにより、昇圧動作を行う。つまり第２スイッチ５２は、リアクトル７、ダイオード１１，１２、コンデンサ２１，２２と共に昇圧回路を構成するとみることができる。 Further, since the second switch 52 is in a conductive state, a first state in which the capacitors 21 and 22 are not included in the path of the current flowing through the reactor 7 (the input current Ia in the present embodiment) is realized. At this time, the reactor 7 accumulates energy due to the current flowing through the second switch 52. When the second switch 52 is in the non-conductive state, a second state is realized in which at least one of the capacitors 21 and 22 is included in the path of the current flowing through the reactor 7. The energy accumulated in the first state is at least stored in the capacitors 21 and 22 via the single-phase full-bridge rectifier circuit 1 in the second state realized by the second switch 52 transitioning from the conductive state to the non-conductive state. Supplied on one side. As a result, the voltage across at least one of the capacitors 21 and 22 increases. As described above, the reactor 7 and the second switch 52 perform the boosting operation when the second switch 52 switches from the first state to the second state. That is, it can be considered that the second switch 52 constitutes a booster circuit together with the reactor 7, the diodes 11 and 12, and the capacitors 21 and 22.
　負荷３は、例えば直流／交流変換を行うインバータと当該インバータから交流電力が供給される交流モータとの組み合わせである。 The load 3 is, for example, a combination of an inverter that performs DC / AC conversion and an AC motor that is supplied with AC power from the inverter.
　第１の実施の形態．
　図２は本実施の形態における電力変換装置１００の動作を例示するグラフである。波形Ｇ０は交流電圧Ｖａの波形であってその値を示す縦軸の極性を通常とは逆にして示される。極性を逆にして示したのは単に、他の波形Ｇ１，Ｇ２，Ｇ３と交錯して見にくくなることを防ぐためである。 First embodiment.
FIG. 2 is a graph illustrating the operation of the power conversion apparatus 100 according to this embodiment. A waveform G0 is a waveform of the AC voltage Va and is shown with the polarity of the vertical axis indicating the value reversed from the normal one. The reason why the polarity is reversed is simply to prevent the waveform from interfering with the other waveforms G1, G2, G3 and becoming difficult to see.
　波形Ｇ１は、第１スイッチ５１及び第２スイッチ５２のいずれもが非導通状態にある場合（第１動作）の入力電流Ｉａ（ここではリアクトル７に流れる電流となる）の波形である。この場合、第２スイッチ５２とリアクトル７とによる昇圧動作なしに全波整流が行われる。波形Ｇ２は、第１スイッチ５１が導通状態と非導通状態とを繰り返しており、第２スイッチ５２が非導通状態にある場合（第２動作）の入力電流Ｉａの波形である。この場合、第２スイッチ５２とリアクトル７とによる昇圧動作なしの倍電圧整流と全波整流とが、交互に行われる。第１動作、第２動作では、第１状態ではなく第２状態が実現される。波形Ｇ３は、第１スイッチ５１が導通状態と非導通状態とを繰り返し、第２スイッチ５２が導通状態と非導通状態とを繰り返す場合（第３動作）の入力電流Ｉａの波形である。この場合、第２スイッチ５２とリアクトル７とによる昇圧動作を伴って、倍電圧整流と全波整流とが、交互に行われる。 The waveform G1 is a waveform of the input current Ia (in this case, the current flowing through the reactor 7) when both the first switch 51 and the second switch 52 are in the non-conduction state (first operation). In this case, full-wave rectification is performed without the step-up operation by the second switch 52 and the reactor 7. A waveform G2 is a waveform of the input current Ia when the first switch 51 repeats the conductive state and the non-conductive state and the second switch 52 is in the non-conductive state (second operation). In this case, voltage doubler rectification and full wave rectification without boosting operation by the second switch 52 and the reactor 7 are alternately performed. In the first operation and the second operation, the second state is realized instead of the first state. A waveform G3 is a waveform of the input current Ia when the first switch 51 repeats the conduction state and the non-conduction state and the second switch 52 repeats the conduction state and the non-conduction state (third operation). In this case, voltage doubler rectification and full-wave rectification are alternately performed with a boosting operation by the second switch 52 and the reactor 7.
　図２において記号Ｓ１，Ｓ２は、第３動作における、それぞれ第１スイッチ５１、第２スイッチ５２の導通状態／非導通状態を、ＯＮ／ＯＦＦで示す。第３動作において第１スイッチ５１は、交流電圧Ｖａの半周期期間に一回、導通状態から非導通状態へと遷移する。ここで半周期期間とは、交流電圧Ｖａがその中央値（図２に即していえば値０）をとる隣接した一対の時点（図２に即していえば時刻０，０．０１（秒）、あるいは時刻０．０１，０．０２（秒））の間を指す。第３動作において第２スイッチ５２は、半周期期間に少なくとも一回は導通状態から非導通状態へ遷移する。 In FIG. 2, symbols S1 and S2 indicate the ON / OFF states of the first switch 51 and the second switch 52 in the third operation, respectively. In the third operation, the first switch 51 transitions from the conductive state to the non-conductive state once in a half cycle period of the AC voltage Va. Here, the half cycle period is a pair of adjacent time points (time 0, 0.01 (seconds) according to FIG. 2) at which the AC voltage Va takes the median value (value 0 according to FIG. 2). Or between time 0.01 and 0.02 (seconds). In the third operation, the second switch 52 transitions from the conductive state to the non-conductive state at least once in a half cycle period.
　このように第１スイッチ５１で導通状態から非導通状態への遷移を実現するには、当然、交流電圧Ｖａの周期の１／２の長さの期間（これは必ずしも前述の半周期期間とは一致しない）において、非導通状態から導通状態へ一回遷移する。但し、第１スイッチ５１の非導通状態から導通状態への遷移は、上記で定義された半周期期間の隣接する一対同士の境界に行われてもよい。図２ではそのような非導通状態から導通状態への遷移が例示されている。 In order to realize the transition from the conductive state to the non-conductive state by the first switch 51 in this way, of course, a period that is half the period of the AC voltage Va (this is not necessarily the half-period period described above). In the case of non-coincidence, a transition from the non-conductive state to the conductive state is made once. However, the transition of the first switch 51 from the non-conductive state to the conductive state may be performed at the boundary between a pair of adjacent half-period periods defined above. FIG. 2 illustrates such a transition from the non-conductive state to the conductive state.
　同様に、第２スイッチ５２で導通状態から非導通状態への遷移を実現するには、当然、半周期期間において導通状態から非導通状態へ遷移する回数と同じ回数で、交流電圧Ｖａの周期の１／２の長さの期間において、非導通状態から導通状態へ遷移する。そしてこの遷移も半周期期間の隣接する一対同士の境界に行われてもよい。 Similarly, in order to realize the transition from the conductive state to the non-conductive state in the second switch 52, naturally, the cycle of the AC voltage Va is equal to the number of times of transition from the conductive state to the non-conductive state in the half cycle period. Transition from the non-conducting state to the conducting state is performed in a period of ½ length. This transition may also be performed at the boundary between a pair of adjacent half-cycle periods.
　図２では第３動作（波形Ｇ３）において、第１スイッチ５１は時刻０において非導通状態から導通状態へ遷移し、時刻０．００５（秒）において導通状態から非導通状態へ遷移し、時刻０．０１（秒）において非導通状態から導通状態へ遷移し、時刻０．０１５（秒）において導通状態から非導通状態へ遷移する。第２スイッチ５２は時刻０において非導通状態から導通状態へ遷移し、時刻０．００２５（秒）において導通状態から非導通状態へ遷移し、時刻０．０１（秒）において非導通状態から導通状態へ遷移し、時刻０．０１２５（秒）において導通状態から非導通状態へ遷移する。 In FIG. 2, in the third operation (waveform G3), the first switch 51 transits from the non-conducting state to the conducting state at time 0, and transits from the conducting state to the non-conducting state at time 0.005 (seconds). The transition from the non-conduction state to the conduction state is performed at .01 (second), and the transition from the conduction state to the non-conduction state is performed at time 0.015 (second). The second switch 52 transitions from the non-conductive state to the conductive state at time 0, transitions from the conductive state to the non-conductive state at time 0.0025 (seconds), and from the non-conductive state to the conductive state at time 0.01 (seconds). At time 0.0125 (seconds), and transitions from a conductive state to a non-conductive state.
　第２動作（波形Ｇ２）において、第１スイッチ５１は第３動作と同様に遷移し、第２スイッチ５２は非導通状態が維持される。第１動作（波形Ｇ１）において、第１スイッチ５１及び第２スイッチ５２はいずれも非導通状態が維持される。 In the second operation (waveform G2), the first switch 51 transitions in the same manner as the third operation, and the second switch 52 is maintained in the non-conductive state. In the first operation (waveform G1), both the first switch 51 and the second switch 52 are maintained in the non-conductive state.
　図３は第２動作における入力電流Ｉａの振る舞いを示すグラフである。但しここでは半周期期間の隣接する一対同士の境界以外で第１スイッチ５１が非導通状態から導通状態へ遷移する場合が例示されている。図３において記号Ｓ１は第２動作における第１スイッチ５１の導通状態／非導通状態をＯＮ／ＯＦＦで示す。第２動作では倍電圧整流と全波整流とが交互に行われる。これにより、第２状態が維持されていても、直流電圧Ｖｄを交流電圧Ｖａの波高値よりも高く設定することができる。また、所定の位相区間においてリアクトル７に強制的に電流を流すことは特許文献４で公知であるが、第２動作は全波整流をも行うので、電流のピークを抑制できる観点で望ましい。図３にはコンデンサ２２の両端の電圧Ｖｃも示す。 FIG. 3 is a graph showing the behavior of the input current Ia in the second operation. However, the case where the 1st switch 51 changes from a non-conduction state to a conduction | electrical_connection state is illustrated here except the boundary of a pair of adjacent half-cycle periods. In FIG. 3, symbol S <b> 1 indicates ON / OFF of the conductive / non-conductive state of the first switch 51 in the second operation. In the second operation, voltage doubler rectification and full wave rectification are alternately performed. Thereby, even if the second state is maintained, the DC voltage Vd can be set higher than the peak value of the AC voltage Va. In addition, although it is known in Patent Document 4 that a current is forcibly passed through the reactor 7 in a predetermined phase interval, the second operation also performs full-wave rectification, which is desirable from the viewpoint of suppressing a current peak. FIG. 3 also shows the voltage Vc across the capacitor 22.
　基本的には交流電圧Ｖａの波高値の絶対値が電圧Ｖｃよりも低いとき及び電圧（Ｖｄ－Ｖｃ）よりも低いときには入力電流Ｉａは流れない。つまり、第２動作では単相フルブリッジ整流回路１に流れる電流の導通角を自在には広げにくく、力率は改善されにくい。 Basically, when the absolute value of the peak value of the AC voltage Va is lower than the voltage Vc and lower than the voltage (Vd−Vc), the input current Ia does not flow. That is, in the second operation, the conduction angle of the current flowing through the single-phase full-bridge rectifier circuit 1 is not easily expanded, and the power factor is difficult to be improved.
　コンデンサ２１，２２にはそれぞれほぼ直流電圧Ｖｄの半値Ｖｄ／２（図示省略）が印加されるので、電圧Ｖｃ，（Ｖｄ－Ｖｃ）はいずれも半値Ｖｄ／２程度の値となる。但しコンデンサ２１，２２は同時には充電されないので、電圧Ｖｃ，（Ｖｄ－Ｖｃ）はいずれも半値Ｖｄ／２から若干ずれた値となる。また入力電流Ｉａが流れなくなる時点は、Ｖｃ＝｜Ｖａ｜あるいはＶｄ－Ｖｃ＝｜Ｖａ｜となる時点からずれてもいる。この要因の一つとして、リアクトル７と単相フルブリッジ整流回路１中のダイオードが支える電圧の影響が考えられる。 Since the capacitors 21 and 22 are each applied with a half-value Vd / 2 (not shown) of the DC voltage Vd, the voltages Vc and (Vd−Vc) are both about half-value Vd / 2. However, since the capacitors 21 and 22 are not charged at the same time, the voltages Vc and (Vd−Vc) are slightly deviated from the half value Vd / 2. Further, the time point at which the input current Ia stops flowing is shifted from the time point at which Vc = | Va | or Vd−Vc = | Va |. As one of the factors, the influence of the voltage supported by the reactor 7 and the diode in the single-phase full-bridge rectifier circuit 1 can be considered.
　図４及び図５は第２動作における入力電流Ｉａの振る舞いを模式的に示すグラフである。|Ｖａ|＞Ｖｃ，|Ｖａ|＞Ｖｄ－Ｖｃ（≒Ｖｄ／２）の期間においては、電源電圧の正負に応じてコンデンサ２１，２２のいずれかを充電する電流が流れる。特に電源電圧が更に高い（大きい）｜Ｖａ｜＞Ｖｄの期間においては、コンデンサ２１，２２の両方を充電する電流が流れる。 4 and 5 are graphs schematically showing the behavior of the input current Ia in the second operation. In the period of | Va |> Vc, | Va |> Vd−Vc (≈Vd / 2), a current for charging one of the capacitors 21 and 22 flows according to the positive or negative of the power supply voltage. In particular, during a period of higher (larger) power supply voltage | Va |> Vd, a current for charging both capacitors 21 and 22 flows.
　図３を用いた説明から理解されるように、入力電流Ｉａの導通角は直流電圧Ｖｄが低いほど広がる。よって交流電圧Ｖａの波形が同じであれば、図５のように直流電圧Ｖｄが高い場合の方が、図４のように直流電圧Ｖｄが低い場合よりも、導通角は狭い。つまり、第２動作では、直流電圧Ｖｄの大きさ（高さ）と力率の高さとは、トレードオフの関係にある。 As will be understood from the description using FIG. 3, the conduction angle of the input current Ia increases as the DC voltage Vd decreases. Therefore, if the waveform of the AC voltage Va is the same, the conduction angle is narrower when the DC voltage Vd is higher as shown in FIG. 5 than when the DC voltage Vd is lower as shown in FIG. That is, in the second operation, the magnitude (height) of the DC voltage Vd and the power factor are in a trade-off relationship.
　しかし第３動作では、図２に波形Ｇ３として示される様に、第２スイッチ５２が導通状態にあって第１状態が実現されている間にも入力電流Ｉａが流れ、その導通角は第２動作よりも広い。よって第３動作では、第２動作と比較して力率が高い。しかも、倍電圧整流のみならず、第２スイッチ５２及びリアクトル７による昇圧動作も行われるので、得られる直流電圧Ｖｄを更に高めることができる。つまり、第３動作は第２動作と比較して、直流電圧Ｖｄを高める。 However, in the third operation, as indicated by the waveform G3 in FIG. 2, the input current Ia flows even when the second switch 52 is in the conductive state and the first state is realized, and the conduction angle is the second angle. Wider than operation. Thus, the third operation has a higher power factor than the second operation. Moreover, not only the voltage doubler rectification but also the step-up operation by the second switch 52 and the reactor 7 is performed, so that the obtained DC voltage Vd can be further increased. That is, the third operation increases the DC voltage Vd as compared to the second operation.
　なお図２においては、第２スイッチ５２が半周期期間において導通状態から非導通状態へと一回だけ遷移する場合が例示されている。しかしながら、かかる遷移を半周期期間において複数回行っても同様の効果が得られる。この場合はスイッチングの回数が多くなって損失が増加するが、力率の制御性は向上する。 FIG. 2 illustrates the case where the second switch 52 transits only once from the conductive state to the non-conductive state in the half cycle period. However, the same effect can be obtained even when such a transition is performed a plurality of times in the half cycle period. In this case, the number of switching increases and the loss increases, but the power factor controllability is improved.
　第１動作よりも第２動作の方が、第２動作よりも第３動作の方が、いずれも電力変換装置１００の全体としてのスイッチング回数は増加する。スイッチング回数の増加は第１スイッチ５１及び第２スイッチ５２のスイッチング損失や導通損失を増大させ、電力変換装置１００における損失を高める。 The switching frequency of the power conversion device 100 as a whole increases in both the second operation than the first operation and the third operation than the second operation. The increase in the number of times of switching increases the switching loss and conduction loss of the first switch 51 and the second switch 52, and increases the loss in the power conversion device 100.
　例えば、インターリーブ型の力率改善回路や、ブリッジレス型の力率改善回路のように、電源周期内の全体に亘ってスイッチング動作を行う力率改善回路（以下「フルスイッチング型力率改善回路」と仮称）は、高い力率が要求されない負荷に対してもスイッチングの回数が多く、効率の観点で不利である。つまり高い力率が要求されない負荷に対しては、スイッチング回数を減らして効率を高めることが望ましい。 For example, a power factor correction circuit that performs a switching operation over the entire power cycle, such as an interleaved power factor correction circuit or a bridgeless power factor correction circuit (hereinafter referred to as a “full switching type power factor correction circuit”). Tentative name) is disadvantageous from the viewpoint of efficiency because the number of times of switching is large even for a load that does not require a high power factor. In other words, for loads that do not require a high power factor, it is desirable to increase the efficiency by reducing the number of times of switching.
　なるほど特許文献５では、インターリーブ型の力率改善回路においてスイッチングを行わない動作も提案されているが（特許文献５にいう「非導通モード」参照）、発生する直流電圧が高くなり、フルスイッチング型力率改善回路に後置されるインバータでのスイッチング損失を高めてしまう。このインバータのスイッチング損失を低くする観点からは、昇圧機能を有する部分のスイッチがスイッチングを行わない状況では、直流電圧を低くすることが望ましい。 In fact, Patent Document 5 proposes an operation in which switching is not performed in an interleaved power factor correction circuit (see “non-conduction mode” in Patent Document 5). This will increase the switching loss in the inverter placed after the power factor correction circuit. From the viewpoint of reducing the switching loss of the inverter, it is desirable to reduce the DC voltage in a situation where the switch having the boosting function does not perform switching.
　図６はブリッジレス型の力率改善回路と、図１の電力変換装置１００との比較を示すグラフである。但しいずれも昇圧機能を有する部分がスイッチング動作をしていない場合を示している。波形Ｇ４はブリッジレス型の力率改善回路の、波形Ｇ５は電力変換装置１００の、いずれも負荷電力と直流電圧（図中「ＤＣ電圧」と表記）との関係を示す。このように負荷が大きいほど（負荷電力が大きいほど）電力変換装置１００が発生する直流電圧は低下するのに対し、ブリッジレス型の力率改善回路は負荷電力を大きくしても直流電圧の低下は小さく、電力変換装置１００が発生する直流電圧よりも高い直流電圧を発生させている。なお、インターリーブ型の力率改善回路でも、ブリッジレス型と同様の直流電圧となる。 FIG. 6 is a graph showing a comparison between the bridgeless type power factor correction circuit and the power conversion device 100 of FIG. However, in any case, the portion having the boosting function does not perform the switching operation. A waveform G4 is a bridgeless type power factor correction circuit, and a waveform G5 is a relationship between the load power and a DC voltage (denoted as “DC voltage” in the figure) of the power converter 100. In this way, the DC voltage generated by the power converter 100 decreases as the load increases (the load power increases), whereas the bridgeless power factor correction circuit decreases the DC voltage even when the load power is increased. Is generated, and a DC voltage higher than the DC voltage generated by the power converter 100 is generated. Note that the interleaved power factor correction circuit has the same DC voltage as that of the bridgeless type.
　これは一般にフルスイッチング型力率改善回路では、そのスイッチング周波数が高いので、リアクトルのインダクタンスが小さくても電流が平滑化されるため、インダクタンスが小さいリアクトルが採用されることによる。例えば当該インダクタンスは数百μＨ程度に選定される。よってこれに電流が流れて生じる電圧降下は小さく、結果として直流電圧は高く保たれる。更に当該インダクタンスが小さいと、スイッチング動作をしない場合には、力率が悪く、交流電流のピークが大きくなり、損失が大きくなる可能性がある。これに対し、第２動作を行う電力変換装置１００ではリアクトルのインダクタンスが大きく（例えば数ｍＨ）選定されるので、リアクトルでの電圧降下は大きく、直流電圧も低くなるので、インバータのスイッチング損失は小さくなる。 This is because a full-switching power factor correction circuit generally has a high switching frequency, so that even if the inductance of the reactor is small, the current is smoothed, and therefore, a reactor having a small inductance is employed. For example, the inductance is selected to be about several hundred μH. Therefore, the voltage drop caused by the current flowing through it is small, and as a result, the DC voltage is kept high. Furthermore, if the inductance is small, when the switching operation is not performed, the power factor is bad, the peak of the alternating current is increased, and the loss may be increased. On the other hand, since the inductance of the reactor is selected to be large (for example, several mH) in the power conversion device 100 that performs the second operation, the voltage drop at the reactor is large and the DC voltage is also low, so the switching loss of the inverter is small. Become.
　以上のことから、第１スイッチ５１のスイッチング及び第２スイッチ５２による切換は、負荷３の大きさ（すなわち負荷電力：電力変換装置１００の変換電力の大きさ）に応じて選択されることが望ましい。上述の様に電力変換装置１００の動作は第１動作、第２動作、第３動作の３つに区分される。そして下記の理由から、第１動作、第２動作、第３動作はそれぞれ軽負荷、中負荷、重負荷において採用されることが望ましい。具体的には、負荷電力の大きさが第１閾値以上であれば第３動作を、第１閾値よりも小さい第２閾値以上であって第１閾値未満であれば第２動作を、第２閾値未満であれば第１動作を、それぞれ電力変換装置１００が採用することが望ましい。 From the above, the switching of the first switch 51 and the switching by the second switch 52 are preferably selected according to the magnitude of the load 3 (that is, the load power: the magnitude of the converted power of the power converter 100). . As described above, the operation of the power conversion apparatus 100 is divided into three operations: a first operation, a second operation, and a third operation. For the following reasons, it is desirable that the first operation, the second operation, and the third operation are employed at light load, medium load, and heavy load, respectively. Specifically, if the magnitude of the load power is greater than or equal to the first threshold, the third operation is performed. If the load power is greater than or equal to the second threshold smaller than the first threshold and less than the first threshold, the second operation is performed. If it is less than the threshold value, it is desirable that the power converter 100 employs the first operation.
　軽負荷の場合、つまり負荷電力の大きさが第２閾値未満であれば、効率が重視され、高い力率は要求されない。よって損失を低減するためにスイッチング回数は少ないことが望まれる。また、負荷３がインバータで駆動されるモータであっても、軽負荷時には必要とされるモータ印加電圧は低いため、直流電圧Ｖｄを高める必要も無い。それゆえ、第１スイッチ５１及び第２スイッチ５２のいずれもが非導通状態となる第１動作が採用されることが望ましい。これは、特にインバータエアコンのように、全体の運転時間に対する軽負荷運転の割合が大きい用途に適用する際に重要である。すなわち、軽負荷時の効率が高いほど運転時の全体としての電気料金は安くなり、性能の指標であるＡＰＦ（Annual Performance Factor：通年エネルギー消費効率）の値も高くなる。 In the case of a light load, that is, if the magnitude of the load power is less than the second threshold, efficiency is emphasized and a high power factor is not required. Therefore, it is desirable that the number of switching times is small in order to reduce the loss. Even if the load 3 is a motor driven by an inverter, it is not necessary to increase the DC voltage Vd because the motor applied voltage required at the time of light load is low. Therefore, it is desirable to employ the first operation in which both the first switch 51 and the second switch 52 are turned off. This is particularly important when applied to applications where the ratio of light load operation to the entire operation time is large, such as an inverter air conditioner. That is, the higher the efficiency at light load, the lower the electricity bill as a whole during operation, and the higher the value of APF (Annual Performance Factor: year-round energy consumption efficiency) that is a performance index.
　重負荷の場合、つまり負荷電力の大きさが第１閾値以上であれば、高い効率よりも、高い直流電圧Ｖｄ及び高い力率が重視される。これらは電源９が商用電源である場合に特に要求される。かかる商用電源には電流の最大定格が定められており、流れる交流電流の実効値が同じであっても、負荷３に入力できる有効電力を高める要求があるからである。よって入力電流Ｉａの導通角を広げることで入力力率を高め、より大きな負荷電力を得ることが望ましい。特に負荷３が、例えばインバータで駆動されるモータである場合、モータを高回転速度かつ高トルクで駆動するためには、モータに印加される電圧をより高める必要がある。かかる必要性からは、直流電圧Ｖｄを高める第３動作が行われることが望ましい。 In the case of a heavy load, that is, if the load power is greater than or equal to the first threshold value, higher DC voltage Vd and higher power factor are more important than higher efficiency. These are particularly required when the power source 9 is a commercial power source. This is because such a commercial power supply has a maximum current rating, and there is a demand to increase the effective power that can be input to the load 3 even if the effective value of the flowing AC current is the same. Therefore, it is desirable to increase the input power factor by increasing the conduction angle of the input current Ia and obtain a larger load power. In particular, when the load 3 is a motor driven by an inverter, for example, in order to drive the motor at a high rotational speed and a high torque, it is necessary to further increase the voltage applied to the motor. From such a necessity, it is desirable to perform the third operation for increasing the DC voltage Vd.
　これらに対し、中負荷の場合、つまり負荷電力の大きさが第２閾値以上第１閾値未満であれば、高い効率よりも高い力率が重視される。上記と同様に、負荷３が例えばインバータで駆動されるモータである場合、モータを高回転速度かつ高トルクで駆動するためにはいわゆる弱め界磁（弱め磁束）運転を行わなくてもよい程度に直流電圧Ｖｄを高めることが望ましい。よって第２スイッチ５２を非導通状態にして第２状態を実現したままで、直流電圧Ｖｄを高めるべく、第２動作が行われることが望ましい。 On the other hand, if the load is medium, that is, if the magnitude of the load power is greater than or equal to the second threshold and less than the first threshold, a higher power factor is more important than high efficiency. Similarly to the above, when the load 3 is, for example, a motor driven by an inverter, in order to drive the motor at a high rotational speed and high torque, it is not necessary to perform a so-called field weakening (weakening magnetic flux) operation. It is desirable to increase the DC voltage Vd. Therefore, it is desirable that the second operation is performed in order to increase the DC voltage Vd while the second switch 52 is turned off and the second state is realized.
　第２動作では第１スイッチ５１が導通状態にある期間を長くして直流電圧Ｖｄを高めることができる。第３動作では、第１スイッチ５１が導通状態にある期間を、例えば電源周期の１／４程度とし、また第２スイッチ５２が導通状態にあって第１状態を実現する期間を長くして直流電圧Ｖｄを高めることができる。 In the second operation, the DC voltage Vd can be increased by lengthening the period in which the first switch 51 is in the conductive state. In the third operation, the period in which the first switch 51 is in a conductive state is set to, for example, about 1/4 of the power supply cycle, and the period in which the second switch 52 is in a conductive state and the first state is realized is increased. The voltage Vd can be increased.
　あるいは中負荷となる場合を想定せず、負荷３が重負荷であるか軽負荷であるかの二つの区別とする場合には、第２閾値を設定すること無く、負荷３への入力電力の大きさが第１閾値未満であれば、第１動作を採用してもよい。 Alternatively, when it is not assumed that the load is medium and the load 3 is a heavy load or a light load, the input power to the load 3 is not set without setting the second threshold value. If the magnitude is less than the first threshold, the first operation may be adopted.
　第２の実施の形態．
　本実施の形態では第３動作の望ましい態様について説明する。本実施の形態の第３動作では、半周期期間において、第２スイッチ５２の導通状態から非導通状態への遷移（第１状態から第２状態への切換）は、第１スイッチ５１が導通状態にあるときに行われる。 Second embodiment.
In the present embodiment, a desirable aspect of the third operation will be described. In the third operation of the present embodiment, the transition of the second switch 52 from the conductive state to the non-conductive state (switching from the first state to the second state) occurs during the half cycle period. To be done.
　このように動作することで、第２スイッチ５２が導通状態から非導通状態へと遷移する時点では、単相フルブリッジ整流回路１とコンデンサ２１，２２とは既に倍電圧整流回路として機能している。よって第２スイッチ５２が導通状態から非導通状態へと遷移しても、入力電流Ｉａが低下しにくく、より正弦波に近い、力率の高い電流波形が得られる。 By operating in this manner, the single-phase full-bridge rectifier circuit 1 and the capacitors 21 and 22 are already functioning as a voltage doubler rectifier circuit when the second switch 52 transitions from the conductive state to the non-conductive state. . Therefore, even when the second switch 52 transitions from the conducting state to the non-conducting state, the input current Ia is less likely to be reduced, and a current waveform having a high power factor that is closer to a sine wave is obtained.
　入力電流Ｉａの低下を回避するには、更に、第２スイッチ５２が導通状態から非導通状態へと遷移する時点が、半周期期間の始点から半周期の１／６が経過した時点よりも後であって半周期の５／６が経過する迄であることが、以下の理由により望ましい。 In order to avoid a decrease in the input current Ia, the time when the second switch 52 transitions from the conductive state to the non-conductive state is later than the time when 1/6 of the half cycle has elapsed from the start point of the half cycle period. However, it is desirable that 5/6 of a half cycle elapses for the following reason.
　倍電圧整流回路の一部として機能するコンデンサ２１，２２にはほぼ直流電圧Ｖｄの半値Ｖｄ／２が充電されている。よってこれらに対して第２スイッチ５２が非導通状態で入力電流Ｉａを電源９から流すためには、｜Ｖａ｜≧Ｖｄ／２でなければならない。電源９がこのような値の交流電圧Ｖａを出力するのは、交流電圧Ｖａの位相が、交流電圧Ｖａがその中央値を採る時点を基準として３０～１５０度にあるときである（∵sin(π/6)＝sin(5π/6)＝１/２）。よって第２スイッチ５２が導通状態から非導通状態へと遷移する時点を上述のように選べば、当該遷移の直後から少なくともコンデンサ２１，２２のいずれかへ単相フルブリッジ整流回路１から電流が流れるので、入力電流Ｉａの低下が回避される。 Capacitors 21 and 22 functioning as a part of a voltage doubler rectifier circuit are charged with a half value Vd / 2 of the DC voltage Vd. Therefore, in order to allow the input current Ia to flow from the power supply 9 when the second switch 52 is in a non-conductive state, | Va | ≧ Vd / 2 must be satisfied. The power supply 9 outputs the AC voltage Va having such a value when the phase of the AC voltage Va is 30 to 150 degrees with respect to the time when the AC voltage Va takes its median value (∵sin ( π / 6) = sin (5π / 6) = 1/2). Therefore, if the time point at which the second switch 52 transitions from the conductive state to the non-conductive state is selected as described above, current flows from the single-phase full-bridge rectifier circuit 1 to at least one of the capacitors 21 and 22 immediately after the transition. Therefore, a decrease in input current Ia is avoided.
　入力電流Ｉａを交流電圧Ｖａと同位相の正弦波状とすることで力率が最良となる。従ってより望ましくは、第２スイッチ５２が導通状態から非導通状態へ遷移する際に入力電流Ｉａを増加させる必要性が高いのは、上記基準を採用した交流電圧Ｖａの位相が９０度より小さい時（交流電圧Ｖａがピークとなるまで）である。 The power factor becomes the best by making the input current Ia a sine wave in phase with the AC voltage Va. Therefore, more preferably, when the second switch 52 transitions from the conducting state to the non-conducting state, it is highly necessary to increase the input current Ia when the phase of the AC voltage Va employing the above-described standard is smaller than 90 degrees. (Until the AC voltage Va reaches its peak).
　もちろん、第２スイッチ５２が導通状態から非導通状態へと遷移する時点が、半周期期間の始点から半周期の１／６が経過した時点よりも後であって半周期の５／６が経過する迄であって、かつその時点で第１スイッチ５１が非導通状態にあってもよい。 Of course, the time when the second switch 52 transitions from the conductive state to the non-conductive state is later than the time when 1/6 of the half cycle has elapsed since the start of the half cycle period, and 5/6 of the half cycle has elapsed. The first switch 51 may be in a non-conducting state at that time.
　第３の実施の形態．
　本実施の形態では第３動作の望ましい態様について説明する。第２スイッチ５２が非導通状態にあって第２状態が実現されているとき、一対の入力端１５，１６は短絡されず、両者の間には電源９とリアクトル７とが直列に接続されている。 Third embodiment.
In the present embodiment, a desirable aspect of the third operation will be described. When the second switch 52 is in a non-conductive state and the second state is realized, the pair of input terminals 15 and 16 are not short-circuited, and the power source 9 and the reactor 7 are connected in series between them. Yes.
　かかる状態において入力電流Ｉａがダイオード１１、コンデンサ２１，２２、ダイオード１４を流れていたとすれば、第１スイッチ５１が非導通状態から導通状態へと遷移すると、入力電流Ｉａの経路はコンデンサ２２、ダイオード１４から第１スイッチ５１に変更される。これによりダイオード１４には逆回復現象が発生してしまう。 In this state, if the input current Ia flows through the diode 11, the capacitors 21, 22, and the diode 14, when the first switch 51 transitions from the non-conductive state to the conductive state, the path of the input current Ia is the capacitor 22, 14 is changed to the first switch 51. As a result, a reverse recovery phenomenon occurs in the diode 14.
　あるいは入力電流Ｉａがダイオード１２、コンデンサ２１，２２、ダイオード１３を流れていたとすれば、第１スイッチ５１が非導通状態から導通状態へと遷移すると、入力電流Ｉａの経路はコンデンサ２１、ダイオード１２から第１スイッチ５１に変更される。これによりダイオード１２には逆回復現象が発生してしまう。このようなダイオードの逆回復現象は、ダイオードでリカバリ損失を発生させることになって効率を悪化させるので望ましくない。 Alternatively, if the input current Ia flows through the diode 12, the capacitors 21, 22, and the diode 13, when the first switch 51 transitions from the non-conductive state to the conductive state, the path of the input current Ia is from the capacitor 21 and the diode 12. The first switch 51 is changed. As a result, a reverse recovery phenomenon occurs in the diode 12. Such a reverse recovery phenomenon of the diode is undesirable because it causes a recovery loss in the diode and deteriorates the efficiency.
　そこで本実施の形態の第３動作では、半周期期間において、第１スイッチ５１の非導通状態から導通状態への遷移は、第２スイッチ５２が導通状態であって第１状態が実現されているときに行われる。 Therefore, in the third operation of the present embodiment, during the half cycle period, the transition of the first switch 51 from the non-conductive state to the conductive state is realized by the second switch 52 being in the conductive state. Sometimes done.
　なお、第２スイッチ５２が導通状態にあれば、一対の入力端１５，１６は短絡されるので、第１スイッチ５１が導通状態及び非導通状態のいずれにあるかは、入力電流Ｉａ及びコンデンサ２１，２２の電圧のいずれにも影響を与えない。入力電流Ｉａは単相フルブリッジ整流回路１及びコンデンサ２１，２２の構成よりもインピーダンスが低い第２スイッチ５２を流れて第１状態が実現されるし、単相フルブリッジ整流回路１はコンデンサ２１，２２の放電経路とはならないからである。 If the second switch 52 is in the conductive state, the pair of input terminals 15 and 16 are short-circuited. Therefore, whether the first switch 51 is in the conductive state or the non-conductive state depends on the input current Ia and the capacitor 21. , 22 is not affected. The input current Ia flows through the second switch 52 having a lower impedance than the configuration of the single-phase full-bridge rectifier circuit 1 and the capacitors 21 and 22, and the first state is realized. This is because there are no 22 discharge paths.
　よって第１スイッチ５１が非導通状態から導通状態へと遷移するのは第２スイッチ５２が導通状態から非導通状態へと遷移する時点よりもかなり前であってもよい。例えば第１スイッチ５１及び第２スイッチ５２が同時に、非導通状態から導通状態へと遷移してもよい。 Therefore, the first switch 51 may transition from the non-conducting state to the conducting state considerably before the time when the second switch 52 transitions from the conducting state to the non-conducting state. For example, the first switch 51 and the second switch 52 may simultaneously transition from a non-conductive state to a conductive state.
　回路構成の変形．
　以下では、第２スイッチ５２の変形について例示する。第１スイッチ５１はその構成を簡略化して単なるスイッチとして図示した。 Modification of circuit configuration.
Hereinafter, a modification of the second switch 52 will be exemplified. The first switch 51 is illustrated as a simple switch with a simplified configuration.
　図７乃至図１０ではいずれも図１で示された構成に対し、第２スイッチ５２が一対の入力端１５，１６と、出力端１７，１８の一方（図７、図８に即して言えば出力端１８、図９，図１０に即して言えば出力端１７）との間に接続されている構成が回路図として示される。そして第２スイッチ５２は双方向スイッチではなく、その導通によって一方向に電流を流すことができるスイッチとして構成されている。 7 to 10, the second switch 52 is one of the pair of input terminals 15 and 16 and the output terminals 17 and 18 (which can be said in conformity with FIGS. 7 and 8). For example, the configuration connected between the output end 18 and the output end 17) in the case of FIGS. 9 and 10 is shown as a circuit diagram. The second switch 52 is not a bidirectional switch, but is configured as a switch that can flow current in one direction by its conduction.
　図７の構成（第１変形）では、第２スイッチ５２がＩＧＢＴ５２ａとダイオード１１ａ，１２ａとを有している。ダイオード１１ａのアノードは入力端１５に、ダイオード１２ａのアノードは入力端１６に、それぞれ接続される。ダイオード１１ａのカソードと、ダイオード１２ａのカソードと、ＩＧＢＴ５２ａのコレクタとが共通に接続され、ＩＧＢＴ５２ａのエミッタが出力端１８に接続されている。つまり第１変形では、第２スイッチ５２はその導通によって入力端１５，１６のいずれからも出力端１８へと電流を流すことができるスイッチとして構成されている。 In the configuration of FIG. 7 (first modification), the second switch 52 includes an IGBT 52a and diodes 11a and 12a. The anode of the diode 11 a is connected to the input terminal 15, and the anode of the diode 12 a is connected to the input terminal 16. The cathode of the diode 11 a, the cathode of the diode 12 a, and the collector of the IGBT 52 a are connected in common, and the emitter of the IGBT 52 a is connected to the output terminal 18. In other words, in the first modification, the second switch 52 is configured as a switch that can flow current from either the input end 15 or 16 to the output end 18 by its conduction.
　図８の構成（第２変形）では、第２スイッチ５２がＩＧＢＴ５２ｂ，５２ｃを有している。ＩＧＢＴ５２ｂのコレクタは入力端１５に、ＩＧＢＴ５２ｃのコレクタは入力端１６に、それぞれ接続される。ＩＧＢＴ５２ｂのエミッタと、ＩＧＢＴ５２ｃのエミッタと、出力端１８とが共通に接続されている。つまり第２変形でも、第２スイッチ５２はその導通によって入力端１５，１６のいずれからも出力端１８へと電流を流すことができるスイッチとして構成されている。 In the configuration of FIG. 8 (second modification), the second switch 52 includes IGBTs 52b and 52c. The collector of the IGBT 52 b is connected to the input terminal 15, and the collector of the IGBT 52 c is connected to the input terminal 16. The emitter of the IGBT 52b, the emitter of the IGBT 52c, and the output terminal 18 are connected in common. That is, even in the second modification, the second switch 52 is configured as a switch that can flow a current from either the input end 15 or 16 to the output end 18 by its conduction.
　図９の構成（第３変形）では、第２スイッチ５２がＩＧＢＴ５２ｉとダイオード１３ａ，１４ａとを有している。ダイオード１３ａのカソードは入力端１５に、ダイオード１４ａのカソードは入力端１６に、それぞれ接続される。ダイオード１３ａのアノードと、ダイオード１４ａのアノードと、ＩＧＢＴ５２ｉのエミッタとが共通に接続され、ＩＧＢＴ５２ｉのコレクタが出力端１７に接続されている。つまり第３変形では、第２スイッチ５２はその導通によって入力端１５，１６のいずれにも出力端１７から電流を流すことができるスイッチとして構成されている。 In the configuration of FIG. 9 (third modification), the second switch 52 includes an IGBT 52i and diodes 13a and 14a. The cathode of the diode 13 a is connected to the input terminal 15, and the cathode of the diode 14 a is connected to the input terminal 16. The anode of the diode 13 a, the anode of the diode 14 a, and the emitter of the IGBT 52 i are connected in common, and the collector of the IGBT 52 i is connected to the output terminal 17. That is, in the third modification, the second switch 52 is configured as a switch that can flow current from the output end 17 to both the input ends 15 and 16 by the conduction.
　図１０の構成（第４変形）では、第２スイッチ５２がＩＧＢＴ５２ｊ，５２ｆを有している。ＩＧＢＴ５２ｊのエミッタは入力端１５に、ＩＧＢＴ５２ｆのエミッタは入力端１６に、それぞれ接続される。ＩＧＢＴ５２ｊのコレクタと、ＩＧＢＴ５２ｆのコレクタと、出力端１７とが共通に接続されている。つまり第４変形でも、第２スイッチ５２はその導通によって入力端１５，１６のいずれにも出力端１７から電流を流すことができるスイッチとして構成されている。 In the configuration of FIG. 10 (fourth modification), the second switch 52 includes IGBTs 52j and 52f. The emitter of the IGBT 52j is connected to the input terminal 15, and the emitter of the IGBT 52f is connected to the input terminal 16. The collector of the IGBT 52j, the collector of the IGBT 52f, and the output terminal 17 are connected in common. That is, even in the fourth modification, the second switch 52 is configured as a switch that can flow current from the output end 17 to both the input ends 15 and 16 by the conduction.
　なお、第１変形と第３変形とでは第２スイッチ５２を構成する要素の数が同じように見え、その動作も後述のように同等である。但し実際に適用する場合には、次の理由により第１変形が適用される場合が一般的である。すなわち、第１変形ではＩＧＢＴ５２ａのエミッタが直流電圧Ｖｄの負電位側に接続されているため、ＩＧＢＴ５２ａの駆動用信号や駆動用電源の基準電位は直流電圧Ｖｄの負電位側となって、駆動用信号を作成する制御回路（図示せず）と同じ基準電位で動作させることができる。これに対し、第３変形ではＩＧＢＴ５２ｉの駆動用信号や駆動用電源の基準電位を前記制御回路の基準電位（直流電圧Ｖｄの負電位側）と同じ電位とすることができないため、電位の異なる独立したＩＧＢＴ駆動用電源や、駆動用信号のレベルシフト回路が必要となる。よって回路の複雑化やコストアップを避ける観点から、第３変形よりも第１変形を適用することが望ましい。 The first modification and the third modification appear to have the same number of elements constituting the second switch 52, and their operations are also equivalent as will be described later. However, when actually applied, the first modification is generally applied for the following reason. That is, in the first modification, since the emitter of the IGBT 52a is connected to the negative potential side of the DC voltage Vd, the driving signal of the IGBT 52a and the reference potential of the driving power source are on the negative potential side of the DC voltage Vd. It can be operated at the same reference potential as a control circuit (not shown) for generating a signal. On the other hand, in the third modification, the drive signal of the IGBT 52i and the reference potential of the drive power supply cannot be set to the same potential as the reference potential (the negative potential side of the DC voltage Vd) of the control circuit. The IGBT driving power source and the driving signal level shift circuit are required. Therefore, it is desirable to apply the first modification rather than the third modification from the viewpoint of avoiding circuit complexity and cost increase.
　この観点は第２変形と第４変形とについても同様である。特に第４変形ではＩＧＢＴ５２ｊとＩＧＢＴ５２ｆのエミッタが共通でないことから、ＩＧＢＴ駆動用電源と駆動用信号のレベルシフトがそれぞれのＩＧＢＴに対応させて２つずつ必要となる。よって上述の観点での第２変形と第４変形との相違は、当該観点での第１変形と第３変形との相違よりも顕著である。このことから、第４変形よりも第２変形が適用される場合が一般的である。 This viewpoint is the same for the second and fourth modifications. Particularly, in the fourth modification, since the emitters of the IGBT 52j and the IGBT 52f are not common, two level shifts of the IGBT driving power source and the driving signal are required corresponding to each IGBT. Therefore, the difference between the second deformation and the fourth deformation in the above viewpoint is more conspicuous than the difference between the first deformation and the third deformation in the above viewpoint. For this reason, the case where the second deformation is applied rather than the fourth deformation is common.
　図１１、図１２ではいずれも図１で示された構成に対し、第２スイッチ５２が、出力端１７，１８の間に設けられ、その導通によって出力端１７から出力端１８へ電流を流すことができる。具体的には第２スイッチ５２は出力端１７に接続されたコレクタと、出力端１８に接続されたエミッタとを有するＩＧＢＴで構成される。 11 and 12, in contrast to the configuration shown in FIG. 1, the second switch 52 is provided between the output terminals 17 and 18, and current flows from the output terminal 17 to the output terminal 18 by the conduction. Can do. Specifically, the second switch 52 is composed of an IGBT having a collector connected to the output end 17 and an emitter connected to the output end 18.
　更に、図１１の構成（第５変形）ではダイオード５２ｄが出力端１７と接続点２３との間でコンデンサ２１と直列に接続される。ダイオード５２ｄの順方向はコンデンサ２１を充電する電流が流れる方向、つまり出力端１７からコンデンサ２１へ向かう方向と一致する。ダイオード５２ｄは出力端１７とコンデンサ２１とに挟まれる。具体的にはダイオード５２ｄのアノードが出力端１７に接続され、ダイオード５２ｄのカソードがコンデンサ２１を介して接続点２３に接続される。 Furthermore, in the configuration of FIG. 11 (fifth modification), the diode 52 d is connected in series with the capacitor 21 between the output end 17 and the connection point 23. The forward direction of the diode 52d coincides with the direction in which the current for charging the capacitor 21 flows, that is, the direction from the output end 17 toward the capacitor 21. The diode 52 d is sandwiched between the output terminal 17 and the capacitor 21. Specifically, the anode of the diode 52 d is connected to the output terminal 17, and the cathode of the diode 52 d is connected to the connection point 23 via the capacitor 21.
　また図１２の構成（第６変形）ではダイオード５２ｅが出力端１８と接続点２３との間でコンデンサ２２と直列に接続される。ダイオード５２ｅの順方向はコンデンサ２２を充電する電流が流れる方向、つまりコンデンサ２２から出力端１８へ向かう方向と一致する。ダイオード５２ｅは出力端１８とコンデンサ２２とに挟まれる。具体的にはダイオード５２ｅのカソードが出力端１８に接続され、ダイオード５２ｅのアノードがコンデンサ２２を介して接続点２３に接続される。 In the configuration of FIG. 12 (sixth modification), the diode 52 e is connected in series with the capacitor 22 between the output end 18 and the connection point 23. The forward direction of the diode 52 e coincides with the direction in which a current for charging the capacitor 22 flows, that is, the direction from the capacitor 22 toward the output terminal 18. The diode 52 e is sandwiched between the output terminal 18 and the capacitor 22. Specifically, the cathode of the diode 52 e is connected to the output terminal 18, and the anode of the diode 52 e is connected to the connection point 23 via the capacitor 22.
　第１～第６の変形において、第２スイッチ５２の動作を第１の実施の形態の第２スイッチ５２と同様に行い、第３動作が実現できる。つまり第２スイッチ５２の切換により、第１状態と第２状態との間での遷移が行われる。 In the first to sixth modifications, the operation of the second switch 52 is performed in the same manner as the second switch 52 of the first embodiment, and the third operation can be realized. That is, the transition between the first state and the second state is performed by switching the second switch 52.
　しかしながら、第１～第６の変形において第１スイッチ５１と第２スイッチ５２のいずれもが導通状態にある状況、即ち第１状態であって第１スイッチ５１が導通する状況は避けられるべきである。そのような状況では第１スイッチ５１及び第２スイッチ５２がコンデンサ２１，２２の少なくともいずれかの放電経路を構成してしまうからである。具体的には図７、図８、図１１に示された構成（第１変形、第２変形、第５変形）ではコンデンサ２２の放電経路が、図９、図１０、図１２（第３変形、第４変形、第６変形）に示された構成ではコンデンサ２１の放電経路が、それぞれ形成されてしまう。 However, in the first to sixth modifications, a situation where both the first switch 51 and the second switch 52 are in a conducting state, that is, a situation where the first switch 51 is conducting in the first state should be avoided. . This is because the first switch 51 and the second switch 52 constitute at least one of the discharge paths of the capacitors 21 and 22 in such a situation. Specifically, in the configuration shown in FIGS. 7, 8, and 11 (first modification, second modification, and fifth modification), the discharge path of the capacitor 22 is shown in FIGS. 9, 10, and 12 (third modification). In the configuration shown in the fourth modification and the sixth modification), the discharge path of the capacitor 21 is formed.
　よって第１～第６の変形の場合には、第１状態から第２状態への切換、ここでは第２スイッチ５２の導通状態から非導通状態への遷移は、第１スイッチ５１が非導通状態にあるときに行われる必要がある。従って、第２スイッチ５２の導通状態から非導通状態への遷移が第１スイッチ５１の導通状態において行われる第２の実施の形態における第３動作を実現できない。よって第２の実施の形態と比較すると、第１～第６の変形では入力電流Ｉａが低下し、力率が低くなってしまう。 Therefore, in the case of the first to sixth modifications, switching from the first state to the second state, here, the transition from the conductive state to the non-conductive state of the second switch 52, the first switch 51 is in the non-conductive state. Needs to be done when Therefore, the third operation in the second embodiment in which the transition from the conductive state of the second switch 52 to the non-conductive state is performed in the conductive state of the first switch 51 cannot be realized. Therefore, as compared with the second embodiment, in the first to sixth modifications, the input current Ia is lowered and the power factor is lowered.
　しかも第５変形（図１１）ではコンデンサ２１の充電経路にダイオード５２ｄが、第６変形（図１２）ではコンデンサ２２の充電経路にダイオード５２ｅが、それぞれ存在する。よって全波整流、倍電圧整流のいずれが行われる場合でもダイオードの導通損失分で損失が増加する。 Moreover, in the fifth modification (FIG. 11), a diode 52d is present in the charging path of the capacitor 21, and in the sixth modification (FIG. 12), a diode 52e is present in the charging path of the capacitor 22. Therefore, even when full-wave rectification or voltage doubler rectification is performed, the loss increases by the conduction loss of the diode.
　また、第１～第６の変形では、第１スイッチ５１の非導通状態から導通状態への遷移は、第２状態が実現されているとき、ここでは第２スイッチ５２が非導通状態にあるときに行われる必要がある。従って、第１スイッチ５１の非導通状態から導通状態への遷移が第２スイッチ５２の導通状態において行われる第３の実施の形態における第３動作を実現できない。よって第３の実施の形態と比較すると、当該変形はダイオードの逆回復現象を招来してしまい、効率を悪化させる観点で望ましくない。 In the first to sixth modifications, the transition of the first switch 51 from the non-conductive state to the conductive state is performed when the second state is realized, here, when the second switch 52 is in the non-conductive state. Need to be done. Therefore, the third operation in the third embodiment in which the transition of the first switch 51 from the non-conductive state to the conductive state is performed in the conductive state of the second switch 52 cannot be realized. Therefore, as compared with the third embodiment, the deformation causes a reverse recovery phenomenon of the diode, which is not desirable from the viewpoint of deteriorating the efficiency.
　図１３は第７の変形にかかる構成を、図１４は第８の変形にかかる構成を、それぞれ示す回路図である。第７の変形、及び第８の変形では、それぞれ第５の変形（図１１）、第６の変形（図１２）におけるリアクトル７を分割して、単相フルブリッジ整流回路１よりもコンデンサ２１，２２側に配置した構成が例示される。具体的にはリアクトル７に代えて一対のリアクトル７ａ，７ｂが設けられる。リアクトル７ａは出力端１７に接続され、リアクトル７ｂは出力端１８に接続される。 FIG. 13 is a circuit diagram showing a configuration according to the seventh modification, and FIG. 14 is a circuit diagram showing a configuration according to the eighth modification. In the seventh modification and the eighth modification, the reactor 7 in the fifth modification (FIG. 11) and the sixth modification (FIG. 12) is divided, and the capacitors 21, The structure arrange | positioned at the 22 side is illustrated. Specifically, instead of the reactor 7, a pair of reactors 7a and 7b are provided. Reactor 7 a is connected to output end 17, and reactor 7 b is connected to output end 18.
　第７の変形（図１３）ではダイオード５２ｄは、出力端１７と接続点２３との間で、コンデンサ２１とリアクトル７ａとに挟まれてコンデンサ２１とリアクトル７ａとに直列に接続される。そしてダイオード５２ｄの順方向はコンデンサ２１を充電する電流が流れる方向と一致する。リアクトル７ａは出力端１７とダイオード５２ｄとに挟まれる。具体的にはダイオード５２ｄのアノードがリアクトル７ａを介して出力端１７に接続され、ダイオード５２ｄのカソードがコンデンサ２１を介して接続点２３に接続される。 In the seventh modification (FIG. 13), the diode 52d is sandwiched between the capacitor 21 and the reactor 7a between the output end 17 and the connection point 23 and connected in series to the capacitor 21 and the reactor 7a. The forward direction of the diode 52d coincides with the direction in which the current for charging the capacitor 21 flows. Reactor 7a is sandwiched between output end 17 and diode 52d. Specifically, the anode of the diode 52 d is connected to the output end 17 via the reactor 7 a, and the cathode of the diode 52 d is connected to the connection point 23 via the capacitor 21.
　第８の変形（図１４）ではダイオード５２ｅは、出力端１８と接続点２３との間で、コンデンサ２２とリアクトル７ｂとに挟まれてコンデンサ２２とリアクトル７ｂとに直列に接続される。そしてダイオード５２ｅの順方向はコンデンサ２２を充電する電流が流れる方向と一致する。リアクトル７ｂは出力端１８とダイオード５２ｅとに挟まれる。具体的にはダイオード５２ｅのカソードがリアクトル７ｂを介して出力端１８に接続され、ダイオード５２ｅのアノードがコンデンサ２２を介して接続点２３に接続される。 In the eighth modification (FIG. 14), the diode 52e is sandwiched between the capacitor 22 and the reactor 7b between the output end 18 and the connection point 23, and is connected in series with the capacitor 22 and the reactor 7b. The forward direction of the diode 52e coincides with the direction in which the current for charging the capacitor 22 flows. Reactor 7b is sandwiched between output end 18 and diode 52e. Specifically, the cathode of the diode 52e is connected to the output end 18 via the reactor 7b, and the anode of the diode 52e is connected to the connection point 23 via the capacitor 22.
　かかる一対のリアクトル７ａ，７ｂは、コンデンサ２１，２２の直列接続の両端の間で単相フルブリッジ整流回路１を介して電源９と直列に接続されるという点で、図１、図７～図１２に示されたリアクトル７と共通する。第２スイッチ５２は第７の変形（図１３）、第８の変形（図１４）のいずれにおいても、出力端１７，１８の間でリアクトル７ａ，７ｂに挟まれて、リアクトル７ａ，７ｂに直列に接続される。 The pair of reactors 7a and 7b is connected in series with the power source 9 via the single-phase full-bridge rectifier circuit 1 between both ends of the series connection of the capacitors 21 and 22, as shown in FIGS. 12 is common to the reactor 7 shown in FIG. The second switch 52 is sandwiched between the reactors 7a and 7b between the output ends 17 and 18 in both of the seventh modification (FIG. 13) and the eighth modification (FIG. 14), and is in series with the reactors 7a and 7b. Connected to.
　かかる構成ではリアクトル７ａ，７ｂが図９のリアクトル７と同様に機能する。第２スイッチ５２は、リアクトル７ａ，７ｂ、ダイオード５２ｄ（あるいはダイオード５２ｅ）、コンデンサ２１，２２と共に昇圧回路を構成するとみることができる。 In such a configuration, the reactors 7a and 7b function similarly to the reactor 7 of FIG. The second switch 52 can be considered to constitute a booster circuit together with the reactors 7a and 7b, the diode 52d (or the diode 52e), and the capacitors 21 and 22.
　しかも第７の変形（図１３）に示される構成では、リアクトル７ａは第１スイッチ５１と第２スイッチ５２のいずれもが導通状態にあっても、コンデンサ２２の放電電流を低減する。同様に第８の変形（図１４）に示される構成では、リアクトル７ｂは第１スイッチ５１と第２スイッチ５２のいずれもが導通状態にあっても、コンデンサ２１の放電電流を低減する。 In addition, in the configuration shown in the seventh modification (FIG. 13), the reactor 7a reduces the discharge current of the capacitor 22 even when both the first switch 51 and the second switch 52 are in a conductive state. Similarly, in the configuration shown in the eighth modification (FIG. 14), the reactor 7b reduces the discharge current of the capacitor 21 even when both the first switch 51 and the second switch 52 are in the conductive state.
　しかしながら第７の変形（図１３）に示される構成においてコンデンサ２２の放電電流を阻止し、第８の変形（図１４）に示される構成においてコンデンサ２１の放電電流を阻止するためには、第１スイッチ５１と第２スイッチ５２のいずれもが導通状態にある状況は避けられることが望ましい。 However, in order to block the discharge current of the capacitor 22 in the configuration shown in the seventh modification (FIG. 13) and to block the discharge current of the capacitor 21 in the configuration shown in the eighth modification (FIG. 14), It is desirable to avoid a situation where both the switch 51 and the second switch 52 are in a conductive state.
　図１５は第１～第８の変形（図７～図１４）における電力変換装置１００の動作を例示するグラフであり、図２に対応する。波形Ｇ０、記号Ｓ１，Ｓ２は、図２を参照して行った説明で用いられた定義と同義である。波形Ｇ６は入力電流Ｉａの波形を示す。 FIG. 15 is a graph illustrating the operation of the power conversion apparatus 100 in the first to eighth modifications (FIGS. 7 to 14), and corresponds to FIG. The waveform G0 and symbols S1 and S2 are synonymous with the definitions used in the description made with reference to FIG. A waveform G6 shows the waveform of the input current Ia.
　第１～第８の変形においても、第３動作では第１スイッチ５１が、交流電圧Ｖａの半周期期間に一回、導通状態から非導通状態へと遷移する。また第２スイッチ５２は、半周期期間に少なくとも一回は導通状態から非導通状態へ遷移する。 Also in the first to eighth modifications, in the third operation, the first switch 51 changes from the conductive state to the non-conductive state once in a half cycle period of the AC voltage Va. The second switch 52 transitions from the conductive state to the non-conductive state at least once in a half cycle period.
　但し第１～第８の変形では、半周期期間において、第２スイッチ５２の導通状態から非導通状態へ遷移（これは第２スイッチ５２による第１状態から第２状態への切換と見ることができる）の後に、第１スイッチ５１が非導通状態から導通状態へと遷移している。第１スイッチ５１、第２スイッチ５２のこのような動作により、両者が導通する状態が回避される。 However, in the first to eighth modifications, the transition of the second switch 52 from the conductive state to the non-conductive state is performed in the half cycle period (this can be regarded as switching from the first state to the second state by the second switch 52). After the first switch 51 has transitioned from the non-conductive state to the conductive state. By such operations of the first switch 51 and the second switch 52, a state in which both are conducted is avoided.
　しかし波形Ｇ６に現れるように、第２スイッチ５２が非導通状態となってから第１スイッチ５１が導通状態となるまでの間で、入力電流Ｉａの絶対値は減少し、力率が悪化する。 However, as shown in the waveform G6, the absolute value of the input current Ia decreases and the power factor deteriorates between the time when the second switch 52 is turned off and the time when the first switch 51 is turned on.
　図１６は第１、第２、第５、第７の変形（図７、図８、図１１、図１３）のいずれに対しても適用可能な更なる変形たる第９の変形にかかる構成を示す回路図である。図１７は第３、第４、第６、第８の変形（図９、図１０、図１２、図１４）で示されたいずれの変形に対しても適用可能な更なる変形たる第１０の変形にかかる構成を示す回路図である。但し、図１６は第２スイッチ５２、コンデンサ２２、ダイオード１３，１４が接続される近傍のみを取り出して部分的に、図１７は第２スイッチ５２、コンデンサ２１、ダイオード１１，１２が接続される近傍のみを取り出して部分的に、それぞれ示されている。 FIG. 16 shows a configuration according to a ninth modification, which is a further modification applicable to any of the first, second, fifth, and seventh modifications (FIGS. 7, 8, 11, and 13). FIG. FIG. 17 shows a tenth modification which is a further modification applicable to any of the modifications shown in the third, fourth, sixth, and eighth modifications (FIGS. 9, 10, 12, and 14). It is a circuit diagram which shows the structure concerning a deformation | transformation. However, FIG. 16 shows only the vicinity where the second switch 52, the capacitor 22, and the diodes 13 and 14 are connected, and FIG. 17 shows the vicinity where the second switch 52, the capacitor 21, and the diodes 11 and 12 are connected. Only a partial takeout is shown, respectively.
　また図１６において括弧で囲んで示されたリアクトル７ｂは、図１６の構成を第７の変形（図１３）にかかる構成に適用する場合に存在し、第１、第２、第５の変形（図７、図８、図１１）にかかる構成に適用する場合には存在せず、単なる配線である。同様に、図１７において括弧で囲んで示されたリアクトル７ａは、図１７の構成を第８の変形（図１４）にかかる構成に適用する場合に存在し、第３，第４，第６の変形（図９、図１０、図１２）にかかる構成に適用する場合には存在せず、単なる配線である。 In addition, the reactor 7b shown in parentheses in FIG. 16 exists when the configuration of FIG. 16 is applied to the configuration according to the seventh modification (FIG. 13), and the first, second, and fifth modifications ( When this is applied to the configuration according to FIGS. 7, 8, and 11), it does not exist and is merely a wiring. Similarly, the reactor 7a shown in parentheses in FIG. 17 exists when the configuration of FIG. 17 is applied to the configuration according to the eighth modification (FIG. 14), and the third, fourth, sixth It does not exist when applied to the configuration according to the modification (FIGS. 9, 10, and 12), and is merely a wiring.
　第９の変形（図１６）にかかる構成では、リアクトル７ｂが存在する場合もしない場合も、ダイオード５２ｅが出力端１８と接続点２３との間でコンデンサ２２と直列に接続される。ダイオード５２ｅの順方向はコンデンサ２２を充電する電流が流れる方向、つまりコンデンサ２２から出力端１８へ向かう方向と一致する。 In the configuration according to the ninth modification (FIG. 16), the diode 52e is connected in series with the capacitor 22 between the output end 18 and the connection point 23, whether or not the reactor 7b is present. The forward direction of the diode 52 e coincides with the direction in which a current for charging the capacitor 22 flows, that is, the direction from the capacitor 22 toward the output terminal 18.
　リアクトル７ｂが存在する場合には、ダイオード５２ｅは出力端１８と接続点２３との間で、リアクトル７ｂとコンデンサ２２とに挟まれてリアクトル７ｂとコンデンサ２２とに直列に接続される。ダイオード５２ｅは出力端１８と共にリアクトル７ｂを挟む。 When the reactor 7b exists, the diode 52e is sandwiched between the reactor 7b and the capacitor 22 between the output end 18 and the connection point 23, and is connected in series with the reactor 7b and the capacitor 22. The diode 52e sandwiches the reactor 7b together with the output end 18.
　第１０の変形（図１７）にかかる構成では、リアクトル７ａが存在する場合もしない場合も、ダイオード５２ｄが出力端１７と接続点２３との間でコンデンサ２１と直列に接続される。ダイオード５２ｄの順方向はコンデンサ２１を充電する電流が流れる方向、つまり出力端１７からコンデンサ２１へ向かう方向と一致する。 In the configuration according to the tenth modification (FIG. 17), the diode 52d is connected in series with the capacitor 21 between the output end 17 and the connection point 23 whether or not the reactor 7a is present. The forward direction of the diode 52d coincides with the direction in which the current for charging the capacitor 21 flows, that is, the direction from the output end 17 toward the capacitor 21.
　リアクトル７ａが存在する場合には、ダイオード５２ｄは出力端１７と接続点２３との間で、リアクトル７ａとコンデンサ２１とに挟まれてリアクトル７ａとコンデンサ２１とに直列に接続される。ダイオード５２ｄは出力端１７と共にリアクトル７ａを挟む。 When the reactor 7a exists, the diode 52d is sandwiched between the reactor 7a and the capacitor 21 between the output end 17 and the connection point 23, and is connected in series with the reactor 7a and the capacitor 21. The diode 52 d sandwiches the reactor 7 a together with the output end 17.
　よって第９の変形、及び第１０の変形では、第１スイッチ５１及び第２スイッチ５２の両方が導通した場合でも、コンデンサ２１，２２の放電経路には放電電流の向きとは逆方向のダイオードが介在する。従って、第２の実施の形態における第３動作を実行しても、第３の実施の形態における第３動作を実行しても、コンデンサ２１，２２の放電が阻止される。 Therefore, in the ninth modification and the tenth modification, even when both the first switch 51 and the second switch 52 are turned on, a diode in the direction opposite to the direction of the discharge current is provided in the discharge path of the capacitors 21 and 22. Intervene. Therefore, even if the third operation in the second embodiment is executed or the third operation in the third embodiment is executed, discharging of the capacitors 21 and 22 is prevented.
　なお、第５の変形（図１１）、第６の変形（図１２）にかかる構成と比較すると、第７の変形（図１３）、第８の変形（図１４）にかかる構成は、図１６、図１７に示された変形の適用の有無にかかわらず、第１スイッチ５１が導通して倍電圧整流が行われる際にリアクトル７ｂあるいはリアクトル７ａも必要となってしまう観点で不利である。 Compared with the configuration according to the fifth modification (FIG. 11) and the sixth modification (FIG. 12), the configuration according to the seventh modification (FIG. 13) and the eighth modification (FIG. 14) is as shown in FIG. Regardless of whether or not the modification shown in FIG. 17 is applied, it is disadvantageous in that the reactor 7b or the reactor 7a is also required when the first switch 51 is turned on and voltage doubler rectification is performed.
　図１８は第１１の変形にかかる構成を示す回路図である。第２スイッチ５２は、スイッチ要素５２ｇ，５２ｈを有する。スイッチ要素５２ｇは出力端１７と入力端１５との間に接続され、スイッチ要素５２ｈは出力端１８と入力端１５との間に接続される。かかる第２スイッチ５２それ自体は例えば特許文献６で紹介されている。 FIG. 18 is a circuit diagram showing a configuration according to the eleventh modification. The second switch 52 includes switch elements 52g and 52h. The switch element 52 g is connected between the output end 17 and the input end 15, and the switch element 52 h is connected between the output end 18 and the input end 15. The second switch 52 itself is introduced in, for example, Patent Document 6.
　ここではスイッチ要素５２ｇ，５２ｈはいずれもＩＧＢＴで構成される場合が例示される。具体的には、スイッチ要素５２ｇは出力端１７に接続されたコレクタと入力端１５に接続されたエミッタとを有するＩＧＢＴで実現され、スイッチ要素５２ｈは出力端１８に接続されたエミッタと入力端１５に接続されたコレクタとを有するＩＧＢＴで実現される場合が例示される。 Here, a case where both the switch elements 52g and 52h are formed of IGBTs is exemplified. Specifically, the switch element 52 g is realized by an IGBT having a collector connected to the output end 17 and an emitter connected to the input end 15, and the switch element 52 h is an emitter connected to the output end 18 and the input end 15. The case where it implement | achieves by IGBT which has a collector connected to is illustrated.
　スイッチ要素５２ｇが導通することで出力端１７から入力端１５へ電流を流すことができる。スイッチ要素５２ｈが導通することで入力端１５から出力端１８へ電流を流すことができる。 The current can flow from the output end 17 to the input end 15 when the switch element 52g is turned on. A current can flow from the input end 15 to the output end 18 by turning on the switch element 52h.
　入力端１５の電位が入力端１６の電位よりも高い半周期期間においては、スイッチ要素５２ｈが導通することにより、リアクトル７に流れる電流（ここでは入力電流Ｉａ）はスイッチ要素５２ｈ及びダイオード１４を経由して流れる。よってこの電流が流れる経路にはコンデンサ２１，２２が含まれず、第１状態が実現される。 In a half cycle period in which the potential of the input terminal 15 is higher than the potential of the input terminal 16, the switch element 52h conducts, so that the current flowing through the reactor 7 (here, the input current Ia) passes through the switch element 52h and the diode 14. Then flow. Therefore, capacitors 21 and 22 are not included in the path through which this current flows, and the first state is realized.
　また当該半周期期間においてスイッチ要素５２ｈが非導通となることにより、リアクトル７に流れる電流の経路には少なくともコンデンサ２１が含まれ、第２状態が実現される。第１スイッチ５１が導通していれば当該経路にはコンデンサ２１が含まれ、第１スイッチ５１が非導通であれば当該経路にはコンデンサ２１，２２が含まれる。 In addition, since the switch element 52h becomes non-conductive during the half cycle period, at least the capacitor 21 is included in the path of the current flowing through the reactor 7, and the second state is realized. If the first switch 51 is conductive, the path includes the capacitor 21, and if the first switch 51 is non-conductive, the path includes the capacitors 21, 22.
　つまり当該半周期期間においてスイッチ要素５２ｈは第１状態と第２状態との切換を行うと言える。かかる切換はスイッチ要素５２ｇの導通／非導通に依存しない。 That is, it can be said that the switch element 52h switches between the first state and the second state in the half cycle period. Such switching does not depend on conduction / non-conduction of the switch element 52g.
　同様に、入力端１５の電位が入力端１６の電位よりも低い半周期期間においては、スイッチ要素５２ｇが導通することにより、リアクトル７に流れる電流はスイッチ要素５２ｇ及びダイオード１２を経由して流れる。よってこの電流が流れる経路にはコンデンサ２１，２２が含まれず、第１状態が実現される。 Similarly, in a half cycle period in which the potential of the input terminal 15 is lower than the potential of the input terminal 16, the switch element 52g conducts, whereby the current flowing through the reactor 7 flows through the switch element 52g and the diode 12. Therefore, capacitors 21 and 22 are not included in the path through which this current flows, and the first state is realized.
　また当該半周期期間においてスイッチ要素５２ｇが非導通となることにより、リアクトル７に流れる電流の経路には少なくともコンデンサ２２が含まれ、第２状態が実現される。第１スイッチ５１が導通していれば当該経路にはコンデンサ２２が含まれ、第１スイッチ５１が非導通であれば当該経路にはコンデンサ２１，２２が含まれる。 In addition, since the switch element 52g becomes non-conductive during the half-cycle period, at least the capacitor 22 is included in the path of the current flowing through the reactor 7, and the second state is realized. If the first switch 51 is conductive, the path includes the capacitor 22, and if the first switch 51 is non-conductive, the path includes the capacitors 21 and 22.
　つまり当該半周期期間においてスイッチ要素５２ｇは第１状態と第２状態との切換を行うと言える。かかる切換はスイッチ要素５２ｈの導通／非導通に依存しない。 That is, it can be said that the switch element 52g performs switching between the first state and the second state in the half cycle period. Such switching does not depend on conduction / non-conduction of the switch element 52h.
　以上のことから、第１１の変形（図１８）にかかる構成においても、第２スイッチ５２が第１状態と第２状態との切換を行うと言える。 From the above, it can be said that the second switch 52 switches between the first state and the second state even in the configuration according to the eleventh modification (FIG. 18).
　上述のようにスイッチ要素５２ｇ，５２ｈの両方が導通することはないので、第１スイッチ５１が導通しなければコンデンサ２１，２２は放電しない。 As described above, since both the switch elements 52g and 52h are not conducted, the capacitors 21 and 22 are not discharged unless the first switch 51 is conducted.
　しかしながら、入力端１５の電位が入力端１６の電位よりも高い半周期期間においてスイッチ要素５２ｈが導通し、更に第１スイッチ５１が導通すると、スイッチ要素５２ｈと第１スイッチ５１を介して、コンデンサ２２を放電する電流が入力端１５，１６から電源９，リアクトル７を介して流れる。同様に、入力端１５の電位が入力端１６の電位よりも低い半周期期間においてスイッチ要素５２ｇが導通し、更に第１スイッチ５１が導通すると、スイッチ要素５２ｇと第１スイッチ５１を介して、コンデンサ２１を放電する電流が入力端１５，１６から電源９，リアクトル７を介して流れる。これらの放電電流によってリアクトル７に流れる電流（すなわち入力電流Ｉａ）は増大するが、かかる増大は負荷電力に寄与するものではない。 However, when the switch element 52h conducts in a half-cycle period in which the potential of the input terminal 15 is higher than the potential of the input terminal 16, and the first switch 51 further conducts, the capacitor 22 passes through the switch element 52h and the first switch 51. Is discharged from the input terminals 15 and 16 via the power source 9 and the reactor 7. Similarly, when the switch element 52g conducts in a half cycle period in which the potential of the input terminal 15 is lower than the potential of the input terminal 16, and the first switch 51 further conducts, the capacitor is connected via the switch element 52g and the first switch 51. A current for discharging the electric current 21 flows from the input terminals 15 and 16 through the power source 9 and the reactor 7. Although the current flowing through the reactor 7 (that is, the input current Ia) increases due to these discharge currents, the increase does not contribute to the load power.
　従ってコンデンサ２１，２２の放電を阻止し、ひいては負荷電力に寄与しない入力電流Ｉａの増大を回避するためには、第１スイッチ５１と第２スイッチ５２のいずれもが導通状態にある状況（すなわち第１スイッチ５１とスイッチ要素５２ｇのいずれもが導通状態にある状況、あるいは第１スイッチ５１とスイッチ要素５２ｈのいずれもが導通状態にある状況）は避けられることが望ましい。 Therefore, in order to prevent the discharge of the capacitors 21 and 22 and thus avoid the increase in the input current Ia that does not contribute to the load power, the situation where both the first switch 51 and the second switch 52 are in the conductive state (that is, the first switch). It is desirable to avoid a situation in which both the first switch 51 and the switch element 52g are in a conductive state, or a situation in which both the first switch 51 and the switch element 52h are in a conductive state.
　図１９は第１１の変形（図１８）における電力変換装置１００の動作を例示するグラフであり、図２に対応する。波形Ｇ０，Ｇ６、記号Ｓ１は、図１５を参照して行った説明で用いられた定義と同義である。記号Ｓ２ｇ，Ｓ２ｈは、第３動作における、それぞれスイッチ要素５２ｇ，５２ｈの導通状態／非導通状態を、ＯＮ／ＯＦＦで示す。 FIG. 19 is a graph illustrating the operation of the power conversion apparatus 100 in the eleventh modification (FIG. 18), and corresponds to FIG. Waveforms G0 and G6 and symbol S1 are synonymous with the definitions used in the description made with reference to FIG. Symbols S2g and S2h indicate the ON / OFF states of the switch elements 52g and 52h in the third operation, respectively.
　第１１の変形においても、第３動作では第１スイッチ５１が、交流電圧Ｖａの半周期期間に一回、導通状態から非導通状態へと遷移する。また第２スイッチ５２は（スイッチ要素５２ｇ，５２ｈを纏めて）全体としてみれば、半周期期間に少なくとも一回は導通状態から非導通状態へ遷移する。但し図１５で示された場合と類似して、半周期期間において、第２スイッチ５２の導通状態から非導通状態へ遷移（これは第２スイッチ５２による第１状態から第２状態への切換と見ることができる）の後に、第１スイッチ５１が非導通状態から導通状態へと遷移している。第１スイッチ５１、第２スイッチ５２のこのような動作により、両者が導通する状態が回避される。 Also in the eleventh modification, in the third operation, the first switch 51 transits from the conductive state to the non-conductive state once in a half cycle period of the AC voltage Va. The second switch 52 transitions from the conducting state to the non-conducting state at least once in a half cycle period (collectively, the switch elements 52g and 52h). However, similar to the case shown in FIG. 15, in the half cycle period, the second switch 52 transitions from the conducting state to the non-conducting state (this is the switching from the first state to the second state by the second switch 52). After the first switch 51 has transitioned from a non-conducting state to a conducting state. By such operations of the first switch 51 and the second switch 52, a state in which both are conducted is avoided.
　図２０は第１２の変形にかかる構成を示す回路図であり、第１１の変形にかかる構成に対してダイオード５２ｄ，５２ｅが追加された構成を有している。ダイオード５２ｅは出力端１８と接続点２３との間で出力端１８とコンデンサ２２とに挟まれてコンデンサ２２と直列に接続され、その順方向がコンデンサ２２を充電する電流が流れる方向と一致する。具体的にはダイオード５２ｅのアノードは接続点２３と反対側でコンデンサ２２に接続され、ダイオード５２ｅのカソードは出力端１８に接続される。ダイオード５２ｄは出力端１７と接続点２３との間で出力端１７とコンデンサ２１とに挟まれてコンデンサ２１と直列に接続され、その順方向がコンデンサ２１を充電する電流が流れる方向と一致する。具体的にはダイオード５２ｄのカソードは接続点２３と反対側でコンデンサ２１に接続され、ダイオード５２ｄのアノードは出力端１７に接続される。 FIG. 20 is a circuit diagram showing a configuration according to the twelfth modification, in which diodes 52d and 52e are added to the configuration according to the eleventh modification. The diode 52 e is sandwiched between the output end 18 and the capacitor 22 between the output end 18 and the connection point 23 and connected in series with the capacitor 22, and the forward direction thereof coincides with the direction in which a current for charging the capacitor 22 flows. Specifically, the anode of the diode 52 e is connected to the capacitor 22 on the side opposite to the connection point 23, and the cathode of the diode 52 e is connected to the output terminal 18. The diode 52 d is sandwiched between the output end 17 and the capacitor 21 between the output end 17 and the connection point 23 and connected in series with the capacitor 21, and the forward direction thereof coincides with the direction in which the current for charging the capacitor 21 flows. Specifically, the cathode of the diode 52 d is connected to the capacitor 21 on the side opposite to the connection point 23, and the anode of the diode 52 d is connected to the output terminal 17.
　第１２の変形によれば、第９の変形（図１６）及び第１０の変形（図１７）と同様に、第２の実施の形態における第３動作を実行しても、第３の実施の形態における第３動作を実行しても、コンデンサ２１，２２の放電が阻止される。 According to the twelfth modification, as in the ninth modification (FIG. 16) and the tenth modification (FIG. 17), even if the third operation in the second embodiment is executed, Even if the 3rd operation | movement in a form is performed, discharge of the capacitors 21 and 22 is blocked | prevented.
　図２１は第１２の変形（図２０）における電力変換装置１００の動作を例示するグラフであり、図１９に対応する。波形Ｇ０，Ｇ１，Ｇ２，Ｇ３、記号Ｓ１は、図２を参照して行った説明で用いられた定義と同義であり、記号Ｓ２ｇ，Ｓ２ｈは、図１９を参照して行った説明で用いられた定義と同義である。第１２の変形では波形Ｇ３で示される様に、第１１の変形での波形Ｇ６と比較して、力率が改善される。 FIG. 21 is a graph illustrating the operation of the power conversion apparatus 100 in the twelfth modification (FIG. 20), and corresponds to FIG. Waveforms G0, G1, G2, G3 and symbol S1 are synonymous with the definitions used in the description made with reference to FIG. 2, and symbols S2g and S2h are used in the description made with reference to FIG. It is synonymous with the definition. In the twelfth modification, as indicated by the waveform G3, the power factor is improved as compared with the waveform G6 in the eleventh modification.
　閾値についての変形．
　図２２は、負荷電力と入力電流Ｉａとの関係を示すグラフである。上述の様に負荷電力は変換電力の一例であり、これを入力電力と読み替えても以下の説明は妥当である。 A variation on the threshold.
FIG. 22 is a graph showing the relationship between the load power and the input current Ia. As described above, the load power is an example of the converted power, and the following explanation is appropriate even if it is read as input power.
　曲線Ｃ１，Ｃ２，Ｃ３はそれぞれ第１動作、第２動作、第３動作における上記関係を破線で示す。上述の様に第２動作では第１動作よりも、第３動作では第２動作よりも、それぞれ力率が改善（増加）する。 Curves C1, C2, and C3 indicate the above relationships in the first operation, the second operation, and the third operation with broken lines, respectively. As described above, the power factor is improved (increased) in the second operation than in the first operation, and in the third operation than in the second operation.
　電源９は通常、商用電源であって交流電圧Ｖａの実効値が安定した一定電圧で供給されるので、負荷電力は入力電流Ｉａと力率との積に比例する。よって負荷電力が等しければ曲線Ｃ１よりも曲線Ｃ２が、曲線Ｃ２よりも曲線Ｃ３が、それぞれ低い入力電流Ｉａを示す。また、同じ動作状態であっても、入力電流Ｉａが大きいほうが一般に力率は高くなる。 Since the power source 9 is usually a commercial power source and is supplied at a constant voltage at which the effective value of the AC voltage Va is stable, the load power is proportional to the product of the input current Ia and the power factor. Therefore, if the load power is equal, the curve C2 is lower than the curve C1, and the curve C3 is lower than the curve C2. Even in the same operating state, the power factor generally increases as the input current Ia increases.
　曲線Ｇ８は、上述の実施の形態あるいは変形において、負荷電力が第１閾値Ｗ１以上であれば第３動作を、第１閾値Ｗ１よりも小さい第２閾値Ｗ２以上であって第１閾値Ｗ１未満であれば第２動作を、第２閾値Ｗ２未満であれば第１動作を、それぞれ電力変換装置１００が採用するときの負荷電力と入力電流Ｉａとの関係を示す。曲線Ｇ８は負荷電力の大きさが第２閾値Ｗ２未満において曲線Ｃ１と、第２閾値Ｗ２以上第１閾値未満において曲線Ｃ２と、第１閾値Ｗ１以上において曲線Ｃ３と、それぞれ一致する。 In the above-described embodiment or modification, the curve G8 indicates that the third operation is performed when the load power is equal to or greater than the first threshold value W1. The relationship between the load power and the input current Ia when the power conversion device 100 adopts the second operation if it is present, and the first operation if it is less than the second threshold value W2, respectively. The curve G8 coincides with the curve C1 when the magnitude of the load power is less than the second threshold W2, the curve C2 when the magnitude of the load power is less than the second threshold W2 and less than the first threshold, and the curve C3 when the magnitude of the load power is more than the first threshold W1.
　負荷電力が第２閾値Ｗ２未満において増大すると入力電流Ｉａが上昇する。そして負荷電力が増大して第２閾値Ｗ２に至ると、電力変換装置１００の動作が第１動作から第２動作に遷移することにより、入力電流Ｉａは値Ｉ２ｕから値Ｉ２ｄへと低下する。これは上記の遷移によって力率が改善される（増加する）からである。 When the load power increases below the second threshold W2, the input current Ia increases. When the load power increases and reaches the second threshold value W2, the operation of the power conversion device 100 transitions from the first operation to the second operation, so that the input current Ia decreases from the value I2u to the value I2d. This is because the power factor is improved (increased) by the above transition.
　負荷電力が、第１閾値Ｗ１未満において更に増大すると、入力電流Ｉａも更に上昇する。そして負荷電力が増大して第１閾値Ｗ１に至ると、電力変換装置１００の動作が第２動作から第３動作に遷移することにより、入力電流Ｉａは値Ｉ１ｕから値Ｉ１ｄへと低下する。 When the load power further increases below the first threshold value W1, the input current Ia further increases. When the load power increases and reaches the first threshold value W1, the operation of the power conversion device 100 transitions from the second operation to the third operation, so that the input current Ia decreases from the value I1u to the value I1d.
　負荷電力が第１閾値Ｗ１以上において更に増大すると、入力電流Ｉａも更に上昇する。 When the load power further increases above the first threshold value W1, the input current Ia further increases.
　よって負荷電力が増大する場合には、電力変換装置１００の動作を第１動作、第２動作、第３動作の間で遷移させるための基準として、負荷電力に代えて入力電流Ｉａを採用することができる。 Therefore, when the load power increases, the input current Ia is adopted instead of the load power as a reference for transitioning the operation of the power conversion apparatus 100 between the first operation, the second operation, and the third operation. Can do.
　具体的には入力電流Ｉａが上昇しても値Ｉ２ｕ未満であれば、電力変換装置１００は第１動作を行う。つまり第１スイッチ５１は非導通状態にあり、第２スイッチ５２は切換を行わずに第２状態が実現される。 Specifically, if the input current Ia increases but is less than the value I2u, the power conversion apparatus 100 performs the first operation. That is, the first switch 51 is in a non-conductive state, and the second switch 52 is not switched and the second state is realized.
　入力電流Ｉａが上昇して値Ｉ２ｕ未満から値Ｉ２ｕに至れば電力変換装置１００は第２動作を行う。つまり第２スイッチ５２は切換を行わずに第２状態が実現されたまま、第１スイッチ５１が半周期期間に一回、導通状態から非導通状態へ遷移する。 When the input current Ia rises to reach the value I2u from less than the value I2u, the power conversion device 100 performs the second operation. That is, the second switch 52 is not switched and the first switch 51 changes from the conductive state to the non-conductive state once in a half cycle period while the second state is realized.
　入力電流Ｉａが上昇して値Ｉ１ｕ未満から値Ｉ１ｕに至れば電力変換装置１００は第３動作を行う。つまり第１スイッチ５１が半周期期間に一回、導通状態から非導通状態へ遷移し、第２スイッチ５２が第１状態から第２状態への切換を、半周期期間に少なくとも一回、それぞれ行う。入力電流Ｉａが更に上昇しても第３動作が維持される。 When the input current Ia rises to reach the value I1u from less than the value I1u, the power conversion apparatus 100 performs the third operation. That is, the first switch 51 transitions from the conducting state to the non-conducting state once in a half cycle period, and the second switch 52 performs switching from the first state to the second state at least once in the half cycle period. . Even if the input current Ia further increases, the third operation is maintained.
　負荷電力が減少する場合も同様である。負荷電力が減少して第１閾値Ｗ１に至ると、電力変換装置１００の動作が第３動作から第２動作に遷移することにより、入力電流Ｉａは値Ｉ１ｄから値Ｉ１ｕへと上昇する。これは上記の遷移によって力率が悪化（低下）するからである。 The same applies when the load power decreases. When the load power decreases and reaches the first threshold value W1, the operation of the power conversion device 100 transitions from the third operation to the second operation, whereby the input current Ia increases from the value I1d to the value I1u. This is because the power factor is deteriorated (decreased) by the above transition.
　負荷電力が第２閾値Ｗ２以上において更に減少すると、入力電流Ｉａも更に低下する。そして負荷電力が減少して第２閾値Ｗ２に至ると、電力変換装置１００の動作が第２動作から第１動作に遷移することにより、入力電流Ｉａは値Ｉ２ｄから値Ｉ２ｕへと上昇する。 When the load power further decreases at the second threshold W2 or more, the input current Ia further decreases. When the load power decreases and reaches the second threshold value W2, the operation of the power conversion device 100 transitions from the second operation to the first operation, whereby the input current Ia increases from the value I2d to the value I2u.
　負荷電力が、第１閾値Ｗ１未満において更に減少すると、入力電流Ｉａも更に低下する。 When the load power further decreases below the first threshold W1, the input current Ia further decreases.
　よって負荷電力が減少する場合にも、電力変換装置１００の動作を第１動作、第２動作、第３動作の間で遷移させるための基準として、負荷電力に代えて入力電流Ｉａを採用することができる。 Therefore, even when the load power decreases, the input current Ia is adopted instead of the load power as a reference for transitioning the operation of the power conversion apparatus 100 between the first operation, the second operation, and the third operation. Can do.
　具体的には入力電流Ｉａが低下しても値Ｉ１ｄ以上であれば、第３動作が維持される。更に入力電流Ｉａが低下して値Ｉ１ｄに至れば電力変換装置１００の動作が第３動作から第２動作に遷移する。更に入力電流Ｉａが低下して値Ｉ２ｄに至れば電力変換装置１００の動作が第２動作から第１動作に遷移する。更に入力電流Ｉａが低下しても第１動作が維持される。 Specifically, even if the input current Ia decreases, the third operation is maintained as long as it is equal to or greater than the value I1d. When the input current Ia further decreases to reach the value I1d, the operation of the power conversion device 100 transitions from the third operation to the second operation. When the input current Ia further decreases to reach the value I2d, the operation of the power conversion apparatus 100 transitions from the second operation to the first operation. Further, the first operation is maintained even when the input current Ia decreases.
　以上のことから、電力変換装置１００の動作は、入力電流Ｉａで負荷電力を代えた判断で、第１スイッチ５１及び第２スイッチ５２の動作が制御されてもよい。なお、入力電流Ｉａが一旦上昇して第２動作から第３動作に遷移し、その後に入力電流Ｉａが低下したときに第３動作から第２動作に遷移させることを考慮すれば、Ｉ１ｕ＞Ｉ１ｄの関係があることが望ましい。同様にしてＩ２ｕ＞Ｉ２ｄの関係があることが望ましい。また図２２ではＩ１ｄ＞Ｉ２ｕの関係がある場合を例示した。 From the above, the operations of the first switch 51 and the second switch 52 may be controlled based on the determination that the load power is changed by the input current Ia. In consideration of transition from the third operation to the second operation when the input current Ia rises and then transitions from the second operation to the third operation, and then the input current Ia decreases, I1u> I1d It is desirable that there is a relationship. Similarly, it is desirable that there is a relationship of I2u> I2d. FIG. 22 illustrates the case where there is a relationship of I1d> I2u.
　よって例えば入力電流Ｉａが値Ｉ１ｕ以上のときには第３動作を、値Ｉ２ｕ以上値Ｉ１ｄ未満のときには第２動作を、値Ｉ２ｄ未満のときには第１動作を、それぞれ電力変換装置１００の動作として採用するということができる。 Therefore, for example, when the input current Ia is equal to or greater than the value I1u, the third operation is employed as the operation of the power conversion apparatus 100, when the input current Ia is equal to or greater than the value I2u and less than the value I1d, and when the input current Ia is less than the value I2d. be able to.
　動作の遷移の根拠となる入力電流Ｉａの閾値には、負荷電力の第１閾値Ｗ１に対応して一対の値Ｉ１ｕ，Ｉ１ｄが、第２閾値Ｗ２に対して、一対の値Ｉ２ｕ，Ｉ２ｄが、それぞれ採用される。これは次のように考えることもできる：入力電流Ｉａの閾値は、入力電流Ｉａが上昇する場合には第１閾値Ｗ１に対応して値Ｉ１ｕが、第２閾値Ｗ２に対応して値Ｉ２ｕが、それぞれ採用され；入力電流Ｉａが低下する場合には第１閾値Ｗ１に対応して値Ｉ１ｄが、第２閾値Ｗ２に対応して値Ｉ２ｄが、それぞれ採用される。 The threshold value of the input current Ia that is the basis of the operation transition is a pair of values I1u and I1d corresponding to the first threshold value W1 of the load power, and a pair of values I2u and I2d with respect to the second threshold value W2. Each is adopted. This can also be considered as follows: When the input current Ia increases, the threshold value of the input current Ia is a value I1u corresponding to the first threshold value W1, and a value I2u corresponding to the second threshold value W2. When the input current Ia decreases, a value I1d corresponding to the first threshold value W1 and a value I2d corresponding to the second threshold value W2 are respectively adopted.
　換言すれば、電力変換装置１００の動作を決定するための入力電流Ｉａの閾値は、入力電流Ｉａが上昇する場合と低下する場合とで異なりヒステリシスを呈するということもできる。 In other words, the threshold value of the input current Ia for determining the operation of the power conversion device 100 may be different depending on whether the input current Ia increases or decreases and exhibits hysteresis.
　なお、負荷電力の第１閾値及び第２閾値もヒステリシスを呈してもよい。図２３はかかるヒステリシスが導入された場合の負荷電力と入力電流Ｉａとの関係を示すグラフである。曲線Ｃ１，Ｃ２，Ｃ３はいずれも図２２で説明したものである。曲線Ｇ９は、上述の実施の形態あるいは変形において、負荷電力が第１閾値以上であれば第３動作を、第１閾値よりも小さい第２閾値以上であって第１閾値未満であれば第２動作を、第２閾値未満であれば第１動作を、それぞれ電力変換装置１００が採用するときの負荷電力と入力電流Ｉａとの関係を示す。 Note that the first threshold value and the second threshold value of the load power may also exhibit hysteresis. FIG. 23 is a graph showing the relationship between the load power and the input current Ia when such hysteresis is introduced. Curves C1, C2, and C3 are all described with reference to FIG. In the above-described embodiment or modification, the curve G9 indicates the third operation if the load power is greater than or equal to the first threshold, and the second action if the load power is greater than or equal to the second threshold smaller than the first threshold and less than the first threshold. The relationship between the load power and the input current Ia when the power conversion device 100 employs the first operation if the operation is less than the second threshold is shown.
　値Ｗ１ｕ，Ｗ２ｕはそれぞれ、負荷電力が増大するときの第１閾値及び第２閾値であり、値Ｗ１ｄ，Ｗ２ｄはそれぞれ、負荷電力が減少するときの第１閾値及び第２閾値である。図２３ではＷ１ｕ＞Ｗ１ｄ＞Ｗ２ｕ＞Ｗ２ｄの関係がある場合を例示する。 The values W1u and W2u are a first threshold value and a second threshold value when the load power increases, respectively, and the values W1d and W2d are a first threshold value and a second threshold value when the load power decreases, respectively. FIG. 23 illustrates a case where there is a relationship of W1u> W1d> W2u> W2d.
　具体的には、負荷電力が増大するとき、負荷電力が値Ｗ２ｕ未満であれば電力変換装置１００は第１動作を行い、曲線Ｇ９は曲線Ｃ１と一致する。負荷電力が増大して値Ｗ２ｕ未満から値Ｗ１ｕに至るまで電力変換装置１００は第２動作を行い、曲線Ｇ９は曲線Ｃ２と一致する。よって負荷電力が増大するときは曲線Ｇ９は負荷電力が値Ｗ２ｕをとるときに経路Ｇｕ２を介して曲線Ｃ１から曲線Ｃ２へと移る。負荷電力が増大して値Ｗ１ｕ未満から値Ｗ１ｕ以上になれば電力変換装置１００は第３動作を行い、曲線Ｇ９は曲線Ｃ３と一致する。よって負荷電力が増大するときは曲線Ｇ９は負荷電力が値Ｗ１ｕをとるときに経路Ｇｕ１を介して曲線Ｃ２から曲線Ｃ３へと移る。 Specifically, when the load power increases, if the load power is less than the value W2u, the power conversion apparatus 100 performs the first operation, and the curve G9 matches the curve C1. The power converter 100 performs the second operation until the load power increases from less than the value W2u to the value W1u, and the curve G9 matches the curve C2. Therefore, when the load power increases, the curve G9 moves from the curve C1 to the curve C2 via the route Gu2 when the load power takes the value W2u. If the load power increases and becomes less than the value W1u to the value W1u or more, the power conversion apparatus 100 performs the third operation, and the curve G9 matches the curve C3. Therefore, when the load power increases, the curve G9 moves from the curve C2 to the curve C3 via the route Gu1 when the load power takes the value W1u.
　負荷電力が減少するとき、負荷電力が値Ｗ１ｄ以上であれば電力変換装置１００は第３動作を行い、曲線Ｇ９は曲線Ｃ３と一致する。負荷電力が減少して値Ｗ１ｄ未満から値Ｗ２ｄに至るまで電力変換装置１００は第２動作を行い、曲線Ｇ９は曲線Ｃ２と一致する。よって負荷電力が減少するときは曲線Ｇ９は負荷電力が値Ｗ１ｄをとるときに経路Ｇｄ１を介して曲線Ｃ３から曲線Ｃ２へと移る。負荷電力が減少して値Ｗ２ｄ未満となれば電力変換装置１００は第１動作を行い、曲線Ｇ９は曲線Ｃ１と一致する。よって負荷電力が減少するときは曲線Ｇ９は負荷電力が値Ｗ２ｄをとるときに経路Ｇｄ２を介して曲線Ｃ２から曲線Ｃ１へと移る。 When the load power decreases, if the load power is greater than or equal to the value W1d, the power conversion apparatus 100 performs the third operation, and the curve G9 matches the curve C3. The power converter 100 performs the second operation until the load power decreases from less than the value W1d to the value W2d, and the curve G9 matches the curve C2. Therefore, when the load power decreases, the curve G9 moves from the curve C3 to the curve C2 via the path Gd1 when the load power takes the value W1d. If the load power decreases and becomes less than the value W2d, power converter 100 performs the first operation, and curve G9 matches curve C1. Therefore, when the load power decreases, the curve G9 moves from the curve C2 to the curve C1 via the path Gd2 when the load power takes the value W2d.
　このように負荷電力の第１閾値、第２閾値がヒステリシスを有している場合にも、電力変換装置１００の動作を決定するために入力電流Ｉａと閾値との比較を行うことができる。具体的には、負荷電力が値Ｗ２ｕを採るときの第１動作における入力電流Ｉａを、入力電流Ｉａが上昇するときの第２閾値たる値Ｉ２ｕに、負荷電力が値Ｗ２ｄを採るときの第２動作における入力電流Ｉａを、入力電流Ｉａが低下するときの第２閾値たる値Ｉ２ｄに、負荷電力が値Ｗ１ｕを採るときの第２動作における入力電流Ｉａを、入力電流Ｉａが上昇するときの第１閾値たる値Ｉ１ｕに、負荷電力が値Ｗ１ｄを採るときの第３動作における入力電流Ｉａを、入力電流Ｉａが低下するときの第１閾値たる値Ｉ１ｄに、それぞれ採用することができる。 As described above, even when the first threshold value and the second threshold value of the load power have hysteresis, the input current Ia can be compared with the threshold value in order to determine the operation of the power converter 100. Specifically, the input current Ia in the first operation when the load power takes the value W2u is set to the value I2u that is the second threshold when the input current Ia rises, and the second when the load power takes the value W2d. The input current Ia in the operation is changed to a value I2d which is the second threshold when the input current Ia decreases, the input current Ia in the second operation when the load power takes the value W1u, and the second value when the input current Ia increases. The input current Ia in the third operation when the load power takes the value W1d can be adopted as the value I1u as the first threshold value, and the value I1d as the first threshold value when the input current Ia decreases.
　但し、入力電流Ｉａが一旦上昇してから低下する場合や、負荷電力が一旦増大してから減少する場合の、第１動作と第２動作との間の、あるいは第２動作と第３動作との間の遷移を行う観点からは、Ｗ１ｕ＞Ｗ１ｄ＞Ｗ２ｕ＞Ｗ２ｄの関係があることが望ましい。 However, when the input current Ia once increases and then decreases, or when the load power once increases and decreases, between the first operation and the second operation, or between the second operation and the third operation, From the viewpoint of making a transition between the two, it is desirable that there is a relationship of W1u> W1d> W2u> W2d.
　換言すれば、Ｉ１ｕ＞Ｉ１ｄであるだけではなく更に、第２動作において入力電流Ｉａが値Ｉ１ｕを採るときの負荷電力が、第３動作において入力電流Ｉａが値Ｉ１ｄを採るときの負荷電力よりも大きいことが望ましい。同様に、Ｉ２ｕ＞Ｉ２ｄであるだけではなく更に、第１動作において入力電流Ｉａが値Ｉ２ｕを採るときの負荷電力が、第２動作において入力電流Ｉａが値Ｉ２ｄを採るときの負荷電力よりも大きいことが望ましい。 In other words, not only I1u> I1d, but also the load power when the input current Ia takes the value I1u in the second operation is more than the load power when the input current Ia takes the value I1d in the third operation. Larger is desirable. Similarly, not only I2u> I2d, but also the load power when the input current Ia takes the value I2u in the first operation is larger than the load power when the input current Ia takes the value I2d in the second operation. It is desirable.
　上記の説明はＷ１＝Ｗ１ｕ＝Ｗ１ｄの関係がある場合にも、Ｗ２＝Ｗ２ｕ＝Ｗ２ｄの関係がある場合にも妥当することは明白である。また、Ｗ１＝Ｗ１ｕ＝Ｗ１ｄかつＷ２＝Ｗ２ｕ＝Ｗ２ｄの場合には、図２２を用いた説明と図２３とを用いた説明は一致することになる。更にＷ１＝Ｗ２として第２動作を用いずに第１動作と第３動作との間の遷移のみを許してもかまわないし、Ｗ１＞Ｗ２＝０として第１動作を用いずに第２動作と第３動作との間の遷移のみを許してもかまわない。 It is clear that the above description is valid both when there is a relationship of W1 = W1u = W1d and when there is a relationship of W2 = W2u = W2d. When W1 = W1u = W1d and W2 = W2u = W2d, the description using FIG. 22 and the description using FIG. 23 are the same. Furthermore, it is possible to allow only a transition between the first operation and the third operation without using the second operation with W1 = W2, or with the second operation without using the first operation with W1> W2 = 0. Only transitions between three actions may be allowed.
　上記の実施の形態、変形のいずれにおいても、第１スイッチ５１、第２スイッチ５２を、その動作に基づいて規定した。上記の実施の形態、変形のいずれもが、第１スイッチ５１の導通／非導通の動作と、第２スイッチ５２の導通／非導通の動作あるいは第２スイッチ５２による第１状態と第２状態との切換を制御する方法として把握されてもよい。 In any of the above embodiments and modifications, the first switch 51 and the second switch 52 are defined based on their operations. In any of the above-described embodiments and modifications, the conduction / non-conduction operation of the first switch 51, the conduction / non-conduction operation of the second switch 52, or the first state and the second state by the second switch 52 It may be grasped as a method for controlling the switching of.
　図２４は、第１スイッチ５１、第２スイッチ５２の動作を制御する構成を例示するブロック図である。簡単のため、電力変換装置１００の内部構成は省略し、第１スイッチ５１、第２スイッチ５２を簡略化して描いている。 FIG. 24 is a block diagram illustrating a configuration for controlling the operations of the first switch 51 and the second switch 52. For simplicity, the internal configuration of the power conversion apparatus 100 is omitted, and the first switch 51 and the second switch 52 are simplified.
　制御回路２００は第１スイッチ５１の動作を制御する信号Ｊ１、第２スイッチ５２を制御する信号Ｊ２を生成する。信号Ｊ１は第１スイッチ５１に、信号Ｊ２は第２スイッチ５２に、それぞれ与えられる。信号Ｊ１は例えば第１スイッチ５１について図１に示されたＩＧＢＴのゲートに与えられる。信号Ｊ２は例えば第２スイッチ５２について図１や図１１～図１４に示されたＩＧＢＴのゲートに与えられる。 The control circuit 200 generates a signal J1 for controlling the operation of the first switch 51 and a signal J2 for controlling the second switch 52. The signal J1 is supplied to the first switch 51, and the signal J2 is supplied to the second switch 52. The signal J1 is applied to the gate of the IGBT shown in FIG. The signal J2 is supplied to the gate of the IGBT shown in FIG. 1 or FIGS. 11 to 14 for the second switch 52, for example.
　あるいは信号Ｊ２はＩＧＢＴ５２ａ，５２ｉ（それぞれ図７、図９参照）のそれぞれのゲートに与えられる。あるいは信号Ｊ２はＩＧＢＴ５２ｂ，５２ｃ（図８参照）のそれぞれのゲートに共通して、あるいはＩＧＢＴ５２ｊ，５２ｆ（図１０参照）のそれぞれのゲートに共通して与えられる。あるいは信号Ｊ２はスイッチ要素５２ｇ，５２ｈ（図１８、図２０参照）を構成するＩＧＢＴのゲートに与えられ、これらのＩＧＢＴを互いに排他的にオンする（図１９、図２１の記号Ｓ２ｇ、Ｓ２ｈ参照）一対の信号である。 Alternatively, the signal J2 is applied to the gates of the IGBTs 52a and 52i (see FIGS. 7 and 9, respectively). Alternatively, the signal J2 is applied to the gates of the IGBTs 52b and 52c (see FIG. 8) or to the gates of the IGBTs 52j and 52f (see FIG. 10). Alternatively, the signal J2 is given to the gates of the IGBTs constituting the switch elements 52g and 52h (see FIGS. 18 and 20), and these IGBTs are turned on exclusively (see symbols S2g and S2h in FIGS. 19 and 21). A pair of signals.
　制御回路２００は、いずれも公知の技術で測定される交流電圧Ｖａ、入力電流Ｉａ、直流電圧Ｖｄ、電力変換装置１００から負荷３に供給される負荷電流Ｉｄの少なくともいずれか一つを入力する。 The control circuit 200 inputs at least one of an AC voltage Va, an input current Ia, a DC voltage Vd, and a load current Id that is supplied from the power converter 100 to the load 3 as measured by a known technique.
　変換電力として負荷電力を採用する場合、例えば制御回路２００には直流電圧Ｖｄと負荷電流Ｉｄが入力される。制御回路２００は負荷電力を計算し、負荷電力と第１閾値Ｗ１（あるいは値Ｗ１ｕ，Ｗ１ｄ）との比較、あるいは更に負荷電力と第２閾値Ｗ２（あるいは値Ｗ２ｕ，Ｗ２ｄ）との比較を行って、信号Ｊ１，Ｊ２を生成する。 When adopting load power as the conversion power, for example, the control circuit 200 receives the DC voltage Vd and the load current Id. The control circuit 200 calculates the load power and compares the load power with the first threshold value W1 (or values W1u and W1d), or further compares the load power with the second threshold value W2 (or values W2u and W2d). , Signals J1 and J2 are generated.
　変換電力として入力電力を採用する場合、例えば制御回路２００には交流電圧Ｖａと入力電流Ｉａが入力される。制御回路２００は入力電力を計算し、入力電力と第１閾値Ｗ１（あるいは値Ｗ１ｕ，Ｗ１ｄ）との比較、あるいは更に入力電力と第２閾値Ｗ２（あるいは値Ｗ２ｕ，Ｗ２ｄ）との比較を行って、信号Ｊ１，Ｊ２を生成する。 When the input power is adopted as the conversion power, for example, the control circuit 200 receives the AC voltage Va and the input current Ia. The control circuit 200 calculates the input power and compares the input power with the first threshold value W1 (or values W1u and W1d), or further compares the input power with the second threshold value W2 (or values W2u and W2d). , Signals J1 and J2 are generated.
　あるいは制御回路は入力電流Ｉａを入力し、入力電流Ｉａと値Ｉ１ｕ，Ｉ１ｄの少なくとも一方との比較、あるいは更に入力電流Ｉａと値Ｉ２ｕ，Ｉ２ｄの少なくとも一方との比較を行って、信号Ｊ１，Ｊ２を生成する。 Alternatively, the control circuit receives the input current Ia, compares the input current Ia with at least one of the values I1u and I1d, or further compares the input current Ia with at least one of the values I2u and I2d, and outputs the signals J1, J2 Is generated.
　信号Ｊ１，Ｊ２は上述の実施の形態、変形によって示された第１スイッチ５１、第２スイッチ５２の動作に整合させて公知技術によって生成される。制御回路２００は、例えばマイクロコンピュータと記憶装置を含んで構成される。マイクロコンピュータは、プログラムに記述された各処理ステップ（換言すれば手順）を実行する。上記記憶装置は、例えばＲＯＭ(Read Only Memory)、ＲＡＭ(Random Access Memory)、書き換え可能な不揮発性メモリ（ＥＰＲＯＭ(Erasable Programmable ROM)等）、ハードディスク装置などの各種記憶装置の１つ又は複数で構成可能である。当該記憶装置は、各種の情報やデータ等を格納し、またマイクロコンピュータが実行するプログラムを格納し、また、プログラムを実行するための作業領域を提供する。なお、マイクロコンピュータは、プログラムに記述された各処理ステップに対応する各種手段として機能するとも把握でき、あるいは、各処理ステップに対応する各種機能を実現するとも把握できる。また、制御回路２００はこれに限らず、制御回路２００によって実行される各種手順、あるいは実現される各種手段又は各種機能の一部又は全部をハードウェアで実現しても構わない。 The signals J1 and J2 are generated by a known technique in accordance with the operation of the first switch 51 and the second switch 52 shown by the above-described embodiment and modification. The control circuit 200 includes, for example, a microcomputer and a storage device. The microcomputer executes each processing step (in other words, a procedure) described in the program. The storage device is composed of one or more of various storage devices such as a ROM (Read Only Memory), a RAM (Random Access Memory), a rewritable nonvolatile memory (EPROM (Erasable Programmable ROM), etc.), and a hard disk device, for example. Is possible. The storage device stores various information, data, and the like, stores a program executed by the microcomputer, and provides a work area for executing the program. It can be understood that the microcomputer functions as various means corresponding to each processing step described in the program, or can realize that various functions corresponding to each processing step are realized. In addition, the control circuit 200 is not limited to this, and various procedures executed by the control circuit 200 or various means or various functions implemented may be realized by hardware.
　上述の、第１スイッチ５１のオン／オフ及び第２スイッチ５２による第１状態／第２状態の切換で、電力変換装置１００の動作を変更するタイミングを、変換電力や入力電流の値に応じて変更することで、広い動作範囲で力率をより高い値に調整することが可能となる。 The timing of changing the operation of the power conversion apparatus 100 according to the on / off state of the first switch 51 and the switching of the first state / second state by the second switch 52 according to the value of the converted power or the input current. By changing, it becomes possible to adjust the power factor to a higher value in a wide operating range.
　この発明は詳細に説明されたが、上記した説明は、すべての局面において、例示であって、この発明がそれに限定されるものではない。例示されていない無数の変形例が、この発明の範囲から外れることなく想定され得るものと解される。 Although the present invention has been described in detail, the above description is illustrative in all aspects, and the present invention is not limited thereto. It is understood that countless variations that are not illustrated can be envisaged without departing from the scope of the present invention.

Claims (20)

  1. 　電源（９）から出力される単相の交流電圧（Ｖａ）を直流電圧（Ｖｄ）へ変換して前記直流電圧を負荷（３）に供給する電力変換装置（１００）であって、
    　対を成す第１入力端（１５）及び第２入力端（１６）と、前記第１入力端及び前記第２入力端に関して前記電源と反対側で対を成して前記負荷に接続される第１出力端（１７；１８）及び第２出力端（１８；１７）とを有する単相フルブリッジ整流回路（１）と、
    　前記第１出力端と前記第２出力端との間で接続点（２３）を介して互いに直列に接続され、両者で前記直流電圧を支える第１コンデンサ（２１；２２）及び第２コンデンサ（２２；２１）と、
    　前記第１コンデンサと前記第２コンデンサとの直列接続の両端の間で、前記単相フルブリッジ整流回路を介して前記電源と直列に接続されるリアクトル（７；７ａ，７ｂ）と、
    　前記第２入力端（１６）と前記接続点との間に接続され、前記電力変換装置の変換電力もしくは前記電源（９）から供給される入力電流（Ｉａ）が第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）以上のときに、前記交流電圧がその中央値をとる隣接した一対の時点の間である半周期期間に一回、導通状態から非導通状態へ遷移する第１スイッチ（５１）と、
    　前記リアクトルに流れる電流の経路に前記第１コンデンサ及び前記第２コンデンサのいずれをも含まない第１状態から、前記経路に前記第１コンデンサ及び前記第２コンデンサの少なくとも一方を含む第２状態への切換を、前記変換電力もしくは前記入力電流が前記第１閾値以上のときに、前記半周期期間に少なくとも一回は行う第２スイッチ（５２）と
    を備える電力変換装置。     A power converter (100) for converting a single-phase AC voltage (Va) output from a power source (9) into a DC voltage (Vd) and supplying the DC voltage to a load (3),
    A first input terminal (15) and a second input terminal (16) forming a pair, and a first input terminal and a second input terminal (16) connected to the load in a pair on the opposite side of the power source with respect to the first input terminal and the second input terminal. A single-phase full-bridge rectifier circuit (1) having one output end (17; 18) and a second output end (18; 17);
    A first capacitor (21; 22) and a second capacitor (22) are connected in series between the first output terminal and the second output terminal via a connection point (23), and both support the DC voltage. 21) and
    A reactor (7; 7a, 7b) connected in series with the power supply via the single-phase full-bridge rectifier circuit between both ends of the series connection of the first capacitor and the second capacitor;
    An input current (Ia) connected between the second input terminal (16) and the connection point and supplied from the power conversion device or the power source (9) is a first threshold (W1; W1u; When W1d; I1u; I1d) or more, the first switch (51 which changes from the conducting state to the non-conducting state once in a half cycle period between a pair of adjacent time points at which the AC voltage takes its median value. )When,
    From the first state in which neither the first capacitor nor the second capacitor is included in the path of the current flowing through the reactor to the second state in which at least one of the first capacitor and the second capacitor is included in the path A power converter comprising: a second switch (52) that performs switching at least once in the half cycle period when the converted power or the input current is equal to or greater than the first threshold.
  2. 　前記リアクトル（７）は前記第１入力端（１５）と前記第２入力端（１６）との少なくとも一方と前記電源（９）との間に接続され、
    　前記第２スイッチ（５２）は前記第１入力端と前記第２入力端との間に接続され、
    　前記第２スイッチは前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）以上のときに、前記半周期期間に少なくとも一回は導通状態から非導通状態へ遷移する、請求項１記載の電力変換装置。     The reactor (7) is connected between at least one of the first input end (15) and the second input end (16) and the power source (9),
    The second switch (52) is connected between the first input terminal and the second input terminal,
    When the converted power or the input current (Ia) is greater than or equal to the first threshold (W1; W1u; W1d; I1u; I1d), the second switch is turned off from the conductive state at least once in the half cycle period. The power converter according to claim 1 which changes to a state.
  3. 　前記リアクトル（７）は前記第１入力端（１５）と前記第２入力端（１６）との少なくとも一方と前記電源（９）との間に接続され、
    　前記第２スイッチ（５２）は前記第１入力端及び前記第２入力端と、前記第１出力端（１７；１８）との間に接続され、
    　前記第２スイッチは前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）以上のときに、前記半周期期間に少なくとも一回は導通状態から非導通状態へ遷移する、請求項１記載の電力変換装置。     The reactor (7) is connected between at least one of the first input end (15) and the second input end (16) and the power source (9),
    The second switch (52) is connected between the first input terminal and the second input terminal and the first output terminal (17; 18),
    When the converted power or the input current (Ia) is greater than or equal to the first threshold (W1; W1u; W1d; I1u; I1d), the second switch is turned off from the conductive state at least once in the half cycle period. The power converter according to claim 1 which changes to a state.
  4. 　前記第１出力端（１７；１８）と前記接続点（２３）との間で前記第１コンデンサ（２１；２２）と直列に接続され、その順方向が前記第１コンデンサを充電する電流が流れる方向と一致し、前記第１出力端と前記第１コンデンサとに挟まれるダイオード（５２ｄ；５２ｅ）
    を更に備え、
    　前記リアクトル（７）は前記第１入力端（１５）と前記第２入力端（１６）との少なくとも一方と前記電源（９）との間に接続され、
    　前記第２スイッチ（５２）は前記第１出力端（１７；１８）と前記第２出力端（１８；１７）との間に接続され、
    　前記第２スイッチは前記半周期期間に少なくとも一回は導通状態から非導通状態へ遷移する、請求項１記載の電力変換装置。     The first capacitor (21; 22) is connected in series between the first output terminal (17; 18) and the connection point (23), and a forward current flows in the first capacitor to charge the first capacitor. A diode (52d; 52e) that coincides with the direction and is sandwiched between the first output terminal and the first capacitor
    Further comprising
    The reactor (7) is connected between at least one of the first input end (15) and the second input end (16) and the power source (9),
    The second switch (52) is connected between the first output end (17; 18) and the second output end (18; 17);
    The power converter according to claim 1, wherein the second switch transitions from a conductive state to a non-conductive state at least once in the half cycle period.
  5. 　前記リアクトル（７ａ，７ｂ）は一対設けられ、前記リアクトルの一方（７ａ；７ｂ）及び他方（７ｂ；７ａ）は、それぞれ前記第１出力端（１７；１８）及び前記第２出力端（１８；１７）に接続され、
    　前記第１出力端と前記接続点（２３）との間で、前記第１コンデンサ（２１；２２）と前記リアクトルの前記一方とに挟まれて前記第１コンデンサと前記リアクトルの前記一方とに直列に接続され、その順方向が前記第１コンデンサを充電する電流が流れる方向と一致するダイオード（５２ｄ；５２ｅ）
    を更に備え、
    　前記リアクトルの前記一方は前記第１出力端と前記ダイオードとに挟まれ、
    　前記第２スイッチ（５２）は前記第１出力端と前記第２出力端との間で、前記リアクトルの前記一方と前記リアクトルの前記他方とに挟まれて、前記リアクトルの前記一方と前記リアクトルの前記他方とに直列に接続され、
    　前記第２スイッチは前記半周期期間に少なくとも一回は導通状態から非導通状態へ遷移する、請求項１記載の電力変換装置。     A pair of the reactors (7a, 7b) are provided, and one (7a; 7b) and the other (7b; 7a) of the reactor are respectively connected to the first output end (17; 18) and the second output end (18; 17),
    Between the first output end and the connection point (23), it is sandwiched between the first capacitor (21; 22) and the one of the reactors, and in series with the first capacitor and the one of the reactors. A diode (52d; 52e) whose forward direction coincides with the direction in which the current for charging the first capacitor flows
    Further comprising
    The one of the reactors is sandwiched between the first output end and the diode;
    The second switch (52) is sandwiched between the one of the reactors and the other of the reactors between the first output end and the second output end, so that the one of the reactors and the reactor Connected in series to the other,
    The power converter according to claim 1, wherein the second switch transitions from a conductive state to a non-conductive state at least once in the half cycle period.
  6. 　前記第２出力端（１８；１７）と前記接続点（２３）との間で前記第２コンデンサ（２２；２１）と直列に接続され、その順方向が前記第２コンデンサを充電する電流が流れる方向と一致し、前記第２出力端と前記第２コンデンサとに挟まれるダイオード（５２ｅ；５２ｄ）
    を更に備える、請求項３、４のいずれか一つに記載の電力変換装置。     The second capacitor (22; 21) is connected in series between the second output terminal (18; 17) and the connection point (23), and a forward current flows to charge the second capacitor. A diode (52e; 52d) that coincides with the direction and is sandwiched between the second output terminal and the second capacitor
    The power converter according to claim 3, further comprising:
  7. 　前記第２出力端（１８；１７）と前記接続点（２３）との間で、前記第２コンデンサ（２２；２１）と前記リアクトルの前記他方（７ｂ；７ａ）とに挟まれて前記第２コンデンサと前記リアクトルの前記他方とに直列に接続され、前記リアクトルの前記他方を前記第２出力端と共に挟み、その順方向が前記第２コンデンサを充電する電流が流れる方向と一致するダイオード（５２ｅ；５２ｄ）
    を更に備える、請求項５に記載の電力変換装置。     Between the second output end (18; 17) and the connection point (23), the second capacitor (22; 21) and the other of the reactors (7b; 7a) are sandwiched between the second output end (18; 17) and the connection point (23). A diode (52e; connected in series with a capacitor and the other of the reactors), sandwiching the other of the reactors together with the second output terminal, and whose forward direction coincides with a direction in which a current for charging the second capacitor flows; 52d)
    The power conversion device according to claim 5, further comprising:
  8. 　第２スイッチ（５２）は、
    　前記第１出力端（１７）と前記第１入力端（１５）との間に接続される第１スイッチ要素（５２ｇ）と、
    　前記第２出力端（１８）と前記第１入力端との間に接続される第２スイッチ要素（５２ｈ）と
    を有し、
    　前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）以上のときに前記第１スイッチ要素は、前記第２入力端（１６）の電位が前記第１入力端の電位よりも高い前記半周期期間に少なくとも一回は導通状態から非導通状態へ遷移し、前記第２入力端の電位が前記第１入力端の電位よりも低い前記半周期期間において非導通状態であり、
    　前記変換電力もしくは前記入力電流が前記第１閾値以上のときに前記第２スイッチ要素は、前記第２入力端の電位が前記第１入力端の電位よりも低い前記半周期期間に少なくとも一回は導通状態から非導通状態へ遷移し、前記第２入力端の電位が前記第１入力端の電位よりも高い前記半周期期間において非導通状態である、請求項１記載の電力変換装置。     The second switch (52)
    A first switch element (52g) connected between the first output end (17) and the first input end (15);
    A second switch element (52h) connected between the second output end (18) and the first input end;
    When the converted power or the input current (Ia) is greater than or equal to the first threshold (W1; W1u; W1d; I1u; I1d), the first switch element has a potential at the second input terminal (16) that is higher than the first threshold. In the half-cycle period in which the potential of the second input terminal is lower than the potential of the first input terminal, at least once in the half-cycle period higher than the potential of the first input terminal. Non-conductive,
    When the converted power or the input current is equal to or higher than the first threshold, the second switch element is at least once in the half cycle period in which the potential of the second input terminal is lower than the potential of the first input terminal. 2. The power conversion device according to claim 1, wherein the power conversion device transitions from a conducting state to a non-conducting state and is in a non-conducting state during the half cycle period in which a potential of the second input terminal is higher than a potential of the first input terminal.
  9. 　前記第１出力端（１７；１８）と前記接続点（２３）との間で前記第１コンデンサ（２１；２２）と直列に接続され、その順方向が前記第１コンデンサを充電する電流が流れる方向と一致し、前記第１出力端と前記第１コンデンサとに挟まれる第１ダイオード（５２ｄ；５２ｅ）と、
    　前記第２出力端（１８；１７）と前記接続点（２３）との間で前記第２コンデンサ（２２；２１）と直列に接続され、その順方向が前記第２コンデンサを充電する電流が流れる方向と一致し、前記第２出力端と前記第２コンデンサとに挟まれる第２ダイオード（５２ｅ；５２ｄ）
    を更に備える、請求項８に記載の電力変換装置。     The first capacitor (21; 22) is connected in series between the first output terminal (17; 18) and the connection point (23), and a forward current flows in the first capacitor to charge the first capacitor. A first diode (52d; 52e) that coincides with the direction and is sandwiched between the first output terminal and the first capacitor;
    The second capacitor (22; 21) is connected in series between the second output terminal (18; 17) and the connection point (23), and a forward current flows to charge the second capacitor. A second diode (52e; 52d) which coincides with the direction and is sandwiched between the second output terminal and the second capacitor
    The power conversion device according to claim 8, further comprising:
  10. 　前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）よりも小さな第２閾値（Ｗ２；Ｗ２ｕ；Ｗ２ｄ；Ｉ２ｕ；Ｉ２ｄ）以上であって前記第１閾値未満であるときには、
    　前記第１スイッチ（５１）は前記半周期期間に一回、導通状態から非導通状態へ遷移し、
    　前記第２スイッチ（５２）が前記切換を行わずに前記第２状態が実現される、請求項１～９のいずれか一つに記載の電力変換装置。     The converted power or the input current (Ia) is equal to or more than a second threshold (W2; W2u; W2d; I2u; I2d) smaller than the first threshold (W1; W1u; W1d; I1u; I1d). When it is less than the threshold,
    The first switch (51) transitions from a conductive state to a non-conductive state once in the half cycle period,
    The power converter according to any one of claims 1 to 9, wherein the second state is realized without the second switch (52) performing the switching.
  11. 　前記変換電力もしくは前記入力電流（Ｉａ）が前記第２閾値（Ｗ２；Ｗ２ｕ；Ｗ２ｄ；Ｉ２ｕ；Ｉ２ｄ）未満であるときには、
    　前記第１スイッチ（５１）は非導通状態にあり、
    　前記第２スイッチ（５２）が前記切換を行わずに前記第２状態が実現される、請求項１０記載の電力変換装置。     When the converted power or the input current (Ia) is less than the second threshold (W2; W2u; W2d; I2u; I2d)
    The first switch (51) is non-conductive;
    The power converter according to claim 10, wherein the second state is realized without the second switch (52) performing the switching.
  12. 　前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｉ１ｕ；Ｉ１ｄ）未満であるときには、
    　前記第１スイッチ（５１）は非導通状態にあり、
    　前記第２スイッチ（５２）が前記切換を行わずに前記第２状態が実現される、請求項１～９のいずれか一つに記載の電力変換装置。     When the converted power or the input current (Ia) is less than the first threshold (W1; I1u; I1d),
    The first switch (51) is non-conductive;
    The power converter according to any one of claims 1 to 9, wherein the second state is realized without the second switch (52) performing the switching.
  13. 　前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）以上であるときには、前記第２スイッチ（５２）の前記切換は、前記第１スイッチ（５１）が導通状態であるときに行われる、請求項２、６、７、９のいずれか一つに記載の電力変換装置。 When the converted power or the input current (Ia) is equal to or greater than the first threshold (W1; W1u; W1d; I1u; I1d), the switching of the second switch (52) is performed by the first switch (51). The power conversion device according to any one of claims 2, 6, 7, and 9, which is performed when is in a conductive state.
  14. 　前記第２スイッチ（５２）が前記切換を行う時点は、前記半周期期間の始点から前記半周期の１／６が経過した時点と、前記始点から前記半周期の５／６の時点が経過した時点との間にある、請求項１～１３のいずれか一つに記載の電力変換装置。 The second switch (52) performs the switching at the time when 1/6 of the half cycle has elapsed from the start point of the half cycle period and the time of 5/6 of the half cycle from the start point. The power conversion device according to any one of claims 1 to 13, which is between the time points.
  15. 　前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）以上であるときには、前記第１スイッチ（５１）の非導通状態から導通状態への遷移は、前記第１状態が実現されているときに行われる、請求項２、６、７、９のいずれか一つに記載の電力変換装置。 When the converted power or the input current (Ia) is greater than or equal to the first threshold (W1; W1u; W1d; I1u; I1d), the transition of the first switch (51) from the non-conductive state to the conductive state is The power converter according to any one of claims 2, 6, 7, and 9, which is performed when the first state is realized.
  16. 　前記変換電力もしくは前記入力電流（Ｉａ）が前記第１閾値（Ｗ１；Ｗ１ｕ；Ｗ１ｄ；Ｉ１ｕ；Ｉ１ｄ）以上であるときには、
    　前記第２スイッチ（５２）の前記切換は、前記第１スイッチ（５１）が非導通状態であるときに行われ、前記第１スイッチ（５１）の非導通状態から導通状態への遷移は、前記第２状態が実現されているときに行われる、請求項３～５、８のいずれか一つに記載の電力変換装置。     When the converted power or the input current (Ia) is greater than or equal to the first threshold (W1; W1u; W1d; I1u; I1d)
    The switching of the second switch (52) is performed when the first switch (51) is in a non-conducting state, and the transition from the non-conducting state to the conducting state of the first switch (51) The power conversion device according to any one of claims 3 to 5, and 8 performed when the second state is realized.
  17. 　前記変換電力は、前記負荷（３）に供給される電力である、請求項１～１６のいずれか一つに記載の電力変換装置。 The power conversion device according to any one of claims 1 to 16, wherein the converted power is power supplied to the load (3).
  18. 　前記変換電力は、前記電力変換装置（１００）に入力する電力である、請求項１～１６のいずれか一つに記載の電力変換装置。 The power converter according to any one of claims 1 to 16, wherein the converted power is power input to the power converter (100).
  19. 　前記入力電流（Ｉａ）の大きさに基づいて、前記第１スイッチ（５１）及び前記第２スイッチ（５２）の動作が制御される、請求項１～１６のいずれか一つに記載の電力変換装置。 The power conversion according to any one of claims 1 to 16, wherein operation of the first switch (51) and the second switch (52) is controlled based on the magnitude of the input current (Ia). apparatus.
  20. 　前記入力電流が上昇するときの前記第１閾値（Ｉ１ｕ）が、前記入力電流が低下するときの前記第１閾値（Ｉ１ｄ）よりも大きい、請求項１９記載の電力変換装置。 The power conversion device according to claim 19, wherein the first threshold value (I1u) when the input current increases is larger than the first threshold value (I1d) when the input current decreases.
PCT/JP2016/086258 2015-12-28 2016-12-06 Power conversion device WO2017115621A1 (en)

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CN201680076064.7A CN108475996A (en) 2015-12-28 2016-12-06 Power inverter
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