WO2017049865A1 - 阵列基板、显示装置及其制作方法 - Google Patents

阵列基板、显示装置及其制作方法 Download PDF

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Publication number
WO2017049865A1
WO2017049865A1 PCT/CN2016/074446 CN2016074446W WO2017049865A1 WO 2017049865 A1 WO2017049865 A1 WO 2017049865A1 CN 2016074446 W CN2016074446 W CN 2016074446W WO 2017049865 A1 WO2017049865 A1 WO 2017049865A1
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Prior art keywords
electrode
array substrate
slit
data line
strips
Prior art date
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PCT/CN2016/074446
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English (en)
French (fr)
Inventor
曹宇
赵海生
彭志龙
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to KR1020177000878A priority Critical patent/KR102000648B1/ko
Priority to EP16781273.4A priority patent/EP3355108A4/en
Priority to US15/306,458 priority patent/US10495930B2/en
Priority to JP2016569624A priority patent/JP6881981B2/ja
Publication of WO2017049865A1 publication Critical patent/WO2017049865A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/136295—Materials; Compositions; Manufacture processes
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134318—Electrodes characterised by their geometrical arrangement having a patterned common electrode
    • G—PHYSICS
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134372—Electrodes characterised by their geometrical arrangement for fringe field switching [FFS] where the common electrode is not patterned
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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Definitions

  • the present invention relates to the field of display technologies, and in particular, to an array substrate, a display device, and a method of fabricating the same.
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • the display modes of TFT-LCD mainly include TN (Twisted Nematic) mode, VA (Vertical Alignment) mode, IPS (In-Plane-Switching) mode, and AD-SDS (ADvanced).
  • TN Transmission Nematic
  • VA Very Alignment
  • IPS In-Plane-Switching
  • AD-SDS ADvanced
  • Super Dimension Switch, advanced super-dimensional field conversion, referred to as ADS) mode referred to as ADS
  • the display based on the ADS mode forms a multi-dimensional electric field by the electric field generated by the edge of the slit electrode in the same plane and the electric field generated between the slit electrode and the plate electrode, so that the aligned liquid crystal molecules between the slit electrodes in the liquid crystal cell and directly above the electrode The rotation is generated, thereby improving the liquid crystal working efficiency and increasing the light transmission efficiency.
  • ADS technology can improve the picture quality of TFT-LCD products, with high resolution, high transmittance, low power consumption, wide viewing angle, high aperture ratio, low chromatic aberration, and no push mura.
  • the array substrate based on the ADS mode generally includes a plurality of pixel units arranged in an array, each of the pixel units including a thin film transistor, a plate electrode, and a slit electrode located above the plate electrode, the slit electrode including a plurality of electrode strips, And a slit is formed between adjacent electrode strips.
  • the formation of the array substrate requires multiple plating and etching, and pattern defects may occur during the formation process.
  • a patterning defect occurs in the insulating layer between the data line and the common electrode, a short circuit between the data line and the common electrode overlapping the data line is caused, thereby reducing the yield of the product.
  • the present invention provides an array substrate, a display device, and a manufacturing method thereof, which can avoid defects caused by an insulating layer between a data line and a common electrode.
  • the short circuit between the formed data line and the common electrode overlapping the data line greatly increases the yield of the product.
  • an array substrate includes: a plurality of gate lines, a plurality of data lines, and a plurality of pixel units arranged in an array, wherein each of the pixel units includes a plate electrode, a slit electrode, and a plate electrode and a slit electrode. Insulation between.
  • the slit electrode includes a plurality of electrode strips, a slit is formed between adjacent electrode strips, and the electrode strips at least partially overlapping the projection of the data lines on the array substrate are disconnected from the other electrode strips.
  • the array substrate of the present invention even when a defect occurs in the insulating layer between the data line and the slit electrode (for example, the common electrode), a short circuit between the data line and one electrode strip of the slit electrode overlapping the data line is caused.
  • the connection between the electrode strip at least partially overlapping the data line and the other electrode strips of the slit electrode is disconnected, the short circuit between the data line and the entire slit electrode can be avoided, thereby greatly improving the yield of the product.
  • connection to the other electrode strips is broken by forming slits at both ends of the electrode strip that at least partially overlap the projection of the data lines on the array substrate.
  • the electrode strips at least partially overlapping the projection of the data lines on the array substrate cover the data lines.
  • the plate electrodes are disposed in the same layer as the data lines.
  • the plate electrode is a pixel electrode and the slit electrode is a common electrode.
  • the electrode strips at least partially overlapping the projection of the data lines on the array substrate are disconnected from the common electrode.
  • the slit electrode is made of indium tin oxide.
  • the plate electrode is made of indium tin oxide.
  • a display device includes the array substrate according to any of the above embodiments.
  • a method of fabricating an array substrate includes: forming a plate electrode and a data line on the array substrate; forming an insulating layer on the plate electrode; forming a slit electrode on the insulating layer; wherein the slit electrode comprises a plurality of electrode strips, in the phase A slit is formed between the adjacent electrode strips, and the electrode strip at least partially overlapping the projection of the data line on the array substrate is disconnected from the other electrode strips.
  • At least partially overlapping the projection on the array substrate with the data lines The ends of the electrode strips form slits to disconnect the other electrode strips.
  • the display device and the manufacturing method thereof of the present invention it is possible to avoid a short circuit between the data line and the common electrode due to a defect in the insulating layer between the data line and the common electrode, thereby greatly improving the yield of the product.
  • FIG. 1 is a schematic view of a prior art array substrate
  • FIG. 2 is a schematic cross-sectional view of a prior art array substrate
  • Figure 3 is a schematic view of the possibility of defects in the insulating layer
  • FIG. 4 is a schematic view of an array substrate according to an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of a fringe electric field simulation of an array substrate according to an embodiment of the present invention.
  • FIG. 6 is a flow chart of a method of fabricating an array substrate in accordance with an embodiment of the present invention.
  • spatially relative terms such as “below”, “below”, “lower”, “above”, “upper”, etc. may be used herein to describe the drawings. The relationship of one element or feature to another element or feature is shown. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation shown in the figures. For example, elements that are described as “under the other elements” or “under the other elements” will be ⁇ RTIgt; Thus, the exemplary term “below” can encompass both the ⁇ RTIgt; The device may be oriented (rotated 90 degrees or at other orientations) in other ways, and the spatially relative descriptors used herein will be interpreted accordingly.
  • the present invention provides an array substrate, a display device, and a manufacturing method thereof. Greatly improve the yield of products.
  • FIG. 1 is a schematic view of a prior art array substrate
  • FIG. 2 is a schematic cross-sectional view of a prior art array substrate.
  • the array substrate includes a plurality of gate lines 10, a plurality of data lines 20, and a plurality of pixel units arranged in an array.
  • Each of the pixel units includes a plate electrode 30 and a slit electrode 40.
  • An insulating layer 50 is disposed between the plate electrode and the slit electrode.
  • the plate electrode 30 and the slit electrode 40 may be made of indium tin oxide (ITO).
  • the insulating layer 50 may be made of silicon nitride.
  • Figure 3 is a schematic illustration of the likelihood of defects in the insulating layer.
  • FIG. 4 is a schematic diagram of an array substrate in accordance with an embodiment of the present invention.
  • the slit electrode 40 includes a plurality of electrode strips 41, a slit 42 is formed between adjacent electrode strips, and the electrode strips at least partially overlapping the projection of the data lines 20 on the array substrate are disconnected from the other electrodes. The connection of the bar.
  • connection to the other electrode strips can be broken by forming slits at both ends of the electrode strip that at least partially overlap the projection of the data lines on the array substrate.
  • a defect occurs in the insulating layer between the data line and the slit electrode (for example, the common electrode), causing a short circuit between the data line and an electrode strip of the slit electrode overlapping the data line, due to the data
  • the connection of the at least partially overlapping electrode strips to the other electrode strips of the slit electrode is broken, so that a short circuit between the data line and the entire slit electrode can be avoided, thereby greatly improving the yield of the product.
  • an electrode strip 41 that at least partially overlaps the projection of the data line on the array substrate covers the data line 20.
  • a slit electrode strip that is disconnected from other slit electrode strips Shielding the data line can avoid short circuit between the data line and the slit electrode due to defects in the insulating layer between the data line and the slit electrode, and can avoid irregular electric field, cross color, light leakage and the like.
  • the plate electrode 30 may be disposed in the same layer as the data line 20.
  • the plate electrode 30 may be a pixel electrode, and the slit electrode 40 may be a common electrode. Thus, the electrode strips that at least partially overlap the projection of the data lines on the array substrate can be disconnected from the common electrode.
  • the slit electrode 40 and the plate electrode 30 may be made of indium tin oxide.
  • FIG. 5 is a schematic diagram of a fringe electric field simulation of an array substrate according to an embodiment of the invention.
  • the plate electrode 30 is a pixel electrode
  • the slit electrode 40 is a common electrode.
  • the electric field is uniform in the region of each slit 42 in which the liquid crystal molecules are uniformly arranged.
  • the light emitted by the backlight is projected into the color film pixels through the area, thereby obtaining three primary colors of R, G, and B.
  • the electrode strips above the data lines 20 are disconnected from the other electrode strips without breaking the slit electrode structure, thereby forming elongated islands.
  • the irregular electric field between the data line and the pixel area can be shielded by the island electrode strip above the data line to avoid problems such as cross color and light leakage; and the defect of the insulating layer between the data line and the island electrode strip can be avoided.
  • the resulting short circuit between the data line and the common electrode greatly increases the yield of the product.
  • FIG. 6 is a flow chart of a method of fabricating an array substrate in accordance with an embodiment of the present invention.
  • a plate electrode and a data line are formed on the array substrate.
  • an insulating layer is formed on the plate electrode.
  • a slit electrode is formed on the insulating layer, the slit electrode includes a plurality of electrode strips, a slit is formed between adjacent electrode strips, and at least partially overlaps with a projection of the data lines on the array substrate The electrode strip is disconnected from the other electrode strips.
  • a slit may be formed by breaking the ends of the electrode strip at least partially overlapping the projection of the data line on the array substrate to break the connection with the other electrode strips.
  • the array substrate according to the present invention can be applied to various display devices.
  • the display device includes, but is not limited to, a thin film transistor liquid crystal display (TFT-LCD).
  • TFT-LCD thin film transistor liquid crystal display
  • the display device can be any product or component having a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • the display device provided by the present invention may also include other conventional structures, such as a display driving unit, etc., and details are not described herein.

Abstract

一种阵列基板，包括：多条栅线（10）、多条数据线（20）以及呈阵列排布的多个像素单元，每个像素单元包括板状电极（30）、狭缝电极（40）和设置在板状电极（30）与狭缝电极（40）之间的绝缘层（50）。狭缝电极（40）包括多个电极条（41），在相邻的电极条（41）之间形成狭缝（42），并且与数据线（20）在阵列基板上的投影至少部分重叠的电极条断开与其他电极条的连接。能够避免由于数据线（20）与公共电极之间的绝缘层（50）出现缺陷造成的数据线（20）与公共电极之间的短路，从而提升产品的良品率。还提供了包括阵列基板的显示装置以及制作阵列基板的方法。

Description

阵列基板、显示装置及其制作方法 技术领域
本发明涉及显示技术领域，具体而言涉及一种阵列基板、显示装置及其制作方法。
背景技术
在平板显示装置中，薄膜晶体管液晶显示器(Thin Film Transistor Liquid Crystal Display，TFT-LCD)具有体积小、功耗低、制造成本相对较低和无辐射等特点，在当前的平板显示器市场占据了主导地位。
目前，TFT-LCD的显示模式主要有TN(Twisted Nematic，扭曲向列)模式、VA(Vertical Alignment，垂直取向)模式、IPS(In-Plane-Switching，平面方向转换)模式和AD-SDS(ADvanced Super Dimension Switch，高级超维场转换，简称ADS)模式等。
基于ADS模式的显示器通过同一平面内狭缝电极边缘所产生的电场以及狭缝电极与板状电极间产生的电场形成多维电场，使液晶盒内狭缝电极间的以及电极正上方的取向液晶分子产生旋转，从而提高了液晶工作效率并增大了透光效率。ADS技术可以提高TFT-LCD产品的画面品质，具有高分辨率、高透过率、低功耗、宽视角、高开口率、低色差、无挤压水波纹(push Mura)等优点。
基于ADS模式的阵列基板通常包括呈阵列排布的多个像素单元，每个像素单元包含有薄膜晶体管、板状电极以及位于板状电极上方的狭缝电极，狭缝电极包括多个电极条，并且在相邻的电极条之间形成狭缝。
在现有技术中，阵列基板的形成需要多次镀膜与刻蚀，在形成过程中有可能出现构图(pattern)缺陷。当构图缺陷出现在数据线与公共电极之间的绝缘层时，会造成数据线与和该数据线重叠的公共电极之间的短路，从而降低产品的良品率。
发明内容
为了克服上述问题，本发明提出了一种阵列基板、显示装置及其制作方法，能够避免由于数据线与公共电极之间的绝缘层出现缺陷造 成的数据线与和该数据线重叠的公共电极之间的短路，从而大大提升产品的良品率。
根据本发明的一个方面，提供了一种阵列基板。所述阵列基板包括：多条栅线、多条数据线以及呈阵列排布的多个像素单元，其中每个像素单元包括板状电极、狭缝电极和设置在板状电极与狭缝电极之间的绝缘层。所述狭缝电极包括多个电极条，在相邻的电极条之间形成狭缝，并且与数据线在阵列基板上的投影至少部分重叠的电极条断开与其他电极条的连接。
根据本发明的阵列基板，即便当数据线与狭缝电极(例如，公共电极)之间的绝缘层出现缺陷而造成数据线与和该数据线重叠的狭缝电极的一个电极条之间的短路时，由于和数据线至少部分重叠的电极条与狭缝电极的其他电极条的连接是断开的，因此可以避免数据线与整个狭缝电极之间的短路，从而大大提升产品的良品率。
根据一个实施例，通过在与数据线在阵列基板上的投影至少部分重叠的电极条的两端形成狭缝来断开与其他电极条的连接。
根据一个实施例，与数据线在阵列基板上的投影至少部分重叠的电极条覆盖所述数据线。
根据一个实施例，所述板状电极与数据线设置在同一层。
根据一个实施例，所述板状电极是像素电极，所述狭缝电极是公共电极。
根据一个实施例，所述与数据线在阵列基板上的投影至少部分重叠的电极条断开与公共电极的连接。
根据一个实施例，所述狭缝电极由氧化铟锡制成。
根据一个实施例，所述板状电极由氧化铟锡制成。
根据本发明的另一个方面，提供了一种显示装置。所述显示装置包括根据上述任一个实施例的阵列基板。
根据本发明的又一个方面，提供了一种制作阵列基板的方法。所述方法包括：在阵列基板上形成板状电极和数据线；在板状电极上形成绝缘层；在绝缘层上形成狭缝电极；其中，所述狭缝电极包括多个电极条，在相邻的电极条之间形成狭缝，并且与数据线在阵列基板上的投影至少部分重叠的电极条断开与其他电极条的连接。
根据一个实施例，在与数据线在阵列基板上的投影至少部分重叠 的电极条的两端形成狭缝，以断开与其他电极条的连接。
根据本发明的阵列基板、显示装置及其制作方法，能够避免由于数据线与公共电极之间的绝缘层出现缺陷造成的数据线与公共电极之间的短路，从而大大提升产品的良品率。
附图说明
通过以下结合附图的详细描述，将更加清楚地理解示例性实施例的以上和其它方面、特征和优点，其中：
图1是现有技术阵列基板的示意图；
图2是现有技术阵列基板的剖面示意图；
图3是绝缘层出现缺陷的可能性示意图；
图4是根据本发明实施例的阵列基板的示意图；
图5是根据本发明实施例的阵列基板的边缘电场模拟示意图；以及
图6是根据本发明实施例的制作阵列基板的方法流程图。
具体实施方式
现在，将参照其中示出了一些实施例的附图更完全地描述本发明构思的各个示例性实施例。然而，本发明构思可按照许多不同形式实现，并且不应理解为限于本文阐述的示例性实施例。相反，提供这些示例性实施例以使得本公开将是彻底和完整的，并且将把本发明构思完全传递给本领域技术人员。
在附图中，为了清楚起见，可夸大层和区的大小和相对大小。
为了方便描述，本文中可使用诸如“在……下方”、“在……之下”、“下”、“在……之上”、“上”等的空间相对术语，以描述附图中所示的一个元件或特征与另一元件或特征的关系。应该理解，空间相对术语旨在涵盖使用或操作中的装置的除图中所示的取向之外的不同取向。例如，如果图中的装置颠倒，则被描述为“在其它元件之下”或“在其它元件下方”的元件将因此被取向为“在其它元件或特征之上”。这样，示例性术语“在……之下”可涵盖在……之上和在……之下这两个取向。装置可按照其它方式取向(旋转90度或位于其它取向)，并且本文所用的空间相对描述语将相应地解释。
为了克服由于数据线与公共电极之间的绝缘层出现缺陷造成的数据线与和该数据线重叠的公共电极之间的短路，本发明提出了一种阵列基板、显示装置及其制作方法，能够大大提升产品的良品率。
图1是现有技术阵列基板的示意图，图2是现有技术阵列基板的剖面示意图。
参见图1和图2，阵列基板包括多条栅线10、多条数据线20以及呈阵列排布的多个像素单元。每个像素单元包括板状电极30和狭缝电极40。板状电极与狭缝电极之间设置有绝缘层50。板状电极30和狭缝电极40可以由氧化铟锡(ITO)制成。绝缘层50可以由氮化硅制成。
图3是绝缘层出现缺陷的可能性示意图。
在图3的左侧示出了导电颗粒落在狭缝电极40与数据线20之间的绝缘层中，这将直接导通数据线与狭缝电极，造成数据线与狭缝电极之间的短路。在图3的右侧示出了在形成狭缝电极40之前，在数据线20上方的绝缘层处形成有空洞。在形成狭缝电极40之后，由于该处绝缘层具有空洞，造成数据线与覆盖在数据线上方的狭缝电极之间形成短路。由于阵列基板的形成需要多次镀膜与刻蚀，因此在形成过程中很有可能出现如图3所示的构图缺陷。当出现如图3所示的构图缺陷时，会造成数据线与和该数据线重叠的公共电极之间的短路，从而降低产品的良品率。
图4是根据本发明实施例的阵列基板的示意图。
参见图4，狭缝电极40包括多个电极条41，在相邻的电极条之间形成狭缝42，并且与数据线20在阵列基板上的投影至少部分重叠的电极条断开与其他电极条的连接。
如图4所示，可以通过在与数据线在阵列基板上的投影至少部分重叠的电极条的两端形成狭缝来断开与其他电极条的连接。这样，即便当数据线与狭缝电极(例如，公共电极)之间的绝缘层出现缺陷而造成数据线与和该数据线重叠的狭缝电极的一个电极条之间的短路时，由于和数据线至少部分重叠的电极条与狭缝电极的其他电极条的连接是断开的，因此可以避免数据线与整个狭缝电极之间的短路，从而能够大大提升产品的良品率。
如图4所示，与数据线在阵列基板上的投影至少部分重叠的电极条41覆盖所述数据线20。通过与其他狭缝电极条断开连接的狭缝电极条 屏蔽数据线，既可以避免由于数据线与狭缝电极之间的绝缘层出现缺陷造成的数据线与狭缝电极之间的短路，又可以避免不规则电场、串色、漏光等问题。
板状电极30可以与数据线20设置在同一层。
板状电极30可以是像素电极，并且狭缝电极40可以是公共电极。这样，与数据线在阵列基板上的投影至少部分重叠的电极条可以断开与公共电极的连接。
狭缝电极40和板状电极30可以由氧化铟锡制成。
图5是根据本发明实施例的阵列基板的边缘电场模拟示意图。
如图5所示，板状电极30是像素电极，狭缝电极40是公共电极。在每个狭缝42的区域内电场是均匀的，该区域液晶分子均匀排布。背光源发出的光线经过该区域投射进彩膜像素，从而得到R、G、B三原色。
根据本发明的阵列基板，在不破坏狭缝电极结构的同时，断开数据线20上方的电极条与其他电极条的连接，形成长条状孤岛。这样，既可以通过数据线上方的孤岛电极条屏蔽数据线与像素区域之间的不规则电场，避免串色、漏光等问题；又可以避免由于数据线与孤岛电极条之间的绝缘层出现缺陷造成的数据线与公共电极之间的短路，从而大大提升产品的良品率。
图6是根据本发明实施例的制作阵列基板的方法流程图。在步骤61，在阵列基板上形成板状电极和数据线。在步骤62，在板状电极上形成绝缘层。在步骤63，在绝缘层上形成狭缝电极，所述狭缝电极包括多个电极条，在相邻的电极条之间形成狭缝，并且与数据线在阵列基板上的投影至少部分重叠的电极条断开与其他电极条的连接。
可以通过在与数据线在阵列基板上的投影至少部分重叠的电极条的两端形成狭缝，以断开与其他电极条的连接。
根据本发明的阵列基板可以应用于各种显示装置。所述显示装置包括(但不限于)薄膜晶体管液晶显示器(TFT-LCD)。该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
当然，本发明提供的显示装置还可以包括其他常规的结构，如显示驱动单元等，在此不予赘述。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采 用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (11)

  1. 一种阵列基板，包括：多条栅线、多条数据线以及呈阵列排布的多个像素单元，其中每个像素单元包括板状电极、狭缝电极和设置在板状电极与狭缝电极之间的绝缘层，其特征在于，
    所述狭缝电极包括多个电极条，在相邻的电极条之间形成狭缝，并且与数据线在阵列基板上的投影至少部分重叠的电极条断开与其他电极条的连接。
  2. 根据权利要求1所述的阵列基板，其特征在于，通过在与数据线在阵列基板上的投影至少部分重叠的电极条的两端形成狭缝来断开与其他电极条的连接。
  3. 根据权利要求1所述的阵列基板，其特征在于，与数据线在阵列基板上的投影至少部分重叠的电极条覆盖所述数据线。
  4. 根据权利要求1所述的阵列基板，其特征在于，所述板状电极与数据线设置在同一层。
  5. 根据权利要求1所述的阵列基板，其特征在于，所述板状电极是像素电极，所述狭缝电极是公共电极。
  6. 根据权利要求5所述的阵列基板，其特征在于，所述与数据线在阵列基板上的投影至少部分重叠的电极条断开与公共电极的连接。
  7. 根据权利要求1所述的阵列基板，其特征在于，所述狭缝电极由氧化铟锡制成。
  8. 根据权利要求1所述的阵列基板，其特征在于，所述板状电极由氧化铟锡制成。
  9. 一种显示装置，包括根据权利要求1-8中任一项所述的阵列基板。
  10. 一种制作阵列基板的方法，包括：
    在阵列基板上形成板状电极和数据线；
    在板状电极上形成绝缘层；以及
    在绝缘层上形成狭缝电极，
    其特征在于，所述狭缝电极包括多个电极条，在相邻的电极条之间形成狭缝，并且与数据线在阵列基板上的投影至少部分重叠的电极条断开与其他电极条的连接。
  11. 根据权利要求10所述的方法，其特征在于，
    在与数据线在阵列基板上的投影至少部分重叠的电极条的两端形成狭缝，以断开与其他电极条的连接。
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