WO2016152258A1 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
WO2016152258A1
WO2016152258A1 PCT/JP2016/053121 JP2016053121W WO2016152258A1 WO 2016152258 A1 WO2016152258 A1 WO 2016152258A1 JP 2016053121 W JP2016053121 W JP 2016053121W WO 2016152258 A1 WO2016152258 A1 WO 2016152258A1
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WIPO (PCT)
Prior art keywords
semiconductor device
insulating substrate
semiconductor
conductive block
heat dissipation
Prior art date
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PCT/JP2016/053121
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English (en)
French (fr)
Inventor
紺野　哲豊
Original Assignee
株式会社日立製作所
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Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to US15/554,706 priority Critical patent/US10410945B2/en
Priority to JP2017507557A priority patent/JP6300386B2/ja
Priority to EP16768161.8A priority patent/EP3276661B1/en
Publication of WO2016152258A1 publication Critical patent/WO2016152258A1/ja

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    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Definitions

  • the present invention relates to a semiconductor device.
  • the semiconductor device has a function of converting DC power supplied from a DC power supply into AC power for supplying an inductive load such as a motor, or DC power for supplying AC power generated by a motor to a DC power supply. Has the ability to convert.
  • the semiconductor device has a semiconductor element having a switching function, and by repeating the conduction operation and the shutoff operation, DC power is converted to AC power or AC power is converted to DC power. Control.
  • an insulating substrate having a wiring pattern formed thereon is bonded to the heat dissipation substrate by soldering or the like, and a semiconductor element is mounted on the wiring pattern of the insulating substrate.
  • the semiconductor element has electrodes on the front and back, the back electrode is connected to the wiring pattern on the insulating substrate, and the front electrode is connected to the wiring pattern on the insulating substrate through a wire.
  • semiconductors for high power such as railways, a large current can be handled by mounting a plurality of insulating substrates.
  • a lead frame having a die pad for mounting a power semiconductor element and an external lead terminal, between an electrode of the power semiconductor element and the external lead terminal, and between an electrode of the power semiconductor element and an electrode of a control element.
  • a semiconductor device comprising a plate-like metal piece for electrically connecting at least one of the above, a power semiconductor element, a control element, and a sealing resin for resin-sealing the metal piece is disclosed.
  • an object of the present invention is to improve the bonding reliability of lead electrodes connected to the surface electrodes of the power semiconductor chip.
  • a semiconductor device includes a heat dissipation substrate, an insulating substrate disposed on the heat dissipation substrate and a wiring layer, a plurality of semiconductor elements disposed on the insulating substrate, and a semiconductor element.
  • a conductive block electrically connected to the surface electrode and a terminal electrode are provided.
  • the conductive block has a convex portion, and the convex portion is joined to the insulating substrate.
  • the reliability of the power semiconductor device can be improved.
  • a top view of a semiconductor device according to an embodiment of the present invention Sectional view of a semiconductor device according to an embodiment of the present invention
  • a top view of a semiconductor device according to an embodiment of the present invention The figure which shows the bonding process of the semiconductor device which concerns on one Embodiment of this invention.
  • FIG. 1 is a top view of a semiconductor device according to an embodiment of the present invention
  • FIG. 2 is a sectional view taken along the line A-A 'of FIG.
  • a heat dissipation substrate 104 As shown in FIGS. 1 and 2, in the semiconductor device of this embodiment, a heat dissipation substrate 104, an insulating substrate 103 disposed on the heat dissipation substrate, a plurality of semiconductor elements 101 disposed on the insulating substrate, and a semiconductor A conductive block electrically connected to the surface electrode of the element;
  • MOSFET metal-oxide-semiconductor field-effect transistor
  • the conductive block 105 in contact with the MOSFET 101, which is a semiconductor element, has a convex portion 105T.
  • the convex portion 105T is joined not to the MOSFET 101 but to the insulating substrate.
  • the heat capacity of the conductive block 105 is increased, so that the temperature change of the MOSFET 101 can be moderated.
  • By making the temperature change gentle it is possible to relieve the stress due to the temperature amplitude generated at each junction interface, so it is possible to provide a highly reliable semiconductor device.
  • the convex portion 105T of the conductive block is joined on the source wiring pattern 103E which is a circuit wiring pattern of the same node as the source electrode 101E of the MOSFET 101 of the insulating substrate 103.
  • the heat generated by the MOSFET 101 is dissipated to the insulating substrate 103 via the conductive plate 106 and the conductive block 105. That is, since the heat radiation path is expanded and the temperature of the MOSFET 101 is further lowered, a highly reliable semiconductor device can be provided.
  • the area of the bonding surface between the convex portion 105T of the conductive block and the insulating substrate 103 larger than the area of at least one MOSFET 101.
  • the conductive block 105 is joined to the MOSFET 101 via the conductive plate 106.
  • the thickness of the convex portion 105T of the conductive block can be increased.
  • the thermal expansion coefficient of the conductive plate 106 is preferably larger than the thermal expansion coefficient of the MOSFET 101 and smaller than the thermal expansion coefficient of the conductive block 105. Thus, distortion due to thermal expansion and contraction at each bonding interface is reduced, so that a highly reliable semiconductor device can be provided.
  • the conductive plate is required to play a role of alleviating the thermal stress due to the thermal expansion coefficient difference between the semiconductor element and the wiring member and the role of dissipating the heat from the semiconductor element.
  • As the conductive plate it is preferable to use a material having a thermal expansion coefficient between the semiconductor element and the wiring member and having a thermal conductivity of 100 W / mK or more.
  • the conductor block and the semiconductor element are joined via the conductive plate, but the conductive plate may not be used.
  • the plurality of MOSFETs (semiconductor elements) 101 are preferably arranged such that the distances from the centers of the conductor blocks to the respective semiconductor elements are approximately equal.
  • omitted the electroconductive block and terminal electrode from FIG. 1 at FIG. 3 is shown.
  • FIG. 3 by arranging a plurality of semiconductor elements in a ring shape, it is possible to arrange the distances from the center of the conductive block to the respective semiconductors at substantially equal intervals.
  • the current flowing through each of the MOSFETs 101 is concentrated on the N terminal electrode 107N and the inter-substrate relay terminal electrode 107C via the conductive plate 106 and the conductive block 105.
  • the inductances of the current paths leading to the N terminal electrode 107N and the inter-substrate relay terminal electrode 107C are not uniform, the current flowing to each MOSFET 101 during the switching transient becomes uneven, for example, the current to the specific MOSFET 101 As a result of concentration of heat, the heat generation of the MOSFET 101 becomes larger than that of the other MOSFETs 101, which may cause damage.
  • the N terminal electrode 107N and the inter-substrate relay terminal electrode 107C are respectively joined to the convex portion 105T of the conductive block, and the eight MOSFETs 101 are approximately equidistant to the joint portion 114. It has been implemented. By equalizing the distance between the junction 114 where current is concentrated and the eight MOSFETs 101, the inductance from each MOSFET 101 to the junction 114 becomes equal, and the current flowing through each MOSFET 101 can be equalized.
  • the MOSFET 101 includes a drain electrode 101C on the back surface (the insulating substrate 103 side), and a source electrode 101E and a gate electrode 101G on the front surface (the conductive block 105 side).
  • the size of the semiconductor element varies depending on the withstand pressure specification and the like, but for example, one having a side length of 5 mm to 15 mm and a thickness of about 0.1 mm to 1.0 mm can be used.
  • a MOSFET is used as the semiconductor element, but the semiconductor element is not limited to this, and any element capable of switching on / off of the current may be used.
  • an IGBT Insulated Gate Bipolar Transistor
  • the built-in body diode of MOSFET101 is used as a reflux diode in this embodiment, the form which mounts a reflux diode separately is also possible.
  • the insulating substrate 103 is composed of an insulating layer 103I, and a wiring layer disposed on the back surface (the heat dissipating base 104 side) and the surface (the semiconductor element side).
  • a wiring layer disposed on the back surface (the heat dissipating base 104 side) and the surface (the semiconductor element side).
  • AlN aluminum nitride
  • SiN silicon nitride
  • AlO alumina
  • the thickness of the insulating layer is set in the range of 0.1 to 1.5 mm in accordance with the insulating characteristics required for the semiconductor device.
  • AlN (aluminum nitride) having a thickness of about 0.6 mm is used for the insulating layer 103I.
  • a solid copper pattern (wiring layer) of about 0.2 mm in thickness is brazed to the back surface of the insulating layer 103I.
  • a Cu wiring pattern (wiring layer) having a thickness of about 0.3 mm is brazed to the surface of the insulating layer 103I.
  • the wiring on the surface side of the insulating substrate 103 is divided into a drain wiring pattern 103C, a source wiring pattern 103E, and a gate wiring 103G.
  • the drain electrode 101 C of the MOSFET 101 is connected to the drain wiring pattern 103 C on the insulating substrate 103 via the bonding layer 108.
  • the source electrode 101 E of the MOSFET 101 is connected to the conductive plate 106 through the bonding layer 109.
  • the conductive plate 106 is connected to the conductive block 105 via the bonding layer 110.
  • the conductive block 105 is connected to the source wiring pattern 103E of the insulating substrate 103 through the bonding layer 111.
  • the gate electrode 101 G of the MOSFET 101 is connected to the gate wiring 103 G on the insulating substrate 103 by the gate wire 113.
  • the MOSFET 101 can control the resistance between the drain electrode 101C and the source electrode 101E by the potential difference between the gate electrode 101G and the source electrode 101E.
  • the gate wiring 103G and the source wiring pattern 103E on the insulating substrate 103 are connected to an external gate drive circuit.
  • the insulating substrate 103 is connected to the heat dissipation substrate 104 through the bonding layer 112.
  • the heat dissipation substrate 104 serves to efficiently transmit the heat generated from the semiconductor element to an external cooler.
  • a material copper or aluminum having high thermal conductivity, or an alloy thereof, a composite material of aluminum and silicon carbide (AlSiC), or the like can be used.
  • AlSiC aluminum and silicon carbide
  • Cu is used for the heat dissipation substrate, and the back surface side is shaped like a fin. Since Cu has high thermal conductivity and excellent processability, it has an advantage that it is relatively easy to provide a fin shape.
  • a low temperature sintered bonding material or the like mainly containing a solder material, metal particles, or metal oxide particles is used.
  • solder material for example, solder containing tin, bismuth, zinc, gold or the like as a main component can be used.
  • metal particles silver or copper nanoparticles coated with an aggregation protective material can be used. Low temperature reducible metal oxides can be applied to the metal oxide particles.
  • the bonding layer becomes a sintered metal layer.
  • sintered copper has a higher melting point and a higher heat resistance temperature than conventional lead solders, so that it is possible to provide a highly reliable semiconductor device. It is also environmentally friendly as it is lead free.
  • the bonding layer 111 for bonding the insulating substrate and the heat dissipation substrate is made of sintered copper.
  • the heat dissipation substrate is also copper, and the back side of the insulating substrate is also a Cu pattern, and Cu and Cu can be joined. As a result, a highly reliable bonding interface can be obtained. Furthermore, since the sintered body of Cu has a high melting point, the heat resistant temperature can also be increased.
  • the bonding layer 111 for bonding the insulating substrate and the heat dissipation substrate is not limited to sintered copper, and for example, a highly reliable bonding interface can be obtained even if a sintered body of silver is used.
  • the semiconductor device needs a resin case for covering the above configuration, an electrode for external connection, an internal filler for preventing discharge, and the like.
  • the resin case, the electrode for external connection, the internal filler, etc. can apply what is generally used for the semiconductor device.
  • a paste 115 in which copper oxide fine particles are mixed with an organic solvent is applied onto the insulating substrate 103 (step a).
  • the MOSFET 101 is mounted on the applied paste (step b)
  • the same paste is applied also on the MOSFET 101 (step c)
  • the conductive plate 106 is mounted thereon (step d).
  • the same paste is applied onto the conductive plate 106 (step e), and the conductive block 105 is mounted (step f).
  • a paste obtained by mixing copper oxide particles in an organic solvent is applied onto the heat dissipation substrate 104 (step g), and the insulating substrate 103 on which the conductive block 105 has been mounted is mounted thereon, and the conductive block is mounted.
  • the copper oxide fine particles in the paste are reduced and sintered to bond the respective interfaces (step h).
  • the gate wire 113 is wire-bonded (step i). A plurality of bonding interfaces can be bonded at once by such a process, and the manufacturing cost can be reduced.
  • the manufacturing process is not limited to this, and for example, as shown in FIG. 4, sintering is performed at the stage of mounting the conductive block 105 (step f), and the gate wire 113 is wire-bonded (step g)
  • the paste which mixed the copper oxide particles in the organic solvent is applied on the heat dissipation substrate 104 (step h), and the insulating substrate 103 on which the bonding of the conductive block 105 is finished is mounted thereon (step i).
  • a process of sintering the paste between the heat sink 103 and the heat dissipation substrate 104 is also possible.
  • the paste may not be applied over the entire area corresponding to the insulating substrate 103, but may be applied intermittently.
  • hydrogen as a reducing gas intrudes into the gaps between the paste application regions, and the reduction reaction can be promoted.
  • bonding reliability is enhanced.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

　信頼性の高い半導体装置を提供することを目的とする。上記課題を解決するために、本発明に係る半導体装置は、放熱基板と、放熱基板上に配置され配線層を備える絶縁基板と、絶縁基板上に配置された複数の半導体素子と、半導体素子の表面電極と電気的に接続された導電性ブロックと、端子電極と、を備え、導電性ブロックは凸部を有し、凸部は絶縁基板と接合していることを特徴とする。

Description

半導体装置
　本発明は、半導体装置に関する。
　半導体装置は、直流電源から供給された直流電力をモーターなどの誘導性負荷に供給するための交流電力に変換する機能、あるいはモーターにより発電された交流電力を直流電源に供給するための直流電力に変換する機能を備えている。この変換機能を果すため、半導体装置はスイッチング機能を有する半導体素子を有しており、導通動作や遮断動作を繰り返すことにより、直流電力から交流電力へあるいは交流電力から直流電力へ電力変換し、電力を制御する。
　半導体装置は、放熱基板の上に、配線パターンを形成した絶縁基板をはんだ等で接合し、絶縁基板の配線パターンの上に、半導体素子を搭載する。半導体素子は、表裏に電極を備え、裏面電極は絶縁基板上の配線パターンと接続され、表面電極はワイヤを介して絶縁基板上の配線パターンに接続される。鉄道用などの大電力用の半導体では、絶縁基板を複数搭載することで、大電流に対応できるようにしている。
　近年、半導体装置の電流密度が上昇している。特にＳｉＣ（炭化ケイ素）を用いた半導体素子はその動作温度がＳｉ（シリコン）よりも高く、より大電流を流すことが可能となってきた。半導体装置の電流密度が上昇すると、一つの半導体素子に流れる電流量が増加するため、発熱量が増大する。これに伴う熱伸縮により半導体素子の裏面電極と絶縁基板の配線パターンを接続する接合層の劣化や、半導体素子の表面電極とワイヤの接合信頼性が低下するという問題がある。
　また、半導体装置の小面積化が求められており、半導体素子の表面電極と絶縁基板上の配線との接続にワイヤを適用する場合、絶縁基板上の配線パターンの領域が足らずに充分な数のワイヤを接続できないといった問題があった。このため、半導体素子の表面電極と絶縁基板上の配線パターンを板状のリード電極で接続する必要がある。
　特許文献１には、パワー半導体素子をマウントするダイパッドと外部リード端子とを有するリードフレームと、パワー半導体素子の電極と外部リード端子との間、パワー半導体素子の電極と制御素子の電極との間の少なくとも一方を電気的に接続する板状の金属片と、パワー半導体素子、制御素子、金属片を樹脂封止する封止樹脂と、を備えることを特徴とする半導体装置が開示されている。
特開２００９―２２４５２９号公報
　半導体素子の表面電極と板状のリード電極を接合する場合、熱膨張係数の差により大きな応力がかかり、半導体素子の表面電極と板状のリード電極の接続信頼性が低下するという問題があった。
　そこで、本発明の目的は、パワー半導体チップの表面電極に接続されるリード電極の接合信頼性を向上させることを目的とする。
　上記課題を解決するために、本発明に係る半導体装置は、放熱基板と、放熱基板上に配置され配線層を備える絶縁基板と、絶縁基板上に配置された複数の半導体素子と、半導体素子の表面電極と電気的に接続された導電性ブロックと、端子電極と、を備え、導電性ブロックは凸部を有し、凸部は絶縁基板と接合していることを特徴とする。
　本発明により、パワー半導体装置の信頼性を向上できる。
本発明の一実施形態に係る半導体装置の上面図 本発明の一実施形態に係る半導体装置の断面図 本発明の一実施形態に係る半導体装置の上面図 本発明の一実施形態に係る半導体装置の接合プロセスを示す図 本発明の一実施形態に係る半導体装置の接合プロセスを示す図
　以下、図面等を用いて、本発明の実施形態について説明する。図１に本発明の一実施形態に係る半導体装置の上面図、図２に図１のＡ－Ａ’断面構成を示す。
　図１及び図２に示すように、本実施形態の半導体装置は、放熱基板１０４と、放熱基板上に配置される絶縁基板１０３と、絶縁基板上に配置される複数の半導体素子１０１と、半導体素子の表面電極と電気的に接続された導電性ブロックと、
導電板１０６と、端子電極１０７と、半導体素子と絶縁基板とを接合する接合層１０８と、導電板と半導体素子とを接合する接合層１０９と、導電板と導電性ブロックとを接合する接合層１１０と、導電性ブロックと絶縁基板とを接合する接合層１１１と、絶縁基板と放熱基板とを接合する接合層１１２、及びゲートワイヤ１１３を備える。
　本実施形態において、半導体素子は、ＭＯＳＦＥＴ（ｍｅｔａｌ－ｏｘｉｄｅ－ｓｅｍｉｃｏｎｄｕｃｔｏｒ　ｆｉｅｌｄ－ｅｆｆｅｃｔ　ｔｒａｎｓｉｓｔｏｒ）を用いた。
　半導体素子であるＭＯＳＦＥＴ１０１と接合している導電性ブロック１０５は、凸部１０５Ｔを有している。凸部１０５ＴはＭＯＳＦＥＴ１０１ではなく、絶縁基板と接合している。これにより導電性ブロック１０５の熱容量が増大するため、ＭＯＳＦＥＴ１０１の温度変化を緩やかにすることができる。温度変化を緩やかにすることにより、各接合界面に生じる温度振幅による応力を緩和することができるため信頼性の高い半導体装置を提供できる。
　さらに本実施形態では、導電性ブロックの凸部１０５Ｔは、絶縁基板１０３のＭＯＳＦＥＴ１０１のソース電極１０１Ｅと同じノードの回路配線パターンであるソース配線パターン１０３Ｅ上に接合される。これにより、ＭＯＳＦＥＴ１０１で発熱した熱は、導電性プレート１０６と導電性ブロック１０５を経由して絶縁基板１０３側に放熱される。つまり放熱経路が拡大され、よりＭＯＳＦＥＴ１０１の温度が低下するので、信頼性の高い半導体装置を提供できる。
　また、温度低減効果を高めるために、導電性ブロックの凸部１０５Ｔと絶縁基板１０３との接合面の面積を、少なくとも１つのＭＯＳＦＥＴ１０１の面積より大きくすることが好ましい。また、さらに温度低減効果を高めるためには、導電性ブロックの凸部１０５ＴとＭＯＳＦＥＴ１０１との間隔を５ｍｍ以下とすることが好ましい。
　本実施形態において、導電性ブロック１０５は、導電板１０６を介してＭＯＳＦＥＴ１０１に接合されている。導電板１０６を搭載することにより、導電性ブロックの凸部１０５Ｔの厚さを大きくすることが可能となる。
　また、導電性プレート１０６の熱膨張係数は、ＭＯＳＦＥＴ１０１の熱膨張係数より大きく、導電性ブロック１０５の熱膨張係数よりも小さいことが好ましい。これにより各接合界面における熱伸縮によるひずみが低減されるため、信頼性の高い半導体装置を提供することができる。
　導電板には、半導体素子と配線部材の熱膨張率差による熱応力を緩和する役割と、半導体素子からの熱を放熱する役割が求められる。導電板としては、半導体素子と配線部材の中間の熱膨張率を有し、熱伝導率が１００Ｗ／ｍＫ以上の材料を用いることが好ましい。
　なお、本実施形態では、導電板を介して導体ブロックと半導体素子とを接合したが、導電板を用いなくてもよい。
　複数のＭＯＳＦＥＴ（半導体素子）１０１は、導体ブロックの中心から各々の半導体素子までの距離が略等間隔となるように配置していることが好ましい。図３に図１から導電性ブロック及び端子電極を省略した図を示す。図３に示すように、複数の半導体素子をリング状に配置することにより、導電性ブロックの中心から各々の半導体までの距離を略等間隔になるように配置できる。
　各ＭＯＳＦＥＴ１０１に流れる電流は、導電板１０６、導電性ブロック１０５を経由して、Ｎ端子電極１０７Ｎ、基板間中継端子電極１０７Ｃに集約される。ここで、Ｎ端子電極１０７Ｎ、基板間中継端子電極１０７Ｃに集約されるまでの電流経路のインダクタンスが不均一の場合、スイッチング過渡時における各ＭＯＳＦＥＴ１０１に流れる電流は不均一となり、例えば特定のＭＯＳＦＥＴ１０１に電流が集中することにより、そのＭＯＳＦＥＴ１０１の発熱が他のＭＯＳＦＥＴ１０１よりも大きくなり破損する虞がある。そこで本実施形態においては、Ｎ端子電極１０７Ｎ及び、基板間中継端子電極１０７Ｃは、それぞれ導電性ブロックの凸部１０５Ｔに接合され、その接合部１１４に対して、８個のＭＯＳＦＥＴ１０１はほぼ等距離に実装している。電流が集約される接合部１１４と８個のＭＯＳＦＥＴ１０１の距離を等しくしたことにより、各ＭＯＳＦＥＴ１０１から接合部１１４までのインダクタンスが等しくなり、各ＭＯＳＦＥＴ１０１に流れる電流を均等化することができる。
　ＭＯＳＦＥＴ１０１は、裏面（絶縁基板１０３側）にドレイン電極１０１Ｃ、表面（導電性ブロック１０５側）にソース電極１０１Ｅ及びゲート電極１０１Ｇを備える。半導体素子のサイズは耐圧仕様等により様々であるが、例えば一辺の長さが５ｍｍから１５ｍｍ、厚さは０．１ｍｍから１．０ｍｍ程度のものを用いることができる。本実施形態においては、半導体素子としてＭＯＳＦＥＴを用いたが、半導体素子はこれに限定されるものではなく、電流のｏｎ／ｏｆｆを切り替え可能な素子であればよい。スイッチング素子として、たとえば、ＩＧＢＴ（Ｉｎｓｕｌａｔｅｄ　Ｇａｔｅ　Ｂｉｐｏｌａｒ　Ｔｒａｎｓｉｓｔｏｒ）を用いることもできる。また、本実施形態では、還流ダイオードとしてＭＯＳＦＥＴ１０１の内蔵ボディーダイオードを用いているが、還流ダイオードを別途搭載した形態も可能である。
　絶縁基板１０３は、絶縁層１０３Ｉと、裏面（放熱ベース１０４側）及び表面（半導体素子側）配置された配線層と、から構成される。絶縁層には、絶縁耐圧が高い窒化アルミニウム（ＡｌＮ）、窒化珪素（ＳｉＮ）、アルミナ（ＡｌＯ）等を用いることができる。
絶縁層の厚さは半導体装置に必要な絶縁特性に合わせ、０．１～１．５ｍｍの範囲に設定される。本実施形態においては、絶縁層１０３Ｉには、厚さ０．６ｍｍ程度のＡｌＮ（窒化アルミニウム）を用いた。絶縁層１０３Ｉの裏面には、厚さ０．２ｍｍ程度の銅のベタパターン（配線層）がろう付けされている。絶縁層１０３Ｉの表面には、厚さ０．３ｍｍ程度のＣｕの配線パターン（配線層）がろう付けされている。絶縁基板１０３の表面側の配線はドレイン配線パターン１０３Ｃ、ソース配線パターン１０３Ｅ、ゲート配線１０３Ｇに分かれている。
　ＭＯＳＦＥＴ１０１のドレイン電極１０１Ｃは、絶縁基板１０３上のドレイン配線パターン１０３Ｃに接合層１０８を介して接続されている。ＭＯＳＦＥＴ１０１のソース電極１０１Ｅは、接合層１０９を介して導電板１０６に接続されている。導電性プレート１０６は、接合層１１０を介して導電性ブロック１０５に接続されている。また、導電性ブロック１０５は接合層１１１を介して絶縁基板１０３のソース配線パターン１０３Ｅに接続されている。
　ＭＯＳＦＥＴ１０１のゲート電極１０１Ｇは、絶縁基板１０３上のゲート配線１０３Ｇにゲートワイヤ１１３で接続されている。ＭＯＳＦＥＴ１０１は、ゲート電極１０１Ｇとソース電極１０１Ｅの電位差によって、ドレイン電極１０１Ｃとソース電極１０１Ｅの間の抵抗を制御できる。絶縁基板１０３上のゲート配線１０３Ｇとソース配線パターン１０３Ｅは、外部のゲート駆動回路に繋がっている。
　絶縁基板１０３は接合層１１２を介して放熱基板１０４と接続されている。放熱基板１０４は、半導体素子から発せられた熱を効率よく外部の冷却器に伝える役目を担う。材質としては、熱伝導率の高い銅やアルミニウム、またはそれらの合金、アルミニウムとシリコンカーバイドの複合材料（ＡｌＳｉＣ）などを用いることができる。本実施形態においては、放熱基板にＣｕを用い、裏面側をフィン形状とした。Ｃｕは熱伝導率が高く加工性に優れるため、フィン形状を付与するのが比較的容易であるという利点がある。
　接合層は、例えば、はんだ材や金属粒子、酸化金属粒子を主体とした低温焼結接合材等が用いられる。はんだ材には、例えば、錫、ビスマス、亜鉛、金等が主成分であるはんだを用いることができる。金属粒子には、凝集保護材で被覆された銀や銅のナノ粒子を用いることができる。酸化金属粒子には、低温で還元可能な酸化金属が適用可能である。金属粒子や酸化物金属粒子を主体とした焼結接合材を用いた場合、接合層は焼結金属層となる。焼結金属層のなかでも焼結銅は従来の鉛はんだに比べ、融点が高く耐熱温度が高いため、信頼性の高い半導体装置を提供可能となる。さらに鉛フリーとなるため環境にもやさしい。
　絶縁基板の絶縁層の熱膨張係数と放熱基板の熱膨張係数の差が大きい場合は、熱応力を考慮して絶縁基板と放熱基板の接合信頼性を高めることが好ましい。本実施形態においては絶縁層にＡｌＮ、放熱基板にＣｕを用いており、絶縁層と放熱基板の熱膨張係数の差が大きい。そのため、絶縁基板と放熱基板の接合信頼性を高めるために、絶縁基板と放熱基板とを接合する接合層１１１を焼結銅とした。放熱基板も銅、絶縁基板の裏側もＣｕパターンであり、ＣｕとＣｕの接合とすることができる。その結果、信頼性の高い接合界面が得ることができる。さらにＣｕの焼結体は融点が高いため耐熱温度も高くすることができる。絶縁基板と放熱基板とを接合する接合層１１１は、焼結銅に限定されるものではなく、例えば銀の焼結体を用いても信頼性の高い接合界面が得られる。
　なお、半導体装置はこの他に、上記構成を覆う樹脂ケース、外部接続用電極、放電防止のための内部充填剤等を必要とする。樹脂ケース、外部接続用電極、内部充填剤等は、半導体装置に一般に用いられているものを適用することができる。
　＜半導体装置の製造方法＞
　次に本実施例で示す半導体装置の製造方法について図４を用いて説明する。はじめに、絶縁基板１０３上に酸化銅微粒子を有機溶剤に混ぜたペースト１１５を塗布する（ａ工程）。その後、ＭＯＳＦＥＴ１０１を塗布されたペーストの上に搭載し（ｂ工程）、ＭＯＳＦＥＴ１０１の上にも同ペーストを塗布し（ｃ工程）、その上に導電板１０６を搭載する（ｄ工程）。さらに導電板１０６の上にも同ペーストを塗布し（ｅ工程）、導電性ブロック１０５を搭載する（ｆ工程）。次に、放熱基板１０４の上に酸化銅粒子を有機溶剤に混ぜたペーストを塗布し（ｇ工程）、その上に、導電性ブロック１０５の搭載まで終えた絶縁基板１０３を搭載し、導電性ブロック１０５の上面を加圧しながら、水素雰囲気中にて３００℃で加熱することにより、ペースト中の酸化銅微粒子が還元すると共に焼結し各界面が接合する（ｈ工程）。その後、ゲートワイヤ１１３をワイヤボンディングする（ｉ工程）。このようなプロセスにより複数の接合界面を一括で接合することができ、製造コストを低減することができる。
　ただし、製造プロセスはこれに限定するものではなく、例えば図４に示すように、導電性ブロック１０５を搭載した段階で焼結させ（ｆ工程）、ゲートワイヤ１１３をワイヤボンディングし（ｇ工程）、放熱基板１０４の上に酸化銅粒子を有機溶剤に混ぜたペーストを塗布し（ｈ工程）、その上に、導電性ブロック１０５の接合まで終えた絶縁基板１０３を搭載し（ｉ工程）、絶縁基板１０３と放熱基板１０４の間のペーストを焼結させるというプロセスも可能である。
　また、ＭＯＳＦＥＴ１０１の上面や、導電板１０６の上面に予めペーストを塗布しておき、図４及び図５で示したｃ工程、ｅ工程を省略することも可能である。
　図４で示したｇ工程や、図５で示したｈ工程において、ペーストを絶縁基板１０３に対応した面積全体に塗布するのではなく、間欠的に塗布してもよい。これにより、ペースト塗布領域間の隙間に還元ガスである水素が侵入し、還元反応を促進できる。その結果、接合信頼性が高くなる。
１０１…ＭＯＳＦＥＴ、１０１Ｃ…ドレイン電極、１０１Ｅ…ソース電極、１０１Ｇ…ゲート電極、１０３…絶縁基板、１０３Ｉ…絶縁層、１０３Ｃ…ドレイン配線パターン、１０３Ｅ…ソース配線パターン、１０３Ｇ…ゲート配線、１０４…放熱基板、１０５…導電性ブロック、１０５Ｔ…導電性ブロック凸部、１０６…導電板、１０７…端子電極、１０８…半導体素子と絶縁基板とを接合する接合層、１０９…導電板と半導体素子とを接合する接合層、１１０…導電板と導電性ブロックとを接合する接合層、１１１…導電性ブロックと半導体素子とを接合する接合層、１１２…絶縁基板と放熱基板とを接合する接合層、１１３…ゲートワイヤ、１１５…酸化銅ペースト

Claims (14)

  1. 　端子電極と、
    　放熱基板と、
    　前記放熱基板上に配置され配線層を備える絶縁基板と、
    　前記絶縁基板上に配置された複数の半導体素子と、
    　前記半導体素子の表面電極と電気的に接続された導電性ブロックと、を備え、
    　前記導電性ブロックは凸部を有し、
    　前記凸部は前記絶縁基板と接合していることを特徴とする半導体装置。
  2. 　請求項１に記載の半導体装置であって、
    　前記半導体素子は、前記導電性ブロックの中心から各々の半導体素子までの距離が略等間隔となるように配置していることを特徴とする半導体装置。
  3. 　請求項１または２に記載の半導体装置であって、
    　前記凸部は、前記導電性ブロックと接合する前記表面電極と同じノードの配線層上に接合されていることを特徴とする半導体装置。
  4. 　請求項１に記載の半導体装置であって、
    　前記導電性ブロックと前記絶縁基板との接合面の面積は、前記半導体素子の面積よりも大きいことを特徴とする半導体装置。
  5. 　請求項１に記載の半導体装置であって、
    　前記凸部と前記半導体素子の間隔は５ｍｍ以下であることを特徴とする半導体装置。
  6. 　請求項１乃至５のいずれかに記載の半導体装置であって、
    　前記導電性ブロックは導電板を介して前記半導体素子の表面電極と接合していることを特徴とする半導体装置。
  7. 　請求項６に記載の半導体装置であって、
    　前記導電板の熱膨張係数は、前記半導体素子の熱膨張係数より大きく、前記導電性ブロックの熱膨張係数よりも小さいことを特徴とする半導体装置。
  8. 　請求項１乃至７のいずれかに記載の半導体装置であって、
    　前記絶縁基板と前記放熱基板は焼結金属層を介して接合していることを特徴とする半導体装置。
  9. 　請求項１乃至７のいずれかに記載の半導体装置であって、
    　前記半導体素子の表面電極と前記導電性ブロック、前記導電性ブロックと前記絶縁基板の配線層の少なくともいずれかは、焼結金属層を介して接合していることを特徴とする半導体装置。
  10. 　請求項６又は７に記載の半導体装置であって、
    　前記半導体素子の表面電極と前記導電性ブロック、前記導電性ブロックと前記絶縁基板の配線層、前記半導体素子の表面電極と前記導電板、前記絶縁基板の配線層と前記導電板の少なくともいずれかは、焼結金属層を介して接合していることを特徴とする半導体装置。
  11. 　請求項８乃至１０のいずれかに記載の半導体装置であって、
    　前記焼結金属層は銅を含むことを特徴とする半導体装置。
  12. 　前記絶縁基板と前記放熱基板は金属焼結体により間欠的に接合されていることを特徴とする請求項８に記載の半導体装置。
  13. 　請求項１乃至１２のいずれかに記載の半導体装置であって、
    　前記放熱基板は銅からなることを特徴とする半導体装置。
  14. 　請求項１３に記載の半導体装置であって、
    　前記放熱基板はフィン加工されていることを特徴とする半導体装置。
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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019071399A (ja) * 2016-11-21 2019-05-09 ローム株式会社 パワーモジュールおよびその製造方法、グラファイトプレート、および電源装置
JP6541896B1 (ja) * 2018-05-30 2019-07-10 三菱電機株式会社 半導体モジュールおよび電力変換装置
JP2020072106A (ja) * 2018-10-29 2020-05-07 ローム株式会社 半導体装置
US11367669B2 (en) 2016-11-21 2022-06-21 Rohm Co., Ltd. Power module and fabrication method of the same, graphite plate, and power supply equipment
US11955451B2 (en) 2020-10-14 2024-04-09 Rohm Co., Ltd. Semiconductor module
US11955414B2 (en) 2020-10-14 2024-04-09 Rohm Co., Ltd. Semiconductor module
US11961790B2 (en) 2020-10-14 2024-04-16 Rohm Co., Ltd. Semiconductor module
WO2024185127A1 (ja) * 2023-03-09 2024-09-12 三菱電機株式会社 半導体装置及びその製造方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6440794B1 (ja) * 2017-09-22 2018-12-19 三菱電機株式会社 半導体装置
JP6881238B2 (ja) * 2017-10-31 2021-06-02 三菱電機株式会社 半導体モジュール、その製造方法及び電力変換装置
KR20200135395A (ko) * 2018-03-23 2020-12-02 미쓰비시 마테리알 가부시키가이샤 전자 부품 실장 모듈의 제조 방법
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WO2022019089A1 (ja) * 2020-07-21 2022-01-27 住友ベークライト株式会社 パワーモジュール

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002176128A (ja) * 2000-12-06 2002-06-21 Toyota Motor Corp マルチチップモジュールの冷却構造
JP2005064441A (ja) * 2003-07-29 2005-03-10 Fuji Electric Holdings Co Ltd 半導体装置
JP2006237429A (ja) * 2005-02-28 2006-09-07 Okutekku:Kk 半導体装置、電極用部材および電極用部材の製造方法
JP2010129550A (ja) * 2008-11-25 2010-06-10 Mitsubishi Electric Corp 電力用半導体モジュール
JP2010232369A (ja) * 2009-03-26 2010-10-14 Honda Motor Co Ltd 半導体装置
WO2012014843A1 (ja) * 2010-07-26 2012-02-02 日立オートモティブシステムズ株式会社 パワー半導体ユニット、パワーモジュール、パワー半導体ユニットの製造方法およびパワーモジュールの製造方法
JP2014022579A (ja) * 2012-07-19 2014-02-03 Rohm Co Ltd パワーモジュール半導体装置
JP2015015270A (ja) * 2013-07-03 2015-01-22 三菱電機株式会社 半導体装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009224529A (ja) 2008-03-17 2009-10-01 Fuji Electric Device Technology Co Ltd 半導体装置およびその製造方法
DE102011078811B3 (de) 2011-07-07 2012-05-24 Semikron Elektronik Gmbh & Co. Kg Leistungselektronisches System mit einer Kühleinrichtung

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002176128A (ja) * 2000-12-06 2002-06-21 Toyota Motor Corp マルチチップモジュールの冷却構造
JP2005064441A (ja) * 2003-07-29 2005-03-10 Fuji Electric Holdings Co Ltd 半導体装置
JP2006237429A (ja) * 2005-02-28 2006-09-07 Okutekku:Kk 半導体装置、電極用部材および電極用部材の製造方法
JP2010129550A (ja) * 2008-11-25 2010-06-10 Mitsubishi Electric Corp 電力用半導体モジュール
JP2010232369A (ja) * 2009-03-26 2010-10-14 Honda Motor Co Ltd 半導体装置
WO2012014843A1 (ja) * 2010-07-26 2012-02-02 日立オートモティブシステムズ株式会社 パワー半導体ユニット、パワーモジュール、パワー半導体ユニットの製造方法およびパワーモジュールの製造方法
JP2014022579A (ja) * 2012-07-19 2014-02-03 Rohm Co Ltd パワーモジュール半導体装置
JP2015015270A (ja) * 2013-07-03 2015-01-22 三菱電機株式会社 半導体装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3276661A4 *

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12046532B2 (en) 2016-11-21 2024-07-23 Rohm Co., Ltd. Power module and fabrication method of the same, graphite plate, and power supply equipment
JP7025181B2 (ja) 2016-11-21 2022-02-24 ローム株式会社 パワーモジュールおよびその製造方法、グラファイトプレート、および電源装置
JP2019071399A (ja) * 2016-11-21 2019-05-09 ローム株式会社 パワーモジュールおよびその製造方法、グラファイトプレート、および電源装置
US11367669B2 (en) 2016-11-21 2022-06-21 Rohm Co., Ltd. Power module and fabrication method of the same, graphite plate, and power supply equipment
WO2019229894A1 (ja) * 2018-05-30 2019-12-05 三菱電機株式会社 半導体モジュールおよび電力変換装置
JP6541896B1 (ja) * 2018-05-30 2019-07-10 三菱電機株式会社 半導体モジュールおよび電力変換装置
JP2020072106A (ja) * 2018-10-29 2020-05-07 ローム株式会社 半導体装置
JP7284566B2 (ja) 2018-10-29 2023-05-31 ローム株式会社 半導体装置
US11955414B2 (en) 2020-10-14 2024-04-09 Rohm Co., Ltd. Semiconductor module
US11955452B2 (en) 2020-10-14 2024-04-09 Rohm Co., Ltd. Semiconductor module
US11955413B2 (en) 2020-10-14 2024-04-09 Rohm Co., Ltd. Semiconductor module
US11961790B2 (en) 2020-10-14 2024-04-16 Rohm Co., Ltd. Semiconductor module
US11955451B2 (en) 2020-10-14 2024-04-09 Rohm Co., Ltd. Semiconductor module
US12057426B2 (en) 2020-10-14 2024-08-06 Rohm Co., Ltd. Semiconductor module
US12068230B2 (en) 2020-10-14 2024-08-20 Rohm Co., Ltd. Semiconductor module
WO2024185127A1 (ja) * 2023-03-09 2024-09-12 三菱電機株式会社 半導体装置及びその製造方法

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