WO2016047455A1 - 半導体パワーモジュール及び半導体駆動装置 - Google Patents

半導体パワーモジュール及び半導体駆動装置 Download PDF

Info

Publication number
WO2016047455A1
WO2016047455A1 PCT/JP2015/075728 JP2015075728W WO2016047455A1 WO 2016047455 A1 WO2016047455 A1 WO 2016047455A1 JP 2015075728 W JP2015075728 W JP 2015075728W WO 2016047455 A1 WO2016047455 A1 WO 2016047455A1
Authority
WO
WIPO (PCT)
Prior art keywords
terminal
main
mutual inductance
switching element
semiconductor
Prior art date
Application number
PCT/JP2015/075728
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
敬介 堀内
政光 稲葉
大助 川瀬
克明 齊藤
Original Assignee
株式会社日立パワーデバイス
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立パワーデバイス filed Critical 株式会社日立パワーデバイス
Priority to DE112015003784.5T priority Critical patent/DE112015003784B4/de
Publication of WO2016047455A1 publication Critical patent/WO2016047455A1/ja

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
    • H03K17/0828—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in composite switches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0027—Measuring means of, e.g. currents through or voltages across the switch

Definitions

  • the present invention relates to a semiconductor power module on which a power semiconductor element such as an insulated gate bipolar transistor (hereinafter referred to as IGBT) is mounted, and a semiconductor driving device for driving the semiconductor power module.
  • a power semiconductor element such as an insulated gate bipolar transistor (hereinafter referred to as IGBT) is mounted
  • IGBT insulated gate bipolar transistor
  • an antiparallel connection circuit (referred to as an “arm”) of a semiconductor switching element and a diode is generally used.
  • the arm connected between the positive terminal and the AC terminal is called the upper arm
  • the arm connected between the AC terminal and the negative terminal is called the lower arm.
  • a pair of upper and lower arms can output AC power for one phase. Therefore, three sets of upper and lower arms (6 arms in total) are required to output three-phase alternating current.
  • a semiconductor drive device that drives the semiconductor power module is provided with an overcurrent protection circuit that turns off the semiconductor switching element when an overcurrent flows.
  • a current detection means for detecting the current flowing through the semiconductor switching element in the semiconductor power module is required.
  • techniques relating to such current detection means techniques described in Patent Document 1 and Patent Document 2 are known.
  • the emitter current is obtained by integrating the voltage generated in the parasitic inductance of the main circuit wiring on the emitter side of the IGBT.
  • the voltage generated by the parasitic inductance of the emitter electrode plate and the emitter terminal in the IGBT module is input to the integration circuit and integrated, whereby the current flowing through the IGBT is changed. Measured.
  • the IGBT module is provided with a dedicated terminal for connecting the integrating circuit.
  • Power converters are installed together with other equipment in a limited space under the passenger floor for electric railway vehicles, and in a limited space in the hood for electric vehicles, so miniaturization of semiconductor power modules is required.
  • the When a semiconductor power module is miniaturized the main terminals through which the main current flows, the control terminals that connect the semiconductor drive device, the conductors that make up the detection terminals that output voltage signals to detect abnormal conditions such as overcurrent, and the terminals Since the wiring conductors for connecting these terminals and the semiconductor elements are arranged close to each other, the magnetic flux generated by the main current flowing through these terminals and the wiring conductors affects each terminal and each wiring conductor. . In particular, the influence on the detection signal voltage output from the detection signal terminal is great, and this is a problem in detecting the current with high accuracy and reliably protecting the semiconductor switching element from overcurrent.
  • the present invention provides a semiconductor power module and a semiconductor drive device capable of detecting an overcurrent with high accuracy and reliably protecting the semiconductor switching element from the overcurrent.
  • a semiconductor power module has a first main terminal and a second main terminal through which a main current flows, a first main electrode and a second main electrode, A first semiconductor switching element electrically connected to the first main terminal and a second main electrode electrically connected to the second main terminal, wherein A first signal terminal for detecting the potential of the first main electrode and a second signal terminal for detecting the potential of the first main terminal.
  • the first signal terminal From the first signal terminal and the second signal terminal, the first signal terminal The first self-inductance due to the main terminal, the first mutual inductance between the first main terminal and the second main terminal, and the first current corresponding to the change in the current flowing through the first main electrode A detection voltage is output, and the detection voltage is used for overcurrent protection of the first semiconductor switching element. It is, in the overcurrent protection, in which the first mutual inductance is used.
  • another semiconductor power module includes a first main terminal and a second main terminal, which are a pair of DC terminals, and a first main electrode and a second main electrode.
  • a first semiconductor switching element in which the first main electrode is electrically connected to the first main terminal, a third main electrode and a fourth main electrode, and a fourth main electrode Includes a second semiconductor switching element electrically connected to the second main terminal, and the first semiconductor switching element and the second semiconductor switching element include the second main electrode and the third semiconductor switching element.
  • An AC terminal that is connected in series by being electrically connected to the main electrode by a conductor and is electrically connected to a series connection point of the first semiconductor switching element and the second semiconductor switching element.
  • the first A first signal terminal for detecting the potential of the main electrode; a second signal terminal for detecting the potential of the first main terminal; a third detection terminal for detecting the potential of the second main electrode; And a fourth detection terminal for detecting the potential of the main electrode. From the first signal terminal and the second signal terminal, a first self-inductance due to the first main terminal, a first mutual inductance between the first main terminal and the second main terminal, A first detection voltage corresponding to a second mutual inductance between the first main terminal and the conductor and a change in the current flowing through the first main electrode is output, and the third signal terminal and the fourth signal are output.
  • a second self-inductance due to the conductor, a first mutual inductance, a third mutual inductance between the second main terminal and the conductor, and a change in the current flowing through the third main electrode A corresponding second detection voltage is output.
  • the first detection voltage is used for overcurrent protection of the first semiconductor switching element
  • the second detection voltage is used for overcurrent protection of the second semiconductor switching element
  • the overcurrent protection of the first semiconductor switching element The first mutual inductance and the second mutual inductance are used, and the first mutual inductance and the third mutual inductance are used in overcurrent protection of the second semiconductor switching element.
  • a semiconductor drive device drives another semiconductor power module according to the present invention, and includes a first semiconductor switching element based on a first detection voltage.
  • a first abnormality determination circuit that outputs a first determination signal when an overcurrent is detected, and a first logic that outputs a first off command according to the first determination signal
  • a circuit a first control circuit for turning off the first semiconductor switching element in response to the first OFF command, and an overcurrent flowing through the second semiconductor switching element based on the second detection voltage
  • a second abnormality determination circuit that outputs a second determination signal when an overcurrent is detected, a second logic circuit that outputs a second off command in response to the second determination signal, and a second In response to the off command, the second And a second control circuit to turn off driving the semiconductor switching element.
  • the detection voltage output from the semiconductor power module is used for overcurrent protection using mutual inductance, so that the overcurrent can be detected with high accuracy and the semiconductor switching element can be reliably exceeded. Can be protected from current.
  • Embodiment 1 shows an equivalent circuit of a semiconductor power module according to Embodiment 1 of the present invention.
  • the principal part structure of the semiconductor power module which is Embodiment 1 of this invention is shown.
  • 2 shows an equivalent circuit of an example of a conventional semiconductor power module.
  • the principal part structure of an example of the semiconductor power module by a prior art is shown.
  • the circuit structure of the power converter device which is an application example of the semiconductor power module by this invention is shown.
  • the external appearance of the semiconductor power module which is Embodiment 2 of this invention is shown.
  • 3 shows an equivalent circuit of the semiconductor power module of the second embodiment.
  • FIG. 6 shows an equivalent circuit of a semiconductor power module according to Embodiment 4 of the present invention.
  • 7 shows a semiconductor drive device according to a fifth embodiment of the present invention.
  • the semiconductor power module shown in FIG. 8 and the mounting state of a driver circuit are shown.
  • 10 shows a semiconductor drive device according to Embodiment 6 of the present invention.
  • the external appearance of the semiconductor power module which is Embodiment 7 of this invention is shown.
  • the internal structure of the 6 in 1 module which is Embodiment 8 of this invention is shown.
  • FIG. 1A and FIG. 1B show a semiconductor power module (hereinafter simply referred to as “module”) that is Embodiment 1 of the present invention.
  • the semiconductor switching element in this module is an IGBT.
  • this module has a so-called 1in1 configuration, and its equivalent circuit and the main structure of the module are shown in FIGS. 1 (a) and 1 (b), respectively.
  • 1in1 means that one module includes one arm, that is, one anti-parallel circuit of an IGBT 2a and a diode 2b, as shown in FIG. 1 (a).
  • the anti-parallel circuit is a parallel circuit in which the IGBT 2a and the diode 2b are connected in parallel so that the forward directions are opposite to each other.
  • an arm is configured by one IGBT 2a and one diode 2b.
  • a plurality of IGBTs are arranged according to the current capacity of the module.
  • a reverse parallel connection circuit of a plurality of diodes is applied, or a parallel connection of a plurality of arms is applied.
  • FIG. 1B the resin case for storing the main part of the illustrated module, the resin for sealing the IGBT, the diode, and the like are not shown.
  • Inductance L 1 is a self-inductance of the positive terminal 11a, a combined inductance of the self-inductance of such conductors for connecting the collector electrode and the positive terminal of the IGBT 2a.
  • Inductance L 2 is a combined inductance of the self-inductance of such conductors for connecting the self-inductance of the negative terminal 11b, the emitter electrode and the negative terminal 11b of the IGBT 2a.
  • the self-inductance of the positive terminal 11a and the self-inductance of the negative terminal 11b are dominant.
  • the collector electrode and the emitter electrode of the IGBT 2a are main electrodes formed on the surface of the semiconductor chip.
  • the positive terminal 11a and the negative terminal 11b are main terminals through which main current (load current, short-circuit current) flows.
  • M 12 is the mutual inductance between the positive terminal 11a and negative terminal 11b.
  • the positive electrode terminal 11a and the negative electrode terminal 11b have a stacked portion in which they are stacked close to each other. In the stacked portion, the main current flowing through the positive electrode terminal 11a and the main current flowing through the negative electrode terminal 11a are close to each other, and the flowing directions are parallel and opposite to each other. For this reason, the magnetic flux generated by the current flowing through one of the positive electrode terminal 11a and the negative electrode terminal 11b greatly affects the other.
  • increasing the size of the mutual inductance M 12 becomes the L 2 the size of the same order.
  • the signal terminal for detecting the current that is, the auxiliary emitter terminal 3d that outputs the potential of the emitter electrode of the IGBT 2a and the auxiliary negative terminal 3f that outputs the potential of the negative electrode terminal 11b. Affects voltage. Therefore, according to the study of the present inventor, it is necessary to use the mutual inductance without considering the value as zero in overcurrent detection and overcurrent protection of the semiconductor switching element. By using the mutual inductance, the overcurrent detection accuracy is improved, and the semiconductor switching element can be reliably protected from the overcurrent.
  • the gap between the positive electrode terminal 11a and the negative electrode terminal 11b is a gap in the first embodiment.
  • a member may intervene.
  • the distance between the terminals can be reduced.
  • An IGBT 2a is connected to a semiconductor driving device (hereinafter referred to as “gate driver”) that is electrically connected to the gate electrode and the emitter electrode of the IGBT 2a and drives the IGBT 2a on and off by detecting an overcurrent such as a short circuit current.
  • gate driver a semiconductor driving device
  • a detection voltage signal output between the auxiliary emitter terminal 3d and the auxiliary negative terminal 3f is transmitted to the gate driver.
  • the detected voltage signal V d-f is based on the time rate of change of self inductance L 2, the current flowing through the mutual inductance M 12, IGBT 2a emitter electrode between the positive electrode terminal 11a and negative terminal 11b of the negative electrode terminal 11b (di / dt) And expressed as equation (1).
  • detection according to L 2 , M 12 , dI L2 / dt is performed from the auxiliary emitter terminal 3d and the auxiliary negative electrode terminal 3f in the module as shown in the equation (1).
  • the voltage signal V df is output, the IGBT is overcurrent protected based on this V df , and M 12 is used for overcurrent protection, so the overcurrent is detected with high accuracy, and the module IGBT can be reliably protected from overcurrent.
  • the positive terminal 11a and the negative terminal 11b through which a large current flows, the aluminum wire joined to the IGBT, and the copper pattern of the insulating substrate are close to each other. becomes larger, the detection voltage signal from the auxiliary emitter terminal 3d and an auxiliary negative terminal 3f, using M 12 and equation (1) to (2), is and highly protective operation with high accuracy at the time of abnormality such as a short circuit It becomes possible.
  • equations (1) and (2) it is easy to set the overcurrent protection level in the overcurrent protection circuit in the gate driver by formulating the detected voltage and the detected current including the mutual inductance.
  • the circuit configuration of the gate driver can be simplified.
  • M 12 to be used for overcurrent protection the module configuration of electrodes and wiring, for example, by computer simulation, can be obtained in advance.
  • FIGS. 2 (a) and 2 (b) show an example of a module according to the prior art for comparison.
  • This module also has a 1in1 configuration, and the equivalent circuit and the main structure of the module are shown in FIGS. 2 (a) and 2 (b), respectively, as in FIGS. 1 (a) and 1 (b). .
  • the positive electrode terminal 11a and the negative electrode terminal 11b are provided apart from each other, and as the auxiliary negative electrode terminal 3f, a conductor separate from the electrode and wiring in the module is connected to the negative electrode terminal 11b outside the module. Is done. Therefore, according to the studies of the present inventors, in the detection and overcurrent protection of overcurrent, as the size of the mutual inductance M 12 is negligible small, and substantially zero.
  • FIG. 3 shows a circuit configuration of a power converter as an application example of the module according to the present invention.
  • the power converter device in this application example is applied to the motor drive of an electric railway vehicle.
  • the power conversion device 100 includes an inverter circuit as a main circuit, and is connected between the overhead line 300 and a grounding unit 400 such as a rail or a vehicle body via the transformer device 200.
  • AC power is supplied from the power converter 100 to the induction motor (M) 500.
  • the induction motor (M) 500 is connected to four wheels for each vehicle.
  • the transformer device 200 is a transformer and a converter module that converts AC to DC.
  • the direct current voltage level is adjusted as necessary using the transformer 200 as a chopper circuit.
  • inverter module 110 for converting DC power into AC power of a predetermined frequency
  • capacitor module 120 for stabilizing and smoothing the DC voltage supplied from transformer 200
  • an inverter A driver circuit 130 for driving and controlling the module 110
  • a control circuit 140 for supplying a control signal to the driver circuit 130
  • each arm in the upper and lower arm series circuits 1a, 1b, and 1c is composed of an anti-parallel circuit of an IGBT 2a and a diode 2b.
  • the upper and lower ends of the upper and lower arm series circuits 1a, 1b, and 1c are connected to the positive electrode and the negative electrode of the capacitor module 120, respectively.
  • the current switch circuit composed of the IGBT 2a and the diode 2b arranged on the upper side (positive electrode terminal 11a side) operates as an upper arm, and comprises the IGBT 2c and the diode 2d arranged on the lower side (negative electrode terminal 11b side).
  • the current switch circuit operates as a lower arm.
  • the inverter module 110 is configured by a so-called three-phase bridge circuit in which three sets of such upper and lower arm series circuits are provided. Then, three-phase AC power (U, V, W) is output from the midpoint position of the upper and lower arm series circuits 1a, 1b, 1c, that is, from the series connection portion (AC terminal 11c) of the upper and lower arms. Three-phase AC power (U, V, W) is supplied to induction motor (M) 500.
  • the upper arm gate signal output from the driver circuit 130 is supplied to the upper arm IGBT 2a of each phase via the upper arm gate terminal 3a, and the lower arm gate signal is supplied to the lower arm gate terminal 3c. It is supplied to the arm IGBT 2c.
  • each IGBT is turned on / off, and the amplitude and phase of the three-phase alternating current (U, V, W) are controlled.
  • the upper arm auxiliary emitter terminal 3b is connected to the emitter electrode of the upper arm IGBT 2a of each phase
  • the lower arm auxiliary emitter terminal 3d is connected to the emitter electrode of the lower arm IGBT 2 of each phase. Connected.
  • auxiliary collector terminal 3g and the auxiliary negative terminal 3f of the lower arm IGBT are connected to the driver circuit 130, and an overcurrent such as a short-circuit current of the upper arm IGBT 2a due to a potential difference between the upper arm auxiliary emitter terminal 3b and the lower arm auxiliary collector terminal 3g. Is detected. Further, an overcurrent such as a short-circuit current of the lower arm IGBT 2c is detected by a potential difference between the lower arm auxiliary emitter terminal 3d and the auxiliary negative electrode terminal 3f.
  • the specific overcurrent detection means is the same as that of the semiconductor power module of the first embodiment described above.
  • the control circuit 140 includes a microcomputer for calculating the switching timing of each IGBT (2a, 2c).
  • the emitter electrode of each IGBT (2a, 2c) is connected to the driver circuit 130.
  • the driver circuit 130 detects the current flowing through the emitter electrode for each IGBT, and for the IGBT (2a, 2c) in which the overcurrent is detected, The switching operation is stopped to protect against overcurrent.
  • the control circuit 140 includes a temperature sensor (not shown) provided in the upper and lower arm series circuits 1a, 1b, and 1c and a DC voltage detection circuit that detects a DC voltage applied to both ends of the upper and lower arm series circuits 1a, 1b, and 1c.
  • control circuit 140 detects abnormalities such as overtemperature and overvoltage based on these signals.
  • the control circuit 140 detects an abnormality such as overtemperature or overvoltage
  • the control circuit 140 transmits a command signal to the driver circuit 130 so as to stop the switching operation of all the IGBTs in the inverter module 110.
  • the driver circuit 130 receives a command signal from the control circuit 140, the driver circuit 130 turns off each IGBT to protect it from abnormalities such as overcurrent, overvoltage, and overtemperature.
  • each arm uses a module of 1 in 1 configuration according to the first embodiment as shown in FIGS. 1 (a) and 1 (b).
  • Each of the upper and lower arm series circuits may be configured by a 2 in 1 module described later, or the upper and lower arm series circuits for three phases may be configured by a 6 in 1 module as described later.
  • a plurality of modules may be connected in parallel according to the magnitude of the output current of the inverter circuit.
  • the power converter device 100 may be equipped with the charging function which charges a secondary battery and a secondary battery.
  • FIG. 4 shows the appearance of a module that is Embodiment 2 of the present invention.
  • the semiconductor switching element in this module is an IGBT.
  • this module has a so-called 2-in-1 configuration.
  • 2in1 means that one module includes two arms each composed of an anti-parallel circuit of an IGBT and a diode.
  • two arms are connected in series in the module to form a set of upper and lower arm series circuits. Two arms may be connected in series outside the module.
  • the module of the second embodiment includes a module case 12 made of resin that covers each arm, each terminal, and internal wiring. On the upper surface of the module case 12, a connection portion of each terminal with an external circuit is exposed. Yes.
  • a main terminal (positive terminal 11a, negative terminal 11b, AC terminal 11c) through which a large main current flows and a weak signal terminal (upper arm gate terminal 3a (upper gate) and lower arm gate terminal 3c ( Lower gate), upper arm auxiliary emitter terminal 3b (upper emitter) and lower arm auxiliary emitter terminal 3d (lower emitter), upper arm auxiliary collector terminal 3e (upper collector) and lower arm auxiliary collector terminal 3g (lower collector), auxiliary negative electrode
  • the terminal 3 f (negative electrode signal terminal)) has a predetermined insulation distance (spatial distance and creepage distance) secured by a groove 13 provided in the module case 12.
  • signal terminals (upper arm auxiliary emitter terminal 3b (upper emitter) and lower arm auxiliary collector terminal 3g) for outputting a detection voltage for detecting the current of the IGBT with high accuracy are used.
  • Lower collector lower arm auxiliary emitter terminal 3d (lower emitter) and auxiliary negative terminal 3f (negative signal terminal)).
  • the module case 12 is bonded to the base 14, and an IGBT and a diode are mounted inside the module.
  • the AC terminal 11c is arranged on the surface 15b opposite to the surface 15a on which the positive electrode terminal 11a and the negative electrode terminal 11b are arranged.
  • the gate driver or the driver circuit 130 shown in FIG. 3 can be directly attached to the module.
  • a plurality of modules according to the second embodiment are arranged side by side, but the driver circuit 130 can be disposed so as to straddle the top surfaces of the plurality of modules.
  • the wiring length between the driver circuit 130 and the module 10 can be shortened, and the driver circuit 130 can be integrated on one substrate, so that the loop inductance between the gate electrode and the emitter electrode in the IGBT is reduced. It becomes possible to do.
  • the external planar shape of the module 10 is substantially rectangular, and the positive terminal 11a, the negative terminal 11b, and the AC terminal 11c are provided on the short side.
  • the insulation distance between adjacent modules is ensured by the grooves 13, so that the interval between adjacent modules can be reduced.
  • the collector electrode provided on the semiconductor chip of each IGBT mounted on the module and the cathode electrode provided on the semiconductor chip of each diode are soldered to the copper pattern of the insulating substrate.
  • the emitter electrode provided on the semiconductor chip of each IGBT and the anode electrode provided on the semiconductor chip of each diode are electrically connected to a predetermined copper pattern on the insulating substrate by an aluminum wire.
  • FIG. 5A and FIG. 5B show an equivalent circuit of the module of the second embodiment and a configuration of main parts therein, respectively.
  • the aluminum wires 41a and 41b connect the emitter electrode of the upper arm IGBT and the copper pattern of the upper arm insulating substrate 31a, and are electrically connected to the lower arm IGBT. It is connected to the insulating substrate 31b to which the collector electrode is connected.
  • the aluminum wires 41c and 41d connect the emitter electrode of the lower arm IGBT and the copper pattern of the lower arm insulating substrate 31b, and are electrically connected to the negative terminal 11b.
  • I L1 , I L2 , and I L3 in FIGS. 5A and 5B indicate short circuit currents. That is, this figure shows a state when the upper arm IGBT and the lower arm IGBT are turned on simultaneously due to an abnormal operation.
  • the aluminum wires 41a, 41b, 41c, and 41d have a self-inductance component, and have a positive or negative coupling coefficient between the self-inductances depending on the direction of current.
  • Self-inductance L 1 is the inductance obtained by combining the self-inductance of the copper pattern of the insulating substrate 31a for connecting the collector of the self-inductance and the upper arm IGBT2a of the positive electrode terminal 11a.
  • Self-inductance L 2 is an inductance obtained by combining the self-inductance of the copper pattern of the insulating substrate 31c to the emitter electrode side aluminum wire (41a, 41b) of the upper arm IGBT is a collector electrode of the self-inductance and the lower arm IGBT of being connected.
  • Self-inductance L 3 is an inductance obtained by combining the self-inductance of the emitter electrode side aluminum wire self-inductance and the lower arm IGBT of the negative electrode terminal 11b (41c, 41d). Further, the currents flowing through the inductances are I L1 , I L2 , and I L3 . Here, I L2 and I L3 are equal to the current flowing through the emitter electrode of the upper arm IGBT and the current flowing through the emitter electrode of the lower arm IGBT, respectively. In L 1 and L 3 of the present embodiment, the self-inductance of the positive electrode terminal 11a and the self-inductance of the negative electrode terminal 11b are dominant, respectively.
  • the mutual inductances M 12 , M 23 , M 13 are based on the detection voltages output from the terminals (3b, 3g) at both ends of L 2 and the terminals (3d, 3f) at both ends of L 3. Is used to detect the current of the upper and lower arm IGBTs with high accuracy, and the upper and lower arm IGBTs are protected against overcurrent.
  • M 12 includes a positive terminal 11a, the mutual inductance between the conductors connecting the emitter and collector electrodes of the lower arm IGBT of the upper arm IGBT (an aluminum wire 41a and 41b, the copper pattern of the insulating substrate 31b), i.e. L 1 And L 2 are magnetic inductances due to magnetic coupling.
  • M 23 is the mutual inductance due to mutual inductance, i.e. magnetic coupling of L 2 and L 3 between the conductors connecting the emitter and collector electrodes of the lower arm IGBT of the upper arm IGBT, and the negative terminal 11b.
  • M 13 is a positive terminal 11a and the mutual inductance between the negative terminal 11b, that is, the mutual inductance due to the magnetic coupling of L 1 and L 3.
  • M 12 , M 23 , and M 13 have values that cannot be regarded as zero in overcurrent detection and overcurrent protection due to the high density of the configuration of terminals and wirings in the module. Things are included.
  • the mutual inductance M 13 between the positive terminal 11a and the negative terminal 11b has a laminated portion which the positive electrode terminal 11a and negative terminal 11b are stacked in close proximity, in the laminated portion, I L1, I L3 it is close to each other, since the direction of flow are parallel and opposite to each other, increasing the size of M 13 as in embodiment 1 (absolute value), the L 3 to the size of the order. This affects the detection voltage output from the signal terminals (3d, 3f) for detecting the current of the lower arm IGBT.
  • examples of L 2 , M 12 , M 13 , M 23 , and L 3 are 7 nH, 0, ⁇ 8 nH, ⁇ 2 nH, and 15 nH.
  • V b ⁇ g (L 2 + M 12 ) ⁇ dI L2 / dt + M 23 ⁇ dI L3 / dt (3) Further, the following equation holds for V df .
  • Expression (6) is obtained by transforming Expression (5).
  • Equation (7) If time integration is performed on both sides of Equation (6), it can be converted into current as shown in Equation (7).
  • the gate driver formula (3), (4), V b-g and (5) When the detected voltage signal V b-g and V d-f exceeds a predetermined threshold value shown in, or Formula (7) When the current converted from V df exceeds a predetermined threshold value, it is determined that an overcurrent is flowing, and the upper arm IGBT and the lower arm IGBT are turned off, respectively.
  • M 12 , M 23 , M 13 and equations (3), (4), and (5) including them are used to set these threshold values and control parameters such as gain in the overcurrent protection circuit of the gate driver. This enables overcurrent protection in which the influence of magnetic flux in the module is substantially taken into account. Therefore, the overcurrent flowing through the upper and lower arm IGBTs can be detected with high accuracy, and the upper and lower arm IGBTs can be reliably protected from the overcurrent.
  • the detection voltage signal represented by the equation (5) is directly compared with a threshold value (for example, a short-circuit determination level) by a comparator, or the detection voltage signal is converted into a current level by an integration circuit before the comparator. To make a comparison with a threshold value.
  • the detection voltage signal is transmitted to the comparator and integration circuit via a filter circuit, noise mask circuit, etc., thereby preventing detection accuracy degradation due to switching noise caused by IGBT superimposed on the detection voltage signal and erroneous detection of overcurrent. it can.
  • a signal may be transmitted to the driver circuit on the lower arm side to turn off the lower arm IGBT.
  • the turning off the arm IGBT it may be turned off on the arm IGBT.
  • the detection voltage signal V b-g corresponding to dI L3 / dt is output, the upper arm IGBT on the basis of the V b-g are over-current protection, and for over-current protection Since M 12 and M 23 are used, it is possible to detect the overcurrent with high accuracy and reliably protect the IGBT in the module from the overcurrent.
  • the detection voltage signals V bg and V df output from the module, M 12 , M 23 , M 13 and the equation (5) (which may be the equations (3) and (4)) are used. This makes it possible to perform highly accurate and reliable protection operation in the event of an abnormality such as a short circuit or overcurrent.
  • short-circuit protection in the short-circuit protection circuit in the gate driver is realized by formulating the detection voltage and the detection current in a form including mutual inductance as in the formulas (3), (4), (5), and (6).
  • the level can be easily set, and the circuit configuration of the gate driver can be simplified.
  • FIG. 6 shows an equivalent circuit of the module according to the third embodiment of the present invention.
  • This module has a 1in1 configuration similar to that of the first embodiment (FIGS. 1A and 1B), but unlike the first embodiment, the self-inductance “L 2 on the emitter side in FIG. "Is divided into a plurality (" L 2 , L 3 "in FIG. 6).
  • L 2 is the self-inductance of the aluminum wire connecting the emitter electrode and the negative terminal 11b of the IGBT
  • L 3 is a self-inductance of the negative terminal 11b.
  • the positive electrode terminal 11a and the negative electrode terminal 11b have a laminated structure as shown in FIGS. 1B and 5B, and the aluminum wires are close to each other. The magnitudes (absolute values) of the mutual inductances M 12 , M 23 , and M 13 shown therein are increased.
  • V df is expressed by equation (8) derived as follows using L 2 , L 3 , M 12 , M 23 , M 13 and the time rate of change of current (di / dt).
  • V df is the sum of the voltage across L 2 and the voltage across L 3 .
  • V d-f L 2 ⁇ dI L2 / dt + M 12 ⁇ dI L2 / dt + M 23 ⁇ dI L2 / dt + L 3 ⁇ dI L2 / dt + M 23 ⁇ dI L2 / dt + M 13 ⁇ dI L2 / dt
  • equation (8) The right side of this equation is put together to obtain equation (8).
  • V df (L 2 + L 3 + M 12 + 2M 23 + M 13 ) ⁇ dI L2 / dt (8) If the time integral of both sides of the equation (8) is determined from the equation (9) can be converted to V d-f current.
  • V dI L2 / dt (L 2 + L 3 + M 12 + 2M 23 + M 13 ) ⁇ 1 ⁇ V df (9)
  • the detection voltage signal V df shown in the equation (8) is transmitted to the gate driver, When a predetermined threshold value is exceeded, it is determined that a short circuit has occurred, and the IGBT can be turned off.
  • the gate driver When the detection voltage signal V df shown in the equation (8) exceeds a predetermined threshold or when the current converted from V df according to the equation (9) exceeds the predetermined threshold, the gate driver It is determined that an overcurrent is flowing like an arm short circuit, and the IGBT is turned off.
  • M 12 , M 23 , M 13 and equations (8) and (9) including them for setting these threshold values and control parameters such as gain in the overcurrent protection circuit of the gate driver Overcurrent protection in which the influence of the magnetic flux on the substrate is substantially taken into consideration. Therefore, the overcurrent flowing through the semiconductor switching element can be detected with high accuracy, and the semiconductor switching element can be reliably protected from the overcurrent.
  • FIG. 7 shows an equivalent circuit of the module according to the third embodiment of the present invention. This module has a 1in1 configuration similar to that of the first embodiment (FIGS. 1A and 1B).
  • the current flowing through the IGBT is detected based on the detection voltage signal on the collector side of the IGBT.
  • the inductance L 1 is the positive terminal 11a, a synthetic self-inductance of such conductors for connecting the collector electrode and the positive electrode terminal 11a of the IGBT, the inductance L 2 is the negative terminal 11b, the emitter electrode and the negative electrode terminal 11b of the IGBT This is the combined self-inductance of the conductor that connects M 12 is a mutual inductance due to magnetic coupling between L 1 and L 2 .
  • the fourth embodiment also has a stacked portion in which the positive electrode terminal 11a and the negative electrode terminal 11b are stacked close to each other, and in this stacked portion, I L1 and I L2 are close to each other and the flowing direction is for a parallel and opposite to each other, increasing the size of the similarly M 12 as in embodiment 1 (absolute value) becomes L 1 and the size of the order.
  • V d-f using time rate of change of L 1, M 12 and current (di / dt), is expressed by the equation (10).
  • V dI L1 / dt (L 1 + M 12 ) ⁇ 1 ⁇ V df (11)
  • the detection voltage signal V df shown in Expression (10) is transmitted to the gate driver, and when a predetermined threshold value is exceeded, it is determined that an overcurrent flows through the IGBT, and the IGBT is turned off to protect it from the overcurrent. .
  • FIG. 8 shows a semiconductor drive device according to Embodiment 5 of the present invention.
  • the present semiconductor drive device (hereinafter referred to as “driver circuit”) drives the 2-in-1 module of the second embodiment (FIGS. 4, 5A, and 5B), as described in the first to fourth embodiments. It has an overcurrent protection function.
  • the upper arm side signal terminal (upper arm gate terminal 3a, upper arm auxiliary emitter terminal 3b, lower arm auxiliary collector terminal 3g) and lower arm side signal terminal (lower arm gate terminal 3c, lower arm auxiliary emitter) of the module 10 having the 2-in-1 configuration.
  • the terminal 3d and the auxiliary negative terminal 3f) are connected to the driver circuit 130.
  • the gate voltage control circuit (132, 135) receives a gate signal from a higher-level control circuit (see reference numeral 140 in FIG. 3) and drives the upper arm IGBT or the lower arm IGBT on / off via an insulating circuit or the like. The gate voltage is output.
  • the current detection / abnormality determination circuit (133, 136) inputs the detection voltage signal shown in the previous equations (3) to (5), determines that an overcurrent is flowing when a predetermined threshold is exceeded, and turns off the IGBT. Is output.
  • a circuit that inputs V bg shown in the previous equation (3) to a comparator and determines that an overcurrent such as a short-circuit current flows (abnormal state) when a predetermined threshold is exceeded, and outputs a determination signal It has a configuration.
  • the detection voltage signal is converted into a current level by an integration circuit using an operational amplifier or the like using the above equation (6), and is input to the comparator, and an overcurrent flows when a predetermined threshold is exceeded (abnormal)
  • the circuit configuration may be such that the determination signal is output as a determination signal.
  • the detection voltage signal V b-g, a V d-f by inputting to the comparator and operational amplifier via a noise filter, noise caused by a switching operation of the IGBT is superimposed on V b-g, V d- f Therefore, it is possible to prevent a decrease in detection accuracy and erroneous detection.
  • the logic circuits (134, 137) receive the determination signal of the current detection / abnormality determination circuit (133, 136) and the gate voltage of the IGBT, and the IGBT is in an ON state and the current detection / abnormality determination circuit outputs the determination signal.
  • an IGBT off command is output.
  • the gate voltage control circuit (132, 135) receives the off command and turns off the IGBT through which the overcurrent flows. This protects the IGBT from overcurrent.
  • the gate voltage control circuit may increase the gate resistance (impedance) in comparison with the normal switching in response to the off command, and so-called soft cutoff of the IGBT. In this case, the surge voltage generated when the IGBT turns off the overcurrent can be reduced.
  • control parameters such as a threshold setting for overcurrent determination and a gain in the current detection / abnormality determination circuit are based on the detection voltage signal expressed by the previous expression (5) output from the module 10.
  • overcurrent protection is performed using M 12 , M 23 , M 13 , any one of the above formulas (3) to (6) including these, or a plurality of formulas.
  • the current detection / abnormality determination circuit of the upper and lower arms By adjusting the gain of (133, 136), the detection accuracy of the upper and lower arms can be made comparable. Therefore, it is possible to detect the overcurrent with high accuracy in both the upper and lower arms and reliably protect the IGBT from the overcurrent.
  • FIG. 9 shows the mounting state of the module 10 and the driver circuit 130.
  • the module 10 is the module of the second embodiment (FIG. 4).
  • the module 10 is placed on a heat sink 145 for heat dissipation.
  • DC bus bars 111a and 111b are attached to the positive terminal 11a and the negative terminal 11b of the module 10 in order to connect these terminals to the capacitor module (see reference numeral 120 in FIG. 3).
  • An AC bus bar 112 for connecting the AC terminal to the induction motor 500 (see FIG. 3) is attached to the AC terminal 11c of the module 10.
  • a driver circuit board 131 including the driver circuit 10 is attached on the upper surface of the module 10.
  • the signal terminals for detecting overcurrent in the module 10 are directly connected to the driver circuit board 131 located above the module. Since they are connected, high-density mounting in the inverter module 110 (see FIG. 3) becomes possible. Thereby, a power converter device can be reduced in size.
  • the wiring length required for connecting the driver circuit and the signal terminal can be reduced or minimized.
  • the wiring length between the driver circuit and the gate terminals of the upper and lower arms can be reduced or minimized, and a plurality of driver circuits for driving a plurality of modules can be integrated on one driver circuit board. It becomes possible to reduce the loop inductance between the gate electrode and the emitter electrode.
  • FIG. 10 shows a semiconductor drive device according to Embodiment 6 of the present invention. Similar to the fifth embodiment, the present semiconductor drive device (hereinafter referred to as “driver circuit”) drives the 2-in-1 module of the second embodiment (FIGS. 4, 5A, and 5B). The same overcurrent protection function as that of No. 5 is provided.
  • the driver circuit 130 transmits abnormal information related to overcurrents of the upper arm driving circuit 150 and the lower arm driving circuit 151 to each other, and a signal indicating the abnormal information.
  • a level shift circuit 138 for converting the reference voltage level is provided.
  • a logic is generated according to the determination signal and the gate signal of the upper arm IGBT input from the upper arm gate terminal 3a.
  • the circuit 134 outputs an off command to the gate voltage control circuit 132.
  • the gate voltage control circuit 132 turns off the upper arm IGBT in response to an off command from the logic circuit 134.
  • abnormality information in the upper arm driving circuit 150 here, an OFF command output from the logic circuit 134, is converted by the level shift circuit 138 into a reference voltage in the lower arm driving circuit 151, thereby causing an abnormality in the upper arm.
  • the logic circuit 137 turns off the gate voltage control circuit 135 in the same manner as in the fifth embodiment in accordance with the off command from the signal-transmitted logic circuit 134 and the gate voltage of the lower arm IGBT output from the gate voltage control circuit 135. Outputs a command. In response to this off command, the gate voltage control circuit 135 turns off the lower arm IGBT.
  • the lower arm IGBT is similarly turned off and the upper arm IGBT is also turned off.
  • FIG. 11 shows the appearance of a module that is Embodiment 7 of the present invention. Similar to the second embodiment, the module of the seventh embodiment has a substantially rectangular planar shape and a 2 in 1 configuration.
  • the module of the seventh embodiment has more grooves 13 provided in the module case 12, thereby improving the ground insulation. Further, the module of the seventh embodiment is different from the module of the second embodiment (FIG. 4) in that the positive electrode terminal 11a and the negative electrode terminal 11b are arranged along one short side of the upper surface of the module 10. Thereby, the area for mounting the driver circuit board 131 on the upper surface of the module 10 can be increased.
  • FIG. 12 shows an internal structure of a 6 in 1 module according to the eighth embodiment of the present invention.
  • 6in1 means that one module has 6 arms.
  • six arms are divided into two groups each including two arms, and each group constitutes an upper and lower arm series circuit. That is, in the present embodiment, three sets of the circuit configuration (2 in 1) of the second embodiment (FIGS. 5A and 5B) are provided. Therefore, the three-phase inverter circuit can be composed of one module.
  • the inverter circuit according to the eighth embodiment converts DC power input from the positive terminal 11a and the negative terminal 11b in the module of FIG. 12 into three-phase AC power, and converts the U-phase AC terminal 11d, the V-phase AC terminal 11e, Output from the W-phase AC terminal 11f.
  • the IGBTs and diodes used for the three-phase inverter main circuit are mounted on one base 14, high-density mounting of the inverter circuit is possible. Further, all the driver circuits for driving on and off each IGBT of the inverter main circuit can be integrated on one driver circuit board and mounted on the upper surface of the module of the eighth embodiment. For this reason, a power converter device can be reduced in size.
  • the semiconductor switching element in addition to the IGBT described above, a MOSFET (metal oxide semiconductor field effect transistor), a junction field effect transistor, a junction bipolar transistor, a gate turn-off thyristor, or the like is used.
  • the semiconductor switching element may be made of silicon carbide (SiC) as a semiconductor material in addition to silicon.
  • 1a, 1b, 1c ... upper and lower arm series circuit 2a, 2c ... IGBT, 2b, 2d ... diode, 3a, 3c ... gate terminal, 3b, 3d ... auxiliary emitter terminal, 3e, 3g ... auxiliary collector terminal, 3f ... auxiliary negative electrode Terminals, 10 ... Power module, 11a ... Positive terminal, 11b ... Negative terminal, 11c ... AC terminal, 11d ... U phase AC terminal, 11e ... V phase AC terminal, 11f ... W phase AC terminal, 12 ... Module case, 13 ... Groove, 14 ... Base, 31, 31a, 31b ... Insulating substrate, 41a, 41b, 41c, 41d ... Aluminum wire, 100 ...
  • Power converter 110 ... Inverter module, 111a, 111b ... DC bus bar, 112 ... AC bus bar, 120 ... Capacitor module, 130 ... Driver circuit, 131 ... Driver circuit board, 132,135 ... Game Voltage control circuit, 133, 136 ... current detection / abnormality judgment circuit, 134, 137 ... logic circuit, 138 ... level shift circuit, 140 ... control circuit, 145 ... heat sink, 150 ... upper arm drive circuit, 151 ... lower arm drive circuit , 200 ... transformer, 300 ... overhead wire, 400 ... grounding part, 500 ... induction motor

Landscapes

  • Inverter Devices (AREA)
  • Electronic Switches (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Power Conversion In General (AREA)
PCT/JP2015/075728 2014-09-26 2015-09-10 半導体パワーモジュール及び半導体駆動装置 WO2016047455A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE112015003784.5T DE112015003784B4 (de) 2014-09-26 2015-09-10 Halbleiter-Leistungsmodul und Halbleiteransteuerungsvorrichtung

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014-196129 2014-09-26
JP2014196129A JP6373702B2 (ja) 2014-09-26 2014-09-26 半導体パワーモジュール及び半導体駆動装置

Publications (1)

Publication Number Publication Date
WO2016047455A1 true WO2016047455A1 (ja) 2016-03-31

Family

ID=55580982

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2015/075728 WO2016047455A1 (ja) 2014-09-26 2015-09-10 半導体パワーモジュール及び半導体駆動装置

Country Status (3)

Country Link
JP (1) JP6373702B2 (enrdf_load_stackoverflow)
DE (1) DE112015003784B4 (enrdf_load_stackoverflow)
WO (1) WO2016047455A1 (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6284683B1 (ja) * 2016-04-06 2018-03-07 新電元工業株式会社 パワーモジュール
CN111416520A (zh) * 2020-02-25 2020-07-14 厦门大学 基于磁通相消的同步整流占空比丢失补偿方法与变换器

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6667630B2 (ja) * 2016-06-22 2020-03-18 株式会社日立産機システム 電力変換装置
JP2018200953A (ja) 2017-05-26 2018-12-20 ルネサスエレクトロニクス株式会社 電子装置
JP6815517B2 (ja) * 2017-08-03 2021-01-20 株式会社日立製作所 電力変換装置および電力変換装置を搭載した車両
JP2021083262A (ja) * 2019-11-21 2021-05-27 株式会社デンソー インバータ装置
JP7286582B2 (ja) 2020-03-24 2023-06-05 株式会社東芝 半導体装置
JP7407675B2 (ja) * 2020-08-18 2024-01-04 株式会社 日立パワーデバイス パワー半導体モジュールおよび電力変換装置
JP2023081134A (ja) 2021-11-30 2023-06-09 富士電機株式会社 半導体モジュール、半導体装置、及び車両
JP2023109317A (ja) 2022-01-27 2023-08-08 株式会社 日立パワーデバイス パワー半導体モジュール
JP2023140611A (ja) * 2022-03-23 2023-10-05 株式会社 日立パワーデバイス 半導体装置、電力変換装置
JPWO2023233536A1 (enrdf_load_stackoverflow) * 2022-05-31 2023-12-07
DE112023000749T5 (de) 2022-10-13 2024-11-14 Fuji Electric Co., Ltd. Halbleitermodul
JP2025043923A (ja) * 2023-09-19 2025-04-01 株式会社東芝 半導体装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH098620A (ja) * 1995-06-20 1997-01-10 Fuji Electric Co Ltd 絶縁ゲート型バイポーラトランジスタの過電流保護回路
JP2000324846A (ja) * 1999-05-14 2000-11-24 Hitachi Ltd 電力変換装置
JP2007259533A (ja) * 2006-03-22 2007-10-04 Hitachi Ltd 半導体素子の保護回路

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH098620A (ja) * 1995-06-20 1997-01-10 Fuji Electric Co Ltd 絶縁ゲート型バイポーラトランジスタの過電流保護回路
JP2000324846A (ja) * 1999-05-14 2000-11-24 Hitachi Ltd 電力変換装置
JP2007259533A (ja) * 2006-03-22 2007-10-04 Hitachi Ltd 半導体素子の保護回路

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6284683B1 (ja) * 2016-04-06 2018-03-07 新電元工業株式会社 パワーモジュール
US10770882B2 (en) 2016-04-06 2020-09-08 Shindengen Electric Manufacturing Co., Ltd. Power module
CN111416520A (zh) * 2020-02-25 2020-07-14 厦门大学 基于磁通相消的同步整流占空比丢失补偿方法与变换器

Also Published As

Publication number Publication date
JP2016066974A (ja) 2016-04-28
DE112015003784B4 (de) 2024-12-12
DE112015003784T5 (de) 2017-06-01
JP6373702B2 (ja) 2018-08-15

Similar Documents

Publication Publication Date Title
JP6373702B2 (ja) 半導体パワーモジュール及び半導体駆動装置
JP6634270B2 (ja) 電力変換装置
US9116532B2 (en) Power semiconductor device module
US10134718B2 (en) Power semiconductor module
JP6382097B2 (ja) 半導体パワーモジュールおよびそれを用いた電力変換装置
US20170110395A1 (en) Semiconductor device
CN105814686B (zh) 半导体装置
US10727213B2 (en) Power semiconductor module and power semiconductor device
EP2750184A1 (en) Semiconductor module
JP2019029457A (ja) 半導体モジュール
JP2015032984A (ja) 半導体素子の駆動装置およびそれを用いた電力変換装置
JP6745991B2 (ja) 半導体パワーモジュール
JP6828425B2 (ja) 電力変換装置
JP2015033149A (ja) 半導体素子の駆動装置及びそれを用いた電力変換装置
JP2015033222A (ja) 半導体素子の駆動装置およびそれを用いる電力変換装置
CN104426385B (zh) 电力变换装置
US20200211954A1 (en) Semiconductor module
JP2018113828A (ja) 電力変換装置、及びその製造方法
JP2013140889A (ja) パワーモジュール
US11848245B2 (en) Power semiconductor apparatus
JP5899947B2 (ja) パワー半導体モジュールおよび電力変換装置
WO2017169660A1 (ja) 電力変換装置
JP2014175432A (ja) パワーモジュール及びそれを用いた電力変換装置
JP2014175433A (ja) パワーモジュール及びそれを用いた電力変換装置
CN118947055A (zh) 半导体器件、功率转换装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15843821

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 112015003784

Country of ref document: DE

122 Ep: pct application non-entry in european phase

Ref document number: 15843821

Country of ref document: EP

Kind code of ref document: A1