WO2015192503A1 - 像素电路及其驱动方法、显示装置 - Google Patents

像素电路及其驱动方法、显示装置 Download PDF

Info

Publication number
WO2015192503A1
WO2015192503A1 PCT/CN2014/086815 CN2014086815W WO2015192503A1 WO 2015192503 A1 WO2015192503 A1 WO 2015192503A1 CN 2014086815 W CN2014086815 W CN 2014086815W WO 2015192503 A1 WO2015192503 A1 WO 2015192503A1
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
pole
unit
driving
pixel structure
Prior art date
Application number
PCT/CN2014/086815
Other languages
English (en)
French (fr)
Inventor
杨盛际
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to JP2016573087A priority Critical patent/JP6621766B2/ja
Priority to KR1020167033963A priority patent/KR101821519B1/ko
Priority to EP14894895.3A priority patent/EP3159882B1/en
Priority to US15/022,011 priority patent/US9746979B2/en
Publication of WO2015192503A1 publication Critical patent/WO2015192503A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04166—Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/0418—Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
    • G06F3/04184—Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/042—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40—OLEDs integrated with touch screens
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04105—Pressure sensors for measuring the pressure or force exerted on the touch surface without providing the touch position
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0804—Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/14—Detecting light within display terminals, e.g. using a single or a plurality of photosensors

Definitions

  • the present invention belongs to the field of display technologies, and in particular, to a pixel circuit and a driving method thereof, and a display device including the pixel circuit.
  • OLED display is one of the hotspots in the field of flat panel display research. Compared with liquid crystal display (LCD), OLED display has low energy consumption and low production cost. Self-illumination, wide viewing angle and fast response. At present, in the display fields of mobile phones, PDAs, digital cameras, etc., OLED displays have begun to gradually replace traditional LCDs.
  • the design of the pixel driving circuit is the core technical content.
  • the LCD is voltage-driven, that is, it uses a stable voltage to control the light-transmitting brightness of the liquid crystal; unlike the LCD, the OLED display belongs to current driving, and requires a stable current to control the OLED device to emit light.
  • a 2T1C pixel circuit is generally used to control the illumination of the OLED device. As shown in FIG. 1 , in the pixel circuit of 2T1C, a driving thin film transistor (TFT) T2, a switching thin film transistor T1 and a storage capacitor (Cs) are used, and T1 and scanning lines are formed.
  • TFT driving thin film transistor
  • Cs storage capacitor
  • the scan line voltage Vscan is low, T1 is turned on, the data line voltage Vdata is written to Cs through T1; when the line is scanned, Vscan becomes high Level, T1 cutoff, the voltage stored on Cs drives T2, which generates current to drive the OLED, ensuring that the OLED continues to emit light for one frame time.
  • the threshold voltage Vth of the driving TFT of each pixel point drifts, that is, the threshold voltage of the driving TFT of each pixel point is uneven, which easily leads to flow.
  • the current of the OLED passing through each pixel differs due to the difference in threshold voltage Vth of its driving TFT, so that the display brightness of the display screen is uneven, thereby affecting the display effect of the entire image.
  • a pixel circuit including more TFTs and Cs appears, the pixel circuit including a compensation circuit for compensating the threshold voltage of the driving TFT, but the prior art
  • a pixel circuit is confined to only one sub-pixel unit. As shown in FIG. 2, the sub-pixel unit is arranged in the prior art. Each sub-pixel unit has a pixel circuit, and each pixel circuit includes a dedicated compensation. Circuit, so each sub-pixel unit is connected to a data line.
  • the pixel circuits in the prior art make it difficult to compress pixel points to achieve finer pixel resolution from the viewpoints of TFT, Cs, and distribution space of data lines.
  • the technical problem to be solved by the present invention is to provide a pixel circuit and a driving method thereof, and a display device including the pixel circuit, so that the compensation circuit in the pixel circuit of the prior art can be reduced.
  • the number of transistors and the number of data lines required thereby greatly reducing the pixel size and reducing the cost of the IC, and causing the current flowing through the OLED in each pixel to be unaffected by the threshold voltage Vth of its driving transistor, ultimately Guarantee the uniformity of image display.
  • the technical solution adopted to solve the technical problem to be solved by the present invention is a pixel circuit including a plurality of pixel structures, each of which includes a driving unit and compensation The unit and the light-emitting unit, wherein the first pixel structure and the second pixel structure further include a capacitive touch unit, the second pixel structure further includes a light-sensitive touch unit, and the a compensation unit in the first pixel structure, a compensation unit in the second pixel structure, the capacitive touch unit, and the optical touch unit share a data line, the capacitive touch unit and the light touch unit Shared read line, where:
  • the compensation unit is configured to adjust a driving voltage of a driving transistor in the driving unit to eliminate an influence of a threshold voltage of the driving transistor on a current flowing through the light emitting unit, wherein the data line is used for The drive transistor provides a data signal;
  • the capacitive touch unit is configured to generate a corresponding electrical signal according to the capacitive touch signal, wherein the data line is used to provide an initial signal for the capacitive touch unit, and the read line is used to read the capacitive touch signal;
  • the light sensing unit is configured to generate a corresponding electrical signal according to the light sensing touch signal, wherein the data line is used to provide an initial signal for the light sensing touch unit, and the reading line is used to read the light sensing touch signal.
  • the capacitive touch signal is a finger touch signal
  • the light touch signal is a laser pen touch signal
  • the compensation unit in the first pixel structure is identical to the structure of the compensation unit in the second pixel structure, and the data line is disposed in the compensation unit of the first pixel structure.
  • the compensation units in the second pixel structure are connected to the compensation unit in the first pixel structure and the compensation unit in the second pixel structure, respectively.
  • the driving unit in the first pixel structure includes a first driving transistor
  • the driving unit in the second pixel structure includes a second driving transistor
  • the first driving transistor and the second driving transistor The structures are the same and symmetrically disposed, and the data lines are located between the first driving transistor and the second driving transistor and are respectively connected to the first driving transistor and the second driving transistor.
  • the compensation unit in the first pixel structure includes a first transistor, a third transistor, a fifth transistor, a seventh transistor, a ninth transistor, and a first capacitor
  • the compensation unit in the second pixel structure includes a second transistor, a fourth transistor, a sixth transistor, an eighth transistor, a tenth transistor, and a second capacitor, and the pixel structure further includes a first scan line and a second a scan line, a third scan line, and an illumination control signal line, wherein:
  • a gate of the first transistor is connected to a gate of the second transistor, and is connected to the light emission control signal line, a first pole of the first transistor and a first pole of the second transistor, respectively a high potential terminal is connected, a second pole of the first transistor is connected to a first pole of the first driving transistor;
  • a gate of the third transistor is connected to a second scan line, and a first electrode of the third transistor is respectively connected to one end of the first capacitor and a gate of the first driving transistor, the third transistor a second pole connected to the first pole of the first driving transistor;
  • a gate of the fifth transistor is connected to the first scan line, a first pole of the fifth transistor is connected to the low potential end, and a second pole of the fifth transistor is connected to a gate of the first driving transistor ;
  • a gate of the seventh transistor is connected to the second scan line, a first pole of the seventh transistor is connected to the data line, and a second pole of the seventh transistor is respectively connected to the first driving transistor a second pole, the first pole of the ninth transistor is connected;
  • a gate of the ninth transistor is connected to a gate of the tenth transistor, and is connected to the light emission control signal line, and a first pole of the ninth transistor is connected to a second electrode of the first driving transistor The second pole of the ninth transistor is connected to the light emitting unit in the first pixel structure;
  • One end of the first capacitor is connected to the first pole of the first transistor, and the other end is connected to the first pole of the third transistor;
  • a second pole of the second transistor is coupled to a first pole of the second driving transistor
  • a gate of the fourth transistor is connected to a third scan line, and a first electrode of the fourth transistor is respectively connected to one end of the second capacitor and a gate of the second driving transistor, the fourth transistor a second pole connected to the first pole of the second driving transistor;
  • a gate of the sixth transistor is connected to the first scan line, a first pole of the sixth transistor is connected to the low potential end, and a second pole of the sixth transistor is connected to a gate of the second driving transistor ;
  • a gate of the eighth transistor is connected to the third scan line, a first pole of the eighth transistor is connected to the data line, and a second pole of the eighth transistor is respectively connected to the second driving transistor a second pole, the first pole of the tenth transistor is connected;
  • a first pole of the tenth transistor is connected to a second pole of the second driving transistor, and a second pole of the tenth transistor is connected to a light emitting unit in the second pixel structure;
  • One end of the second capacitor is connected to the first pole of the second transistor, and the other end is connected to the first pole of the fourth transistor.
  • the capacitive touch unit comprises a first capacitive transistor, a second capacitive transistor, a third capacitive transistor and a third capacitor, wherein:
  • a gate of the first capacitive transistor is connected to a first scan line, a first pole of the first capacitive transistor is connected to the data line, and a second pole of the first capacitive transistor is respectively associated with the a gate of the second capacitive transistor and one end of the third capacitor are connected;
  • the first poles of the second capacitive transistor are respectively connected to the other end of the third capacitor and the reference potential terminal, and the second pole of the second capacitive transistor and the second pole of the third capacitive transistor connection;
  • the gate of the third capacitive transistor is connected to the photosensitive touch unit, and the first pole of the third capacitive transistor is connected to the read line.
  • the light touch unit includes a first light transistor, a second light transistor, a third light transistor, a fourth light transistor, and a fourth capacitor, wherein:
  • a gate of the first photo transistor is connected to the first scan line, a first pole of the first photo transistor is connected to a low potential end, and a second pole of the first photo transistor is respectively a second pole of the second optical transistor, a gate of the fourth optical transistor, and a first pole connected;
  • a gate of the second photo transistor and the first of the capacitive touch units a gate of the three-capacitor transistor, a first pole of the second photo transistor being connected to the data line, a second pole of the second photo transistor and a first pole of the fourth photo transistor connection;
  • a gate of the third photo transistor is connected to a third scan line, a first pole of the third photo transistor is connected to a second electrode of the fourth photo transistor, and the third photo transistor is a second pole is connected to the read line;
  • One end of the fourth capacitor is connected to the gate of the fourth photo transistor, and the other end is connected to the second electrode of the fourth photo transistor.
  • the light emitting unit in the first pixel structure includes a first organic electroluminescent diode, and an anode of the first organic electroluminescent diode is connected to a second pole of the ninth transistor, the first The cathode of the organic electroluminescent diode is connected to the low potential end;
  • the light emitting unit in the second pixel structure includes a second organic electroluminescent diode, an anode of the second organic electroluminescent diode is connected to a second pole of the tenth transistor, and the second organic electroluminescence The cathode of the diode is connected to the low potential end.
  • the first transistor to the tenth transistor, the first to fourth photo transistors, the first to third transistor, and the third to The first driving transistor and the second driving transistor are all P-type thin film transistors, wherein the first source is the source and the second terminal is the drain.
  • a display device includes the above pixel circuit.
  • the adjacent first pixel structure and the second pixel structure are adjacent sub-pixel units of the same pixel unit.
  • a driving method of a pixel circuit comprising a plurality of pixel structures, each pixel structure comprising a driving unit, a compensation unit and a light emitting unit, wherein, in the adjacent first pixel structure and second pixel structure, The first pixel structure further includes a capacitive touch unit, the second pixel structure further includes a light touch unit, and the driving method includes: a compensation unit in the first pixel structure, and compensation in the second pixel structure
  • the unit, the capacitive touch unit, and the optical touch unit divide the data line in a time division manner, and the capacitive touch unit and the light touch unit divide the read line in a time division manner.
  • the driving method includes the following stages in one frame time:
  • the data line provides a reset signal
  • the compensation unit resets the driving unit, and simultaneously resets the capacitive touch unit and the light touch unit;
  • the data line provides a first driving signal, and the compensation unit in the first pixel structure is discharged; the capacitive touch unit performs capacitance touch signal amplification and acquisition, and the capacitive touch signal passes through the Transmitting the read line to the touch execution unit; the light touch unit performs initial signal implantation;
  • the data line provides a second driving signal
  • the compensation unit in the second pixel structure is discharged
  • the capacitive touch unit stops the touch
  • the optical touch unit performs the optical touch signal amplification and Collecting, the light touch signal is transmitted to the touch execution unit through the read line;
  • the illuminating stage the illuminating control signal line provides a illuminating signal, the capacitive touch unit and the photo sensing unit stagnate the touch; the first pixel structure and the driving unit in the second pixel structure respectively drive the illuminating unit The light emitting unit emits light.
  • the utility model has the beneficial effects that the pixel circuit improves the flexibility of the touch by integrating the capacitive touch function and the light touch function; the pixel circuit further combines the compensation units in the adjacent sub-pixel units into Integral, so that adjacent sub-pixel units can share one data line (ie, one data line controls the compensation unit in two sub-pixel units), thereby sharing the compensation unit to complete the driving of the two sub-pixel units, thereby reducing the transistor of the compensation circuit
  • the number of data lines and the number of data lines can greatly reduce the size of Pixel Pitch and reduce the cost of the IC, resulting in higher picture quality, higher PPI (Pixels Per Inch), and simultaneous resolution of each pixel.
  • FIG. 1 is a schematic diagram of a 2T1C pixel circuit in the prior art.
  • FIG. 2 is a schematic diagram showing the arrangement of sub-pixel units in the prior art.
  • Fig. 3 is a schematic diagram of a pixel circuit in Embodiment 1 of the present invention.
  • Fig. 4 is a timing chart showing the driving of the pixel circuit in the first embodiment of the present invention.
  • FIGS. 5A to 5E are diagrams showing a driving process of a pixel circuit in Embodiment 1 of the present invention, in which:
  • 5A is a schematic diagram of a pixel circuit in a reset phase
  • 5B is a schematic diagram of a pixel circuit of a first driving stage
  • FIG. 5C is a schematic diagram showing that the capacitive touch unit is capacitively touched to reduce the potential of one end of the capacitor in the first driving stage;
  • 5D is a schematic diagram of a pixel circuit of a second driving stage
  • FIG. 5E is a schematic diagram of a pixel circuit in an illumination phase.
  • FIG. 6A and FIG. 6B are schematic diagrams showing the arrangement of sub-pixel units in Embodiment 2 of the present invention.
  • 1-drive unit 2-compensation unit; 3-lighting unit; 4-capacitive touch unit; 5-light touch unit.
  • the embodiment provides a pixel circuit and a driving method corresponding to the pixel circuit.
  • the pixel circuit includes a plurality of pixel structures, each of which is used for one sub-pixel unit.
  • the pixel circuit includes a driving unit 1.
  • the compensation unit 2 and the light-emitting unit 3 wherein, in the adjacent first pixel structure and the second pixel structure, the driving unit in the first pixel structure and the driving unit in the second pixel structure constitute the driving unit 1, the first pixel structure
  • the compensation unit and the compensation unit in the second pixel structure constitute a compensation unit 2
  • the light-emitting unit in the first pixel structure and the light-emitting unit in the second pixel structure constitute the light-emitting unit 3
  • the first pixel structure further includes a capacitive touch unit
  • the second pixel structure further includes a light sensing unit 5, and the compensation unit in the first pixel structure, the compensation unit in the second pixel structure, the capacitive touch unit 4, and the light sensing unit 5 share a data line (Data Line The capacitive touch unit 4 and the light touch unit 5 share a read line.
  • the compensation unit 2 is for adjusting the driving voltage of the driving transistor in the driving unit 1 to eliminate the influence of the threshold voltage of the driving transistor on the current flowing through the light emitting unit 3, and the data line is used to supply a data signal to the driving transistor.
  • the capacitive touch unit 4 is configured to generate a corresponding electrical signal according to the capacitive touch signal, for example, generate a corresponding electrical signal according to the finger touch signal, the data line is used to provide an initial signal to the capacitive touch unit 4, and the read line is used for Reading the capacitive touch signal (eg, a finger touch signal).
  • the light-sensitive touch unit 5 is configured to generate a corresponding electrical signal according to the light-sensitive touch signal, for example, generate a corresponding electrical signal according to the laser pen touch signal, and the data line is used to provide an initial signal to the light-sensitive touch unit 5, and the read line is used for Reading the light touch signal (for example, a laser pen touch signal).
  • the compensation unit in the first pixel structure is identical to the structure of the compensation unit in the second pixel structure, and the data line is disposed in the compensation unit in the first pixel structure and the compensation unit in the second pixel structure. Between (in FIG. 3, for the clarity of the drawing, it is illustrated on one side), and is respectively connected to the compensation unit in the first pixel structure and the compensation unit in the second pixel structure.
  • the driving unit in the first pixel structure includes a first driving transistor DT1
  • the driving unit in the second pixel structure includes a second driving transistor DT2, that is, DT1 and DT2 are respectively 2 sub-pixel units.
  • Driving transistor The first driving transistor DT1 and the second driving transistor DT2 have the same structure and are symmetrically arranged, and the data lines are located at the first driving transistor DT1 and the second driving transistor DT2.
  • the first driving transistor DT1 and the second driving transistor DT2 are connected to each other.
  • the compensation unit in the first pixel structure includes a first transistor T1, a third transistor T3, a fifth transistor T5, a seventh transistor T7, a ninth transistor T9 and a first capacitor C1
  • the compensation unit in the second pixel structure includes a second The transistor T2, the fourth transistor T4, the sixth transistor T6, the eighth transistor T8, the tenth transistor T10, and the second capacitor C2
  • the pixel circuit further includes a first scan line Scan[1] and a second scan line Scan[2] ], the third scan line Scan [3] and the light emission control signal line EM.
  • T1 to T10 are switching transistors; Scan[1], Scan[2], and Scan[3] both input scan signals; EM inputs illumination control signals for controlling illumination of the illumination unit 3;
  • the capacitor C1 and the second capacitor C2 are storage capacitors.
  • the gate of the first transistor T1 is connected to the gate of the second transistor T2 and is connected to the light emission control signal line EM.
  • the first pole of the first transistor T1 and the first pole of the second transistor T2 are respectively The high potential terminal Vdd is connected, and the second pole of the first transistor T1 is connected to the first pole of the first driving transistor DT1.
  • the gate of the third transistor T3 is connected to the second scan line Scan[2], and the first pole of the third transistor T3 is respectively connected to one end of the first capacitor C1 and the gate of the first driving transistor DT1, and the third transistor T3
  • the second pole is connected to the first pole of the first driving transistor DT1.
  • the gate of the fifth transistor T5 is connected to the first scan line Scan[1], the first electrode of the fifth transistor T5 is connected to the low potential terminal, and the second electrode of the fifth transistor T5 is connected to the gate of the first driving transistor DT1. .
  • the gate of the seventh transistor T7 is connected to the second scan line Scan[2], the first pole of the seventh transistor T7 is connected to the data line, and the second pole of the seventh transistor T7 is respectively connected to the second pole of the first driving transistor DT1.
  • the first pole of the ninth transistor T9 is connected.
  • a gate of the ninth transistor T9 is connected to a gate of the tenth transistor T10 and is connected to the light emission control signal line EM, and a first electrode of the ninth transistor T9 is connected to a second electrode of the first driving transistor DT1, and a ninth The second pole of transistor T9 is coupled to the light emitting unit in the first pixel structure.
  • One end of the first capacitor C1 is connected to the first electrode of the first transistor T1, and the other end is connected to the first electrode of the third transistor T3.
  • the second pole of the second transistor T2 is connected to the first pole of the second driving transistor DT2.
  • the gate of the fourth transistor T4 is connected to the third scan line Scan[3], and the first pole of the fourth transistor T4 is respectively connected to one end of the second capacitor C2 and the gate of the second driving transistor DT2, and the fourth transistor T4 The second pole is connected to the first pole of the second driving transistor DT2.
  • the gate of the sixth transistor T6 is connected to the first scan line Scan[1], the first electrode of the sixth transistor T6 is connected to the low potential terminal, and the second electrode of the sixth transistor T6 is connected to the gate of the second driving transistor DT2. .
  • the gate of the eighth transistor T8 is connected to the third scan line Scan[3], the first electrode of the eighth transistor T8 is connected to the data line, and the second electrode of the eighth transistor T8 is respectively connected to the second pole of the second driving transistor DT2.
  • the first pole of the tenth transistor T10 is connected.
  • the first pole of the tenth transistor T10 is connected to the second pole of the second driving transistor DT2, and the second pole of the tenth transistor T10 is connected to the light emitting unit in the second pixel structure.
  • One end of the second capacitor C2 is connected to the first electrode of the second transistor T2, and the other end is connected to the first electrode of the fourth transistor T4.
  • the capacitive touch unit 4 includes a first capacitive transistor M1, a second capacitive transistor M2, a third capacitive transistor M3, and a third capacitor C3.
  • M1 is a signal reset (Pre-Charge) transistor;
  • M2 is a signal amplification (Amplifier) The transistor acts to amplify the current signal;
  • M3 is the switching transistor (Switching).
  • the gate of the first capacitive transistor M1 is connected to the first scan line Scan[1]
  • the first pole of the first capacitive transistor M1 is connected to the data line
  • the second pole of the first capacitive transistor M1 is respectively The gate of the second capacitive transistor M2 and one end of the third capacitor C3 are connected.
  • the first pole of the second capacitive transistor M2 is connected to the second pole of the third capacitive transistor M3, and the second pole of the second capacitive transistor M2 is respectively connected to the other end of the third capacitor C3, the reference potential terminal (for the capacitor The coupling is reset).
  • the gate of the third capacitive transistor M3 is connected to the optical touch unit 5, and the first pole of the third capacitive transistor M3 is connected to the read line.
  • the light sensing unit 5 includes a first photo transistor N1 and a second photo transistor N2.
  • the third optical transistor N3, the fourth optical transistor N4, and the fourth capacitor C4, N4 are photosensitive (photo) transistors, that is, when light is irradiated onto the phototransistor, photocurrent is generated, and different light intensities are generated. Photocurrents of different intensities.
  • N1, N2, and N3 are switching transistors that function as switches. N2 also functions to read light sense data.
  • C4 is a storage capacitor that stores the photocurrent generated by the photosensor.
  • the gate of the first photo transistor N1 is connected to the first scan line Scan[1], the first electrode of the first photo transistor N1 is connected to the low potential end, and the second electrode of the first photo transistor N1 is respectively The second electrode of the second photo transistor N2, the gate of the fourth photo transistor N4, and the first electrode are connected.
  • the gate of the second photo transistor N2 is connected to the gate of the third capacitive transistor M3 in the capacitive touch unit 4, the first electrode of the second photo transistor N2 is connected to the data line, and the second photo transistor N2 is connected.
  • the second pole is coupled to the first pole of the fourth photo transistor N4.
  • the gate of the third photo transistor N3 is connected to the third scan line Scan[3], the first electrode of the third photo transistor N3 is connected to the second electrode of the fourth photo transistor N4, and the third photo transistor N3 is connected.
  • the second pole is connected to the read line.
  • One end of the fourth capacitor C4 is connected to the gate of the fourth photo transistor N4, and the other end is connected to the second electrode of the fourth photo transistor N4.
  • the light emitting unit in the first pixel structure includes a first organic electroluminescent diode OLED1, an anode of the first organic electroluminescent diode OLED1 is connected to a second pole of the ninth transistor T9, and a cathode of the first organic electroluminescent diode OLED1 Low potential end connection.
  • the light emitting unit in the second pixel structure includes a second organic electroluminescent diode OLED2, the anode of the second organic electroluminescent diode OLED2 is connected to the second pole of the tenth transistor T10, and the cathode of the second organic electroluminescent diode OLED2 is Low potential end connection.
  • the transistors in the pixel circuit are all described by using a Thin Film Transistor (TFT) as an example.
  • TFT Thin Film Transistor
  • the first to tenth transistors T1 to T10, the first to fourth photo transistors N1 to N4, the first to third transistors M1 to M3, and the first The driving transistor DT1 and the second driving transistor DT2 are both P-type thin film transistors, wherein the first source is the source and the second terminal is the drain.
  • T1 to T10, N1 to N4, and M1 to M3 in the pixel circuit are all N-type thin film transistors, wherein the first extreme drain and the second extreme source.
  • T1 to T10, N1 to N4, and M1 to M3 in the pixel circuit are mixed with an N-type thin film transistor and a P-type thin film transistor, and it is only necessary to simultaneously connect respective terminals of the selected type of thin film transistor.
  • T1 to T10, N1 to N4, M1 to M3 in this embodiment are also not limited to thin film transistors, and any control device having voltage control capability to make the present invention operate in a desired mode of operation is applicable. In the present invention, those skilled in the art can make selection according to actual needs, and details are not described herein again.
  • the embodiment further provides a driving method of a pixel circuit
  • the pixel circuit includes a plurality of pixel structures, each pixel structure includes a driving unit, a compensation unit, and a light emitting unit, wherein the adjacent first pixel structure and In the second pixel structure, the first pixel structure further includes a capacitive touch unit, and the second pixel structure further includes a light touch unit
  • the driving method includes: a compensation unit in the first pixel structure, and a compensation in the second pixel structure
  • the unit, the capacitive touch unit and the optical touch unit divide the data line in a time division manner, and the capacitive touch unit and the light touch unit time-multiplex the read line.
  • the driving method includes the following stages:
  • Reset phase the data line provides a reset signal, the compensation unit resets the drive unit, and simultaneously resets the capacitive touch unit and the light touch unit;
  • the data line provides a first driving signal, and the compensation unit in the first pixel structure discharges; the capacitive touch unit performs capacitance touch signal amplification and acquisition, and the capacitive touch signal is transmitted to the touch through the reading line An execution unit; the light sensing unit performs initial signal implantation;
  • the second driving stage the data line provides the second driving signal, the compensation unit in the second pixel structure discharges; the capacitive touch unit stops the touch; the optical touch unit performs the optical touch signal amplification and acquisition, and the optical touch signal Transfer to the touch execution unit through the read line;
  • Light-emitting stage the light-emitting control signal line provides a light-emitting signal, the capacitive touch unit and the light-sensitive touch unit stop the touch; the first pixel structure and the drive in the second pixel structure The unit drives its illumination unit to emit light.
  • each stage of the above driving method will be described one by one in combination with the timing chart shown in FIG. 4.
  • the reset phase corresponds to the process 1 in the timing chart.
  • the EM input is high level
  • the Scan[1] input is low level
  • Scan[3] input is high level
  • the data line voltage Vdata is high.
  • 5A is a schematic diagram showing the state of each transistor in the pixel circuit in the reset phase, wherein “x" represents transistor turn-off, no "x” represents transistor turn-on, and the path and arrow represent current flow direction.
  • 5B, 5D, and 5E are schematic diagrams showing states of respective transistors in the pixel circuit in the first driving phase, the second driving phase, and the light-emitting phase, respectively, wherein the meaning of "x" is the same as that in FIG. 5A.
  • Scan[1] inputs a low level, since the gate of the fifth transistor T5 is connected to Scan[1], the first pole of the fifth transistor T5 is connected to the low potential terminal, and the gate of the sixth transistor T6 Connected to Scan[1], the first pole of the sixth transistor T6 is connected to the low potential terminal, so T5 and T6 are turned on, and the remaining switching transistors (T1 to T4, T7 to T10) are turned off; one end a1 of the first capacitor C1 The point is grounded at the same time as one end a2 of the second capacitor C2, and the potentials of the points a1 and a2 are both 0V.
  • Vdata is at a high level V1, providing a reset signal for the capacitive touch unit, since the gate of the first capacitive transistor M1 is connected to Scan[1], and the first of the first capacitive transistor M1 The pole is connected to Vdata, so M1 is turned on, and the potential at point d is V1; the second capacitive transistor M2 and the third capacitive transistor M3 are both turned off at this time.
  • This process prepares for capacitive touch (eg, finger touch).
  • the first driving phase corresponds to the process 2 in the timing chart.
  • the EM inputs a high level
  • the Scan[1], Scan[3] inputs a high level
  • the Scan[2] inputs a low level
  • the Vdata a high level.
  • the process includes a discharge process of the compensation unit in the first pixel structure, amplification of the touch signal in the capacitive touch unit, an acquisition process, and a light touch unit.
  • FIG. 5B is a schematic diagram showing the state of each transistor in the pixel circuit in the first driving phase.
  • T3, T7, and DT1 are turned on, and the first pixel structure is discharged along the path of T7, DT1, and T3 and the direction of the arrow in FIG. 5B. Since Vdata is at the high level V1 at this time, the final discharge is performed. As a result, the potential at point a1 is V1-Vth1, and the potential at point b1 is Vdd, where Vth1 is the threshold voltage of DT1.
  • the coupling pulse signal (Vcom) provides on the one hand the potential of one end of the third capacitor C3 to form a coupling capacitance and on the other hand serves as the source of the amplification transistor M2. Capacitive touch will directly cause the potential of the gate of M2 to decrease.
  • V GS gate-source voltage
  • the signal will pass through M2. Therefore, this stage is the buffering phase of the capacitive touch unit, that is, waiting for the gate potential of M2 to decrease, that is, waiting for, for example, finger touch.
  • FIG. 5C shows a schematic diagram of the finger touch detection electrode (ie, the third capacitor C3) and the potential drop at point d.
  • Finger touch (equivalent to the introduction of Cf in Figure 5C) directly leads to a decrease in the potential at point d, thus reaching the conduction condition of M2, and M2 is turned on.
  • M2 acts as an amplification transistor.
  • the coupled pulse signal Vcom (corresponding to Va in FIG. 5C) is amplified to facilitate the acquisition of the touch signal.
  • the signal of the X direction is laterally collected by the scanning signal line of Scan[2], and the signal of the Y direction is longitudinally collected by the read line (Read Line), thus determining the finger touch.
  • the X and Y coordinates of the position At this stage, as long as the finger touches, its coordinate position can be collected at any time. In this phase, the read line is used for the first time to capture the touch signal.
  • N4 is a photo sensor.
  • the gate of N4 is connected to the source, N1 is turned off, N2 is turned on, and the output coupling voltage V1 is at a potential of e. V1.
  • the second driving phase corresponds to the process 3 in the timing chart.
  • the EM input is high level
  • the Scan[1], Scan[2] input is high level
  • the Scan[3] is input low level
  • the Vdata is high level.
  • the stage includes a discharge process of the compensation unit in the second pixel structure, a stagnation of the capacitive touch unit, and an initial signal amplification and acquisition process of the light touch unit.
  • FIG. 5D is a schematic diagram showing the state of each transistor of the pixel circuit in the second driving stage.
  • T4, T8, and DT2 are turned on, and the second pixel structure is discharged along the path of T8, DT2, and T4 and the direction of the arrow in FIG. 5D. Since Vdata becomes V2 at this time, the final result of the discharge is The a2 point potential is V2-Vth2, and the b2 point potential is Vdd, where Vth2 is the threshold voltage of DT2.
  • the second photo transistor N2 is switched by its own potential, and the potential difference stored by the fourth capacitor C4 is a constant value.
  • the fourth photo transistor Photo Sensor
  • the light intensity received by N4 increases, and the charging current increases, temporarily storing the voltage at both ends of C4.
  • the amplified storage signal is then transmitted to an amplifier in the display device for further amplification, and the further amplified signal is transmitted through a read line to a processor in the display device for data calculation and analysis.
  • the processor compares the difference between the change of the photoelectric signal intensity before and after the touch with the touchless threshold, and accordingly determines whether there is a touch (the difference in the photoelectric signal intensity difference) If the value is greater than the threshold, it indicates that there is a touch. If there is a touch, the signal in the X direction is laterally acquired by the Scan[3] scanning signal line to determine the X coordinate, and the Y direction signal is also collected longitudinally through the read line (Read Line). Determine the Y coordinate. In this phase, the second time the read line is used for the acquisition of the touch signal.
  • the illumination phase corresponds to the process 4 in the timing diagram.
  • the EM input is low
  • Scan[1], Scan[2], Scan[3] are input high
  • Vdata is low.
  • the first pixel structure, the second pixel structure, the light emitting unit emits light
  • the capacitive touch unit is stagnant
  • the light touch unit is stagnant.
  • Fig. 5E is a schematic view showing the state of each transistor of the pixel circuit in the light-emitting phase.
  • the EM inputs a low-level signal, and the first pixel structure and the second pixel structure are simultaneously connected to Vdd.
  • T1, T9, and DT1 are turned on, and the first pixel structure passes through T1, DT1, and T9 in FIG. 5E.
  • the path and the direction of the arrow provide driving current I OLED1 for OLED1 , OLED1 emits light; T2, T10, DT2 conduct, and the second pixel structure provides driving current for OLED2 along the path of T2, DT2, T10 and the direction of the arrow in FIG. 5E.
  • OLED2 , OLED2 emit light.
  • the current flowing through the OLED 1 is:
  • I OLED2 K(V dd -V 2 ) 2
  • the driving current flowing through the OLED1 and the OLED2 is not affected by the threshold voltage Vth of the respective driving transistors, but only related to Vdata, completely solving the driving transistor due to the manufacturing process and long-time operation.
  • the problem of the influence of the threshold voltage drift on the driving current I OLED ensures the normal operation of the OLED.
  • the driving of the two pixel structures is completed by the common compensation circuit, thereby greatly reducing the number of transistors in the compensation circuit, greatly reducing the size of the pixel (Pixel Pitch) and reducing the IC cost. This results in higher picture quality and a higher PPI (Pixels Per Inch).
  • the capacitive touch function and the light touch function are further integrated, so that the display screen including the pixel circuit not only satisfies the capacitive touch such as finger touch. Needs, at the same time, it also has a good touch recognition function for the light touch control such as laser pen touch; at the same time, the scanning of the longitudinal signals of the two units of the capacitor and the light sense in the above pixel circuit realizes the use of time domain acquisition, so that time division can be performed.
  • the multiplexed read line realizes touch coordinate signal acquisition, and the read line can be placed in the middle of the pixel structure, which saves wiring space and thus obtains a higher PPI.
  • This embodiment provides a display device including the pixel circuit in Embodiment 1.
  • the adjacent first pixel structure and the second pixel structure may be adjacent sub-pixel units of the same pixel unit, or may be adjacent different pixel units. Adjacent sub-pixel units.
  • the pixel arrangement manner of the adjacent first pixel structure and the adjacent pixel unit of the same pixel unit as shown in FIG. 6A may be designed according to actual needs, or as
  • the adjacent first pixel structure and the second pixel structure shown in FIG. 6B are pixel arrangements of adjacent sub-pixel units of adjacent different pixel units.
  • the compensation unit in the first pixel structure, the compensation unit in the second pixel structure, the capacitive touch unit, and the optical touch unit share a data line, and the capacitive touch unit and the light touch unit share The read line can meet the driving requirements and save wiring space, thus enabling smaller pixel points and achieving finer pixel resolution.
  • the arrangement shown in any one of FIG. 6A and FIG. 6B that is, one driving unit and the compensation unit and one touch unit (capacitance) can be used.
  • the touch unit constitutes one sub-pixel, and the other driving unit and the compensation unit form a sub-pixel with another touch unit (light-sensitive touch unit).
  • “C” stands for capacitive touch unit
  • “P” stands for light touch unit
  • the read line is shown on the left side of the figure just for convenience.
  • the sub-pixels having "C” and “P” herein may be randomly arranged periodically, as long as the time-multiplexed data lines and the read lines belong to the same pixel unit. Therefore, it is easy to infer that when the pixel color is more than RGB three-color arrangement, for example, including RGBW four-color pixels, the sub-pixels may be combined in the order of arrangement to form a paired sub-pixel structure, so as to facilitate The adjacent sub-pixel units of the same pixel unit are formed into the first pixel structure and the second pixel structure in Embodiment 1.
  • the display device can be: electronic paper, mobile phone, tablet computer, television, display device, notebook computer, digital photo frame, navigator, etc. Product or component.
  • the display device in the embodiment adopts the pixel circuit illustrated in the first embodiment, and is applicable to various touch modes, has high pixel resolution, high display quality, small volume, and long life.
  • the pixel circuit of the present invention improves the flexibility of the touch by integrating the capacitive touch function and the light touch function; the pixel circuit also combines the compensation units in the adjacent sub-pixel structures into one body, so that the phase
  • the adjacent sub-pixel structure can share one data line (ie, one data line controls the compensation unit of the two driving units), thereby sharing the compensation unit to complete the driving of the two sub-pixel units, thereby reducing the number of transistors of the compensation circuit and the data line.
  • the number can greatly reduce the size of the Pixel Pitch and reduce the cost of the IC, resulting in higher picture quality and higher PPI.
  • the problem of the influence on the driving current caused by the non-uniformity of the threshold voltage (Vth) caused by the manufacturing process and the long-time operation of the pixel dot driving transistor is also solved, so that each pixel flows through The current of the OLED in the point is not affected by the threshold voltage Vth of the driving transistor, and finally the uniformity of the image display is ensured; moreover, the compensation unit ensures that the pixel circuit has no current flowing through the OLED during the reset phase and the driving phase, which indirectly improves The service life of OLED.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Computer Hardware Design (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种像素电路包括多个像素结构，像素结构包括驱动单元、补偿单元和发光单元，其中，相邻的第一像素结构和第二像素结构中，第一像素结构还包括电容触控单元，第二像素结构还包括光感触控单元，且第一像素结构中的补偿单元、第二像素结构中的补偿单元、电容触控单元以及光感触控单元共用数据线，电容触控单元和光感触控单元共用读取线。

Description

像素电路及其驱动方法、显示装置 技术领域
本发明属于显示技术领域，具体涉及像素电路及其驱动方法、包括像素电路的显示装置。
背景技术
有机电致发光二极管(Organic Light-Emitting Diode，简称OLED)显示器是当今平板显示器研究领域的热点之一，与液晶显示器(Liquid Crystal Display，简称LCD)相比，OLED显示器具有低能耗、生产成本低、自发光、宽视角及响应速度快等优点。目前，在手机、PDA、数码相机等显示领域，OLED显示器已经开始逐步取代传统的LCD。
而在OLED显示器技术中，像素驱动电路的设计是核心技术内容。LCD属于电压驱动，即利用稳定的电压控制液晶的透光亮度；与LCD不同，OLED显示器属于电流驱动，需要稳定的电流来控制OLED器件发光。而传统的OLED显示器中，通常采用2T1C的像素电路对OLED器件的发光进行控制。如图1所示，在2T1C的像素电路中，由一个驱动薄膜晶体管(Thin Film Transistor，简称TFT)T2、一个开关薄膜晶体管T1和一个存储电容器(Storage Capacitor，简称Cs)组成，T1与扫描线连接、还与数据线连接，当扫描线选择某一行时，扫描线电压Vscan为低电平，T1导通，数据线电压Vdata通过T1写入Cs；当该行扫描结束后，Vscan变为高电平，T1截止，存储在Cs上的电压驱动T2，使其产生电流来驱动OLED，保证OLED在一帧时间内持续发光，T2的饱和电流即流过OLED的电流为IOLED＝K(VGS-Vth)2，其中VGS为T2的栅源电压，Vth为T2的阈值电压。可见，IOLED与T2的阈值电压Vth有关。而且，由于制造工艺和器件老化等原因，在2T1C的像素电 路中，各像素点的驱动TFT的阈值电压Vth会漂移，即各像素点的驱动TFT的阈值电压存在不均匀性，容易导致流过各个像素点的OLED的电流因其驱动TFT的阈值电压Vth的不同而不同，使得显示屏的显示亮度不均，从而影响整个图像的显示效果。
为了进一步消除驱动TFT的阈值电压对驱动电流的影响，出现了包括更多个TFT和Cs的像素电路，该像素电路包括补偿电路，用于对驱动TFT的阈值电压进行补偿，但是，现有技术中，一个像素电路仅局限在一个子像素单元内，如图2所示为现有技术中的子像素单元的排布方式，每个子像素单元具有一个像素电路，每个像素电路包括一个专属补偿电路，因此每个子像素单元均连接数据线。在满足驱动要求的情况下，从TFT、Cs以及数据线的分布空间等诸多因素考虑，现有技术中的像素电路使得难以压缩像素点来实现更精细的像素分辨率。
同时，目前的触控领域中，电容式触控与光感式触控两种方式最容易被消费者所接受和认可，如果能将上述两种触控技术与OLED显示器整合，进而将实现触控的制程与OLED显示器的制程整合到一起，这种代表着高附加值以及最新技术功能的整合势必会在未来显示技术领域中占有不可撼动的地位。然而，上述两种触控功能的增加势必会更进一步加大像素点，从而更难以实现精细的像素分辨率。
发明内容
本发明所要解决的技术问题是针对现有技术中存在的上述不足，提供一种像素电路及其驱动方法、包括像素电路的显示装置，使得可以缩减现有技术中的像素电路中的补偿电路的晶体管个数以及其所需的数据线数量，从而大幅压缩像素点大小并降低IC成本，并使得流过每个像素点中的OLED的电流不受其驱动晶体管的阈值电压Vth的影响，最终保证图像显示的均匀性。
解决本发明所要解决的技术问题所采用的技术方案是一种像素电路，包括多个像素结构，每个像素结构包括驱动单元、补偿 单元和发光单元，其中，相邻的第一像素结构和第二像素结构中，所述第一像素结构还包括电容触控单元，所述第二像素结构还包括光感触控单元，且所述第一像素结构中的补偿单元、所述第二像素结构中的补偿单元、所述电容触控单元以及所述光感触控单元共用数据线，所述电容触控单元和所述光感触控单元共用读取线，其中：
所述补偿单元用于对所述驱动单元中的驱动晶体管的驱动电压进行调整，以消除所述驱动晶体管的阈值电压对流过所述发光单元的电流的影响，所述数据线用于为所述驱动晶体管提供数据信号；
所述电容触控单元用于根据电容触控信号生成相应的电信号，所述数据线用于为所述电容触控单元提供初始信号，所述读取线用于读取所述电容触控信号；
所述光感触控单元用于根据光感触控信号生成相应的电信号，所述数据线用于为所述光感触控单元提供初始信号，所述读取线用于读取所述光感触控信号。
例如，所述电容触控信号为手指触控信号，所述光感触控信号为激光笔触控信号。
优选的是，所述第一像素结构中的补偿单元与所述第二像素结构中的补偿单元的结构相同、且对称设置，所述数据线设置于所述第一像素结构中的补偿单元与所述第二像素结构中的补偿单元之间、且分别与所述第一像素结构中的补偿单元和所述第二像素结构中的补偿单元连接。
优选的是，所述第一像素结构中的驱动单元包括第一驱动晶体管，所述第二像素结构中的驱动单元包括第二驱动晶体管，所述第一驱动晶体管与所述第二驱动晶体管的结构相同、且对称设置，所述数据线位于所述第一驱动晶体管与所述第二驱动晶体管之间、且分别与所述第一驱动晶体管和所述第二驱动晶体管连接。
优选的是，所述第一像素结构中的补偿单元包括第一晶体管、第三晶体管、第五晶体管、第七晶体管、第九晶体管和第一电容 器，所述第二像素结构中的补偿单元包括第二晶体管、第四晶体管、第六晶体管、第八晶体管、第十晶体管和第二电容器，所述像素结构还包括第一扫描线、第二扫描线、第三扫描线以及发光控制信号线，其中：
所述第一晶体管的栅极与所述第二晶体管的栅极连接，并与所述发光控制信号线连接，所述第一晶体管的第一极分别与所述第二晶体管的第一极、高电位端连接，所述第一晶体管的第二极与所述第一驱动晶体管的第一极连接；
所述第三晶体管的栅极与第二扫描线连接，所述第三晶体管的第一极分别与所述第一电容器的一端、所述第一驱动晶体管的栅极连接，所述第三晶体管的第二极与所述第一驱动晶体管的第一极连接；
所述第五晶体管的栅极与第一扫描线连接，所述第五晶体管的第一极与低电位端连接，所述第五晶体管的第二极与所述第一驱动晶体管的栅极连接；
所述第七晶体管的栅极与所述第二扫描线连接，所述第七晶体管的第一极与所述数据线连接，所述第七晶体管的第二极分别与所述第一驱动晶体管的第二极、所述第九晶体管的第一极连接；
所述第九晶体管的栅极与所述第十晶体管的栅极连接，并与所述发光控制信号线连接，所述第九晶体管的第一极与所述第一驱动晶体管的第二极连接，所述第九晶体管的第二极与所述第一像素结构中的发光单元连接；
所述第一电容器的一端与所述第一晶体管的第一极连接，另一端与所述第三晶体管的第一极连接；
所述第二晶体管的第二极与所述第二驱动晶体管的第一极连接；
所述第四晶体管的栅极与第三扫描线连接，所述第四晶体管的第一极分别与所述第二电容器的一端、所述第二驱动晶体管的栅极连接，所述第四晶体管的第二极与所述第二驱动晶体管的第一极连接；
所述第六晶体管的栅极与第一扫描线连接，所述第六晶体管的第一极与低电位端连接，所述第六晶体管的第二极与所述第二驱动晶体管的栅极连接；
所述第八晶体管的栅极与所述第三扫描线连接，所述第八晶体管的第一极与所述数据线连接，所述第八晶体管的第二极分别与所述第二驱动晶体管的第二极、所述第十晶体管的第一极连接；
所述第十晶体管的第一极与所述第二驱动晶体管的第二极连接，所述第十晶体管的第二极与所述第二像素结构中的发光单元连接；
所述第二电容器的一端与所述第二晶体管的第一极连接，另一端与所述第四晶体管的第一极连接。
优选的是，所述电容触控单元包括第一容式晶体管、第二容式晶体管、第三容式晶体管和第三电容器，其中：
所述第一容式晶体管的栅极与第一扫描线连接，所述第一容式晶体管的第一极与所述数据线连接，所述第一容式晶体管的第二极分别与所述第二容式晶体管的栅极、所述第三电容器的一端连接；
所述第二容式晶体管的第一极分别与所述第三电容器的另一端、参考电位端连接，所述第二容式晶体管的第二极与所述第三容式晶体管的第二极连接；
所述第三容式晶体管的栅极与所述光感触控单元连接，所述第三容式晶体管的第一极与所述读取线连接。
优选的是，所述光感触控单元包括第一光式晶体管、第二光式晶体管、第三光式晶体管、第四光式晶体管和第四电容器，其中：
所述第一光式晶体管的栅极与所述第一扫描线连接，所述第一光式晶体管的第一极与低电位端连接，所述第一光式晶体管的第二极分别与所述第二光式晶体管的第二极、所述第四光式晶体管的栅极和第一极连接；
所述第二光式晶体管的栅极与所述电容触控单元中的所述第 三容式晶体管的栅极连接，所述第二光式晶体管的第一极与所述数据线连接，所述第二光式晶体管的第二极与所述第四光式晶体管的第一极连接；
所述第三光式晶体管的栅极与第三扫描线连接，所述第三光式晶体管的第一极与所述第四光式晶体管的第二极连接，所述第三光式晶体管的第二极与所述读取线连接；
所述第四电容器的一端与所述第四光式晶体管的栅极连接，另一端与所述第四光式晶体管的第二极连接。
优选的是，所述第一像素结构中的发光单元包括第一有机电致发光二极管，所述第一有机电致发光二极管的阳极与所述第九晶体管的第二极连接，所述第一有机电致发光二极管的阴极与低电位端连接；
所述第二像素结构中的发光单元包括第二有机电致发光二极管，所述第二有机电致发光二极管的阳极与所述第十晶体管的第二极连接，所述第二有机电致发光二极管的阴极与低电位端连接。
优选的是，所述第一晶体管至所述第十晶体管、所述第一光式晶体管至所述第四光式晶体管、所述第一容式晶体管至所述第三容式晶体管和所述第一驱动晶体管、所述第二驱动晶体管均为P型薄膜晶体管，其中，第一极为源极，第二极为漏极。
一种显示装置，包括上述的像素电路。
优选的是，相邻的所述第一像素结构与所述第二像素结构为同一像素单元的相邻子像素单元。
一种像素电路的驱动方法，所述像素电路包括多个像素结构，每个像素结构包括驱动单元、补偿单元和发光单元，其中，相邻的第一像素结构和第二像素结构中，所述第一像素结构还包括电容触控单元，所述第二像素结构还包括光感触控单元，所述驱动方法包括：所述第一像素结构中的补偿单元、所述第二像素结构中的补偿单元、所述电容触控单元以及所述光感触控单元分时复用数据线，所述电容触控单元和所述光感触控单元分时复用读取线。
优选的是，在一帧时间内，所述驱动方法包括如下阶段：
重置阶段：所述数据线提供重置信号，所述补偿单元对所述驱动单元进行重置，并同时对所述电容触控单元和所述光感触控单元进行重置；
第一驱动阶段：所述数据线提供第一驱动信号，所述第一像素结构中的补偿单元放电；所述电容触控单元进行电容触控信号放大和采集，所述电容触控信号通过所述读取线传送至触控执行单元；所述光感触控单元进行初始信号植入；
第二驱动阶段：所述数据线提供第二驱动信号，所述第二像素结构中的补偿单元放电；所述电容触控单元停滞触控；所述光感触控单元进行光感触控信号放大和采集，所述光感触控信号通过所述读取线传送至触控执行单元；
发光阶段：发光控制信号线提供发光信号，所述电容触控单元和所述光感触控单元停滞触控；所述第一像素结构和所述第二像素结构中的驱动单元分别驱动其所述发光单元发光。
本发明的有益效果是：该像素电路通过将电容触控功能、光感触控功能整合为一体，提高了触控的灵活性；该像素电路还将相邻的子像素单元中的补偿单元组合为一体，使得相邻的子像素单元可以共用一条数据线(即一条数据线控制两个子像素单元中的补偿单元)，从而共用补偿单元来完成两个子像素单元的驱动，因此可以缩减补偿电路的晶体管个数以及数据线数量，可大幅压缩像素点(Pixel Pitch)大小并降低IC成本，从而获得更高的画面品质、获得更高的PPI(Pixels Per Inch)；还同时解决了各像素点的驱动晶体管由于制造工艺及长时间的操作造成的阈值电压(Vth)不均一所引起的流过各像素点中的OLED的电流不等的问题，使得流过每个像素点中的OLED的电流不受其驱动晶体管的阈值电压Vth的影响，最终保证了图像显示的均匀性；而且，补偿单元保证了像素电路在重置阶段和驱动阶段无电流通过OLED，间接提高了OLED的使用寿命。
附图说明
图1为现有技术中的2T1C像素电路的原理图。
图2为现有技术中的子像素单元的排布方式示意图。
图3为本发明的实施例1中的像素电路的原理图。
图4为本发明的实施例1中的像素电路的驱动时序图。
图5A至图5E为本发明的实施例1中的像素电路的驱动过程图，其中：
图5A为重置阶段像素电路的原理图；
图5B为第一驱动阶段像素电路的原理图；
图5C为在第一驱动阶段中电容触控单元受电容触控使得电容器的一端电势降低的示意图；
图5D为第二驱动阶段像素电路的原理图；
图5E为发光阶段像素电路的原理图。
图6A和图6B为本发明的实施例2中的子像素单元的排布方式示意图。
附图标记：
1－驱动单元；2－补偿单元；3－发光单元；4－电容触控单元；5－光感触控单元。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对本发明的像素电路及其驱动方法、显示装置作进一步详细描述。
实施例1：
本实施例提供一种像素电路以及与该像素电路相应的驱动方法。
如图3所示，所述像素电路包括多个像素结构，每个像素结构用于一个子像素单元。具体地，所述像素电路包括驱动单元1、 补偿单元2和发光单元3，其中，相邻的第一像素结构和第二像素结构中，第一像素结构中的驱动单元和第二像素结构中的驱动单元构成驱动单元1，第一像素结构中的补偿单元和第二像素结构中的补偿单元构成补偿单元2，第一像素结构中的发光单元和第二像素结构中的发光单元构成发光单元3，第一像素结构还包括电容触控单元4，第二像素结构还包括光感触控单元5，且第一像素结构中的补偿单元、第二像素结构中的补偿单元、电容触控单元4以及光感触控单元5共用数据线(Data Line)，电容触控单元4和光感触控单元5共用读取线(Read Line)。
补偿单元2用于对驱动单元1中的驱动晶体管的驱动电压进行调整，以消除驱动晶体管的阈值电压对流过发光单元3的电流的影响，数据线用于为驱动晶体管提供数据信号。
电容触控单元4用于根据电容触控信号生成相应的电信号，例如，根据手指触控信号生成相应的电信号，数据线用于为电容触控单元4提供初始信号，读取线用于读取所述电容触控信号(例如，手指触控信号)。
光感触控单元5用于根据光感触控信号生成相应的电信号，例如，根据激光笔触控信号生成相应的电信号，数据线用于为光感触控单元5提供初始信号，读取线用于读取所述光感触控信号(例如，激光笔触控信号)。
优选的是，第一像素结构中的补偿单元与第二像素结构中的补偿单元的结构相同、且对称设置，数据线设置于第一像素结构中的补偿单元与第二像素结构中的补偿单元之间(图3中为了图面的清晰性，将其示意在一侧)、且分别与第一像素结构中的补偿单元和第二像素结构中的补偿单元连接。
具体的，如图3所示，第一像素结构中的驱动单元包括第一驱动晶体管DT1，第二像素结构中的驱动单元包括第二驱动晶体管DT2，即DT1和DT2分别为2个子像素单元的驱动(Driving)晶体管。第一驱动晶体管DT1与第二驱动晶体管DT2的结构相同、且对称设置，数据线位于第一驱动晶体管DT1与第二驱动晶体管DT2 之间、且分别与第一驱动晶体管DT1和第二驱动晶体管DT2连接。
第一像素结构中的补偿单元包括第一晶体管T1、第三晶体管T3、第五晶体管T5、第七晶体管T7、第九晶体管T9和第一电容器C1，第二像素结构中的补偿单元包括第二晶体管T2、第四晶体管T4、第六晶体管T6、第八晶体管T8、第十晶体管T10和第二电容器C2，所述像素电路还包括第一扫描线Scan[1]、第二扫描线Scan[2]、第三扫描线Scan[3]以及发光控制信号线EM。该实施例中，T1至T10为开关(Switching)晶体管；Scan[1]、Scan[2]和Scan[3]均输入扫描信号；EM输入发光控制信号，用于控制发光单元3发光；第一电容器C1和第二电容器C2为存储电容器。
具体地，第一晶体管T1的栅极与第二晶体管T2的栅极连接，并与所述发光控制信号线EM连接，第一晶体管T1的第一极分别与第二晶体管T2的第一极、高电位端Vdd连接，第一晶体管T1的第二极与第一驱动晶体管DT1的第一极连接。
第三晶体管T3的栅极与第二扫描线Scan[2]连接，第三晶体管T3的第一极分别与第一电容器C1的一端、第一驱动晶体管DT1的栅极连接，第三晶体管T3的第二极与第一驱动晶体管DT1的第一极连接。
第五晶体管T5的栅极与第一扫描线Scan[1]连接，第五晶体管T5的第一极与低电位端连接，第五晶体管T5的第二极与第一驱动晶体管DT1的栅极连接。
第七晶体管T7的栅极与第二扫描线Scan[2]连接，第七晶体管T7的第一极与数据线连接，第七晶体管T7的第二极分别与第一驱动晶体管DT1的第二极、第九晶体管T9的第一极连接。
第九晶体管T9的栅极与第十晶体管T10的栅极连接，并与所述发光控制信号线EM连接，第九晶体管T9的第一极与第一驱动晶体管DT1的第二极连接，第九晶体管T9的第二极与第一像素结构中的发光单元连接。
第一电容器C1的一端与第一晶体管T1的第一极连接，另一端与第三晶体管T3的第一极连接。
第二晶体管T2的第二极与第二驱动晶体管DT2的第一极连接。
第四晶体管T4的栅极与第三扫描线Scan[3]连接，第四晶体管T4的第一极分别与第二电容器C2的一端、第二驱动晶体管DT2的栅极连接，第四晶体管T4的第二极与第二驱动晶体管DT2的第一极连接。
第六晶体管T6的栅极与第一扫描线Scan[1]连接，第六晶体管T6的第一极与低电位端连接，第六晶体管T6的第二极与第二驱动晶体管DT2的栅极连接。
第八晶体管T8的栅极与第三扫描线Scan[3]连接，第八晶体管T8的第一极与数据线连接，第八晶体管T8的第二极分别与第二驱动晶体管DT2的第二极、第十晶体管T10的第一极连接。
第十晶体管T10的第一极与第二驱动晶体管DT2的第二极连接，第十晶体管T10的第二极与第二像素结构中的发光单元连接。
第二电容器C2的一端与第二晶体管T2的第一极连接，另一端与第四晶体管T4的第一极连接。
电容触控单元4包括第一容式晶体管M1、第二容式晶体管M2、第三容式晶体管M3和第三电容器C3，M1为信号重置(Pre-Charge)晶体管；M2为信号放大(Amplifier)晶体管，起到放大电流信号的作用；M3为开关晶体管(Switching)。
具体地，第一容式晶体管M1的栅极与第一扫描线Scan[1]连接，第一容式晶体管M1的第一极与数据线连接，第一容式晶体管M1的第二极分别与第二容式晶体管M2的栅极、第三电容器C3的一端连接。
第二容式晶体管M2的第一极与第三容式晶体管M3的第二极连接，第二容式晶体管M2的第二极分别与第三电容器C3的另一端、参考电位端(用于电容器的耦合重置)连接。
第三容式晶体管M3的栅极与光感触控单元5连接，第三容式晶体管M3的第一极与读取线连接。
光感触控单元5包括第一光式晶体管N1、第二光式晶体管N2、 第三光式晶体管N3、第四光式晶体管N4和第四电容器C4，N4为光敏(Photo)晶体管，即，当光照射到感光晶体管上时，就会产生光电流，不同的光强会产生不同强度的光电流。N1、N2、N3为开关(Switching)晶体管，起到开关控制的作用，N2还同时起到读取光感数据的作用；C4为存储电容器，用于存储光感晶体管产生的光电流。
具体地，第一光式晶体管N1的栅极与第一扫描线Scan[1]连接，第一光式晶体管N1的第一极与低电位端连接，第一光式晶体管N1的第二极分别与第二光式晶体管N2的第二极、第四光式晶体管N4的栅极和第一极连接。
第二光式晶体管N2的栅极与电容触控单元4中的第三容式晶体管M3的栅极连接，第二光式晶体管N2的第一极与数据线连接，第二光式晶体管N2的第二极与第四光式晶体管N4的第一极连接。
第三光式晶体管N3的栅极与第三扫描线Scan[3]连接，第三光式晶体管N3的第一极与第四光式晶体管N4的第二极连接，第三光式晶体管N3的第二极与读取线连接。
第四电容器C4的一端与第四光式晶体管N4的栅极连接，另一端与第四光式晶体管N4的第二极连接。
第一像素结构中的发光单元包括第一有机电致发光二极管OLED1，第一有机电致发光二极管OLED1的阳极与第九晶体管T9的第二极连接，第一有机电致发光二极管OLED1的阴极与低电位端连接。
第二像素结构中的发光单元包括第二有机电致发光二极管OLED2，第二有机电致发光二极管OLED2的阳极与第十晶体管T10的第二极连接，第二有机电致发光二极管OLED2的阴极与低电位端连接。
在本实施例中，所述像素电路中的晶体管均以薄膜晶体管(Thin Film Transistor，简称TFT)为示例进行说明。该实施例中，第一晶体管T1至第十晶体管T10、第一光式晶体管N1至第四光式晶体管N4、第一容式晶体管M1至第三容式晶体管M3和第一 驱动晶体管DT1、第二驱动晶体管DT2均为P型薄膜晶体管，其中，第一极为源极，第二极为漏极。或者，所述像素电路中的T1至T10、N1至N4、M1至M3均为N型薄膜晶体管，其中，第一极为漏极，第二极为源极。或者，所述像素电路中的T1至T10、N1至N4、M1至M3混合选用N型薄膜晶体管和P型薄膜晶体管，只需同时将选定类型的薄膜晶体管的各端子相应连接即可。同时，应该理解的是，本实施例中的T1至T10、N1至N4、M1至M3也并不限于薄膜晶体管，任何具有电压控制能力以使得本发明按照所需工作方式工作的控制器件均适用于本发明，本领域技术人员能够根据实际需要进行选择，此处不再赘述。
相应的，本实施例还提供一种像素电路的驱动方法，所述像素电路包括多个像素结构，每个像素结构包括驱动单元、补偿单元和发光单元，其中，相邻的第一像素结构和第二像素结构中，第一像素结构还包括电容触控单元，第二像素结构还包括光感触控单元，所述驱动方法包括：第一像素结构中的补偿单元、第二像素结构中的补偿单元、电容触控单元以及光感触控单元分时复用数据线，电容触控单元和光感触控单元分时复用读取线。
具体地，在一帧时间内，所述驱动方法包括如下阶段：
重置阶段：数据线提供重置信号，补偿单元对驱动单元进行重置，并同时对电容触控单元和光感触控单元进行重置；
第一驱动阶段：数据线提供第一驱动信号，第一像素结构中的补偿单元放电；电容触控单元进行电容触控信号放大和采集，所述电容触控信号通过读取线传送至触控执行单元；光感触控单元进行初始信号植入；
第二驱动阶段：数据线提供第二驱动信号，第二像素结构中的补偿单元放电；电容触控单元停滞触控；光感触控单元进行光感触控信号放大和采集，所述光感触控信号通过读取线传送至触控执行单元；
发光阶段：发光控制信号线提供发光信号，电容触控单元和光感触控单元停滞触控；第一像素结构和第二像素结构中的驱动 单元分别驱动其发光单元发光。
具体的，结合图4所示的时序图，对上述驱动方法的各个阶段进行逐一说明。
重置阶段对应时序图中的过程1，该过程中，EM输入高电平，Scan[1]输入低电平，Scan[2]、Scan[3]输入高电平，数据线电压Vdata为高电平V1。图5A为在重置阶段所述像素电路中的各晶体管的状态示意图，其中，“×”代表晶体管截止，无“×”代表晶体管导通，路径及箭头代表电流流向。图5B、图5D和图5E分别为在第一驱动阶段、第二驱动阶段和发光阶段所述像素电路中的各晶体管的状态示意图，其中“×”的含义与图5A中的相同。
在重置阶段，Scan[1]输入低电平，由于第五晶体管T5的栅极与Scan[1]连接、第五晶体管T5的第一极与低电位端连接，第六晶体管T6的栅极与Scan[1]连接、第六晶体管T6的第一极与低电位端连接，因此T5和T6导通，其余开关晶体管(T1至T4、T7至T10)均截止；第一电容器C1的一端a1点与第二电容器C2的一端a2点同时接地，a1点和a2点的电势均为0V。
而且，在重置阶段，Vdata为高电平V1，为电容触控单元提供重置信号，由于第一容式晶体管M1的栅极与Scan[1]连接、第一容式晶体管M1的第一极与Vdata连接，因此M1导通，d点的电势为V1；第二容式晶体管M2、第三容式晶体管M3此时均截止。此过程为接受电容触控(例如，手指触控)做准备。
此外，在重置阶段，由于第一光式晶体管N1的栅极与Scan[1]连接、第一光式晶体管N1的第一极与低电位端连接，因此N1导通，将第四电容器C4与第四光式晶体管(Photo Sensor)N4接地重置，e点的电势为0V。此过程为下一阶段第四光式晶体管N4的感光做准备，此时，N2、N3截止。
第一驱动阶段对应时序图中的过程2，该过程中，EM输入高电平，Scan[1]、Scan[3]输入高电平，Scan[2]输入低电平，Vdata为高电平V1。该过程包括第一像素结构中的补偿单元的放电过程、电容触控单元中触控信号的放大、采集过程以及光感触控单元中 初始信号的植入过程，图5B为在第一驱动阶段所述像素电路中的各晶体管的状态示意图。
在第一驱动阶段，T3、T7、DT1导通，第一像素结构沿图5B中的经过T7、DT1、T3的路径及箭头方向放电，由于此时Vdata为高电平V1，所以放电的最终结果是：a1点的电势为V1-Vth1，b1点的电势为Vdd，其中，Vth1为DT1的阈值电压。
而且，在第一驱动阶段，M1截止，M2和M3导通。这里应该理解的是，此阶段，耦合脉冲信号(Vcom)一方面提供第三电容器C3一端的电势以形成耦合电容，另一方面充当放大晶体管M2的源极。电容触控将直接导致M2的栅极的电势降低，当M2的栅源电压(VGS)满足晶体管的导通条件时，才会有信号通过M2。因此，此阶段为电容触控单元的缓冲阶段，即等待M2的栅极电势降低，也就是等待例如手指触控。
图5C示出了手指触控探测电极(即第三电容器C3)以及d点的电势降低的示意图。手指触控(相当于引入图5C中的Cf)直接导致d点的电势降低，从而达到了M2的导通条件，M2导通，当M2的I-V特性曲线在放大区时，M2作为放大晶体管将耦合脉冲信号Vcom(相当于图5C中的Va)放大，以有助于对触控信号的采集。在对手指触控信号进行采集的过程中，通过Scan[2]扫描信号线横向采集X方向的信号，并同时通过读取线(Read Line)纵向采集Y方向的信号，这样就确定了手指触摸位置的X、Y坐标。此阶段，只要手指进行触控，其坐标位置随时都可以被采集到。在该阶段中，第一次使用读取线进行触控信号的采集。
此外，在该实施例中，N4为光感晶体管(Photo Sensor)，在第一驱动阶段，N4的栅极与源极连接，N1截止，N2导通，输出耦合电压V1，e点的电势为V1。
第二驱动阶段对应时序图中的过程3，该过程中，EM输入高电平，Scan[1]、Scan[2]输入高电平，Scan[3]输入低电平，Vdata为高电平V2。该阶段包括第二像素结构中的补偿单元的放电过程、电容触控单元停滞以及光感触控单元的初始信号放大、采集过程， 图5D为在第二驱动阶段所述像素电路的各晶体管的状态示意图。
在第二驱动阶段，T4、T8、DT2导通，第二像素结构沿图5D中的经过T8、DT2、T4的路径及箭头方向放电，由于此时Vdata变为V2，所以放电的最终结果是：a2点电势为V2-Vth2，b2点电势为Vdd，其中Vth2为DT2的阈值电压。
在第二驱动阶段，电容触控单元中的所有晶体管都截止，电容触控单元处于停滞状态。
此外，在第二驱动阶段，第二光式晶体管N2经过自身电势转换，此时第四电容器C4储存的电位差为定值，当有光照射至此像素结构时，第四光式晶体管(Photo Sensor)N4接受到的光照强度增加，充电电流增加，会将电压暂时储存在C4的两端。然后，将放大过的存储信号传送到显示装置中的放大器以进行进一步放大，进一步放大后的信号经过读取线传送至显示装置中的处理器以用于进行数据计算、分析。如果在此阶段发生激光笔触控动作，则处理器将触控前和触控后的光电信号强度的变化差值与无触控阈值进行比较，依此判断是否有触摸(光电信号强度的变化差值大于阈值则表明为有触摸)，如果有触摸，则通过Scan[3]扫描信号线横向采集X方向的信号以确定X坐标，并同时通过读取线(Read Line)纵向采集Y方向的信号以确定Y坐标。在该阶段中，第二次使用读取线进行触控信号的采集。
发光阶段对应时序图中的过程4，该过程中，EM输入低电平，Scan[1]、Scan[2]、Scan[3]输入高电平，Vdata为低电平。该阶段，第一像素结构、第二像素结构中发光单元发光，电容触控单元停滞以及光感触控单元停滞。图5E为在发光阶段所述像素电路的各晶体管的状态示意图。
在发光阶段，EM输入低电平信号，第一像素结构和第二像素结构同时接入Vdd，此时T1、T9、DT1导通，第一像素结构沿图5E中的经过T1、DT1、T9的路径及箭头方向为OLED1提供驱动电流IOLED1，OLED1发光；T2、T10、DT2导通，第二像素结构沿图5E中的经过T2、DT2、T10的路径及箭头方向为OLED2提供驱动电流 IOLED2，OLED2发光。
根据驱动晶体管的饱和电流公式，流过OLED1的电流为：
IOLED1＝K(VGS-Vth)2＝K[Vdd-(V1-Vth1)-Vth1]2＝K(Vdd-V1)2
同理可以得到，流过OLED2的电流为：
IOLED2＝K(Vdd-V2)2
从以上两个公式可见，此时流经OLED1、OLED2的驱动电流不受各自驱动晶体管的阈值电压Vth的影响，而只与Vdata有关，彻底解决了驱动晶体管由于制造工艺及长时间的操作造成的阈值电压漂移所引起的对驱动电流IOLED的影响的问题，保证了OLED的正常工作。
在发光阶段，电容触控单元中的所有晶体管都截止，电容触控单元处于停滞状态，光感触控单元中的所有晶体管都截止，光感触控单元处于停滞状态。
即，在发光阶段中，仅驱动单元、补偿单元与发光单元工作，而电容触控单元和光感触控单元均处于停滞状态，这样可以将对发光单元的影响降到最低。
在本实施例的像素电路中，通过共用补偿电路完成两个像素结构的驱动，从而大大缩减了补偿电路中的晶体管的个数，可大幅压缩像素点(Pixel Pitch)的大小并降低IC成本，从而获得更高的画面品质，以及获得更高的PPI(Pixels Per Inch)。
另外，通过使像素电路中的数据线分时复用，进一步整合了电容式触控功能和光感式触控功能，使得包括该像素电路的显示屏本身不仅满足手指触控等电容式触控的需要，同时对于激光笔触控等光感触控也有较好的触控识别功能；同时，上述像素电路中对于电容和光感两个单元的纵向信号的扫描实现了不用时域采集，这样就可以分时复用读取线，实现触控坐标信号采集，而且读取线可以放置在像素结构的中间，节省了布线空间，进而获得更高的PPI。
实施例2：
本实施例提供了一种显示装置，包括实施例1中的像素电路。
在该显示装置中，包括成矩阵排列的多个像素结构，相邻的第一像素结构与第二像素结构可以为同一像素单元的相邻子像素单元，也可以为相邻的不同像素单元的相邻子像素单元。根据显示装置中的像素单元的设计，可以根据实际需要设计如图6A所示的相邻的第一像素结构与第二像素结构为同一像素单元的相邻子像素单元的像素排列方式，或者如图6B所示的相邻的第一像素结构与第二像素结构为相邻的不同像素单元的相邻子像素单元的像素排列方式。
不管是上述的哪种排布方式，第一像素结构中的补偿单元、第二像素结构中的补偿单元、电容触控单元以及光感触控单元共用数据线，电容触控单元和光感触控单元共用读取线，既能满足驱动要求，又能节省布线空间，从而能实现更小的像素点，实现更精细的像素分辨率。
这里应该理解的是，根据现有技术中常见的RGB像素排布方式，可以用图6A和图6B中任一所示的排布方式，即一个驱动单元和补偿单元与一个触控单元(电容触控单元)构成一个子像素，另一个驱动单元和补偿单元与另一个触控单元(光感触控单元)构成一个子像素。其中，“C”代表电容触控单元，“P”代表光感触控单元，读取线示意在图中的左侧只是为了方便理解。
根据触控分辨率的要求，这里具有“C”和“P”的子像素可以随意地周期排布，只要使得分时复用的数据线与读取线属于同一像素单元即可。因此，很容易推知，当像素颜色为多于RGB三色排列时，例如，包括RGBW四色像素时，可以将子像素按排布顺序两两组合以形成成对设置的子像素结构，以便于将同一像素单元的相邻子像素单元形成实施例1中的第一像素结构与第二像素结构。
显示装置可以为：电子纸、手机、平板电脑、电视机、显示装置、笔记本电脑、数码相框、导航仪等任何具有显示功能的产 品或部件。
本实施例中的显示装置，采用实施例1所示例的像素电路，适用于多种触控方式，像素分辨率高，显示质量高，且体积小、寿命长。
本发明中的像素电路通过将电容触控功能、光感触控功能整合为一体，提高了触控的灵活性；该像素电路还将相邻的子像素结构中的补偿单元组合为一体，使得相邻的子像素结构可以共用一条数据线(即一条数据线控制两个驱动单元的补偿单元)，从而共用补偿单元来完成两个子像素单元的驱动，因此可以缩减补偿电路的晶体管个数以及数据线数量，可大幅压缩像素点(Pixel Pitch)大小并降低IC成本，从而获得更高的画面品质并获得更高的PPI。
本发明中的像素电路中，还同时解决了像素点驱动晶体管由于制造工艺及长时间的操作造成的阈值电压(Vth)不均一所引起的对驱动电流的影响的问题，使得流过每个像素点中的OLED的电流不受其驱动晶体管的阈值电压Vth的影响，最终保证了图像显示的均匀性；而且，补偿单元保证了像素电路在重置阶段和驱动阶段无电流通过OLED，间接提高了OLED的使用寿命。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (12)

  1. 一种像素电路，包括多个像素结构，每个像素结构包括驱动单元、补偿单元和发光单元，其特征在于，相邻的第一像素结构和第二像素结构中，所述第一像素结构还包括电容触控单元，所述第二像素结构还包括光感触控单元，且所述第一像素结构中的补偿单元、所述第二像素结构中的补偿单元、所述电容触控单元以及所述光感触控单元共用数据线，所述电容触控单元和所述光感触控单元共用读取线，其中：
    所述补偿单元用于对所述驱动单元中的驱动晶体管的驱动电压进行调整，以消除所述驱动晶体管的阈值电压对流过所述发光单元的电流的影响，所述数据线用于为所述驱动晶体管提供数据信号；
    所述电容触控单元用于根据电容触控信号生成相应的电信号，所述数据线用于为所述电容触控单元提供初始信号，所述读取线用于读取所述电容触控信号；
    所述光感触控单元用于根据光感触控信号生成相应的电信号，所述数据线用于为所述光感触控单元提供初始信号，所述读取线用于读取所述光感触控信号。
  2. 根据权利要求1所述的像素电路，其特征在于，所述第一像素结构中的补偿单元与所述第二像素结构中的补偿单元的结构相同、且对称设置，所述数据线设置于所述第一像素结构中的补偿单元与所述第二像素结构中的补偿单元之间、且分别与所述第一像素结构中的补偿单元和所述第二像素结构中的补偿单元连接。
  3. 根据权利要求2所述的像素电路，其特征在于，所述第一像素结构中的驱动单元包括第一驱动晶体管，所述第二像素结构中的驱动单元包括第二驱动晶体管，所述第一驱动晶体管与所述 第二驱动晶体管的结构相同、且对称设置，所述数据线位于所述第一驱动晶体管与所述第二驱动晶体管之间、且分别与所述第一驱动晶体管和所述第二驱动晶体管连接。
  4. 根据权利要求3所述的像素电路，其特征在于，所述第一像素结构中的补偿单元包括第一晶体管、第三晶体管、第五晶体管、第七晶体管、第九晶体管和第一电容器，所述第二像素结构中的补偿单元包括第二晶体管、第四晶体管、第六晶体管、第八晶体管、第十晶体管和第二电容，所述像素电路还包括第一扫描线、第二扫描线、第三扫描线以及发光控制信号线，其中：
    所述第一晶体管的栅极与所述第二晶体管的栅极连接，并与所述发光控制信号线连接，所述第一晶体管的第一极分别与所述第二晶体管的第一极、高电压端连接，所述第一晶体管的第二极与所述第一驱动晶体管的第一极连接；
    所述第三晶体管的栅极与第二扫描线连接，所述第三晶体管的第一极分别与所述第一电容器的一端、所述第一驱动晶体管的栅极连接，所述第三晶体管的第二极与所述第一驱动晶体管的第一极连接；
    所述第五晶体管的栅极与第一扫描线连接，所述第五晶体管的第一极与低电位端连接，所述第五晶体管的第二极与所述第一驱动晶体管的栅极连接；
    所述第七晶体管的栅极与所述第二扫描线连接，所述第七晶体管的第一极与所述数据线连接，所述第七晶体管的第二极分别与所述第一驱动晶体管的第二极、所述第九晶体管的第一极连接；
    所述第九晶体管的栅极与所述第十晶体管的栅极连接，并与所述发光控制信号线连接，所述第九晶体管的第一极与所述第一驱动晶体管的第二极连接，所述第九晶体管的第二极与所述第一像素结构中的发光单元连接；
    所述第一电容器的一端与所述第一晶体管的第一极连接，另一端与所述第三晶体管的第一极连接；
    所述第二晶体管的第二极与所述第二驱动晶体管的第一极连接；
    所述第四晶体管的栅极与所述第三扫描线连接，所述第四晶体管的第一极分别与所述第二电容器的一端、所述第二驱动晶体管的栅极连接，所述第四晶体管的第二极与所述第二驱动晶体管的第一极连接；
    所述第六晶体管的栅极与所述第一扫描线连接，所述第六晶体管的第一极与低电位端连接，所述第六晶体管的第二极与所述第二驱动晶体管的栅极连接；
    所述第八晶体管的栅极与所述第三扫描线连接，所述第八晶体管的第一极与所述数据线连接，所述第八晶体管的第二极分别与所述第二驱动晶体管的第二极、所述第十晶体管的第一极连接；
    所述第十晶体管的第一极与所述第二驱动晶体管的第二极连接，所述第十晶体管的第二极与所述第二像素结构中的发光单元连接；
    所述第二电容器的一端与所述第二晶体管的第一极连接，另一端与所述第四晶体管的第一极连接。
  5. 根据权利要求4所述的像素电路，其特征在于，所述电容触控单元包括第一容式晶体管、第二容式晶体管、第三容式晶体管和第三电容器，其中：
    所述第一容式晶体管的栅极与第一扫描线连接，所述第一容式晶体管的第一极与所述数据线连接，所述第一容式晶体管的第二极分别与所述第二容式晶体管的栅极、所述第三电容器的一端连接；
    所述第二容式晶体管的第一极分别与所述第三电容器的另一端、参考电位端连接，所述第二容式晶体管的第二极与所述第三容式晶体管的第二极连接；
    所述第三容式晶体管的栅极与所述光感触控单元连接，所述第三容式晶体管的第一极与所述读取线连接。
  6. 根据权利要求5所述的像素电路，其特征在于，所述光感触控单元包括第一光式晶体管、第二光式晶体管、第三光式晶体管、第四光式晶体管和第四电容器，其中：
    所述第一光式晶体管的栅极与所述第一扫描线连接，所述第一光式晶体管的第一极与低电位端连接，所述第一光式晶体管的第二极分别与所述第二光式晶体管的第二极、所述第四光式晶体管的栅极和第一极连接；
    所述第二光式晶体管的栅极与所述电容触控单元中的所述第三容式晶体管的栅极连接，所述第二光式晶体管的第一极与所述数据线连接，所述第二光式晶体管的第二极与所述第四光式晶体管的第一极连接；
    所述第三光式晶体管的栅极与所述第三扫描线连接，所述第三光式晶体管的第一极与所述第四光式晶体管的第二极连接，所述第三光式晶体管的第二极与所述读取线连接；
    所述第四电容器的一端与所述第四光式晶体管的栅极连接，另一端与所述第四光式晶体管的第二极连接。
  7. 根据权利要求6所述的像素电路，其特征在于，所述第一像素结构中的发光单元包括第一有机电致发光二极管，所述第一有机电致发光二极管的阳极与所述第九晶体管的第二极连接，所述第一有机电致发光二极管的阴极与低电位端连接；
    所述第二像素结构中的发光单元包括第二有机电致发光二极管，所述第二有机电致发光二极管的阳极与所述第十晶体管的第二极连接，所述第二有机电致发光二极管的阴极与低电位端连接。
  8. 根据权利要求7所述的像素电路，其特征在于，所述第一晶体管至所述第十晶体管、所述第一光式晶体管至所述第四光式晶体管、所述第一容式晶体管至所述第三容式晶体管和所述第一驱动晶体管、所述第二驱动晶体管均为P型薄膜晶体管，其中， 第一极为源极，第二极为漏极。
  9. 一种显示装置，其特征在于，包括如权利要求1至8中任一项所述的像素电路。
  10. 根据权利要求9所述的显示装置，其特征在于，相邻的所述第一像素结构与所述第二像素结构为同一像素单元的相邻子像素单元。
  11. 一种像素电路的驱动方法，所述像素电路包括多个像素结构，每个像素结构包括驱动单元、补偿单元和发光单元，其特征在于，相邻的第一像素结构和第二像素结构中，所述第一像素结构还包括电容触控单元，所述第二像素结构还包括光感触控单元，所述驱动方法包括：所述第一像素结构中的补偿单元、所述第二像素结构中的补偿单元、所述电容触控单元以及所述光感触控单元分时复用数据线，所述电容触控单元和所述光感触控单元分时复用读取线。
  12. 根据权利要求11所述的驱动方法，其特征在于，在一帧时间内，所述驱动方法包括如下阶段：
    重置阶段：所述数据线提供重置信号，所述补偿单元对所述驱动单元进行重置，并同时对所述电容触控单元和所述光感触控单元进行重置；
    第一驱动阶段：所述数据线提供第一驱动信号，所述第一像素结构中的补偿单元放电；所述电容触控单元进行电容触控信号放大和采集，所述电容触控信号通过所述读取线传送至触控执行单元；所述光感触控单元进行初始信号植入；
    第二驱动阶段：所述数据线提供第二驱动信号，所述第二像素结构中的补偿单元放电；所述电容触控单元停滞触控；所述光感触控单元进行光感触控信号放大和采集，所述光感触控信号通过 所述读取线传送至触控执行单元；
    发光阶段：发光控制信号线提供发光信号，所述电容触控单元和所述光感触控单元停滞触控；所述第一像素结构和所述第二像素结构中的驱动单元分别驱动其所述发光单元发光。
PCT/CN2014/086815 2014-06-19 2014-09-18 像素电路及其驱动方法、显示装置 WO2015192503A1 (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2016573087A JP6621766B2 (ja) 2014-06-19 2014-09-18 画素回路及びその駆動方法、並びに表示装置
KR1020167033963A KR101821519B1 (ko) 2014-06-19 2014-09-18 픽셀 회로, 그 구동 방법 및 디스플레이 디바이스
EP14894895.3A EP3159882B1 (en) 2014-06-19 2014-09-18 Pixel circuit, driving method therefor and display device
US15/022,011 US9746979B2 (en) 2014-06-19 2014-09-18 Pixel circuit, driving method thereof and display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410276701.8 2014-06-19
CN201410276701.8A CN104091559B (zh) 2014-06-19 2014-06-19 像素电路及其驱动方法、显示装置

Publications (1)

Publication Number Publication Date
WO2015192503A1 true WO2015192503A1 (zh) 2015-12-23

Family

ID=51639270

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2014/086815 WO2015192503A1 (zh) 2014-06-19 2014-09-18 像素电路及其驱动方法、显示装置

Country Status (6)

Country Link
US (1) US9746979B2 (zh)
EP (1) EP3159882B1 (zh)
JP (1) JP6621766B2 (zh)
KR (1) KR101821519B1 (zh)
CN (1) CN104091559B (zh)
WO (1) WO2015192503A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3444800A4 (en) * 2016-04-11 2019-10-09 Boe Technology Group Co. Ltd. TOUCH CONTROL DISPLAY MODULE, ITS CONTROL METHOD, TOUCH CONTROL DISPLAY PANEL, AND DEVICE
US11011105B2 (en) 2019-08-20 2021-05-18 Au Optronics Corporation Pixel circuit

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103996376B (zh) 2014-05-14 2016-03-16 京东方科技集团股份有限公司 像素驱动电路、驱动方法、阵列基板及显示装置
CN104134426B (zh) * 2014-07-07 2017-02-15 京东方科技集团股份有限公司 像素结构及其驱动方法、显示装置
CN104091820B (zh) * 2014-07-10 2017-01-18 京东方科技集团股份有限公司 像素电路和显示装置
CN104318898B (zh) * 2014-11-11 2017-12-08 京东方科技集团股份有限公司 像素电路、驱动方法和显示装置
CN104361862A (zh) * 2014-11-28 2015-02-18 京东方科技集团股份有限公司 阵列基板及其驱动方法、显示面板、显示装置
CN104464638B (zh) * 2014-12-29 2017-05-10 合肥鑫晟光电科技有限公司 像素驱动电路、驱动方法、阵列基板和显示设备
CN104867431B (zh) 2015-06-12 2019-06-21 京东方科技集团股份有限公司 一种像素电路及其驱动方法、探测器
CN104898888B (zh) * 2015-06-23 2017-09-19 京东方科技集团股份有限公司 一种内嵌式触摸显示屏、其驱动方法及显示装置
CN105047165A (zh) * 2015-08-28 2015-11-11 深圳市华星光电技术有限公司 基于rgbw的驱动电路以及平面显示器
US9672765B2 (en) * 2015-09-30 2017-06-06 Apple Inc. Sub-pixel layout compensation
CN105741748B (zh) * 2016-03-04 2019-05-14 京东方科技集团股份有限公司 一种显示面板、显示设备及制作方法
CN105609052B (zh) * 2016-03-29 2018-10-19 上海天马有机发光显示技术有限公司 有机电致发光二极管显示器的驱动电路
TW201740250A (zh) * 2016-05-04 2017-11-16 原相科技股份有限公司 觸控偵測方法以及觸控偵測系統
CN106023891B (zh) * 2016-07-22 2018-05-04 京东方科技集团股份有限公司 一种像素电路、其驱动方法及显示面板
CN106448567B (zh) * 2016-12-08 2020-06-05 合肥鑫晟光电科技有限公司 像素驱动电路、驱动方法、像素单元和显示装置
CN106531084B (zh) * 2017-01-05 2019-02-05 上海天马有机发光显示技术有限公司 有机发光显示面板及其驱动方法、有机发光显示装置
CN106981268B (zh) 2017-05-17 2019-05-10 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示装置
TWI620111B (zh) 2017-05-19 2018-04-01 友達光電股份有限公司 顯示裝置與其操作方法
CN106991966A (zh) * 2017-05-27 2017-07-28 京东方科技集团股份有限公司 阵列基板及驱动方法、显示面板和显示装置
CN107452339B (zh) * 2017-07-31 2019-08-09 上海天马有机发光显示技术有限公司 像素电路、其驱动方法、有机发光显示面板及显示装置
KR101965063B1 (ko) 2017-08-04 2019-04-02 경희대학교 산학협력단 터치 센서 인-셀 타입 유기전계 발광소자
US10366654B2 (en) 2017-08-24 2019-07-30 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. OLED pixel circuit and method for retarding aging of OLED device
CN107507568B (zh) * 2017-08-24 2019-08-13 深圳市华星光电半导体显示技术有限公司 一种oled像素电路及减缓oled器件老化的方法
CN109658879B (zh) * 2017-10-12 2022-01-04 咸阳彩虹光电科技有限公司 显示器的驱动电压补偿方法及电路
US11219102B2 (en) * 2018-03-30 2022-01-04 Sharp Kabushiki Kaisha Method for driving display device and display device
CN110473497B (zh) * 2018-05-09 2021-01-22 京东方科技集团股份有限公司 像素电路及其驱动方法、显示面板
KR102112501B1 (ko) * 2018-10-29 2020-06-04 경희대학교 산학협력단 터치 센서 인-셀 타입 유기전계 발광소자
CN111429834B (zh) * 2019-01-08 2021-08-20 群创光电股份有限公司 电子装置及驱动电路
TWI694429B (zh) * 2019-01-31 2020-05-21 友達光電股份有限公司 畫素電路及其修復方法
CN109801593B (zh) * 2019-03-28 2020-06-23 京东方科技集团股份有限公司 一种驱动电路、显示面板和驱动方法
TWI700621B (zh) 2019-04-15 2020-08-01 友達光電股份有限公司 觸控面板
CN110278204B (zh) * 2019-06-18 2022-05-17 深圳市靠谱网络科技有限公司 一种社交应用中的用户隐私数据存储方法及装置
CN110515498A (zh) * 2019-08-30 2019-11-29 联想(北京)有限公司 一种信息处理方法及电子设备
TWI716120B (zh) * 2019-09-25 2021-01-11 友達光電股份有限公司 畫素電路與顯示面板
CN110599963A (zh) * 2019-09-25 2019-12-20 京东方科技集团股份有限公司 像素驱动电路、阵列基板、显示装置及像素驱动方法
CN111063301B (zh) * 2020-01-09 2024-04-12 京东方科技集团股份有限公司 像素电路及其驱动方法、阵列基板及显示装置
WO2021147086A1 (zh) * 2020-01-23 2021-07-29 京东方科技集团股份有限公司 显示基板及其驱动方法、显示装置
TWI738422B (zh) * 2020-07-16 2021-09-01 友達光電股份有限公司 用於觸控感測與光感測的畫素電路
CN112764572A (zh) * 2021-01-07 2021-05-07 深圳市华星光电半导体显示技术有限公司 显示装置及显示装置操控驱动方法
CN113204290B (zh) * 2021-04-19 2022-12-30 深圳天德钰科技股份有限公司 信号补偿电路、触控控制电路及显示装置
CN113702792B (zh) * 2021-08-12 2023-04-28 上海天马微电子有限公司 显示面板及其光感检测方法、显示装置
CN114397975B (zh) * 2022-01-24 2024-04-09 武汉天马微电子有限公司 显示面板及其驱动方法和显示装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070024547A1 (en) * 2005-07-27 2007-02-01 Jin Jang Organic light emitting diode display device and a driving method thereof
CN101587400A (zh) * 2008-05-22 2009-11-25 三星电子株式会社 触摸传感器及含触摸传感器的液晶显示面板
CN102968220A (zh) * 2011-08-29 2013-03-13 三星电子株式会社 能够远程感测和触摸感测的光学触摸屏装置
CN103295525A (zh) * 2013-05-31 2013-09-11 京东方科技集团股份有限公司 像素电路及其驱动方法、有机发光显示面板及显示装置
CN103310734A (zh) * 2013-06-26 2013-09-18 京东方科技集团股份有限公司 一种amoled像素电路及其驱动方法、显示装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8217867B2 (en) 2008-05-29 2012-07-10 Global Oled Technology Llc Compensation scheme for multi-color electroluminescent display
KR101088113B1 (ko) * 2010-03-12 2011-12-02 한양대학교 산학협력단 터치스크린 패널 및 이를 구비한 전자영동 표시장치
JP4968360B2 (ja) * 2010-04-05 2012-07-04 ソニー株式会社 画像表示装置
JP2011237489A (ja) * 2010-05-06 2011-11-24 Toshiba Mobile Display Co Ltd 有機ｅｌ表示装置
TWI416387B (zh) * 2010-08-24 2013-11-21 Au Optronics Corp 觸控面板
CN101958102B (zh) * 2010-09-15 2013-01-09 昆山工研院新型平板显示技术中心有限公司 一种具有共数据线结构的有源矩阵有机发光显示器
KR101908501B1 (ko) * 2011-12-07 2018-10-17 엘지디스플레이 주식회사 터치 스크린 일체형 유기 발광 표시 장치 및 이의 제조 방법
CN102937852B (zh) * 2012-10-19 2015-08-05 北京京东方光电科技有限公司 一种电容式内嵌触摸屏、其驱动方法及显示装置
CN103135846B (zh) * 2012-12-18 2016-03-30 北京京东方光电科技有限公司 触控显示电路结构及其驱动方法、阵列基板和显示装置
CN103150069B (zh) * 2013-03-01 2016-08-17 合肥京东方光电科技有限公司 一种电容式内嵌触摸屏及显示装置
CN103208255B (zh) * 2013-04-15 2015-05-20 京东方科技集团股份有限公司 像素电路、像素电路驱动方法及显示装置
CN103354080B (zh) * 2013-06-26 2016-04-20 京东方科技集团股份有限公司 有源矩阵有机发光二极管像素单元电路以及显示面板
CN103325341B (zh) * 2013-06-26 2015-07-01 京东方科技集团股份有限公司 一种amoled像素电路及其驱动方法、显示装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070024547A1 (en) * 2005-07-27 2007-02-01 Jin Jang Organic light emitting diode display device and a driving method thereof
CN101587400A (zh) * 2008-05-22 2009-11-25 三星电子株式会社 触摸传感器及含触摸传感器的液晶显示面板
CN102968220A (zh) * 2011-08-29 2013-03-13 三星电子株式会社 能够远程感测和触摸感测的光学触摸屏装置
CN103295525A (zh) * 2013-05-31 2013-09-11 京东方科技集团股份有限公司 像素电路及其驱动方法、有机发光显示面板及显示装置
CN103310734A (zh) * 2013-06-26 2013-09-18 京东方科技集团股份有限公司 一种amoled像素电路及其驱动方法、显示装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3159882A4 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3444800A4 (en) * 2016-04-11 2019-10-09 Boe Technology Group Co. Ltd. TOUCH CONTROL DISPLAY MODULE, ITS CONTROL METHOD, TOUCH CONTROL DISPLAY PANEL, AND DEVICE
US11011105B2 (en) 2019-08-20 2021-05-18 Au Optronics Corporation Pixel circuit

Also Published As

Publication number Publication date
EP3159882A1 (en) 2017-04-26
CN104091559B (zh) 2016-09-14
CN104091559A (zh) 2014-10-08
KR101821519B1 (ko) 2018-03-08
US20160224157A1 (en) 2016-08-04
KR20170033268A (ko) 2017-03-24
EP3159882B1 (en) 2019-02-27
US9746979B2 (en) 2017-08-29
JP2017521698A (ja) 2017-08-03
JP6621766B2 (ja) 2019-12-18
EP3159882A4 (en) 2018-01-17

Similar Documents

Publication Publication Date Title
WO2015192503A1 (zh) 像素电路及其驱动方法、显示装置
US11881164B2 (en) Pixel circuit and driving method thereof, and display panel
CN106910468B (zh) 显示面板、显示装置及像素电路的驱动方法
US10068950B2 (en) Pixel circuit, driving method thereof, and display apparatus
WO2016004690A1 (zh) 像素结构及其驱动方法、显示装置
EP2887344B1 (en) Touch control display driving circuit, driving method thereof and display device
WO2016045301A1 (zh) 像素电路及其驱动方法、有机发光显示面板及显示装置
WO2015196700A1 (zh) 有机发光二极管像素电路及其驱动方法
US9262966B2 (en) Pixel circuit, display panel and display apparatus
WO2018095031A1 (zh) 像素电路及其驱动方法、以及显示面板
WO2015188468A1 (zh) 像素电路及其驱动方法、有机发光显示面板及显示装置
WO2015180344A1 (zh) 像素电路及其驱动方法、有机发光显示面板及显示装置
WO2016045246A1 (zh) 像素电路及其驱动方法、发光显示面板及显示装置
WO2017041453A1 (zh) 像素电路、其驱动方法及相关装置
WO2015196597A1 (zh) 像素电路、显示面板和显示装置
WO2015196598A1 (zh) 像素电路、显示面板及显示装置
US9437142B2 (en) Pixel circuit and display apparatus
CN104091564B (zh) 一种像素电路、有机电致发光显示面板及显示装置
WO2019109673A1 (zh) 像素电路及其驱动方法、显示面板和显示设备
WO2016155161A1 (zh) Oeld像素电路、显示装置及控制方法
WO2018219066A1 (zh) 像素电路、驱动方法、显示面板及显示装置
WO2016078282A1 (zh) 像素单元驱动电路和方法、像素单元和显示装置
US11106295B2 (en) Touch-control pixel-driving circuit and method thereof, a touch-control display apparatus
WO2015180317A1 (zh) 像素电路和显示装置
WO2018153096A1 (zh) 像素驱动电路、像素驱动电路的驱动方法及显示装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 14894895

Country of ref document: EP

Kind code of ref document: A1

REEP Request for entry into the european phase

Ref document number: 2014894895

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 2014894895

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 15022011

Country of ref document: US

ENP Entry into the national phase

Ref document number: 20167033963

Country of ref document: KR

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 2016573087

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE