WO2018095031A1 - 像素电路及其驱动方法、以及显示面板 - Google Patents

像素电路及其驱动方法、以及显示面板 Download PDF

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Publication number
WO2018095031A1
WO2018095031A1 PCT/CN2017/090618 CN2017090618W WO2018095031A1 WO 2018095031 A1 WO2018095031 A1 WO 2018095031A1 CN 2017090618 W CN2017090618 W CN 2017090618W WO 2018095031 A1 WO2018095031 A1 WO 2018095031A1
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WIPO (PCT)
Prior art keywords
pixel circuit
unit
voltage
compensation
node
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PCT/CN2017/090618
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English (en)
French (fr)
Inventor
陈小川
杨盛际
张粲
王磊
Original Assignee
京东方科技集团股份有限公司
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/748,956 priority Critical patent/US10269297B2/en
Publication of WO2018095031A1 publication Critical patent/WO2018095031A1/zh

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    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a pixel circuit and a driving method thereof, and a display panel including the pixel circuit.
  • OLED Organic Light-Emitting Diode
  • the threshold voltage of the driving thin film transistor of each pixel driving the LED has non-uniformity, which results in a gate even to each driving thin film transistor.
  • the same driving voltage is applied to the pole, and the current flowing through each OLED may also be different, thereby affecting the display effect.
  • the resolution of each area is the same, and the resolution cannot be dynamically adjusted in real time to the local area of the display screen according to the user's visual attention point.
  • a pixel circuit and method of driving the same, and a display panel are presented.
  • the pixel circuit can perform threshold voltage compensation on the driving transistor that drives the light emitting display of the light emitting device, and eliminate the influence of the drift of the threshold voltage on the driving current of the driving transistor, thereby avoiding the unevenness of the threshold voltage of each driving transistor to the light emitting device. Inconsistent caused by the illuminating display.
  • a pixel circuit comprising: a first sub-pixel circuit connected to a first data line, a first scan line, and a first node, configured to write under control of a first scan line Entering a first data voltage provided by the first data line, and generating a compensation voltage at the first node; and at least one second sub-pixel circuit connected to the first node, the second data line, and the second scan line, configured to Threshold voltage compensation using a compensation voltage generated at the first node; wherein In the display mode, the at least one second sub-pixel circuit is configured to write the second data voltage provided by the second data line under the control of the second scan line
  • the compensation voltage can be generated at the first node by using the first sub-pixel circuit, so that not only the threshold voltage compensation can be performed on the first sub-pixel circuit itself, but also the compensation voltage is supplied to at least one second.
  • the sub-pixel circuit can perform threshold voltage compensation on other sub-pixel circuits, eliminating the influence of the threshold voltage drift of the driving TFTs in the sub-pixel circuit on the light-emitting display of the light-emitting device.
  • the first data voltage is written into the driving unit of the first pixel circuit to drive the first light emitting device to emit light
  • the second data voltage can be written according to the adjustment requirement of the display resolution.
  • a second sub-pixel circuit such that the driving unit of the second pixel circuit drives the second light emitting device to emit light display with a data voltage different from the first data voltage, and combines the light emitting of the first light emitting device and the second light emitting device to realize Different visual resolutions.
  • a display panel is also provided.
  • the method includes an OLED pixel array, wherein each OLED pixel can be configured by the pixel circuit described above; at least one sensor detects an eye movement of a user viewing an interface of the display panel and generates an eye movement detection signal; and a processor according to the eye movement detection The signal determines an area on the interface that the user is interested in and provides an effective scan voltage to the second scan line such that a second data voltage is written to the pixel corresponding to the area.
  • the pixel array of the display panel may be divided into regions, and the area of the region division may be determined according to specific observation needs.
  • the eye tracking technique determines the position of the area of the screen that the human eye is interested in, and displays the area of interest at a higher resolution, while displaying other areas that are not of interest at a lower resolution.
  • the eye movement of the user can be detected by the sensor, and the specific area observed by the user can be determined, thereby realizing the resolution of the display area, and the resolution of the area of the different position is performed as the position of the human eye is changed.
  • Switching realizing the effect of adjustable resolution. Thereby, the resolution of each display area can be dynamically adjusted in real time, and display power consumption is reduced.
  • a method of driving the pixel circuit comprising: applying an active level to a first scan line, and writing a first data voltage on the first data line to the first sub-pixel circuit, Generating a compensation voltage at the first node and providing the compensation voltage to the second sub-pixel circuit for threshold voltage compensation; and applying an active level to the second scan line based on the display mode, the second data on the second data line The voltage is written to the second sub-pixel circuit.
  • combining the threshold voltage compensation of the driving transistor of the pixel circuit with the intelligent display can realize the difference of the focus of the display panel for the user, and adjust the resolution of the display panel in real time, so that The area of interest to the user displays richer colors, clearer details, and lower resolution for areas that are not of interest, thereby reducing power consumption.
  • Figure 1 shows a known 2T1C pixel circuit
  • FIG. 2 is a schematic block diagram of a pixel circuit in accordance with an embodiment of the present disclosure
  • FIG. 3 is a schematic block diagram of a first sub-pixel circuit included in a pixel circuit in accordance with an embodiment of the present disclosure
  • FIG. 4 is a schematic block diagram of at least one second sub-pixel circuit included in a pixel circuit in accordance with an embodiment of the present disclosure
  • FIG. 5 illustrates a specific structure of a pixel circuit in accordance with an embodiment of the present disclosure
  • FIG. 6 illustrates an exemplary signal timing applicable to the pixel circuit illustrated in FIG. 5 in a high resolution display mode, in accordance with an embodiment of the present disclosure
  • FIG. 7-10 are diagrams showing the operation of various stages when the signal timing shown in FIG. 6 is applied to the pixel circuit shown in FIG. 5 according to an embodiment of the present disclosure
  • FIG. 11 illustrates an exemplary signal timing applicable to the pixel circuit illustrated in FIG. 5 in a low resolution display mode, in accordance with an embodiment of the present disclosure
  • FIG. 12-14 are diagrams showing the operation of various stages when the signal timing shown in FIG. 11 is applied in the pixel circuit shown in FIG. 5 according to an embodiment of the present disclosure
  • FIG. 15 illustrates a block diagram of a display panel in accordance with an embodiment of the present disclosure
  • Figure 16 illustrates the principle of employing different resolutions for various regions on the display interface based on the user's visual focus
  • 17A-17B illustrate the principle of utilizing a combination of sub-pixels to achieve adjustable resolution of a display screen
  • FIG. 18 is a schematic diagram of a driving method to which the above-described pixel circuit can be applied, according to an embodiment of the present disclosure.
  • Sexual flow chart is a schematic diagram of a driving method to which the above-described pixel circuit can be applied.
  • the driving TFT has a threshold voltage
  • the threshold voltage Vth of the driving TFTs of the respective pixel points may vary due to the process of the process; and after a long period of operation, the threshold voltage of the driving TFT may also drift, thereby It will cause uneven brightness of the OLED of each pixel, which affects the uniformity of display.
  • FIG. 1 shows a known 2T1C pixel circuit including a driving TFT T2, a switching TFT T1, and a storage capacitor Cs, wherein the gate of the switching TFT T1 is connected to the scanning line Vscan, and the source thereof is connected to the data line Vdata.
  • the drain is connected to the gate of the driving TFT T2; the source of the driving TFT T2 is connected to the power supply voltage VDD, the drain is connected to the anode of the OLED; the cathode of the OLED is grounded; and the storage capacitor Cs is connected in parallel between the gate source of the driving TFT T2.
  • the driving current of the driving TFT T2 that is, the operating current of the OLED can be expressed as
  • I OLED K(V GS -V th ) 2 ,
  • V GS is the gate-to-source voltage of the driving transistor
  • V th is the threshold voltage of the driving transistor
  • K is a coefficient, which can be expressed as
  • is the carrier mobility
  • C ox is the gate oxide capacitance
  • W/L is the channel width to length ratio of the driving transistor.
  • the threshold voltage Vth of the driving TFTs at each pixel may be different due to process processes and device aging, etc., and drift may occur with use, which causes even the same gate-source voltage to be applied to the driving.
  • the generated drive current that is, the current flowing through the OLED, also changes due to the change in Vth , thereby affecting display uniformity.
  • the present disclosure proposes a pixel circuit that can compensate for the threshold voltage of the driving TFT, and eliminates the operating voltage of the threshold voltage of the driving TFT for driving the OLED to emit light.
  • the effect of the flow enhances the display.
  • the pixel circuit includes: a first sub-pixel circuit 10 connected to the first data line Vdata1, the first scan line Gate1, and the first node N1, configured to utilize the first a first data voltage provided by a data line Vdata1 drives the first light emitting device to emit light, and generates a compensation voltage at the first node N1 under the control of the first scan line; and at least one second sub-pixel circuit, for example, a sub-pixel Circuits 20 and 30, wherein the sub-pixel circuit 20 is connected to the first scan line Gate1, the first node N1, the corresponding second data line Vdata2, and the second scan line Gate2, configured to drive the second light emitting device to emit light, and The threshold voltage compensation is performed by using the compensation voltage generated at the first node N1; the sub-pixel circuit 30 is connected to the first scan line Gate1, the first node N1, the corresponding second data line Vdata3, and the second scan line Gate2, and is configured to be driven The third light emitting device emits light and displays the
  • the compensation voltage can be generated at the first node N1 by using the first sub-pixel circuit, and not only the threshold voltage compensation can be performed on the first sub-pixel circuit itself, but also the compensation voltage can be supplied to at least one second.
  • the sub-pixel circuit can also perform threshold voltage compensation on other sub-pixel circuits, eliminating the influence of the threshold voltage drift of the driving TFTs in the sub-pixel circuit on the light-emitting display of the light-emitting device.
  • the display resolution can be adjusted as needed.
  • the first pixel circuit drives the first light emitting device to emit light using the first data voltage
  • the second sub-pixel circuit can be configured to drive the first data voltage or a second data voltage different from the first data voltage.
  • the two light emitting devices illuminate the display and combine the illumination of the first and second light emitting devices to achieve different visual resolutions.
  • the first sub-pixel circuit 10 includes: a first input unit 101 and a first driving unit 102, wherein the first input unit 101 is connected to the first The data line Vdata1 and the first scan line Gate1 are configured to input the first data voltage provided by the first data line Vdata1 to the first driving unit 102 under the control of the first scan line Gate1; the first driving unit 102 is connected The first node N1 is configured to generate a current for driving the first light emitting device to emit light under the control of the first node N1.
  • the first sub-pixel circuit further includes: a compensation voltage generating unit 103 connected to the first node N1, the first scan line Gate1, and the first driving unit 102, configured to be in the first Under the control of a scan line Gate1, a compensation voltage is generated at the first node N1, wherein the compensation voltage can be used for threshold voltage compensation of the first driving unit 102, and can be supplied to the second sub-pixel circuit connected thereto .
  • a compensation voltage generating unit 103 connected to the first node N1, the first scan line Gate1, and the first driving unit 102, configured to be in the first Under the control of a scan line Gate1, a compensation voltage is generated at the first node N1, wherein the compensation voltage can be used for threshold voltage compensation of the first driving unit 102, and can be supplied to the second sub-pixel circuit connected thereto .
  • the first sub-pixel circuit further includes: a first illumination control unit 104 connected to the first illumination device, the first illumination control signal terminals EM0, EM1, and the first driving unit 102, configured to be in the first illumination
  • the driving current generated by the first driving unit 102 is supplied to the first light emitting device under the control of the control signal terminal.
  • the first sub-pixel circuit further includes: a reset unit 105 connected to the reset signal end Reset and the first node N1, configured to perform the first node N1 under the control of the reset signal provided by the reset signal end Reset Reset.
  • a reset unit 105 connected to the reset signal end Reset and the first node N1, configured to perform the first node N1 under the control of the reset signal provided by the reset signal end Reset Reset.
  • the first input unit 101 includes a first input transistor M4, and the first driving unit 102 includes a first driving transistor D1; wherein a gate of the first input transistor M4 is connected to the first scan line Gate1, the first pole is connected to the first data line Vdata1, the second pole is connected to the first pole of the first driving transistor D1; the gate of the first driving transistor D1 is connected to the first node N1, and the second pole output is driven first The current that the light emitting device emits.
  • the compensation voltage generating unit 103 includes: a first compensation transistor M2, the gate is connected to the first scan line Gate1, the first pole is connected to the first node N1, and the second pole is connected to the An output terminal of a driving unit 102; and a first compensation capacitor C1, the first end is connected to the first node N1, and the second end is connected to the first voltage terminal Vdd.
  • the first illumination control unit 104 includes: a first illumination control transistor M3, a gate connected to the first illumination control terminal EM0, a first pole connected to the first voltage terminal Vdd, and a second pole Connected to the input end of the first driving unit 102; and the second lighting control transistor M5, the gate is connected to the first lighting control terminal EM1, the first pole is connected to the output end of the first driving unit 102, and the second pole is connected to the A light emitting device.
  • the reset unit comprises: a reset transistor M1, a gate connected to the reset signal terminal Reset, a first pole connected to the second voltage terminal Vinit, and a second pole connected to the first node N1.
  • each of the second sub-pixel circuits for example, the sub-pixel circuits 20 and 30 shown in FIG. 2, each includes: a second input unit 201/301 and a voltage compensation unit 203/303, a second input Unit 201/301 is connected to the second data line Vdata2/Vdata3 and the second scan line Gate2, and the second data voltage provided by the second data line Vdata2/Vdata3 is input to the voltage compensation unit under the control of the second scan line Gate2;
  • the unit 203/303 is connected to the first node (N1) and the first scan line Gate1, and under the control of the first scan line Gate1, writes the compensation voltage generated at the first node N1.
  • the second sub-pixel circuit 20/30 further includes: a second driving unit 202/302 connected to the voltage compensating unit 203/303, and performing threshold voltage using the compensation voltage written by the voltage compensating unit Compensating, and generating a current that drives the second light emitting device OLED2 / OLED3 to emit light.
  • the second sub-pixel circuit 20/30 further includes: a second illumination control unit 204/304 connected to the second illumination device, the second illumination control signal terminal EM2/EM3, and the second driver
  • the unit 202/302 supplies the driving current generated by the second driving unit 202/302 to the light emitting device OLED2/OLED3 under the control of the light emission control signal terminals EM2/EM3.
  • the second input unit includes a second input transistor T2/T5
  • the gate is connected to the second scan line Gate2
  • the first pole is connected to the second data line Vdata2/Vdata3
  • the second pole is connected to the voltage compensation unit.
  • the voltage compensation unit comprises: a second compensation transistor T3/T4, the gate is connected to the first scan line Gate1, the first pole is connected to the first node N1, and the second pole is connected to a second driving unit; a second compensation capacitor C2/C3, the first end is connected to the second pole of the second compensation transistor T2/T3, and the second end is connected to the output end of the second input unit.
  • the second driving unit includes a second driving transistor D2/D3 whose gate is connected to an output end of the voltage compensation unit, the first pole is connected to the first voltage terminal Vdd, and the second The pole output drives a current that the second light emitting device emits.
  • the second illumination control unit comprises: a third illumination control transistor T1/T6, the gate is connected to the second illumination control line EM2/EM3, and the first pole is connected to the second driving unit.
  • the output terminal has a second pole connected to the second light emitting device.
  • the compensation voltage generating unit exists in the first sub-pixel circuit, a compensation voltage is generated at the first node, so that the threshold voltage compensation of the driving transistor in the first sub-pixel circuit can be performed, and Providing the compensation voltage to the second sub-pixel circuit via the first node N1, and performing threshold voltage compensation on the driving transistor in the second sub-pixel circuit via the voltage compensation unit in the second sub-pixel circuit, thereby eliminating the illumination display of the light emitting device Driven transistor The effect of the threshold voltage enhances the display.
  • the first light emitting device to emit light by providing a first data voltage to the first sub-pixel circuit, and adjusting the second data voltage to the second sub-pixel circuit to adjust the second light emitting device according to the need of display resolution
  • the gray scale is displayed, thereby dynamically adjusting the visual resolution of the first sub-pixel and the second sub-pixel after synthesis.
  • the display device is an OLED.
  • all the transistors are P-type thin film transistor TFTs, thereby reducing the process of the module and improving the production efficiency.
  • some or all of the transistors may also adopt an N-type TFT as needed, as long as the level of the control signal is adjusted accordingly, and the specific connection relationship is omitted here.
  • the first pole of the transistor in addition to being the gate of the transistor as its gate, the first pole of the transistor may be the source for the input signal and the second pole as the drain for the output signal.
  • the first pole of the transistor may be the source for the input signal and the second pole as the drain for the output signal.
  • the TFT in the dotted line frame in FIGS. 7-10 represents the turned-off TFT, and the arrow indicates the current flow direction at each stage.
  • the first illumination control signal terminals EM0, EM1 of the first sub-pixel circuit of FIG. 5 and the second illumination control signal terminals EM2/EM3 of the second sub-pixel circuit are connected to the same illumination control signal EM.
  • the respective illumination control signal terminals can also access different illumination control signals from each other as needed, and are not limited thereto as long as the principles of the present disclosure can be implemented.
  • the reset signal terminal applies a low level signal
  • the first scan signal line and the second scan signal line apply a high level signal
  • the first and second illumination control signal terminals apply a high level. signal. Therefore, as shown in FIG. 7, the reset transistor M1 in the first sub-pixel circuit is turned on, and the other transistors in the pixel circuit are turned off, and the process resets the level of the first node N1 to the Vitit potential, thereby the first node.
  • the potential is initialized, which is the reset phase of the pixel circuit.
  • the signal applied by the reset signal terminal is changed to a high level
  • the first scan signal line is changed to apply a low level signal
  • the second scan signal line continues to be applied with a high level signal
  • first And the second lighting control signal end continues to apply a high level signal. Therefore, as shown in Figure 8, the first The reset transistor M1 in the sub-pixel circuit is turned off, the input transistor M4 and the first compensation transistor M2 are turned on because the gate is applied with a low level, and the gate of the drive transistor is reset to a low level by the prior stage.
  • the Vdata1 signal When turned on, the Vdata1 signal starts to charge the first node N1 through the transistor M4 ⁇ D1 ⁇ M2, and always charges the first node N1 to Vdata1-Vth, where Vth represents the threshold voltage of the driving transistor D1.
  • the first end of the first compensation capacitor C1 is connected to the first node N1, so that its potential is charged to Vdata1-Vth, and the second terminal is connected to the first voltage terminal Vdd; due to the two second sub-pixel circuits 20 and
  • the gates of the second compensation transistors T3, T4 in 30 are connected to the first scan line, and a low level signal is applied. Therefore, the transistors T3, T4 are turned on, and the potentials of the nodes N2 and N3 are also charged to Vdata1-Vth.
  • This phase is the charging phase of the pixel circuit and is also the first data voltage writing phase of the pixel circuit.
  • the signal applied by the first scanning signal line is changed to a high level
  • the signal applied by the second scanning signal line is changed to a low level
  • the first and second emission control signal terminals are continuously applied. High level signal. Therefore, as shown in FIG. 9, the input transistor M1 and the first compensation transistor M2 in the first sub-pixel circuit are turned off, and the second compensation transistors T3, T4 in the second sub-pixel circuits 20, 30 are turned off, and the second The input transistors T2, T5 are turned on to supply second data voltages Vdata2 and Vdata3 to the second ends of the second compensation capacitors C2, C3, respectively.
  • the first end of C3 is based on the bootstrap effect of the capacitor, and the potential of the N2 point is changed to Vdata1-Vth+Vdata2, the point of N3 The potential is changed to Vdata1-Vth+Vdata3 to ensure that the potential difference across the second compensation capacitors C2 and C3 does not change.
  • This phase is the floating jump process of nodes N2 and N3, that is, the second data voltage writing phase of the pixel circuit.
  • the fourth stage shown in FIG. 6 is a stage in which the pixel circuit drives the light emitting device to perform light emission display.
  • the signal applied by the second scanning signal line is changed to a high level, and the signals applied to the first and second lighting control signal terminals are changed to a low level. Therefore, as shown in FIG. 10, the second input transistors T2, T5 of the second sub-pixel circuits 20, 30 are turned off; the first illumination control in the first sub-pixel circuit
  • the transistor M3 and the second light-emission control transistor M5 are turned on to form a current path from M3 ⁇ D1 ⁇ M5, and the first light-emitting device OLED1 is driven to start light-emitting display.
  • the drive current generated by the first drive transistor D1 can be expressed by the following formula (1):
  • the driving current IOLED1 is not affected by the threshold voltage Vth of the driving transistor, and is only related to the power source Vdd supplied from the first voltage terminal and the previously written first data voltage Vdata1. Therefore, the influence of the threshold voltage Vth drift of the driving TFT on the driving current IOLED1 outputted by the driving transistor due to the process process and long-time operation is eliminated, and the uniformity of the OLED light-emitting display can be ensured, and the display quality can be improved.
  • the drive current generated by the second drive transistor D2 can be expressed by the following formula (2):
  • the driving current IOLED2 generated by the second driving transistor D2 is not affected by the threshold voltage Vth of the driving transistor D2, only the power supply Vdd supplied from the first voltage terminal, the previously written first data voltage Vdata1 and the second The data voltage Vdata2 is related. Therefore, the influence of the threshold voltage Vth drift of the driving TFT on the driving current IOLED2 outputted by the driving transistor due to the process process and the long-time operation is eliminated, and the uniformity of the OLED light-emitting display can be ensured, and the display quality can be improved.
  • the driving current generated by the second driving transistor D3 can be expressed as the following formula (3) :
  • the output driving current is no longer affected by the threshold voltage of the driving transistor, thereby improving the light-emitting display of each pixel.
  • the threshold voltages of the driving transistors D1 to D3 are equal.
  • the process uniformity comparison of silicon-based backplane TFTs Well according to the principle of electron microscopy, it can be considered that the threshold voltages Vth of the respective driving transistors D1, D2, and D3 are substantially the same.
  • the light-emitting devices OLED1, OLED2, and OLED3 have different light-emitting currents, by combining the light-emitting displays of the OLED 1, the OLED 2, and the OLED 3, Display richer grayscale information and improve visual resolution.
  • the operation of the pixel circuits in accordance with the above-described embodiments of the present disclosure at various stages in the low resolution display mode will be described in detail below with reference to FIGS. 11-14.
  • the TFT in the dotted line frame in FIGS. 12-14 represents the turned-off TFT, and the arrow indicates the current flow direction at each stage.
  • the first illumination control signal terminals EM0, EM1 of the first sub-pixel circuit of FIG. 5 and the second illumination control signal terminals EM2/EM3 of the second sub-pixel circuit are connected to the same illumination control signal EM.
  • the respective illumination control signal terminals can also access different illumination control signals from each other as needed, and are not limited thereto as long as the principles of the present disclosure can be implemented.
  • the reset signal terminal applies a low level signal
  • the first scan signal line and the second scan signal line apply a high level signal
  • the first and second illumination control signal terminals apply a high level. signal. Therefore, as shown in FIG. 12, the reset transistor M1 in the first sub-pixel circuit is turned on, and the other transistors in the pixel circuit are turned off, and the process resets the level of the first node N1 to the Vitit potential, thereby the first node.
  • the potential is initialized, which is the reset phase of the pixel circuit.
  • the signal applied to the reset signal terminal changes to a high level
  • the signal applied by the first scan signal line changes to a low level
  • the second scan signal line continues to apply a high level signal
  • the first and second illumination control signal terminals continue to apply a high level signal. Therefore, as shown in FIG. 13, the reset transistor M1 in the first sub-pixel circuit is turned off, and the input transistor M4 and the first compensation transistor M2 are turned on because the gate is applied with a low level, and the gate of the driving transistor is due to the previous one.
  • the phase is reset to a low-level Vinit and is turned on.
  • the Vdata1' signal starts charging the first node N1 through the transistor M4 ⁇ D1 ⁇ M2, and always charges the first node N1 to Vdata1'-Vth, where Vth Indicates the threshold voltage of the driving transistor D1.
  • the first end of the first compensation capacitor C1 is connected to the first node N1, and therefore its potential is charged to Vdata1'-Vth, and the second terminal is connected to the first voltage terminal Vdd; due to the two second sub-pixel circuits 20
  • the gates of the second compensation transistors T3, T4 of the sum 30 are connected to the first scan line, and a low level signal is applied. Therefore, the transistors T3, T4 are turned on, and the potentials of the nodes N2 and N3 are also charged to Vdata1'-Vth. .
  • This phase is the charging phase of the pixel circuit, also like The first data voltage write phase of the prime circuit.
  • the timing shown in FIG. 11 does not exist in the case where the second scan signal is changed to the low level.
  • the working phase of the pixel circuit shown in FIGS. 12-14 does not have a stage of writing a second data voltage to the pixel circuit.
  • the first sub-pixel circuit and the first sub-pixel circuit can be controlled.
  • the second sub-pixel circuit respectively drives the light emitting device to emit light.
  • the third stage shown in FIG. 11 is a stage in which the pixel circuit drives the light emitting device to perform light emission display.
  • the signals applied by the first and second illumination control signal terminals are changed to a low level. Therefore, as shown in FIG. 14, the first light-emitting control transistor M3 and the second light-emission control transistor M5 in the first sub-pixel circuit are turned on to form a current path from M3 ⁇ D1 ⁇ M5, and the first light-emitting device OLED1 is driven to start light-emitting display. .
  • the drive current generated by the first drive transistor D1 can be expressed by the following formula (4):
  • the drive current IOLED1 is not affected by the threshold voltage Vth of the drive transistor, and is only related to the power supply source Vdd supplied from the first voltage terminal and the previously written first data voltage Vdata1'. Therefore, the influence of the threshold voltage Vth drift of the driving TFT on the driving current IOLED1 outputted by the driving transistor due to the process process and long-time operation is eliminated, and the uniformity of the OLED light-emitting display can be ensured, and the display quality can be improved.
  • the node N2 is charged to a potential equal to the first node N1, and in the third stage, the third light-emitting control transistor T1 is illuminated at a low level.
  • the control signal is turned on, and the driving current generated by the second driving transistor D2 can be expressed by the following formula (5):
  • the driving current generated by the second driving transistor D2 is generated by the first driving transistor D1.
  • the generated drive current is equal and is also unaffected by the threshold voltage Vth of the drive transistor D2, and is only related to the power supply Vdd supplied from the first voltage terminal and the previously written first data voltage Vdata1'. Therefore, the influence of the threshold voltage Vth drift of the driving TFT on the driving current IOLED2 outputted by the driving transistor due to the process process and the long-time operation is eliminated, and the uniformity of the OLED light-emitting display can be ensured, and the display quality can be improved.
  • the driving current generated by the second driving transistor D3 can be expressed as the following formula (6):
  • the output driving current is no longer affected by the threshold voltage of the driving transistor, thereby improving the light-emitting display of each pixel. Uniformity.
  • the light-emitting devices OLED1, OLED2, and OLED3 since the data voltages written to the respective sub-pixel circuits are identical to each other, the light-emitting devices OLED1, OLED2, and OLED3 have the same light-emission current, and the combined light-emitting display of OLED1, OLED2, and OLED3 can provide relatively low Visual resolution.
  • the first sub-pixel circuit 10 can be used to display red, and the two second sub-pixel circuits 20 and 30 respectively display green and blue, thereby combining three primary colors of one pixel.
  • the principle of the present disclosure is not limited thereto.
  • three second sub-pixels 20, 30, and 40 may be included in the pixel circuit, respectively, according to display requirements. Green, blue, and yellow, or green, blue, and white, respectively, make the displayed colors richer and higher quality.
  • the first sub-pixel circuit 10 and the second sub-pixel circuits 20 and 30 may be displayed in red, due to When displaying at a higher resolution, the difference in data voltages written by the respective sub-pixel circuits causes the displayed gray scale voltages to be different from each other, thereby displaying red R1, R2 and R3 corresponding to different chromaticities, and at a lower resolution.
  • the rate is displayed, as shown in Fig. 17B, the first sub-pixel circuit 10 and the second sub-pixel circuits 20 and 30 each display red R0 of the same chromaticity.
  • one basic pixel can be formed using three pixel circuit units (RGB) or four pixel circuit units (RGBW/RGBY).
  • a display panel is also provided.
  • the display panel includes: an OLED pixel array, wherein each OLED pixel can be constituted by the above pixel circuit; at least one sensor detects an eye movement of a user who views an interface of the display panel and generates an eye movement detection signal And a processor that determines an area on the interface that the user is interested in based on the eye movement detection signal, and provides an effective scan voltage to the second scan line such that the second data voltage is written to the pixel corresponding to the area.
  • the pixel array of the display panel may be divided into regions, and the area of the region division may be determined according to specific observation needs.
  • the human eye tracking technique the position of the area of the screen that the human eye is interested in is judged, and the area of interest is displayed at a higher resolution, while the other areas not being focused are displayed at a lower resolution.
  • the eye movement of the user can be detected by the sensor, and the specific area observed by the user can be determined, thereby realizing the resolution of the display area, and the resolution of the area of the different position is performed as the position of the human eye is changed.
  • Switching realizing the effect of adjustable resolution. Thereby, the resolution of each display area can be dynamically adjusted in real time, and display power consumption is reduced.
  • a high resolution display mode can be employed in an area of interest to the user, and a low resolution mode can be employed in other areas, so that display power consumption can be reduced.
  • the display may be performed in a manner of combining pixels according to actual needs.
  • pixels can be combined in a square display to display picture pixels.
  • display is performed in a manner of one, four or nine physical pixel bindings, wherein one physical pixel corresponds to one picture pixel for display, represents a high resolution display mode, and nine physical pixels correspond to one When the picture is pixel, it represents the low resolution display mode.
  • a display device comprising the above display panel, which may be: AMOLED display, television, digital photo frame, mobile phone, tablet computer, etc., having any display function or component. .
  • a method of driving the above pixel circuit comprising: S1800, applying an active level to a first scan line, and first data on a first data line Writing a voltage to the first sub-pixel circuit and the second pixel sub-circuit, generating a compensation voltage at the first node, and writing the compensation voltage to the second sub-pixel circuit for threshold voltage compensation; S1820, based on the display mode, to the second scan The line applies an active level to write a second data voltage on the second data line to the second sub-pixel circuit.
  • the method further includes: applying an active level to the first scan line to enable the first input form And a compensation voltage generating unit that supplies the first data voltage on the first data line to the first driving unit and generates a compensation voltage at the first node.
  • the method further includes: turning on the voltage compensation unit with an effective level applied by the first scan line, thereby providing the compensation voltage generated at the first node to the second driving unit; and displaying at the first resolution
  • turning on the voltage compensation unit with an effective level applied by the first scan line thereby providing the compensation voltage generated at the first node to the second driving unit; and displaying at the first resolution
  • turning on the second input unit to supply the data voltage on the second data line to the voltage compensation unit
  • the second resolution to the second scan
  • the line applies an inactive level without turning on the second input unit such that the data voltage on the second data line is not provided to the voltage compensation unit, wherein the first resolution is higher than the second resolution.
  • the method further includes: providing an effective level to the first lighting control signal end, turning on the first lighting control unit, thereby providing a driving current generated by the first driving unit to the first lighting device; and
  • the control signal terminal provides an active level to turn on the second illumination control unit to provide the drive current generated by the second drive unit to the second illumination device.
  • the method further comprises: applying an active level to the reset signal terminal before applying the active level to the first scan line, turning on the reset unit, and resetting the first node.
  • the compensation voltage generating unit exists in the first sub-pixel circuit, a compensation voltage is generated at the first node, so that the driving transistor in the first sub-pixel circuit can be performed.
  • the threshold voltage is compensated, and the compensation voltage is supplied to the second sub-pixel circuit via the first node N1, and the threshold voltage compensation is performed on the driving transistor in the second sub-pixel circuit via the voltage compensation unit in the second sub-pixel circuit, eliminating each
  • the pixel drive TFT affects the driving current flowing through the OLED due to the non-uniform threshold voltage (Vth) caused by the process process and the device aging operation, thereby ensuring display uniformity and thereby enhancing the display effect.
  • Vth non-uniform threshold voltage
  • the first light emitting device is driven to emit light by providing a first data voltage to the first sub-pixel circuit, and the second data voltage is supplied to the second sub-pixel circuit to adjust the second light emitting device according to the need of the display resolution.
  • the gray scale is displayed, thereby dynamically adjusting the visual resolution of the first sub-pixel and the second sub-pixel after synthesis.

Abstract

一种像素电路及其驱动方法,以及显示面板。其中,该像素电路包括:第一子像素电路(10),在第一扫描线(Gate1)的控制下写入第一数据线(Vdata1)提供的第一数据电压,并且在第一节点(N1)处产生补偿电压;以及至少一个第二子像素电路(20,30),利用第一节点(N1)处产生的补偿电压进行阈值电压补偿;其中,基于显示模式,至少一个第二子像素电路(20,30)在第二扫描线(Gate2)的控制下写入第二数据线(Vdata2)提供的第二数据电压。通过将对像素电路的驱动晶体管进行阈值电压补偿与智能显示结合起来,不仅可以消除阈值电压的漂移对驱动晶体管的驱动电流的影响,而且可以针对用户对显示面板显示的画面的关注点的不同,实现对显示面板各个区域的视觉分辨率进行实时调节。

Description

像素电路及其驱动方法、以及显示面板 技术领域
本公开涉及显示技术领域,具体涉及一种像素电路及其驱动方法、包括该像素电路的显示面板。
背景技术
随着显示技术的飞速发展,采用有机发光二极管(Organic Light-Emitting Diode,OLED)的显示屏是当今平板显示器研究领域的热点之一。与现有的液晶显示屏相比,其具有低能耗、自发光、宽视角及响应速度快等优点,容易实现和集成电路驱动器的匹配,并且工作温度适应范围广、体积轻薄、易于实现柔性显示,具有广阔的应用前景。与薄膜晶体管液晶显示器(TFT-LCD)利用电压来控制发光晶体管的亮度不同,OLED属于电流驱动,需要稳定的电流来控制发光二极管的亮度。然而,由于工艺制程和器件老化等原因,在现有的像素驱动电路中,各像素点驱动发光二极管的驱动薄膜晶体管的阈值电压存在不均匀性,这样就导致了即便向各驱动薄膜晶体管的栅极施加相同的驱动电压,流过每个OLED的电流也可能不同,从而影响显示效果。
另外,目前的显示屏显示画面时,各个区域的分辨率是相同的,无法根据用户的视觉关注点对显示屏的局部区域动态实时地调整分辨率。
发明内容
根据本公开的原理,提出了一种像素电路及其驱动方法,以及显示面板。其中,该像素电路可以对驱动发光器件的发光显示的驱动晶体管进行阈值电压补偿,消除阈值电压的漂移对驱动晶体管的驱动电流的影响,从而避免各个驱动晶体管的阈值电压的不均匀性对发光器件发光显示造成的不一致。
根据本公开的一方面,提供了一种像素电路,包括:第一子像素电路,连接到第一数据线、第一扫描线和第一节点,被配置为在第一扫描线的控制下写入第一数据线提供的第一数据电压,并且在第一节点处产生补偿电压;以及至少一个第二子像素电路,连接到第一节点、第二数据线以及第二扫描线,被配置为利用第一节点处产生的补偿电压进行阈值电压补偿;其中,基 于显示模式,至少一个第二子像素电路被配置为在第二扫描线的控制下写入第二数据线提供的第二数据电压
根据本公开的上述像素电路,可以利用第一子像素电路在第一节点处产生补偿电压,从而不仅可以对第一子像素电路自身进行阈值电压补偿,而且将该补偿电压提供给至少一个第二子像素电路,从而可以对其它子像素电路进行阈值电压补偿,消除了子像素电路中的驱动TFT的阈值电压漂移对发光器件的发光显示的影响。
另外,根据本公开的上述像素电路,将第一数据电压写入第一像素电路的驱动单元来驱动第一发光器件发光显示,并且可以根据显示分辨率的调节需要,将第二数据电压写入第二子像素电路,以便第二像素电路的驱动单元以与第一数据电压不同的数据电压来驱动第二发光器件发光显示,并且将第一发光器件和第二发光器件的发光进行组合,实现不同的视觉分辨率。
根据本公开的一方面,还提供了一种显示面板。包括:OLED像素阵列,其中,每一个OLED像素可以由上述的像素电路构成;至少一个传感器,检测观看显示面板的界面的用户的眼动并产生眼动检测信号;以及处理器,根据眼动检测信号,确定用户所关注的该界面上的区域,并且向第二扫描线提供有效扫描电压,使得向对应于该区域中的像素写入第二数据电压。
可选地,可以将显示面板的像素阵列做区域划分,区域划分的面积根据具体观测需要而定。通过人眼跟踪(eye tracking)技术,判断人眼所关注的屏幕的区域的位置,并且以较高的分辨率显示被关注的区域,而以较低的分辨率显示其它未被关注的区域。具体地,可以通过传感器来检测用户的眼动,并且判断用户观察的具体区域,从而实现显示区域的分辨率的差异化,随着人眼观察位置的变化,对不同位置的区域的分辨率进行切换,真正实现分辨率可调的效果。由此,可以实时动态地调节各个显示区域的分辨率,并且降低了显示功耗。
根据本公开的实施例,还提供了一种驱动上述像素电路的方法,包括:向第一扫描线施加有效电平,将第一数据线上的第一数据电压写入第一子像素电路,在第一节点处产生补偿电压,并且将补偿电压提供给第二子像素电路进行阈值电压补偿;以及基于显示模式,向第二扫描线施加有效电平,将第二数据线上的第二数据电压写入第二子像素电路。
根据本公开的原理,将对像素电路的驱动晶体管进行阈值电压补偿与智能显示结合起来,可以实现针对用户对显示面板显示的画面的关注点的不同,对显示面板的分辨率进行实时调节,使得用户所关注的区域显示的色彩更丰富,细节更清晰,而对未关注的区域以较低的分辨率显示,从而降低功耗。
附图说明
为了更清楚地说明本公开的实施例的技术方案,下面将对实施例的附图作简单地介绍,显而易见地,下面描述中的附图仅仅涉及本公开的一些实施例,而非对本发明的限制。
图1示出了一种已知的2T1C像素电路;
图2是根据本公开实施例的像素电路的示意性框图;
图3是根据本公开实施例的像素电路中包括的第一子像素电路的示意性框图;
图4是根据本公开实施例的像素电路中包括的至少一个第二子像素电路的示意性框图;
图5示出了根据本公开的一实施例的像素电路的具体结构;
图6示出了根据本公开的一实施例的在高分辨率显示模式下可应用于图5所示的像素电路的示意性的信号时序;
图7-图10是根据本公开的一实施例的在图5所示的像素电路中应用图6所示的信号时序时的各个阶段的工作情况;
图11示出了根据本公开的一实施例的在低分辨率显示模式下可应用于图5所示的像素电路的示意性的信号时序;
图12-14是根据本公开的一实施例的在图5所示的像素电路中应用图11所示的信号时序时的各个阶段的工作情况;
图15示出了根据本公开的实施例的一种显示面板的框图;
图16示出了根据用户的视觉关注点在显示界面上的各个区域采用不同分辨率的原理;
图17A-17B示出了利用子像素的组合来实现显示画面的分辨率可调的原理;以及
图18是根据本公开的实施例的可应用上述像素电路的驱动方法的示意 性的流程图。
具体实施方式
下面将结合附图对本公开的实施例进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明的一部分实施例,而不是全部的实施例。基于本公开中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例,也属于本发明保护的范围。
如上所述,驱动TFT存在阈值电压,由于工艺制程的原因,各个像素点的驱动TFT的阈值电压Vth可能会存在差异;并且在长时间工作之后,驱动TFT的阈值电压也会发生漂移,由此会造成各像素点的OLED亮度不均,影响显示的均匀性。
例如,图1示出了一种已知的2T1C像素电路,其包括驱动TFT T2、开关TFT T1和存储电容Cs,其中,开关TFT T1的栅极连接扫描线Vscan,其源极连接数据线Vdata,其漏极连接驱动TFT T2的栅极;驱动TFT T2的源极连接电源电压VDD,漏极连接OLED的阳极;OLED的阴极接地;存储电容Cs并联在驱动TFT T2的栅源之间。当开始对该像素进行扫描时,扫描线Vscan为低电平时,T1开启,将数据线上提供的数据电压Vdata写入存储电容Cs,当该扫描结束后,Vscan变高,T1关断。通过存储在Cs上的数据电压开启驱动TFT T2,从而驱动OLED发光。
其中,驱动TFT T2的驱动电流,即,OLED的工作电流可以表示为
IOLED=K(VGS-Vth)2
其中VGS为驱动晶体管的栅源电压,Vth为驱动晶体管的阈值电压,
K为系数,具体可以表示为
Figure PCTCN2017090618-appb-000001
此处,μ为载流子迁移率,Cox为栅氧化层电容,W/L为驱动晶体管的沟道宽长比。
如前所述,由于工艺制程和器件老化等原因,各像素点的驱动TFT的阈值电压Vth会存在差异,并且随着使用会产生漂移,这样就导致了即便相同的栅源电压施加在驱动晶体管上,所产生的驱动电流,即,流过OLED的电流也会因Vth的变化而变化,从而影响显示的均匀性。
有鉴于此,本公开提出了一种像素电路,其可以对驱动TFT的阈值电压进行补偿,消除了驱动TFT的阈值电压对驱动OLED进行发光显示的工作电 流的影响,从而增强了显示效果。
如图2所示,根据本公开的一实施例,该像素电路包括:第一子像素电路10,连接到第一数据线Vdata1、第一扫描线Gate1和第一节点N1,被配置为利用第一数据线Vdata1提供的第一数据电压驱动第一发光器件发光显示,并且在第一扫描线的控制下在第一节点N1处产生补偿电压;以及至少一个第二子像素电路,例如,子像素电路20和30,其中,子像素电路20连接到第一扫描线Gate1、第一节点N1、对应的第二数据线Vdata2以及第二扫描线Gate2,被配置为驱动第二发光器件发光显示,并且利用第一节点N1处产生的补偿电压进行阈值电压补偿;子像素电路30连接到第一扫描线Gate1、第一节点N1、对应的第二数据线Vdata3以及第二扫描线Gate2,被配置为驱动第三发光器件发光显示,并且利用第一节点N1处产生的补偿电压进行阈值电压补偿。
根据本公开的上述像素电路,可以利用第一子像素电路在第一节点N1处产生补偿电压,不仅可以对第一子像素电路自身进行阈值电压补偿,而且将该补偿电压提供给至少一个第二子像素电路,从而可以对其它子像素电路也进行阈值电压补偿,消除了子像素电路中的驱动TFT的阈值电压漂移对发光器件的发光显示的影响。
另外,根据本公开的上述像素电路,可以根据需要调节显示分辨率。其中,第一像素电路利用第一数据电压来驱动第一发光器件发光显示,并且可以将第二子像素电路配置为利用第一数据电压或者与第一数据电压不同的第二数据电压来驱动第二发光器件发光显示,并且将第一发光器件和第二发光器件的发光进行组合,实现不同的视觉分辨率。
具体地,如图3所示,根据本公开的上述像素电路,其中的第一子像素电路10包括:包括第一输入单元101和第一驱动单元102,其中,第一输入单元101连接第一数据线Vdata1和第一扫描线Gate1,被配置为在第一扫描线Gate1的控制下,将第一数据线Vdata1提供的第一数据电压输入给第一驱动单元102;第一驱动单元102,连接第一节点N1,被配置为在第一节点N1的控制下,产生驱动第一发光器件发光的电流。
可选地,如图3所示,第一子像素电路还包括:补偿电压产生单元103,连接至第一节点N1、第一扫描线Gate1和第一驱动单元102,被配置为在第 一扫描线Gate1的控制下,在第一节点N1处产生补偿电压,其中该补偿电压可以用于对第一驱动单元102进行阈值电压补偿,并且可以被提供给与之连接的第二子像素电路。
可选地,该第一子像素电路还包括:第一发光控制单元104,连接至第一发光器件、第一发光控制信号端EM0、EM1和第一驱动单元102,被配置为在第一发光控制信号端的控制下向第一发光器件提供第一驱动单元102产生的驱动电流。
可选地,第一子像素电路还包括:复位单元105,连接至复位信号端Reset和第一节点N1,被配置为在复位信号端Reset提供的复位信号的控制下,对第一节点N1进行复位。
以下结合图5对根据本公开实施例的第一子像素电路的具体结构进行详细说明。如图5所示,可选地,第一输入单元101包括第一输入晶体管M4,第一驱动单元102包括第一驱动晶体管D1;其中,第一输入晶体管M4的栅极连接到第一扫描线Gate1,第一极连接到第一数据线Vdata1,第二极连接到第一驱动晶体管D1的第一极;第一驱动晶体管D1的栅极连接到第一节点N1,第二极输出驱动第一发光器件发光的电流。
可选地,如图5所示,其中补偿电压产生单元103包括:第一补偿晶体管M2,栅极连接到第一扫描线Gate1,第一极连接到第一节点N1,第二极连接到第一驱动单元102的输出端;以及第一补偿电容C1,第一端连接到第一节点N1,第二端连接到第一电压端Vdd。
可选地,如图5所示,其中第一发光控制单元104包括:第一发光控制晶体管M3,栅极连接到第一发光控制端EM0,第一极连接第一电压端Vdd,第二极连接到第一驱动单元102的输入端;以及第二发光控制晶体管M5,栅极连接到第一发光控制端EM1,第一极连接到第一驱动单元102的输出端,第二极连接到第一发光器件。
可选地,如图5所示,其中复位单元包括:复位晶体管M1,栅极连接到复位信号端Reset,第一极连接第二电压端Vinit,第二极连接第一节点N1。
下面结合图4和图5来说明根据本公开实施例的第二子像素电路的结构。如图4所示,每个第二子像素电路,例如,图2中所示子像素电路20和30,每一个包括:第二输入单元201/301和电压补偿单元203/303,第二输入单元 201/301连接第二数据线Vdata2/Vdata3和第二扫描线Gate2,在第二扫描线Gate2的控制下,将第二数据线Vdata2/Vdata3提供的第二数据电压输入给电压补偿单元;电压补偿单元203/303连接到第一节点(N1)和第一扫描线Gate1,在第一扫描线Gate1的控制下,写入第一节点N1处产生的补偿电压。
可选地,如图4所示,第二子像素电路20/30还包括:第二驱动单元202/302,连接到电压补偿单元203/303,利用电压补偿单元写入的补偿电压进行阈值电压补偿,并且产生驱动第二发光器件OLED2/OLED3发光的电流。
可选地,如图4所示,第二子像素电路20/30还包括:第二发光控制单元204/304,连接至第二发光器件、第二发光控制信号端EM2/EM3和第二驱动单元202/302,在发光控制信号端EM2/EM3的控制下向发光器件OLED2/OLED3提供第二驱动单元202/302产生的驱动电流。
以下结合图5对根据本公开实施例的第二子像素电路20、30的具体结构进行详细说明。如图5所示,其中,第二输入单元包括第二输入晶体管T2/T5,栅极连接到第二扫描线Gate2,第一极连接第二数据线Vdata2/Vdata3,第二极连接到电压补偿单元。
可选地,如图5所示,其中,电压补偿单元包括:第二补偿晶体管T3/T4,栅极连接到第一扫描线Gate1,第一极连接到第一节点N1,第二极连接到第二驱动单元;第二补偿电容C2/C3,第一端连接到第二补偿晶体管T2/T3的第二极,第二端连接到第二输入单元的输出端。
可选地,如图5所示,其中,第二驱动单元包括第二驱动晶体管D2/D3,其栅极连接到电压补偿单元的输出端,第一极连接到第一电压端Vdd,第二极输出驱动第二发光器件发光的电流。
可选地,如图5所示,其中,第二发光控制单元包括:第三发光控制晶体管T1/T6,栅极连接到第二发光控制线EM2/EM3,第一极连接到第二驱动单元的输出端,第二极连接到第二发光器件。
在本公开的上述实施例中,由于在第一子像素电路中存在补偿电压产生单元,在第一节点处产生补偿电压,从而可以对第一子像素电路中的驱动晶体管进行阈值电压补偿,并且经由第一节点N1将补偿电压提供给第二子像素电路,经由第二子像素电路中的电压补偿单元对第二子像素电路中的驱动晶体管进行阈值电压补偿,因此可以消除发光器件发光显示时受驱动晶体管 的阈值电压的影响,增强了显示效果。
此外,通过向第一子像素电路提供第一数据电压驱动第一发光器件发光显示,并且可以根据显示分辨率的需要,将第二数据电压提供给第二子像素电路来调整第二发光器件的显示灰度,从而动态实时地调整第一子像素和第二子像素合成后的视觉分辨率。
可选地,在上述实施例中,显示器件为OLED。
可选地,在图5所示的像素电路中,所有晶体管均为P型薄膜晶体管TFT,从而减小了模组的工艺制程,提高了生产效率。然而,根据需要,其中的一部分或者全部晶体管也可以采用N型TFT,只要相应地调整有关控制信号的电平即可,具体连接关系在此省略。
可选地,在本公开中,除了作为晶体管的栅极作为其控制极之外,晶体管的第一极可以是用于输入信号的源极,而第二极作为用于输出信号的漏极。然而,考虑到晶体管的源极和漏极的对称性,完全可以将二者互换,而不影响本公开的技术方案。
以上结合图3-5描述了根据本公开的实施例的像素电路的具体结构。下面将结合图6-10来详细描述根据本公开的上述实施例的像素电路在高分辨率显示模式下的各个阶段的工作情况。其中,在图7-10中的虚线框中的TFT表示关断的TFT,箭头表示每一阶段的电流流向。
作为示例,图5中的第一子像素电路的第一发光控制信号端EM0,EM1和第二子像素电路的第二发光控制信号端EM2/EM3接入同一发光控制信号EM。当然根据需要,各个发光控制信号端也可以接入彼此不同的发光控制信号,在此不作限制,只要能实现本公开的原理即可。
在图6所示的第一阶段中,复位信号端施加低电平信号,第一扫描信号线和第二扫描信号线施加高电平信号,第一和第二发光控制信号端施加高电平信号。因此,如图7所示,第一子像素电路中的复位晶体管M1开启,而像素电路中的其它晶体管关断,此过程将第一节点N1的电平复位到Vinit电位,从而对第一节点的电位进行初始化,该阶段为像素电路的复位阶段。
在图6所示的第二阶段中,复位信号端施加的信号改变为高电平,第一扫描信号线改变为施加低电平信号,第二扫描信号线继续施加高电平信号,第一和第二发光控制信号端继续施加高电平信号。因此,如图8所示,第一 子像素电路中的复位晶体管M1关断,输入晶体管M4和第一补偿晶体管M2由于栅极被施加低电平而开启,驱动晶体管的栅极由于在前一阶段被重置为低电平的Vinit而开启,Vdata1信号通过晶体管M4→D1→M2开始对第一节点N1点进行充电,一直将第一节点N1点充电到Vdata1-Vth为止,其中Vth表示驱动晶体管D1的阈值电压。第一补偿电容C1的第一端由于连接到第一节点N1,因此,其电位被充电到Vdata1-Vth,而第二端接到第一电压端Vdd;由于两个第二子像素电路20和30中的第二补偿晶体管T3,T4的栅极连接到第一扫描线,被施加低电平信号,因此,晶体管T3,T4开启,将节点N2和N3的电位也充电至Vdata1-Vth。该阶段为像素电路的充电阶段,也是像素电路的第一数据电压写入阶段。
在图6所示的第三阶段中,第一扫描信号线施加的信号改变为高电平,第二扫描信号线施加的信号改变为低电平,第一和第二发光控制信号端继续施加高电平信号。因此,如图9所示,第一子像素电路中的输入晶体管M1、第一补偿晶体管M2关断,第二子像素电路20、30中的第二补偿晶体管T3,T4关断,而第二输入晶体管T2,T5开启,分别向第二补偿电容C2,C3的第二端提供第二数据电压Vdata2和Vdata3。由于节点N2和N3浮置,分别连接到节点N2和N3的第二补偿电容C2,C3的第一端基于电容的自举效应,N2点的电位被改变为Vdata1-Vth+Vdata2,N3点的电位被改变为Vdata1-Vth+Vdata3,以保证第二补偿电容C2和C3的两端的电势差不变。此阶段为节点N2和N3的浮接跳变过程,也就是像素电路的第二数据电压写入阶段。
在以上各阶段中,由于发光控制晶体管M3、M5关断,没有电流流过OLED1,间接降低了OLED的寿命损耗,确保了显示质量。
类似地,在以上各阶段中,由于发光控制晶体管T1、T6关断,保证了除发光阶段之外,没有电流流过OLED2和OLED3,间接降低了OLED的寿命损耗,确保了显示质量。
图6所示的第四阶段为像素电路驱动发光器件进行发光显示的阶段。在第四阶段中,第二扫描信号线施加的信号改变为高电平,第一和第二发光控制信号端施加的信号改变为低电平。因此,如图10所示,第二子像素电路20、30中的第二输入晶体管T2,T5关断;第一子像素电路中的第一发光控制 晶体管M3和第二发光控制晶体管M5开启,形成从M3→D1→M5的电流路径,驱动第一发光器件OLED1开始发光显示。
第一驱动晶体管D1产生的驱动电流可以由以下公式(1)表示:
IOLED1=K(VGS–Vth)2=K[Vdd–(Vdata1–Vth)–Vth]2
=K(Vdd–Vdata1)2    (1)
由上式(1)可知,驱动电流IOLED1已经不受驱动晶体管的阈值电压Vth的影响,只与第一电压端提供的电源电源Vdd和之前写入的第一数据电压Vdata1有关。因此,消除了驱动TFT由于工艺制程及长时间的操作所导致的阈值电压Vth漂移对驱动晶体管输出的驱动电流IOLED1的影响,可以保证各个OLED发光显示的均匀性,提高显示质量。
同时,对于第二子像素电路20而言,其中的第三发光控制晶体管T1在低电平的发光控制信号下开启,第二驱动晶体管D2产生的驱动电流可以由以下公式(2)表示:
IOLED2=K(VGS–Vth)2=K[Vdd–(Vdata1+Vdata2–Vth)–Vth]2
=K(Vdd–Vdata1-Vdata2)2    (2)
注意到,第二驱动晶体管D2产生的驱动电流IOLED2已经不受驱动晶体管D2的阈值电压Vth的影响,只与第一电压端提供的电源电源Vdd、之前写入的第一数据电压Vdata1和第二数据电压Vdata2有关。因此,消除了驱动TFT由于工艺制程及长时间的操作所导致的阈值电压Vth漂移对驱动晶体管输出的驱动电流IOLED2的影响,可以保证各个OLED发光显示的均匀性,提高显示质量。
类似地,对于第二子像素电路30而言,其中的第三发光控制晶体管T6在低电平的发光控制信号下开启,第二驱动晶体管D3产生的驱动电流可以表示为以下的公式(3):
IOLED3=K(VGS–Vth)2=K[Vdd–(Vdata1+Vdata3–Vth)–Vth]2
=K(Vdd–Vdata1-Vdata3)2    (3)
由此可见,经过阈值电压补偿,第一子像素电路和第二子像素电路在驱动发光器件发光显示时,输出的驱动电流不再受驱动晶体管的阈值电压的影响,提高了各像素发光显示的均匀性。注意到,在上述实施例中,假设驱动晶体管D1~D3的阈值电压相等。实际上,硅基背板TFT的工艺均一性比较 好,依据电镜原理,可以认为各个驱动晶体管D1、D2、D3的阈值电压Vth都基本相同。
此外,在本公开的该实施例中,由于向各个子像素电路写入的数据电压彼此不同,发光器件OLED1、OLED2和OLED3发光电流不同,通过对OLED1、OLED2和OLED3的发光显示进行组合,可以显示更丰富的灰阶信息,提高了视觉分辨率。
下面将结合图11-14来详细描述根据本公开的上述实施例的像素电路在低分辨率显示模式下的各个阶段的工作情况。其中,在图12-14中的虚线框中的TFT表示关断的TFT,箭头表示每一阶段的电流流向。
作为示例,图5中的第一子像素电路的第一发光控制信号端EM0,EM1和第二子像素电路的第二发光控制信号端EM2/EM3接入同一发光控制信号EM。当然根据需要,各个发光控制信号端也可以接入彼此不同的发光控制信号,在此不作限制,只要能实现本公开的原理即可。
在图11所示的第一阶段中,复位信号端施加低电平信号,第一扫描信号线和第二扫描信号线施加高电平信号,第一和第二发光控制信号端施加高电平信号。因此,如图12所示,第一子像素电路中的复位晶体管M1开启,而像素电路中的其它晶体管关断,此过程将第一节点N1的电平复位到Vinit电位,从而对第一节点的电位进行初始化,该阶段为像素电路的复位阶段。
在图11所示的第二阶段中,复位信号端施加的信号改变为高电平,第一扫描信号线施加的信号改变为低电平,第二扫描信号线继续施加高电平信号,第一和第二发光控制信号端继续施加高电平信号。因此,如图13所示,第一子像素电路中的复位晶体管M1关断,输入晶体管M4和第一补偿晶体管M2由于栅极被施加低电平而开启,驱动晶体管的栅极由于在前一阶段被重置为低电平的Vinit而开启,Vdata1’信号通过晶体管M4→D1→M2开始对第一节点N1点进行充电,一直将第一节点N1点充电到Vdata1’-Vth为止,其中Vth表示驱动晶体管D1的阈值电压。第一补偿电容C1的第一端由于连接到第一节点N1,因此,其电位被充电到Vdata1’-Vth,而第二端接到第一电压端Vdd;由于两个第二子像素电路20和30中的第二补偿晶体管T3,T4的栅极连接到第一扫描线,被施加低电平信号,因此,晶体管T3,T4开启,将节点N2和N3的电位也充电至Vdata1’-Vth。该阶段为像素电路的充电阶段,也是像 素电路的第一数据电压写入阶段。
在以上各阶段中,由于发光控制晶体管M3、M5关断,没有电流流过OLED1,间接降低了OLED的寿命损耗,确保了显示质量。
类似地,在以上各阶段中,由于发光控制晶体管T1、T6关断,保证了除发光阶段之外,没有电流流过OLED2和OLED3,间接降低了OLED的寿命损耗,确保了显示质量。
与图6所示的情形不同,图11所示的时序不存在第二扫描信号改变为低电平的情况。换句话说,图12-14所示的像素电路的工作阶段不存在对像素电路写入第二数据电压的阶段,在将第一数据电压写入像素电路之后,可以控制第一子像素电路和第二子像素电路分别驱动发光器件发光。
图11所示的第三阶段为像素电路驱动发光器件进行发光显示的阶段。在第三阶段中,第一和第二发光控制信号端施加的信号改变为低电平。因此,如图14所示,第一子像素电路中的第一发光控制晶体管M3和第二发光控制晶体管M5开启,形成从M3→D1→M5的电流路径,驱动第一发光器件OLED1开始发光显示。
第一驱动晶体管D1产生的驱动电流可以由以下公式(4)表示:
IOLED1=K(VGS–Vth)2=K[Vdd–(Vdata1’–Vth)–Vth]2
=K(Vdd–Vdata1’)2    (4)
由上式(1)可知,驱动电流IOLED1已经不受驱动晶体管的阈值电压Vth的影响,只与第一电压端提供的电源电源Vdd和之前写入的第一数据电压Vdata1’有关。因此,消除了驱动TFT由于工艺制程及长时间的操作所导致的阈值电压Vth漂移对驱动晶体管输出的驱动电流IOLED1的影响,可以保证各个OLED发光显示的均匀性,提高显示质量。
同时,对于第二子像素电路20而言,在之前的第二阶段中,节点N2被充电到等于第一节点N1的电位,在第三阶段,第三发光控制晶体管T1在低电平的发光控制信号下开启,第二驱动晶体管D2产生的驱动电流可以由以下公式(5)表示:
IOLED2=K(VGS–Vth)2=K[Vdd–(Vdata1’–Vth)–Vth]2
=K(Vdd–Vdata1’)2    (5)
由此可见,第二驱动晶体管D2产生的驱动电流与第一驱动晶体管D1产 生的驱动电流相等,并且也不受驱动晶体管D2的阈值电压Vth的影响,只与第一电压端提供的电源电源Vdd和之前写入的第一数据电压Vdata1’有关。因此,消除了驱动TFT由于工艺制程及长时间的操作所导致的阈值电压Vth漂移对驱动晶体管输出的驱动电流IOLED2的影响,可以保证各个OLED发光显示的均匀性,提高显示质量。
类似地,对于第二子像素电路30而言,在之前的第二阶段中,节点N3被充电到等于第一节点N1的电位,在第三阶段,第三发光控制晶体管T6在低电平的发光控制信号下开启,第二驱动晶体管D3产生的驱动电流可以表示为以下的公式(6):
IOLED2=K(VGS–Vth)2=K[Vdd–(Vdata1’–Vth)–Vth]2
=K(Vdd–Vdata1’)2    (6)
由此可见,经过阈值电压补偿,第一子像素电路和第二子像素电路在驱动发光器件发光显示时,输出的驱动电流不再受驱动晶体管的阈值电压的影响,提高了各像素发光显示的均匀性。
在本公开的该实施例中,由于向各个子像素电路写入的数据电压彼此相同,发光器件OLED1、OLED2和OLED3发光电流相同,OLED1、OLED2和OLED3组合后的发光显示可以提供相对较低的视觉分辨率。
可选地,在上述实施例的像素电路中,可以利用第一子像素电路10显示红色、利用两个第二子像素电路20和30分别显示绿色和蓝色,从而组合成一个像素的三原色RGB。然而,本公开的原理不限于此,实际上,可以根据显示需要,除了利用第一像素电路10显示红色之外,在上述像素电路中包括三个第二子像素20、30和40,分别显示绿色、蓝色和黄色,或者分别显示绿色、蓝色和白色,从而使得显示的色彩更丰富,画质更高。
可选地,在上述实施例的像素电路中,例如,如图17A所示,在一个像素中,可以利用第一子像素电路10、第二子像素电路20和30均显示红色、由于在以较高分辨率显示时,各个子像素电路所写入的数据电压的差异,导致显示的灰阶电压彼此不同,从而显示对应于不同色度的红色R1,R2和R3,而在以较低分辨率显示时,如图17B所示,第一子像素电路10、第二子像素电路20和30均显示相同色度的红色R0。然后,可以利用三个像素电路单元(RGB)或者四个像素电路单元(RGBW/RGBY)形成一个基本像素。
根据本公开的一方面,还提供了一种显示面板。如图15所示,该显示面板包括:OLED像素阵列,其中,每一个OLED像素可以由上述的像素电路构成;至少一个传感器,检测观看显示面板的界面的用户的眼动并产生眼动检测信号;以及处理器,根据眼动检测信号,确定用户所关注的该界面上的区域,并且向第二扫描线提供有效扫描电压,使得向对应于该区域中的像素写入第二数据电压。
可选地,可以将显示面板的像素阵列做区域划分,区域划分的面积根据具体观测需要而定。通过人眼跟踪技术,判断人眼所关注的屏幕的区域的位置,并且以较高的分辨率显示被关注的区域,而以较低的分辨率显示其它未被关注的区域。具体地,可以通过传感器来检测用户的眼动,并且判断用户观察的具体区域,从而实现显示区域的分辨率的差异化,随着人眼观察位置的变化,对不同位置的区域的分辨率进行切换,真正实现分辨率可调的效果。由此,可以实时动态地调节各个显示区域的分辨率,并且降低了显示功耗。
例如,如图16所示,可以在用户所关注的区域采用高分辨率显示模式,而在其它区域采用低分辨率模式,从而可以降低显示功耗。
可选地,可以根据实际需要,以对像素进行组合的方式来进行显示。例如,为避免失真,可以以方形的显示方式对像素进行组合来显示画面像素。例如,以一个、四个或者九个物理像素绑定的方式来进行显示,其中,一个物理像素对应于一个画面像素进行显示时,代表高分辨率显示模式,而以九个物理像素对应于一个画面像素时,代表低分辨率显示模式。
根据本公开的另一实施例,还提供了一种显示装置,包括上述显示面板,该显示装置可以为:AMOLED显示器、电视机、数码相框、手机、平板电脑等具有任何显示功能的产品或部件。
根据本公开的实施例,还提供了一种驱动上述像素电路的方法,如图18所示,其包括:S1800,向第一扫描线施加有效电平,将第一数据线上的第一数据电压写入第一子像素电路和第二像素子电路,在第一节点处产生补偿电压,并且将补偿电压写入第二子像素电路进行阈值电压补偿;S1820,基于显示模式,向第二扫描线施加有效电平,将第二数据线上的第二数据电压写入第二子像素电路。
可选地,该方法还包括:向第一扫描线施加有效电平,开启第一输入单 元和补偿电压产生单元,将第一数据线上的第一数据电压提供给第一驱动单元,并且在第一节点处产生补偿电压。
可选地,该方法还包括:利用第一扫描线施加的有效电平开启电压补偿单元,从而将第一节点处产生的补偿电压提供给第二驱动单元;以及在以第一分辨率进行显示的情况下,向第二扫描线施加有效电平,开启第二输入单元,从而向电压补偿单元提供第二数据线上的数据电压;在第二分辨率进行显示的情况下,向第二扫描线施加无效电平,不开启第二输入单元,从而不向电压补偿单元提供第二数据线上的数据电压,其中第一分辨率高于第二分辨率。
可选地,该方法还包括:向第一发光控制信号端提供有效电平,开启第一发光控制单元,从而将第一驱动单元产生的驱动电流提供给第一发光器件;以及向第二发光控制信号端提供有效电平,开启第二发光控制单元,从而将第二驱动单元产生的驱动电流提供给第二发光器件。
可选地,该方法还包括:在向第一扫描线施加有效电平之前,向复位信号端施加有效电平,开启复位单元,对第一节点进行复位。
综上所述,在本公开的上述实施例中,由于在第一子像素电路中存在补偿电压产生单元,在第一节点处产生补偿电压,从而可以对第一子像素电路中的驱动晶体管进行阈值电压补偿,并且经由第一节点N1将补偿电压提供给第二子像素电路,经由第二子像素电路中的电压补偿单元对第二子像素电路中的驱动晶体管进行阈值电压补偿,消除了各像素驱动TFT由于工艺制程及器件老化操作造成阈值电压(Vth)不均一而导致的对流过OLED的驱动电流的影响,保证了显示的均匀性,从而增强了显示效果。同时,通过向第一子像素电路提供第一数据电压驱动第一发光器件发光显示,并且可以根据显示分辨率的需要,将第二数据电压提供给第二子像素电路来调整第二发光器件的显示灰度,从而动态实时地调整第一子像素和第二子像素合成后的视觉分辨率。
以上所述,仅为本公开的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本公开实施例公开的技术范围内,可轻易想到的变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应该以权利要求的保护范围为准。
本申请要求于2016年11月24日递交的中国专利申请第201611044987.2号的优先权,在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。

Claims (20)

  1. 一种像素电路,包括:
    第一子像素电路,连接到第一数据线、第一扫描线和第一节点,被配置为在第一扫描线的控制下写入第一数据线提供的第一数据电压,并且在第一节点处产生补偿电压;以及
    至少一个第二子像素电路,连接到第一节点、第二数据线以及第二扫描线,被配置为利用第一节点处产生的补偿电压进行阈值电压补偿;
    其中,至少一个第二子像素电路被配置为在第二扫描线的控制下写入第二数据线提供的第二数据电压。
  2. 根据权利要求1所述的像素电路,其中,第一子像素电路包括第一输入单元和第一驱动单元,
    其中,第一输入单元连接第一数据线和第一扫描线,被配置为在第一扫描线的控制下,将第一数据线提供的第一数据电压输入给第一驱动单元;
    第一驱动单元,连接第一节点,被配置为在第一节点的控制下,产生驱动第一发光器件发光的电流。
  3. 根据权利要求2所述的像素电路,其中,第一子像素电路还包括:
    补偿电压产生单元,连接至第一节点、第一扫描线和第一驱动单元,被配置为在第一扫描线的控制下,在第一节点处产生补偿电压。
  4. 根据权利要求2或3所述的像素电路,其中,第一子像素电路还包括:
    第一发光控制单元,连接至第一发光器件、第一发光控制信号端和第一驱动单元,被配置为在第一发光控制信号端的控制下向第一发光器件提供第一驱动单元产生的驱动电流。
  5. 根据权利要求2或3所述的像素电路,其中,第一子像素电路还包括:
    复位单元,连接至复位信号端和第一节点,被配置为在复位信号端提供的复位信号的控制下,对第一节点进行复位。
  6. 根据权利要求2-5任一项所述的像素电路,其中,第一输入单元包括第一输入晶体管,第一驱动单元包括第一驱动晶体管;
    第一输入晶体管的栅极连接到第一扫描线,第一极连接到第一数据线, 第二极连接到第一驱动晶体管的第一极;
    第一驱动晶体管的栅极连接到第一节点,第二极输出驱动第一发光器件发光的电流。
  7. 根据权利要求3所述的像素电路,其中补偿电压产生单元包括:
    第一补偿晶体管,栅极连接到第一扫描线,第一极连接到第一节点,第二极连接到第一驱动单元的输出端;以及
    第一补偿电容,第一端连接到第一节点,第二端连接到第一电压端。
  8. 根据权利要求4所述的像素电路,其中第一发光控制单元包括:
    第一发光控制晶体管,栅极连接到第一发光控制端,第一极连接第一电压端,第二极连接到第一驱动单元的输入端;以及
    第二发光控制晶体管,栅极连接到第一发光控制端,第一极连接到第一驱动单元的输出端,第二极连接到第一发光器件。
  9. 根据权利要求5所述的像素电路,其中复位单元包括:
    复位晶体管,栅极连接到复位信号端,第一极连接第二电压端,第二极连接第一节点。
  10. 根据权利要求1-9任一项所述的像素电路,其中,至少一个第二子像素电路中的每个第二子像素电路包括第二输入单元、电压补偿单元和第二驱动单元;
    其中,第二输入单元连接第二数据线和第二扫描线,被配置为在第二扫描线的控制下,将第二数据线提供的第二数据电压输入给电压补偿单元;
    电压补偿单元,连接到第一节点和第一扫描线,在第一扫描线的控制下,写入第一节点处产生的补偿电压;以及
    第二驱动单元,连接到电压补偿单元,被配置为利用电压补偿单元写入的补偿电压进行阈值电压补偿,并且产生驱动第二发光器件发光的电流。
  11. 根据权利要求10所述的像素电路,其中,每个第二子像素电路还包括:
    第二发光控制单元,连接至第二发光器件、第二发光控制信号端和第二驱动单元,在发光控制信号端的控制下向发光器件提供第二驱动单元产生的驱动电流。
  12. 根据权利要求10或11所述的像素电路,其中,
    第二输入单元包括:第二输入晶体管,栅极连接到第二扫描线,第一极连接第二数据线,第二极连接到电压补偿单元。
  13. 根据权利要求10或11所述的像素电路,其中,
    电压补偿单元包括:第二补偿晶体管和第二补偿电容;第二补偿晶体管的栅极连接到第一扫描线,第一极连接到第一节点,第二极连接到第二补偿电容的第一端;第二补偿电容的第二端连接到第二输入单元的输出端;以及
    第二驱动单元包括:第二驱动晶体管,其栅极连接到电压补偿单元的输出端,第一极连接到第一电压端,第二极输出驱动第二发光器件发光的电流。
  14. 根据权利要求11所述的像素电路,其中,第二发光控制单元包括:
    第三发光控制晶体管,栅极连接到第二发光控制线,第一极连接到第二驱动单元的输出端,第二极连接到第二发光器件。
  15. 一种驱动权利要求1所述的像素电路的方法,包括:
    向第一扫描线施加有效电平,将第一数据线上的第一数据电压写入第一子像素电路,在第一节点处产生补偿电压,并且将补偿电压提供给第二子像素电路进行阈值电压补偿;以及
    向第二扫描线施加有效电平,将第二数据线上的第二数据电压写入第二子像素电路。
  16. 根据权利要求15所述的方法,其中,第一子像素电路包括第一输入单元、第一驱动单元和补偿电压产生单元,其中,第一输入单元连接第一数据线、第一扫描线和第一驱动单元;第一驱动单元连接第一节点和补偿电压产生单元;所述补偿电压产生单元连接至第一节点和第一扫描线;
    所述方法还包括:
    向第一扫描线施加有效电平,开启第一输入单元和补偿电压产生单元,将第一数据线上的第一数据电压提供给第一驱动单元,并且在第一节点处产生补偿电压。
  17. 根据权利要求16所述的方法,其中,至少一个第二子像素电路中的每个第二子像素电路还包括第二输入单元、第二驱动单元和电压补偿单元;第二输入单元连接第二数据线、第二扫描线和电压补偿单元;电压补偿单元,连接到第一节点、第一扫描线和第二驱动单元;
    所述方法还包括:
    利用第一扫描线施加的有效电平开启电压补偿单元,从而将第一节点处产生的补偿电压提供给第二驱动单元;以及
    在以第一分辨率进行显示的情况下,向第二扫描线施加有效电平,开启第二输入单元,从而向电压补偿单元写入第二数据线上的数据电压;
    在以第二分辨率进行显示的情况下,向第二扫描线施加无效电平,不开启第二输入单元,其中第一分辨率高于第二分辨率。
  18. 根据权利要求17所述的方法,其中第一子像素电路还包括第一发光控制单元,连接至第一发光器件、第一发光控制信号端以及第一驱动单元;所述第二子像素电路还包括第二发光控制单元,连接至第二发光器件、第二发光控制信号端和第二驱动单元;
    所述方法还包括:
    向第一发光控制信号端提供有效电平,开启第一发光控制单元,从而将第一驱动单元产生的驱动电流提供给第一发光器件;以及
    向第二发光控制信号端提供有效电平,开启第二发光控制单元,从而将第二驱动单元产生的驱动电流提供给第二发光器件。
  19. 根据权利要求15-18任一项所述的方法,其中,所述第一子像素电路还包括复位单元,该复位单元连接至复位信号端和第一节点;所述方法还包括:
    在向第一扫描线施加有效电平之前,向复位信号端施加有效电平,开启复位单元,对第一节点进行复位。
  20. 一种显示面板,包括:
    多个以阵列方式布置的如权利要求1-14任一项所述的像素电路;
    至少一个传感器,检测观看显示面板的界面的用户的眼动并产生眼动检测信号;以及
    处理器,根据眼动检测信号,确定用户所关注的该界面上的区域,并且向第二扫描线提供有效电平,使得向对应于该区域中的像素电路的第二像素子电路写入第二数据电压。
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