WO2015188532A1 - 像素驱动电路、驱动方法、阵列基板及显示装置 - Google Patents

像素驱动电路、驱动方法、阵列基板及显示装置 Download PDF

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Publication number
WO2015188532A1
WO2015188532A1 PCT/CN2014/087936 CN2014087936W WO2015188532A1 WO 2015188532 A1 WO2015188532 A1 WO 2015188532A1 CN 2014087936 W CN2014087936 W CN 2014087936W WO 2015188532 A1 WO2015188532 A1 WO 2015188532A1
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Prior art keywords
transistor
voltage
storage capacitor
gate
driving transistor
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PCT/CN2014/087936
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English (en)
French (fr)
Inventor
孙亮
王颖
孙拓
马占洁
张林涛
皇甫鲁江
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京东方科技集团股份有限公司
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Priority to US14/648,670 priority Critical patent/US10657883B2/en
Publication of WO2015188532A1 publication Critical patent/WO2015188532A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2003—Display of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/028—Generation of voltages supplied to electrode drivers in a matrix display other than LCD

Definitions

  • the present disclosure relates to a pixel driving circuit, a driving method, an array substrate, and a display device.
  • OLED Organic Light-Emitting Diode
  • AMOLED Active matrix OLED
  • the main problem to be solved is the non-uniformity of the brightness of the OLED device driven by each AMOLED pixel driving unit.
  • the AMOLED uses a Thin-Film Transistor (TFT) to construct a pixel driving unit to provide a corresponding driving current for the light emitting device.
  • TFT Thin-Film Transistor
  • low temperature polysilicon thin film transistors or oxide thin film transistors are mostly used.
  • low temperature polysilicon thin film transistors and oxide thin film transistors have higher mobility and more stable characteristics, and are more suitable for use in AMOLED displays.
  • due to the limitations of the crystallization process low-temperature polysilicon thin film transistors fabricated on large-area glass substrates often have non-uniformities in electrical parameters such as threshold voltage and mobility, and this non-uniformity is converted into OLED devices.
  • Oxide thin film transistors have better uniformity of process, but similar to amorphous silicon thin film transistors, their threshold voltages drift after prolonged pressurization and high temperature. Due to the difference in display screens, the threshold shift amount of the thin film transistors in each part of the panel is different, which causes a difference in display brightness. Since this difference is related to the previously displayed image, it often appears as an afterimage phenomenon.
  • the threshold characteristic of the driving transistor thereof greatly affects the driving current and the brightness of the final display.
  • the drive transistor is subject to voltage stress and illumination, which will cause its threshold to drift. This threshold drift The shift will be reflected in the display effect as uneven brightness.
  • the pixel circuit of the existing AMOLED generally has a complicated structure design of the pixel circuit, which directly leads to a decrease in the yield of the pixel circuit of the AMOLED.
  • the present disclosure urgently provides a pixel driving unit, a driving method thereof, and a pixel circuit.
  • a pixel driving circuit including:
  • a storage capacitor having a first end connected to a gate of the driving transistor for transferring information including a data voltage to a gate of the driving transistor;
  • a reset unit configured to reset a voltage across the storage capacitor to a predetermined voltage
  • a data writing unit connected to the gate line, the data line, and the second end of the storage capacitor, for writing information including a data voltage to the second end of the storage capacitor
  • a compensation unit configured to write information including a driving transistor threshold voltage and information of the first power voltage to the first end of the storage capacitor;
  • a light emitting control unit connected to the storage capacitor, the driving transistor and the light emitting device, for controlling the driving transistor to drive the light emitting device to emit light;
  • the driving transistor is configured to control a current flowing to the light emitting device according to information including the data voltage, the driving transistor threshold voltage, and the first power voltage under the control of the light emission control unit.
  • the reset unit includes: a reset control line, a reset signal line, a first transistor and a second transistor, a gate of the first transistor is connected to the reset control line, a source is connected to the reset signal line, a drain connected to the first end of the storage capacitor, the first transistor is configured to write a reset signal line voltage to the first end of the storage capacitor; and a gate of the second transistor is connected to the complex a bit control line, a source connected to the data line, a drain connected to the second end of the storage capacitor, and a second transistor for writing a data voltage to the second end of the storage capacitor.
  • the first transistor and the second transistor are both P-type transistors.
  • the data writing unit includes: a fourth transistor; a gate of the fourth transistor is connected to the gate line, a source is connected to the data line, and a drain is connected to a second end of the storage capacitor, The fourth transistor is configured to write a data voltage to the second end of the storage capacitor.
  • the fourth transistor is a P-type transistor.
  • the compensation unit includes: a third transistor; a gate of the third transistor is connected to the gate line; a source is connected to a first end of the storage capacitor; and a drain is connected to a drain of the driving transistor
  • the third transistor is configured to write information including threshold voltage information of the driving transistor and the first power voltage to the first end of the storage capacitor.
  • the third transistor is a P-type transistor.
  • the compensation signal line further includes: a light emission control line, a fifth transistor and a sixth transistor; a gate of the fifth transistor is connected to the light emission control line, and the source is connected to the compensation
  • the signal line and the drain are connected to the second end of the storage capacitor, and the fifth transistor is configured to write the compensation signal line voltage to the second end of the storage capacitor, and is transferred from the storage capacitor to the driving transistor gate; a gate of the sixth transistor is connected to the light emission control line, a source is connected to the first end of the light emitting device, and a drain is connected to a drain of the driving transistor, and the sixth transistor is used for controlling light emitting of the light emitting device.
  • the driving transistor is configured to control a magnitude of current flowing to the light emitting device according to information including the data voltage, the driving transistor threshold voltage, the first power voltage, and the compensation signal line voltage under the control of the light emission control unit.
  • the light emission control unit includes: a light emission control line, a fifth transistor and a sixth transistor; a gate of the fifth transistor is connected to the light emission control line, and a source is connected to the first power line and the drain Connecting a second end of the storage capacitor, the fifth transistor is configured to write the first power voltage to a second end of the storage capacitor, and is transferred by a storage capacitor to a gate of the driving transistor; the sixth transistor a gate connected to the light emission control line, a source connected to the first end of the light emitting device, and a drain connected to a drain of the driving transistor, wherein the sixth transistor is used for controlling light emitting of the light emitting device, and the driving transistor is used The magnitude of the current flowing to the light emitting device is controlled according to information including the data voltage, the driving transistor threshold voltage, and the first power voltage under the control of the light emitting control unit.
  • the fifth transistor and the sixth transistor are both P-type transistors.
  • the drive transistors are all P-type transistors.
  • the present disclosure also provides a driving method of the pixel driving circuit according to any of the above, comprising the following process:
  • the reset unit In the reset phase, the reset unit resets a voltage across the storage capacitor to a predetermined voltage
  • the data writing unit writes a data voltage to the second end of the storage capacitor
  • the compensation unit writes threshold voltage information including the driving transistor and the first power source to the first end of the storage capacitor Voltage information
  • the storage capacitor transducing information including a data voltage to a gate of a driving transistor, the driving transistor being controlled by the light-emitting control unit according to the data voltage, the driving transistor threshold voltage, and the first power voltage
  • the information controls the amount of current flowing to the light emitting device to drive the light emitting device to emit light.
  • the reset unit resets voltages across the storage capacitors to a reset signal line voltage and a data voltage, respectively.
  • the lighting stage further includes: the lighting control unit writing a compensation signal line voltage to the second end of the storage capacitor, the storage capacitor to include the compensation signal line voltage and information including a data voltage Transducing to the gate of the driving transistor, the driving transistor controlling the current flowing to the light emitting device according to the information including the data voltage, the driving transistor threshold voltage, the first power voltage, and the compensation signal line voltage under the control of the light emission control unit To drive the light emitting device to emit light.
  • the lighting stage further includes: the lighting control unit writing a first power voltage to the second end of the storage capacitor, the storage capacitor comprising the first power voltage and information including a data voltage Translating to a gate of a driving transistor, the driving transistor controlling a current flowing to the light emitting device according to information including the data voltage, a driving transistor threshold voltage, and a first power voltage under control of the light emitting control unit to drive the The light emitting device emits light.
  • the lighting control unit writing a first power voltage to the second end of the storage capacitor, the storage capacitor comprising the first power voltage and information including a data voltage Translating to a gate of a driving transistor, the driving transistor controlling a current flowing to the light emitting device according to information including the data voltage, a driving transistor threshold voltage, and a first power voltage under control of the light emitting control unit to drive the The light emitting device emits light.
  • the pixel driving unit of the embodiment of the present disclosure is configured to connect the gate and the drain of the driving transistor (the gate and the drain of the driving transistor are connected through the third switching transistor when the gate control signal is turned on), so that the driving A drain of the transistor loads the first supply voltage along with a threshold voltage of the drive transistor to a first end of the storage capacitor and thereby cancels a threshold voltage of the drive transistor.
  • the non-uniformity caused by the threshold voltage of the driving transistor and the afterimage phenomenon caused by the threshold voltage drift can be effectively eliminated, and the active matrix light emitting organic electroluminescent display is avoided.
  • the driving effect of the pixel driving unit on the light emitting device is improved, and the quality of the active matrix light emitting organic electroluminescent display tube is further improved.
  • FIG. 1 is a schematic diagram of a pixel driving circuit of an embodiment of the present disclosure
  • FIG. 2 is a timing chart of the pixel driving circuit of FIG. 1;
  • FIG. 3 is a schematic diagram of another pixel driving circuit of an embodiment of the present disclosure.
  • FIG. 4 is a timing chart of the pixel driving circuit of FIG. 3.
  • each transistor defined in the embodiment of the present disclosure is one end of the control transistor being turned on, and the source and the drain are both ends of the transistor except the gate.
  • the source and drain are only for the convenience of explaining the connection relationship of the transistors, and are not limited to the current direction. Those skilled in the art can clearly know the working principle and state according to the type of the transistor, the signal connection mode and the like.
  • FIG. 1 shows a schematic diagram of a pixel driving circuit of a first embodiment of the present disclosure.
  • the pixel driving circuit includes: a data line Data, a gate line Gate, a first power line ELVDD, a second power line ELVSS, a light emitting device D1, a driving transistor T7, a storage capacitor C1, a reset unit, and data writing. Unit, compensation unit and lighting control unit.
  • the circuit shown in FIG. 1 shows a data line Data, a gate line Gate, a first power line ELVDD, a second power line ELVSS, a light emitting device D1, a driving transistor T7, a storage capacitor C1, a reset unit, and data writing.
  • Unit compensation unit and lighting control unit.
  • the light emitting device D1 may be an organic light emitting diode; the data line Data is used to supply a data voltage; the gate line Gate is used to provide a scan voltage; the first power line ELVDD is used to provide a first power supply voltage, and the second The power line ELVSS is used to provide a second supply voltage.
  • the reset unit is configured to reset the voltage across the storage capacitor C1 to a predetermined voltage.
  • the data writing unit connects the gate line Gate, the data line Data, and the first end (N1 point) of the storage capacitor C1 for writing information including the data voltage to the second end (point N2) of the storage capacitor C1.
  • the compensation unit is connected to the gate line Gate, the first end of the storage capacitor C1, and the driving transistor T7 for writing information including the threshold voltage of the driving transistor and the information of the first power voltage to the first end of the storage capacitor C1.
  • the light emission control unit is connected to the storage capacitor C1, the driving transistor T7 and the light emitting device D1 for controlling the driving transistor T7 to drive the light emitting device to emit light.
  • the driving transistor T7 is connected to the first power supply line ELVDD
  • the light emitting device D1 is connected to the second power supply line ELVSS for controlling the magnitude of the current flowing to the light emitting device D1 according to the data voltage under the control of the light emission control unit.
  • the first terminal N1 of the storage capacitor C1 is coupled to the gate of the driving transistor T7 for transferring information including the data voltage to the gate of the driving transistor T7.
  • the driving transistor T7 is connected to the first power source line ELVDD, and the light emitting device D1 is connected to the second power source line ELVSS.
  • the driving transistor T7 is for controlling a magnitude of a current flowing to the light emitting device according to information including the data voltage, the driving transistor threshold voltage, and the first power supply voltage under the control of the light emission control unit.
  • the threshold voltage of the driving transistor is extracted by the compensation unit, and the threshold voltage of the driving transistor T7 can be offset during the driving of the light emitting device, so that the driving transistor can be effectively eliminated from the threshold voltage of the driving transistor.
  • the resulting non-uniformity and image sticking caused by threshold voltage drift avoid the problem of uneven display brightness caused by different threshold voltages of different driving pixels of the active matrix organic electroluminescent display device.
  • the reset unit includes a reset control line Reset, a reset signal line int, a first transistor T1, and a second transistor T2.
  • the gate of the first transistor T1 is connected to the reset control line Reset, the source connection reset signal line int, and the drain connected to the first end N1 of the storage capacitor C1.
  • the gate of the second transistor T2 is connected to the reset control line Reset, the source connection data line Data, and the second terminal N2 of the drain connection storage capacitor C1.
  • the second transistor T2 is for writing the voltage V data of the data line Data to the second terminal N2 of the storage capacitor C1.
  • the voltage across capacitor C1 is reset to V int and V data , respectively .
  • the second terminal N of the storage capacitor C1 is the data potential and is not pulled down to a lower potential.
  • the N2 point potential does not jump at this stage. This avoids the jump of the N2 point potential, thereby avoiding the problem that the N1 point potential differs depending on the N2 point potential.
  • the data writing unit includes a fourth transistor T4.
  • the gate of the fourth transistor T4 is connected to the gate line Gate, the source connection data line Data, and the drain connected to the second end N2 of the storage capacitor C1.
  • the fourth transistor T4 is for writing the data voltage V data to the second terminal N2 of the storage capacitor even if the voltage at the N2 point is V data .
  • the gate of the third transistor T3 is connected to the gate line Gate, the source is connected to the first terminal N1 of the storage capacitor C1, and the drain is connected to the drain of the driving transistor T7.
  • the third transistor T3 is for writing information including the first power supply voltage V dd and the threshold voltage V th of the driving transistor T7 to the first terminal N1 of the storage capacitor C1, that is, the voltage at the point N1 is V dd - V th .
  • the light emission control unit includes an emission control line EM, a fifth transistor T5, and a sixth transistor T6.
  • the gate of the fifth transistor T5 is connected to the light emission control line EM, the source is connected to the first power line ELVDD, and the drain is connected to the second end N2 of the storage capacitor C1.
  • the fifth transistor T5 is for writing the first power voltage to the second terminal N2 of the storage capacitor, and is transferred from the storage capacitor C1 to the gate of the driving transistor T7.
  • the gate of the sixth transistor T6 is connected to the light emission control line EM, the first end of the source is connected to the light emitting device D1, and the drain is connected to the drain of the driving transistor T7.
  • the sixth transistor T6 is used to control the illumination of the light-emitting device D1, that is, the driving transistor T7 can drive the current to flow to the light-emitting device D1 when T6 is turned on.
  • the driving transistor T7 is for controlling the magnitude of current flowing to the light emitting device according to information including a data voltage, a driving transistor threshold voltage, and a first power supply voltage under the control of the light emission control unit.
  • the pixel driving unit of the embodiment has a structure in which the gate and the drain of the driving transistor T7 are connected (when the gate control signal is turned on, the gate and the drain of the driving transistor T7 are connected through the third switching transistor T3), in the pair During the driving process of the light emitting device, the threshold voltage of the driving transistor T7 can be offset, so that the non-uniformity caused by the driving threshold voltage of the driving transistor and the image sticking phenomenon caused by the threshold voltage drift can be effectively eliminated.
  • the problem of uneven brightness of the active matrix light-emitting organic light-emitting device tube caused by the difference in threshold voltages of the driving transistors between the light-emitting devices of different pixel driving units in the active matrix light-emitting organic electroluminescent display tube is avoided.
  • the driving effect of the pixel driving unit on the light emitting device is improved, and the quality of the active matrix light emitting organic electroluminescent display tube is further improved.
  • the working process of the circuit structure of this embodiment includes three phases:
  • the first stage t1 the reset control line Reset signal is valid, T1, T2 are turned on, and the two ends of the storage capacitor C1 are reset. At this time, N1-point write voltage V int int the reset signal line, N2 is the point of a data voltage V data.
  • the second stage t2 the gate line signal is valid, so that T3 and T4 are turned on. N2 is written to V data and N1 is written to V dd -V th . At this time, the voltage stored in the storage capacitor C1 is V dd -V th -V data . In this stage, T3 writes information including the first power supply voltage information and the threshold voltage of the driving transistor to the first terminal N1 of the storage capacitor C1.
  • the third stage t3 the signal of the illumination control line EM is valid, and T5 and T6 are turned on.
  • the N2 point potential is V dd
  • the N1 point potential is V dd -V th -V data +V dd , which is the gate potential of the driving transistor.
  • the source potential of the driving transistor is V dd
  • the gate-source voltage V gs is V dd -V th -V data +V dd -V dd
  • ⁇ is the carrier mobility
  • C ox is the gate oxide capacitance
  • W / L is the aspect ratio of the driving transistor.
  • this current I has been independent of the threshold voltage Vth of the drive transistor T7. Therefore, the problem of uneven display brightness caused by different threshold voltages of different driving pixels of the active matrix organic electroluminescent display device is avoided.
  • FIG. 3 shows a schematic diagram of a pixel driving circuit of a second embodiment of the present disclosure.
  • T5 is connected to the first power supply line ELVDD, and the current resistance voltage drop (IR drop) on the first power supply line ELVDD causes the voltage V dd to vary. Therefore, when T5 charges the second end (N2 point) of C1, the gate voltages of the driving transistors of different pixel units will be different, and the influence of V dd on the current may cause uneven brightness of different pixels.
  • the pixel driving circuit of the embodiment further includes a compensation signal line for compensating for the first power supply voltage variation.
  • the structure of the pixel driving circuit of this embodiment is basically the same as that of the first embodiment.
  • the pixel driving circuit in this embodiment further includes a compensation signal line Ref.
  • the source of the fifth transistor T5 of the illumination control unit is connected to the compensation signal line Ref.
  • the fifth transistor T5 is used to write the compensation signal line voltage V ref to the second terminal N2 of the storage capacitor C1, and is transferred from the storage capacitor C1 to the gate of the driving transistor T7.
  • the gate of the sixth transistor T6 is connected to the light emission control line EM, the first end of the source is connected to the light emitting device D1, and the drain is connected to the drain of the driving transistor T7.
  • the sixth transistor is used to control the illumination of the light emitting device.
  • the driving transistor T7 is for controlling the magnitude of the current flowing to the light emitting device D1 according to information including the data voltage, the driving transistor threshold voltage, the first power source voltage, the first power source voltage change information, and the compensation signal line voltage under the control of the light emission control unit.
  • the working process of the circuit structure of this embodiment includes three phases:
  • the first stage t1 the reset control line Reset signal is valid, so that T1 and T2 are turned on, and the two ends of the storage capacitor C1 are reset.
  • N1-point write voltage V int int the reset signal line, N2 is the point of a data voltage V data.
  • the second stage t2 the gate line signal is valid, so that T3 and T4 are turned on, N2 point is written to V data , and N1 point is written to V dd -V th .
  • the storage capacitor C1 stores the voltage as V dd -V th -V data .
  • information including the first power supply voltage information and the threshold voltage of the driving transistor is written to the first end of the storage capacitor C1.
  • the third stage t3 the signal of the illumination control line EM is valid, and T5 and T6 are turned on. Unlike the first embodiment, the T5 is connected to the compensation signal line Ref, the potential of the N2 point is V ref , and the potential of the N1 point is V dd - V th - V data + V ref , which is the gate potential of the driving transistor.
  • the source potential of the driving transistor is V dd
  • the gate source voltage V gs is V dd -V th -V data +V ref -V dd
  • ⁇ is the carrier mobility
  • C ox is the gate oxide capacitance
  • W/L is the width to length ratio of the driving transistor.
  • the current I has been independent of the threshold voltage Vth of the driving transistor T7, thereby avoiding the threshold voltage of different pixels in the active matrix organic electroluminescent display device due to its driving transistor.
  • the current I is independent of V dd , and V ref only charges the storage capacitor, and the current on the corresponding line is small, and the voltage drop is small.
  • the storage capacitor C1 is connected to the gate of the driving transistor. Since V ref is stable with respect to V dd , the gate voltage of the driving transistor is relatively stable. Relative to the method of charging the capacitor by V dd (Embodiment 1), it is possible to avoid the problem of uneven brightness of different pixels caused by the influence of V dd falling on the current.
  • the driving transistor, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor in the first embodiment and the second embodiment described above are all P-type transistors. Of course, it can also be an N-type, or a combination of a P-type and an N-type, except that the effective signals of the gate control signal lines are different.
  • the present disclosure provides a pixel driving method of the pixel driving circuit of the first embodiment or the second embodiment described above, including the following process:
  • the reset unit resets the voltage across the storage capacitor to a predetermined voltage
  • the data writing unit writes the data voltage to the second end of the storage capacitor
  • the compensation unit writes the threshold voltage information including the driving transistor and the first power voltage information to the first end of the storage capacitor ;
  • the storage capacitor transfers information including the data voltage to the gate of the driving transistor, and the driving transistor is controlled under the control of the illuminating control unit according to information including the data voltage, the driving transistor threshold voltage, and the first power voltage.
  • the amount of current flowing to the light emitting device to drive the light emitting device to emit light.
  • the reset unit resets the voltage across the storage capacitor to the reset signal line voltage and the data voltage, respectively.
  • the illuminating stage further includes: the illuminating control unit writing a first power voltage to the second end of the storage capacitor, the storage capacitor transferring the information including the first power voltage and the data including the data voltage to the driving transistor a gate, a driving transistor under the control of the illumination control unit Information including the data voltage, the drive transistor threshold voltage, and the first supply voltage controls the amount of current flowing to the light emitting device to drive the light emitting device to emit light.
  • the illuminating phase further includes: the illuminating control unit writing a compensation signal line voltage to the second end of the storage capacitor, the storage capacitor rewriting the signal including the compensation signal line voltage and the data including the data voltage to the driving transistor
  • the driving transistor controls the magnitude of the current flowing to the light emitting device according to the information including the data voltage, the driving transistor threshold voltage, the first power voltage, and the compensation signal line voltage under the control of the light emission control unit to drive the light emitting device to emit light.
  • This embodiment provides an array substrate including the pixel driving circuit of the first embodiment or the second embodiment described above.
  • This embodiment provides a display device including the array substrate described in Embodiment 4.
  • the display device may be: an AMOLED panel, a television, a digital photo frame, a mobile phone, a tablet computer, or the like having any display function.

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Abstract

一种像素驱动电路及其驱动方法，阵列基板及显示装置，其中像素驱动电路包括：数据线（Data），提供数据电压；栅线（Gate），提供扫描电压；第一电源线（ELVDD），提供第一电源电压；第二电源线（ELVSS），提供第二电源电压；发光器件（D1），连接第二电源线（ELVSS）；驱动晶体管（T7），连接第一电源线（ELVDD）；存储电容（C1），第一端（N1）连接驱动晶体管（T7）栅极，将包括数据电压的信息转写至驱动晶体管（T7）栅极；复位单元，将存储电容（C1）两端电压复位为预定电压；数据写入单元，向存储电容（C1）第二端（N2）写入包括数据电压的信息；补偿单元，向存储电容（C1）第一端（N1）写入包括驱动晶体管（T7）阈值电压的信息以及第一电源电压的信息；及发光控制单元，连接存储电容（C1）、驱动晶体管（T7）和发光器件（D1），控制驱动晶体管（T7）驱动发光器件（D1）发光。该方案能够补偿和消除驱动晶体管（T7）阈值电压差造成的显示不均。

Description

像素驱动电路、驱动方法、阵列基板及显示装置 技术领域
本公开涉及一种像素驱动电路、驱动方法、阵列基板及显示装置。
背景技术
有机电致发光二极管(Organic Light-Emitting Diode，OLED)作为一种电流型发光器件已越来越多地被应用于高性能有源矩阵发光有机电致显示器中。传统的无源矩阵有机电致发光显示器件(Passive Matrix OLED)随着显示尺寸的增大，需要更短的单个像素的驱动时间，因而需要增大瞬态电流，导致功耗增加。同时大电流的应用会造成氧化铟锡金属氧化物线上压降过大，并使OLED工作电压过高，进而降低其效率。而有源矩阵有机电致发光显示管(Active Matrix OLED，AMOLED)通过开关晶体管逐行扫描输入OLED电流，可以很好地解决这些问题。
在AMOLED的像素电路设计中，主要需要解决的问题是各AMOLED像素驱动单元所驱动的OLED器件亮度的非均匀性。
首先，AMOLED采用薄膜晶体管(Thin-Film Transistor，TFT)构建像素驱动单元为发光器件提供相应的驱动电流。如本领域中已知的，大多采用低温多晶硅薄膜晶体管或氧化物薄膜晶体管。与一般的非晶硅薄膜晶体管相比，低温多晶硅薄膜晶体管和氧化物薄膜晶体管具有更高的迁移率和更稳定的特性，更适合应用于AMOLED显示中。但是由于晶化工艺的局限性，在大面积玻璃基板上制作的低温多晶硅薄膜晶体管，常常在诸如阈值电压、迁移率等电学参数上具有非均匀性，这种非均匀性会转化为OLED器件的驱动电流差异和亮度差异，并被人眼所感知，即色不均现象。氧化物薄膜晶体管虽然工艺的均匀性较好，但是与非晶硅薄膜晶体管类似，在长时间加压和高温下，其阈值电压会出现漂移。由于显示画面不同，面板各部分薄膜晶体管的阈值漂移量不同，会造成显示亮度差异。由于这种差异与之前显示的图像有关，因此常呈现为残影现象。
由于OLED的发光器件是电流驱动器件，因此，在驱动发光器件发光的像素驱动单元中，其驱动晶体管的阈值特性对驱动电流和最终显示的亮度影响很大。驱动晶体管受到电压应力和光照都会使其阈值发生漂移，这种阈值漂 移会在显示效果上体现为亮度不均。
另外，现有AMOLED的像素电路为了消除驱动晶体管阈值电压差所造成的影响，通常会将像素电路的结构设计的比较复杂，这会直接导致AMOLED的像素电路制作良品率的降低。
因此，为解决上述问题，本公开急需提供一种像素驱动单元及其驱动方法、像素电路。
发明内容
按照本公开的一个方面，提供一种像素驱动电路，包括：
数据线，用于提供数据电压；
栅线，用于提供扫描电压；
第一电源线，用于提供第一电源电压；
第二电源线，用于提供第二电源电压；
发光器件，连接所述第二电源线；
驱动晶体管，连接所述第一电源线；
存储电容，其第一端连接驱动晶体管的栅极，用于将包括数据电压的信息转写至驱动晶体管的栅极；
复位单元，用于将所述存储电容两端的电压复位为预定电压；
数据写入单元，连接栅线、数据线及所述存储电容的第二端，用于向所述存储电容的第二端写入包括数据电压的信息，
补偿单元，连接栅线、存储电容的第一端和驱动晶体管，用于向存储电容的第一端写入包括驱动晶体管阈值电压的信息以及第一电源电压的信息；
发光控制单元，连接所述存储电容、驱动晶体管和所述发光器件，用于控制所述驱动晶体管驱动发光器件发光；
其中，所述驱动晶体管用于在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压以及第一电源电压的信息控制流向发光器件的电流大小。
可替换地，所述复位单元包括：复位控制线、复位信号线、第一晶体管和第二晶体管，所述第一晶体管的栅极连接所述复位控制线、源极连接所述复位信号线、漏极连接所述存储电容的第一端，所述第一晶体管用于将复位信号线电压写入所述存储电容的第一端；所述第二晶体管的栅极连接所述复 位控制线、源极连接所述数据线、漏极连接所述存储电容的第二端，所述第二晶体管用于将数据电压写入所述存储电容的第二端。
可替换地，所述第一晶体管和第二晶体管均为P型晶体管。
可替换地，所述数据写入单元包括：第四晶体管；所述第四晶体管的栅极连接所述栅线、源极连接所述数据线、漏极连接所述存储电容的第二端，所述第四晶体管用于将数据电压写入存储电容的第二端。
可替换地，所述第四晶体管为P型晶体管。
可替换地，所述补偿单元包括：第三晶体管；所述第三晶体管的栅极连接所述栅线、源极连接所述存储电容的第一端、漏极连接所述驱动晶体管的漏极，所述第三晶体管用于将包括驱动晶体管的阈值电压信息以及第一电源电压的信息写入所述存储电容的第一端。
可替换地，所述第三晶体管为P型晶体管。
可替换地，还包括补偿信号线，所述发光控制单元包括：发光控制线、第五晶体管和第六晶体管；所述第五晶体管的栅极连接所述发光控制线、源极连接所述补偿信号线、漏极连接所述存储电容的第二端，所述第五晶体管用于将补偿信号线电压写入存储电容的第二端，并由存储电容转写至驱动晶体管栅极；所述第六晶体管的栅极连接所述发光控制线、源极连接所述发光器件的第一端、漏极连接所述驱动晶体管的漏极，所述第六晶体管用于控制发光器件发光，所述驱动晶体管用于在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压、第一电源电压和补偿信号线电压的信息控制流向发光器件的电流大小。
可替换地，所述发光控制单元包括：发光控制线、第五晶体管和第六晶体管；所述第五晶体管的栅极连接所述发光控制线、源极连接所述第一电源线、漏极连接所述存储电容的第二端，所述第五晶体管用于将所述第一电源电压写入存储电容的第二端，并由存储电容转写至驱动晶体管栅极；所述第六晶体管的栅极连接所述发光控制线、源极连接所述发光器件的第一端、漏极连接所述驱动晶体管的漏极，所述第六晶体管用于控制发光器件发光，所述驱动晶体管用于在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压、第一电源电压的信息控制流向发光器件的电流大小。
可替换地，所述第五晶体管和第六晶体管均为P型晶体管。
可替换地，所述驱动晶体管均为P型晶体管。
本公开还提供了一种上述任一项所述的像素驱动电路的驱动方法，包括如下过程：
复位阶段，所述复位单元复位所述存储电容两端的电压为预定电压；
数据电压写入阶段，所述数据写入单元向所述存储电容的第二端写入数据电压，所述补偿单元向存储电容的第一端写入包括驱动晶体管的阈值电压信息以及第一电源电压信息；
发光阶段，所述存储电容将包括数据电压的信息转写至驱动晶体管的栅极，所述驱动晶体管在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压以及第一电源电压的信息控制流向发光器件的电流大小，以驱动所述发光器件发光。
可替换地，所述复位阶段中，所述复位单元复位所述存储电容两端的电压分别为复位信号线电压和数据电压。
可替换地，所述发光阶段还包括：所述发光控制单元向所述存储电容的第二端写入补偿信号线电压，所述存储电容将包括所述补偿信号线电压以及包括数据电压的信息转写至驱动晶体管的栅极，所述驱动晶体管在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压、第一电源电压和补偿信号线电压的信息控制流向发光器件的电流大小，以驱动所述发光器件发光。
可替换地，所述发光阶段还包括：所述发光控制单元向所述存储电容的第二端写入第一电源电压，所述存储电容将包括所述第一电源电压以及包括数据电压的信息转写至驱动晶体管的栅极，所述驱动晶体管在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压及第一电源电压的信息控制流向发光器件的电流大小，以驱动所述发光器件发光。
本公开实施例的像素驱动单元，通过驱动晶体管的栅极和漏极相连的结构(当栅极控制信号开启时，驱动晶体管的栅极与漏极通过第三开关晶体管相连)，使所述驱动晶体管的漏极将所述第一电源电压连同所述驱动晶体管的阈值电压一起加载至存储电容第一端，并以此抵消驱动晶体管的阈值电压。这样，可以在对发光器件进行驱动的过程中，有效地消除驱动晶体管由自身阈值电压所造成的非均匀性和因阈值电压漂移造成的残影现象，并且避免了有源矩阵发光有机电致显示管中不同像素驱动单元的发光器件之间因其驱动晶体管的阈值电压不同而造成的有源矩阵发光有机电致显示管亮度不均的问 题。同时，提高了像素驱动单元对发光器件的驱动效果，进一步提高了有源矩阵发光有机电致显示管的品质。
附图说明
图1是本公开实施例的一种像素驱动电路的示意图；
图2是图1中像素驱动电路的时序图；
图3是本公开实施例的另一种像素驱动电路的示意图；
图4是图3中像素驱动电路的时序图。
具体实施方式
下面结合附图对本公开的具体实施方式作进一步详细描述。以下所列举的实施例仅用于说明本公开的原理，但不用来限制本公开的范围。
需要说明的是，本公开实施例中所定义的各晶体管的栅极为控制晶体管开启的一端，源极和漏极是晶体管除栅极以外的两端。此处源极和漏极只是为了方便说明晶体管的连接关系，并不是对电流走向所做的限定。本领域技术人员可以根据晶体管的类型、信号连接方式等内容清楚的知道其工作的原理和状态。
第一实施例
图1示出本公开第一实施例的像素驱动电路的示意图。如图1所示，该像素驱动电路包括：数据线Data、栅线Gate、第一电源线ELVDD、第二电源线ELVSS、发光器件D1、驱动晶体管T7、存储电容C1、复位单元、数据写入单元、补偿单元及发光控制单元。在图1所示电路中，发光器件D1可以为有机发光二极管；数据线Data用于提供数据电压；栅线Gate用于提供扫描电压；第一电源线ELVDD用于提供第一电源电压，第二电源线ELVSS用于提供第二电源电压。
复位单元用于复位存储电容C1两端的电压为预定电压。
数据写入单元连接栅线Gate、数据线Data及存储电容C1的第一端(N1点)，用于向存储电容C1的第二端(N2点)写入包括数据电压的信息。
补偿单元连接栅线Gate、存储电容C1的第一端和驱动晶体管T7，用于向存储电容C1的第一端写入包括驱动晶体管阈值电压的信息以及第一电源电压的信息。
发光控制单元连接存储电容C1、驱动晶体管T7和发光器件D1，用于控制驱动晶体管T7驱动发光器件发光。驱动晶体管T7连接第一电源线ELVDD，发光器件D1连接第二电源线ELVSS，所述驱动晶体管T7用于在发光控制单元的控制下根据数据电压控制流向发光器件D1的电流大小。
存储电容C1的第一端N1连接驱动晶体管T7的栅极，用于将包括数据电压的信息转写至驱动晶体管T7的栅极。
驱动晶体管T7连接第一电源线ELVDD，发光器件D1连接第二电源线ELVSS。驱动晶体管T7用于在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压以及第一电源电压的信息控制流向发光器件的电流大小。
本实施例的驱动电路中，通过补偿单元提取驱动晶体管的阈值电压，在对发光器件进行驱动的过程中能够与驱动晶体管T7的阈值电压进行抵销，从而可以有效地消除驱动晶体管由自身阈值电压所造成的非均匀性和因阈值电压漂移造成的残影现象，避免了有源矩阵有机电致发光显示器件中不同像素因其驱动晶体管的阈值电压不同而造成的显示亮度不均的问题。
如图1所示，在本实施例中，复位单元包括：复位控制线Reset、复位信号线int、第一晶体管T1和第二晶体管T2。第一晶体管T1的栅极连接复位控制线Reset、源极连接复位信号线int、漏极连接存储电容C1的第一端N1。第一晶体管T1用于将复位信号线int的电压Vint写入存储电容C1的第一端N1。第二晶体管T2的栅极连接复位控制线Reset、源极连接数据线Data、漏极连接存储电容C1的第二端N2。第二晶体管T2用于将数据线Data的电压Vdata写入存储电容C1的第二端N2。即将电容C1两端的电压分别复位为Vint和Vdata。复位后，存储电容C1的第二端N为数据电位，不会被拉低至一个较低的电位。在该电路的数据电压写入阶段时，由于N2点电位已经被写入为数据电位，因此在这一阶段N2点电位不会发生跳变。这样就避免了N2点电位的跳动，从而避免了N1点电位随N2点电位不同而不同的问题。
数据写入单元包括：第四晶体管T4。第四晶体管T4的栅极连接栅线Gate、源极连接数据线Data、漏极连接存储电容C1的第二端N2。第四晶体管T4用于将数据电压Vdata写入存储电容的第二端N2，即使N2点的电压为Vdata。
第三晶体管T3的栅极连接栅线Gate、源极连接存储电容C1的第一端N1、漏极连接驱动晶体管T7的漏极。第三晶体管T3用于将包括第一电源电压Vdd和 驱动晶体管T7的阈值电压Vth的信息写入存储电容C1的第一端N1，即此时N1点的电压为Vdd－Vth。
发光控制单元包括：发光控制线EM、第五晶体管T5和第六晶体管T6。第五晶体管T5的栅极连接发光控制线EM、源极连接第一电源线ELVDD、漏极连接存储电容C1的第二端N2。第五晶体管T5用于将第一电源电压写入存储电容的第二端N2，并由存储电容C1转写至驱动晶体管T7的栅极。第六晶体管T6的栅极连接发光控制线EM、源极连接发光器件D1的第一端、漏极连接驱动晶体管T7的漏极。第六晶体管T6用于控制发光器件D1发光，即T6开启时驱动晶体管T7才能驱动电流流向发光器件D1。驱动晶体管T7用于在发光控制单元的控制下根据包括数据电压、驱动晶体管阈值电压、第一电源电压的信息控制流向发光器件的电流大小。
本实施例的像素驱动单元，通过驱动晶体管T7的栅极和漏极相连的结构(当栅极控制信号开启时，驱动晶体管T7的栅极与漏极通过第三开关晶体管T3相连)，在对发光器件进行驱动的过程中能够与驱动晶体管T7的阈值电压进行抵销，从而可以有效地消除驱动晶体管由自身阈值电压所造成的非均匀性和因阈值电压漂移造成的残影现象。这样一来，避免了有源矩阵发光有机电致显示管中不同像素驱动单元的发光器件之间因其驱动晶体管的阈值电压不同而造成的有源矩阵发光有机发光器件管显示亮度不均的问题，并且提高了像素驱动单元对发光器件的驱动效果，进一步提高了有源矩阵发光有机电致显示管的品质。
如图2所示，本实施例的电路结构的工作过程包括三个阶段：
第一阶段t1：复位控制线Reset信号有效，T1，T2开启，对存储电容C1两端进行复位。此时，N1点写入复位信号线int的电压Vint，N2点为数据电压Vdata。
第二阶段t2：栅线信号有效，使得T3、T4开启。N2点写入Vdata，N1点写入Vdd－Vth。此时存储电容C1存储的电压为Vdd－Vth－Vdata。在本阶段中，T3将包括第一电源电压信息和驱动晶体管的阈值电压的信息写入所述存储电容C1的第一端N1。
第三阶段t3：发光控制线EM的信号有效，T5、T6开启。N2点电位为Vdd，N1点电位为Vdd－Vth－Vdata+Vdd，这也就是驱动晶体管的栅极电位。驱动晶体管的源极电位为Vdd，栅源电压Vgs为Vdd－Vth－Vdata+Vdd－Vdd，流向发光器 件的电流为I＝1/2μCox(W/L)(Vgs－Vth)2＝1/2μCox(W/L)(Vdd－Vdata)2。其中，μ为载流子迁移率，Cox为栅氧化层电容，W/L为驱动晶体管的宽长比。
由上述流向发光器件的电流的公式可看出，该电流I已经与驱动晶体管T7的阈值电压Vth无关。因此避免了有源矩阵有机电致发光显示器件中不同像素因其驱动晶体管的阈值电压不同而造成的显示亮度不均的问题。
第二实施例
图3示出本公开第二实施例的像素驱动电路的示意图。
在第一实施例中，T5连接第一电源线ELVDD，第一电源线ELVDD上电流电阻压降(IR drop)导致电压Vdd变化。因此，T5在对C1的第二端(N2点)充电时，不同像素单元的驱动晶体管的栅极电压会有差异，Vdd下降对电流的影响会导致的不同像素的亮度不均的问题。
因此本实施例的像素驱动电路还包括补偿信号线，用于补偿第一电源电压变化。
如图3所示，本实施例的像素驱动电路的结构与第一实施例基本相同。不同的是本实施例中的像素驱动电路还包括补偿信号线Ref。发光控制单元的第五晶体管T5的源极连接该补偿信号线Ref。第五晶体管T5用于将补偿信号线电压Vref写入存储电容C1的第二端N2，并由存储电容C1转写至驱动晶体管T7栅极。第六晶体管T6的栅极连接所述发光控制线EM、源极连接发光器件D1的第一端、漏极连接驱动晶体管T7的漏极。第六晶体管用于控制发光器件发光。驱动晶体管T7用于在发光控制单元的控制下根据包括数据电压、驱动晶体管阈值电压、第一电源电压、第一电源电压变化信息和补偿信号线电压的信息控制流向发光器件D1的电流大小。
如图4所示，本实施例的电路结构的工作过程包括三个阶段：
第一阶段t1：复位控制线Reset信号有效，使得T1，T2开启，对存储电容C1两端进行复位。此时，N1点写入复位信号线int的电压Vint，N2点为数据电压Vdata。
第二阶段t2：栅线信号有效，使得T3、T4开启，N2点写入Vdata，N1点写入Vdd－Vth，此时存储电容C1存储的电压为Vdd－Vth－Vdata。本阶段T3将包括第一电源电压信息和驱动晶体管的阈值电压的信息写入所述存储电容C1的第一端。
第三阶段t3：发光控制线EM的信号有效，T5、T6开启。与第一实施例 不同，T5连接补偿信号线Ref，N2点电位为Vref，N1点电位为Vdd－Vth－Vdata+Vref，这也就是驱动晶体管的栅极电位。驱动晶体管的源极电位为Vdd，栅源电压Vgs为Vdd－Vth－Vdata+Vref－Vdd，流向发光器件的电流为I＝1/2μCox(W/L)(Vgs－Vth)2＝1/2μCox(W/L)(Vref－Vdata)2。其中，μ为载流子迁移率，Cox为栅氧化层电容，W/L为驱动晶体管的宽长比。
由上述流向发光器件的电流的公式可看出，该电流I已经与驱动晶体管T7的阈值电压Vth无关，因此避免了有源矩阵有机电致发光显示器件中不同像素因其驱动晶体管的阈值电压不同而造成的显示亮度不均的问题。而且该电流I与Vdd无关，Vref只是对存储电容充电，相应线路上电流较小，电压降也就较小。存储电容C1与驱动晶体管的栅极连接，因为Vref相对Vdd稳定，驱动晶体管的栅极电压也就较稳定。相对由Vdd对电容充电(实施例1)的方式，可以避免Vdd下降对电流的影响导致的不同像素的亮度不均的问题。
上述第一实施例和第二实施例中的驱动晶体管、第一晶体管、第二晶体管、第三晶体管、第四晶体管、第五晶体管、第六晶体管均为P型晶体管。当然也可以是N型，或P型和N型的组合，只是栅极控制信号线的有效信号不同。
第三实施例
本公开提供了一种上述第一实施例或第二实施例的像素驱动电路的像素驱动方法，包括以下过程：
在复位阶段中，复位单元将所述存储电容两端的电压复位为预定电压；
在数据电压写入阶段中，数据写入单元向所述存储电容的第二端写入数据电压，补偿单元向存储电容的第一端写入包括驱动晶体管的阈值电压信息以及第一电源电压信息；
在发光阶段中，存储电容将包括数据电压的信息转写至驱动晶体管的栅极，驱动晶体管在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压以及第一电源电压的信息控制流向发光器件的电流大小，以驱动所述发光器件发光。
在复位阶段中，复位单元将存储电容两端的电压分别复位为复位信号线电压和数据电压。
对于第一实施例的电路，发光阶段还包括：发光控制单元向存储电容的第二端写入第一电源电压，存储电容将包括第一电源电压以及包括数据电压的信息转写至驱动晶体管的栅极，驱动晶体管在发光控制单元的控制下根据 包括数据电压、驱动晶体管阈值电压、第一电源电压的信息控制流向发光器件的电流大小，以驱动发光器件发光。
对于第二实施例的电路，发光阶段还包括：发光控制单元向存储电容的第二端写入补偿信号线电压，存储电容将包括补偿信号线电压以及包括数据电压的信息转写至驱动晶体管的栅极，驱动晶体管在发光控制单元的控制下根据包括数据电压、驱动晶体管阈值电压、第一电源电压和补偿信号线电压的信息控制流向发光器件的电流大小，以驱动发光器件发光。
该像素驱动方法的其他步骤可参见第一实施例和第二实施例的三个工作阶段的介绍，此处不再赘述。
第四实施例
本实施例提供了一种阵列基板，包括上述第一实施例或第二实施例的像素驱动电路。
第五实施例
本实施例提供了一种显示装置，包括实施例4所述的阵列基板。该显示装置可以为：AMOLED面板、电视、数码相框、手机、平板电脑等具有任何显示功能的产品或部件。
以上实施方式仅用于说明本公开的原理，而并非对本公开的限制，本领域的普通技术人员，在不脱离本公开的精神和范围的情况下，还可以做出各种变化和变型，因此所有这些变化和变型及其等同的技术方案也属于本公开的范畴，本公开的专利保护范围应由所附权利要求来限定。
本申请要求于2014年6月13日递交的中国专利申请第201410265420.2号的优先权，在此全文引用该中国专利申请公开的内容作为本申请的一部分。

Claims (17)

  1. 一种像素驱动电路，包括：
    数据线，用于提供数据电压；
    栅线，用于提供扫描电压；
    第一电源线，用于提供第一电源电压；
    第二电源线，用于提供第二电源电压；
    发光器件，连接所述第二电源线；
    驱动晶体管，连接所述第一电源线；
    存储电容，其第一端连接驱动晶体管的栅极，用于将包括数据电压的信息转写至驱动晶体管的栅极；
    复位单元，用于将所述存储电容两端的电压复位为预定电压；
    数据写入单元，连接栅线、数据线及所述存储电容的第二端，用于向所述存储电容的第二端写入包括数据电压的信息，
    补偿单元，连接栅线、存储电容的第一端和驱动晶体管，用于向存储电容的第一端写入包括驱动晶体管阈值电压的信息以及第一电源电压的信息；
    发光控制单元，连接所述存储电容、所述驱动晶体管和所述发光器件，用于控制所述驱动晶体管驱动发光器件发光；
    其中，所述驱动晶体管用于在所述发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压以及第一电源电压的信息控制流向发光器件的电流大小。
  2. 如权利要求1所述的像素驱动电路，其中，所述复位单元包括：复位控制线、复位信号线、第一晶体管和第二晶体管，所述第一晶体管的栅极连接所述复位控制线、源极连接所述复位信号线、漏极连接所述存储电容的第一端，所述第一晶体管用于将复位信号线电压写入所述存储电容的第一端；所述第二晶体管的栅极连接所述复位控制线、源极连接所述数据线、漏极连接所述存储电容的第二端，所述第二晶体管用于将数据电压写入所述存储电容的第二端。
  3. 如权利要求2所述的像素驱动电路，其中，所述第一晶体管和第二晶体管均为P型晶体管。
  4. 如权利要求1-3之一所述的像素驱动电路，其中，所述数据写入单元 包括：第四晶体管；所述第四晶体管的栅极连接所述栅线、源极连接所述数据线、漏极连接所述存储电容的第二端，所述第四晶体管用于将数据电压写入存储电容的第二端。
  5. 如权利要求4所述的像素驱动电路，其中，所述第四晶体管为P型晶体管。
  6. 如权利要求1-5之一所述的像素驱动电路，其中，所述补偿单元包括：第三晶体管；所述第三晶体管的栅极连接所述栅线、源极连接所述存储电容的第一端、漏极连接所述驱动晶体管的漏极，所述第三晶体管用于将包括驱动晶体管的阈值电压信息以及第一电源电压的信息写入所述存储电容的第一端。
  7. 如权利要求6所述的像素驱动电路，其中，所述第三晶体管为P型晶体管。
  8. 如权利要求1-7之一所述的像素驱动电路，其中，还包括补偿信号线，所述发光控制单元包括：发光控制线、第五晶体管和第六晶体管；所述第五晶体管的栅极连接所述发光控制线、源极连接所述补偿信号线、漏极连接所述存储电容的第二端，所述第五晶体管用于将补偿信号线电压写入存储电容的第二端，并由存储电容转写至驱动晶体管栅极；所述第六晶体管的栅极连接所述发光控制线、源极连接所述发光器件的第一端、漏极连接所述驱动晶体管的漏极，所述第六晶体管用于控制发光器件发光，所述驱动晶体管用于在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压、第一电源电压和补偿信号线电压的信息控制流向发光器件的电流大小。
  9. 如权利要求1-7之一所述的像素驱动电路，其中，所述发光控制单元包括：发光控制线、第五晶体管和第六晶体管；所述第五晶体管的栅极连接所述发光控制线、源极连接所述第一电源线、漏极连接所述存储电容的第二端，所述第五晶体管用于将所述第一电源电压写入存储电容的第二端，并由存储电容转写至驱动晶体管栅极；所述第六晶体管的栅极连接所述发光控制线、源极连接所述发光器件的第一端、漏极连接所述驱动晶体管的漏极，所述第六晶体管用于控制发光器件发光，所述驱动晶体管用于在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压、第一电源电压的信息控制流向发光器件的电流大小。
  10. 如权利要求8或9所述的像素驱动电路，其中，所述第五晶体管和第 六晶体管均为P型晶体管。
  11. 如权利要求1-9中任一项所述的像素驱动电路，其中，所述驱动晶体管均为P型晶体管。
  12. 一种如权利要求1-11中任一项所述的像素驱动电路的驱动方法，其中，包括如下步骤：
    在复位阶段中，由所述复位单元将所述存储电容两端的电压复位为预定电压；
    在数据电压写入阶段中，由所述数据写入单元向所述存储电容的第二端写入数据电压，由所述补偿单元向存储电容的第一端写入包括驱动晶体管的阈值电压信息以及第一电源电压信息；
    在发光阶段中，由所述存储电容将包括数据电压的信息转写至驱动晶体管的栅极，所述驱动晶体管在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压以及第一电源电压的信息控制流向发光器件的电流大小，以驱动所述发光器件发光。
  13. 如权利要求12所述的驱动方法，其中，在所述复位阶段中，由所述复位单元将所述存储电容两端的电压分别复位为复位信号线电压和数据电压。
  14. 如权利要求12或13所述的驱动方法，其中，
    在所述发光阶段中还包括步骤：由所述发光控制单元向所述存储电容的第二端写入补偿信号线电压，由所述存储电容将包括所述补偿信号线电压以及包括数据电压的信息转写至驱动晶体管的栅极，所述驱动晶体管在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压、第一电源电压和补偿信号线电压的信息控制流向发光器件的电流大小，以驱动所述发光器件发光。
  15. 如权利要求12或13所述的驱动方法，其中，在所述发光阶段中还包括步骤：由所述发光控制单元向所述存储电容的第二端写入第一电源电压，由所述存储电容将包括所述第一电源电压以及包括数据电压的信息转写至驱动晶体管的栅极，所述驱动晶体管在发光控制单元的控制下根据包括所述数据电压、驱动晶体管阈值电压及第一电源电压的信息控制流向发光器件的电流大小，以驱动所述发光器件发光。
  16. 一种阵列基板，包括如权利要求1-11中任一项所述的像素驱动电路。
  17. 一种显示装置，包括如权利要求16所述的阵列基板。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108877667A (zh) * 2018-07-26 2018-11-23 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示面板及显示装置

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9997105B2 (en) * 2015-03-26 2018-06-12 Boe Technology Group Co., Ltd. OLED pixel driving circuit and driving method and OLED display apparatus
CN104778923B (zh) * 2015-04-28 2016-06-01 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示装置
CN106710526B (zh) * 2017-02-23 2018-11-02 京东方科技集团股份有限公司 像素电路及其驱动管阈值电压的补偿方法、显示装置
CN106952617B (zh) * 2017-05-18 2019-01-25 京东方科技集团股份有限公司 像素驱动电路及方法、显示装置
CN106952613B (zh) * 2017-05-27 2019-05-07 上海天马有机发光显示技术有限公司 有机发光像素电路、显示装置及有机发光像素电路的驱动方法
CN107204173B (zh) * 2017-06-08 2019-06-28 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示面板
TWI643332B (zh) * 2017-08-30 2018-12-01 友達光電股份有限公司 顯示裝置
KR102623352B1 (ko) * 2017-09-28 2024-01-09 엘지디스플레이 주식회사 유기발광표시장치 및 그의 구동방법
JP6781176B2 (ja) * 2018-02-22 2020-11-04 株式会社Ｊｏｌｅｄ 画素回路および表示装置
CN108777131B (zh) * 2018-06-22 2020-04-03 武汉华星光电半导体显示技术有限公司 Amoled像素驱动电路及驱动方法
CN109410844B (zh) * 2018-10-29 2023-12-29 武汉华星光电技术有限公司 像素驱动电路及显示装置
CN109523953A (zh) * 2018-12-21 2019-03-26 深圳市华星光电半导体显示技术有限公司 有源矩阵有机发光二极管像素驱动电路
CN109671394A (zh) * 2019-02-21 2019-04-23 深圳市华星光电半导体显示技术有限公司 Oled像素驱动电路和oled显示器
CN110675822A (zh) * 2019-09-30 2020-01-10 昆山国显光电有限公司 像素驱动电路及像素驱动电路的控制方法
TWI734463B (zh) * 2020-05-05 2021-07-21 友達光電股份有限公司 具檢測功能的畫素驅動裝置
CN111754922A (zh) * 2020-07-24 2020-10-09 武汉华星光电半导体显示技术有限公司 像素驱动电路及其驱动方法、显示面板

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005128521A (ja) * 2003-09-30 2005-05-19 Sanyo Electric Co Ltd 有機ｅｌ画素回路
US20070040772A1 (en) * 2005-08-22 2007-02-22 Yang-Wan Kim Pixel circuit of organic electroluminescent display device and method of driving the same
CN102956185A (zh) * 2012-10-26 2013-03-06 京东方科技集团股份有限公司 一种像素电路及显示装置
CN103077680A (zh) * 2013-01-10 2013-05-01 上海和辉光电有限公司 一种oled像素驱动电路
CN103226931A (zh) * 2013-04-27 2013-07-31 京东方科技集团股份有限公司 像素电路和有机发光显示器
CN203882587U (zh) * 2014-06-13 2014-10-15 京东方科技集团股份有限公司 像素驱动电路、阵列基板及显示装置

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3629939B2 (ja) * 1998-03-18 2005-03-16 セイコーエプソン株式会社 トランジスタ回路、表示パネル及び電子機器
CN1293421C (zh) * 2001-12-27 2007-01-03 Lg.菲利浦Lcd株式会社 电致发光显示面板及用于操作它的方法
KR100906964B1 (ko) * 2002-09-25 2009-07-08 삼성전자주식회사 유기 전계발광 구동 소자와 이를 갖는 유기 전계발광 표시패널
KR100502912B1 (ko) * 2003-04-01 2005-07-21 삼성에스디아이 주식회사 발광 표시 장치 및 그 표시 패널과 구동 방법
TW200540774A (en) * 2004-04-12 2005-12-16 Sanyo Electric Co Organic EL pixel circuit
KR101458373B1 (ko) * 2008-10-24 2014-11-06 엘지디스플레이 주식회사 유기전계 발광 디스플레이 장치
KR101509113B1 (ko) * 2008-12-05 2015-04-08 삼성디스플레이 주식회사 표시 장치 및 그 구동 방법
KR101178911B1 (ko) * 2009-10-15 2012-09-03 삼성디스플레이 주식회사 화소 및 이를 이용한 유기전계발광 표시장치
TWI436335B (zh) * 2011-03-17 2014-05-01 Au Optronics Corp 具臨界電壓補償機制之有機發光顯示裝置及其驅動方法
KR101813192B1 (ko) * 2011-05-31 2017-12-29 삼성디스플레이 주식회사 화소 및 이를 포함하는 표시장치, 및 그 구동방법
CN102411893B (zh) * 2011-11-15 2013-11-13 四川虹视显示技术有限公司 一种像素驱动电路
CN103021338B (zh) * 2012-12-24 2015-08-05 北京京东方光电科技有限公司 像素电路及其驱动方法、显示装置
CN103383835B (zh) * 2013-07-02 2015-09-09 京东方科技集团股份有限公司 一种像素电路、显示面板及显示装置
KR20150006145A (ko) * 2013-07-08 2015-01-16 삼성디스플레이 주식회사 화소 및 이를 이용한 유기전계발광 표시장치

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005128521A (ja) * 2003-09-30 2005-05-19 Sanyo Electric Co Ltd 有機ｅｌ画素回路
US20070040772A1 (en) * 2005-08-22 2007-02-22 Yang-Wan Kim Pixel circuit of organic electroluminescent display device and method of driving the same
CN102956185A (zh) * 2012-10-26 2013-03-06 京东方科技集团股份有限公司 一种像素电路及显示装置
CN103077680A (zh) * 2013-01-10 2013-05-01 上海和辉光电有限公司 一种oled像素驱动电路
CN103226931A (zh) * 2013-04-27 2013-07-31 京东方科技集团股份有限公司 像素电路和有机发光显示器
CN203882587U (zh) * 2014-06-13 2014-10-15 京东方科技集团股份有限公司 像素驱动电路、阵列基板及显示装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108877667A (zh) * 2018-07-26 2018-11-23 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示面板及显示装置

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