WO2016004690A1 - 像素结构及其驱动方法、显示装置 - Google Patents

像素结构及其驱动方法、显示装置 Download PDF

Info

Publication number
WO2016004690A1
WO2016004690A1 PCT/CN2014/088396 CN2014088396W WO2016004690A1 WO 2016004690 A1 WO2016004690 A1 WO 2016004690A1 CN 2014088396 W CN2014088396 W CN 2014088396W WO 2016004690 A1 WO2016004690 A1 WO 2016004690A1
Authority
WO
WIPO (PCT)
Prior art keywords
switching transistor
transistor
storage capacitor
voltage
source
Prior art date
Application number
PCT/CN2014/088396
Other languages
English (en)
French (fr)
Inventor
杨盛际
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to EP14882770.2A priority Critical patent/EP3168832A4/en
Priority to US14/778,848 priority patent/US9972248B2/en
Publication of WO2016004690A1 publication Critical patent/WO2016004690A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/033—Pointing devices displaced or positioned by the user, e.g. mice, trackballs, pens or joysticks; Accessories therefor
    • G06F3/0354—Pointing devices displaced or positioned by the user, e.g. mice, trackballs, pens or joysticks; Accessories therefor with detection of 2D relative movements between the device, or an operating part thereof, and a plane or surface, e.g. 2D mice, trackballs, pens or pucks
    • G06F3/03545—Pens or stylus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/033—Pointing devices displaced or positioned by the user, e.g. mice, trackballs, pens or joysticks; Accessories therefor
    • G06F3/0354—Pointing devices displaced or positioned by the user, e.g. mice, trackballs, pens or joysticks; Accessories therefor with detection of 2D relative movements between the device, or an operating part thereof, and a plane or surface, e.g. 2D mice, trackballs, pens or pucks
    • G06F3/03548—Sliders, in which the moving part moves in a plane
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/042—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0465—Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present disclosure relates to a pixel structure, a driving method thereof, and a display device.
  • OLEDs Organic light-emitting display diodes
  • Conventional passive matrix OLEDs require a shorter driving time of a single pixel as the display size increases, and thus it is necessary to increase transient current and increase power consumption.
  • the application of high current will cause the voltage drop on the ITO line to be too large, and the OLED operating voltage is too high, thereby reducing its efficiency.
  • Active matrix OLEDs can solve these problems by scanning the input OLED current progressively by switching transistors.
  • the main problem to be solved is the luminance non-uniformity between pixels and pixels.
  • AMOLED uses thin film transistors (TFTs) to construct pixel circuits to provide corresponding currents for OLED devices, including low temperature polysilicon thin film transistors (LTPS TFTs) or oxide thin film transistors (Oxide TFTs).
  • TFTs thin film transistors
  • LTPS TFTs low temperature polysilicon thin film transistors
  • Oxide TFTs oxide thin film transistors
  • LTPS TFTs and Oxide TFTs have higher mobility and more stable characteristics, and are more suitable for use in AMOLED displays.
  • LTPS TFTs fabricated on large-area glass substrates often have non-uniformities in electrical parameters such as threshold voltage and mobility. This non-uniformity translates into currents of OLED display devices.
  • Oxide TFT has better uniformity of process, but similar to a-Si TFT, its threshold voltage will drift under long-term pressure and high temperature. Due to different display screens, the threshold drift of TFTs in different parts of the panel will be different. This causes a difference in display brightness, and since this difference is related to the previously displayed image, it often appears as an afterimage phenomenon.
  • the backplane power supply line has a certain resistance
  • the driving current of all the pixels is supplied by the first reference voltage source VDD
  • the power supply position region of the first reference voltage source VDD is close to the backplane.
  • the power supply voltage is higher than the power supply voltage in a region far from the power supply location. This phenomenon is called IR Drop. Since the voltage of the first reference voltage source VDD is related to the current, the IR Drop also causes a current difference in different regions, thereby generating mura when displayed.
  • the LTPS process of constructing a pixel unit using a P-type TFT is particularly sensitive to this problem because its storage capacitor is connected between the first reference voltage source VDD and the gate of the driving transistor DTFT, and the voltage of the first reference voltage source VDD changes. Directly affecting the gate-source voltage V gs of the driving transistor DTFT.
  • OLED devices can cause non-uniformity in electrical performance due to uneven film thickness during evaporation.
  • a storage capacitor is connected between the gate of the driving TFT and the anode of the OLED, and when the data voltage is transmitted to the gate, if the anode voltage of each pixel is different, The gate-source voltage Vgs actually loaded on the driving transistor DTFT is different, so that the driving current is different to cause a difference in display luminance.
  • an AMOLED voltage type pixel unit driving circuit is provided.
  • the voltage driving method is similar to the conventional AMLCD driving method.
  • the driving unit provides a voltage signal representing the gray scale, and the voltage signal is converted into a current signal of the driving transistor inside the pixel circuit, thereby driving the OLED to realize the brightness gray scale.
  • This method has the advantages of fast driving speed and simple implementation. It is suitable for driving large-sized panels and is widely used in the industry. However, it is necessary to design additional switching transistors and capacitor devices to compensate for drive transistor DTFT non-uniformity, IR Drop and OLED non-uniformity. .
  • FIG. 1 is a circuit configuration (2T1C) of a voltage-driven pixel unit using two TFTs and one capacitor.
  • the switching transistor T transmits the voltage on the data line to the gate of the driving transistor DTFT, and the driving transistor converts the data voltage into a corresponding current to the OLED device.
  • the drive transistor DTFT should be in the saturation region to provide a constant current during the scan time of one row. Its current can be expressed as:
  • ⁇ n is the carrier mobility
  • C OX is the gate oxide capacitance
  • W/L is the transistor width to length ratio
  • Vdata is the data voltage
  • Voled is the OLED operating voltage
  • Vthn is the threshold voltage of the transistor.
  • Vthn is a positive value for the enhanced driving transistor DTFT
  • Vthn is a negative value for the depletion mode TFT.
  • FIG. 2 is a schematic diagram of a general pixel structure. As shown in FIG.
  • each pixel structure in the pixel structure is arranged in rows and columns. If one compensation unit is disposed in each pixel, the number of compensation transistors is larger, that is, the number of thin film transistors and storage capacitors is also said. The increase in pixel size will be greatly limited.
  • At least one embodiment of the present invention provides a pixel structure that can improve resolution and a method of driving the same.
  • At least one embodiment of the present invention provides a pixel structure including a plurality of pixel units, and a compensation unit corresponding to the pixel unit, each pixel unit including two adjacent first pixel circuits and second pixel circuits, the first pixel
  • the circuit includes: a first driving transistor and a first display device;
  • the second pixel circuit includes: a first driving transistor and a second display device; wherein the first pixel circuit and the second pixel circuit share a compensation unit and are controlled by the same data line ;
  • the compensation unit is configured to adjust a gate voltage of the first driving transistor in the first pixel circuit to eliminate the influence of the threshold voltage of the first driving transistor on the driving current of the first display device, and to use the second pixel circuit
  • the gate voltage of the second driving transistor is adjusted to eliminate the influence of the threshold voltage of the second driving transistor on the driving current of the second display device.
  • the pixel structure of the present invention comprises a plurality of pixel units, each pixel unit comprising two pixel circuits, and the two pixel circuits adjust the threshold voltage of the driving transistor in each pixel circuit by a compensation unit, that is, through one piece of data
  • the line Data controls two pixel circuits, wherein each pixel circuit is equivalent to a part of a normal sub-pixel unit, that is, equivalent to two adjacent sub-pixels controlled by the same data line Data, which may be equivalent to
  • the data line Data in the normal pixel structure is halved, and the compensation unit is shared, and the number of thin film transistors in the compensation unit can be reduced, so that the size of the pixel can be greatly reduced and the cost of the driving chip (IC) can be reduced, thereby obtaining more High image quality and higher resolution (PPI).
  • At least one embodiment of the present invention further provides an image for the above
  • the driving method of the prime structure includes:
  • the gate voltage of the first driving transistor in the first pixel circuit is adjusted by the compensation unit to eliminate the influence of the threshold voltage of the first driving transistor on the driving current of the first display device, and the second The gate voltage of the second driving transistor in the pixel circuit is adjusted to eliminate the influence of the threshold voltage of the second driving transistor on the driving current of the second display device.
  • the compensation unit includes: a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, a fifth switching transistor, a sixth switching transistor, a seventh switching transistor, an eighth switching transistor, and a ninth a switching transistor, a tenth switching transistor, a first storage capacitor, and a second storage capacitor;
  • a gate of the first switching transistor is connected to a gate of the second switching transistor, a gate of the seventh switching transistor, a first lighting control line, and a source and a source of the second switching transistor are connected to the first reference voltage source, and the drain a pole is connected to a source of the fourth switching transistor and a source of the first driving transistor;
  • a gate of the second switching transistor is connected to a gate of the eighth switching transistor, and a drain is connected to a source of the fifth switching transistor and a source of the second driving transistor;
  • a gate of the third switching transistor is connected to a gate of the fourth switching transistor and a first scan line, a source is connected to the data line, and a drain is connected to a source of the second end of the first storage capacitor and a source of the seventh switching transistor;
  • a drain of the fourth switching transistor is coupled to the first end of the first storage capacitor and the gate of the first driving transistor;
  • a gate of the fifth switching transistor is connected to a gate of the sixth switching transistor and a second scan line, and a source drain is connected to a first end of the second storage capacitor and a gate of the second driving transistor;
  • a sixth switching transistor has a source connected to the data line, and a drain connected to the second end of the second storage capacitor and the drain of the eighth switching transistor;
  • a drain of the seventh switching transistor is connected to a source of the ninth switching transistor, a drain of the first driving transistor, a first end of the first display device, and a second end of the first display device is grounded;
  • the source of the eighth switching transistor is connected to the source of the tenth switching transistor, the drain of the second driving transistor DTFT2, the first end of the second display device, and the second end of the second display device is grounded;
  • a gate of the ninth switching transistor is connected to a gate of the tenth switching transistor and a second scan line, and the drain is grounded;
  • the drain of the tenth switching transistor is grounded.
  • the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, the fifth switching transistor, the sixth switching transistor, the seventh switching transistor, the eighth switching transistor, and the ninth switching transistor are all N-type thin film transistors.
  • At least one embodiment of the present invention provides a driving method for the above pixel structure, including:
  • a high level is applied to the first scan line, the second scan line, and the first light-emitting control line, and the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, and the fifth switching transistor are The sixth switching transistor, the seventh switching transistor, the eighth switching transistor, the ninth switching transistor, and the tenth switching transistor are all turned on, and the first reference voltage source sets the potential of the first end of the first storage capacitor and the second storage capacitor The potential of the first end is set to a first reference voltage source voltage Vdd, and the data line sets the potential of the second end of the first storage capacitor and the potential of the second end of the second storage capacitor to a first voltage V1;
  • a high level is applied to the first scan line and the second scan line, and a low level is applied to the first light-emitting control line, and the third switching transistor, the fourth switching transistor, the fifth switching transistor, and the sixth switching transistor are The ninth switching transistor and the tenth switching transistor are both turned on, and the first storage capacitor and the second storage capacitor are both discharged, wherein the potential of the first end of the first storage capacitor and the potential of the first end of the second storage capacitor are respectively discharged.
  • a low level is applied to the first scan line and the first light-emitting control line
  • a high level is applied to the second scan line
  • a second voltage V2 is applied to the data line, so that the voltage difference across the first storage capacitor is equal to Vth-V1, the voltage difference across the second storage capacitor is equal to Vth2-V2, where V1>V2;
  • a low level is applied to the first scan line, the second scan line, and the first illumination control line, and the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor, and the fifth switching transistor
  • the sixth switching transistor, the seventh switching transistor, the eighth switching transistor, the ninth switching transistor, and the tenth switching transistor are all turned off, and the voltage difference between the first storage capacitor and the second storage capacitor is stabilized;
  • the second terminal potential of the first storage capacitor changes to the anode of the first display device Potential Voled1
  • the first end potential of the first storage capacitor becomes Vth1-V1+Voled1
  • the second end potential of the second storage capacitor changes to the anode potential Voled2 of the second display device
  • the first end potential of the second storage capacitor becomes For Vth2-V2+Voled2
  • the first driving transistor and the second driving transistor respectively drive the first display device and the second display device to emit light.
  • the compensation unit includes: an eleventh switching transistor, a twelfth switching transistor, a thirteenth switching transistor, a fourteenth switching transistor, a fifteenth switching transistor, a sixteenth switching transistor, and a seventeenth switching transistor , an eighteenth switching transistor, a nineteenth switching transistor, a third storage capacitor, and a fourth storage capacitor;
  • the gate of the eleventh switching transistor is connected to the second illumination control line, the source is connected to the first reference voltage source, and the drain is connected to the source of the first driving transistor and the source of the second driving transistor;
  • a gate line of the twelfth switching transistor is connected to the third scan line, a source is connected to the data line, and a drain is connected to a source of the thirteenth switching transistor and a first end of the third storage capacitor;
  • the gate of the thirteenth switching transistor is connected to the gate of the fourteenth switching transistor and the third light emitting control line, and the drain is grounded;
  • the source of the fourteenth switching transistor is connected to the first end of the fourth storage capacitor and the drain of the fifteenth switching transistor, and the drain is grounded;
  • a gate of the fifteenth switching transistor is connected to the fourth scan line, and a source is connected to the data line;
  • the gate of the sixteenth switching transistor is connected to the gate of the seventeenth switching transistor and the third light emitting control line, and the source is connected to the gate of the first driving transistor and the second end of the third storage capacitor, and the drain and the a drain of a driving transistor is connected to a source of the eighteenth switching transistor;
  • a source of the seventh switching transistor is connected to a gate of the second driving transistor and a second terminal of the fourth storage capacitor, and a drain is connected to a drain of the second driving transistor and a source of the nineteenth switching transistor;
  • the gate of the eighteenth switching transistor is connected to the gate of the nineteenth switching transistor and the fourth light emitting control line, the drain is connected to the first end of the first display device, and the second end of the first display device is grounded;
  • the drain of the nineteenth switching transistor is connected to the first end of the second display device, and the second end of the second display device is grounded.
  • the pixel structure further includes: a capacitive touch unit and a light touch unit connected to the compensation unit,
  • the capacitive touch unit is configured to generate a corresponding electrical signal according to the touch signal, and implement finger touch;
  • the light sensing type touch unit is configured to generate a corresponding electrical signal according to the light intensity signal, and implement the laser pen touch.
  • the capacitive touch unit includes: a first capacitive transistor, a second capacitive transistor, a third capacitive transistor, a fifth storage capacitor, and a touch electrode, wherein
  • the gate of the first capacitive transistor is connected to the optical touch control unit and the third illumination control line, the source is connected to the data line, the first end of the drain and the fifth storage capacitor, and the gate of the second capacitive transistor connection;
  • a source of the second capacitive transistor is connected to a drain of the third capacitive transistor, and a drain is connected to the second end of the fifth storage capacitor and the common electrode;
  • a gate of the third capacitive transistor is connected to the third scan line, and a source is connected to the read line;
  • the touch electrode is connected to the gate of the second capacitive transistor.
  • the light sensing type touch unit includes: a first light sensing transistor, a second light sensing transistor, a third light sensing transistor, a photo transistor, and a sixth storage capacitor, wherein
  • a gate of the phototransistor is connected to a source of the first photo-sensing transistor, a source of the second photo-sensing transistor, and a first end of the sixth storage capacitor, and a second end and a third end of the drain and the sixth storage capacitor a source of the photo-sensing transistor is connected, and a source is connected to a source of the second photo-sensing transistor;
  • the gate of the first photo-sensing transistor is connected to the capacitive touch unit, and the drain is grounded;
  • a gate of the second photo-sensing transistor is connected to the fourth scan line, and a drain is connected to the data line;
  • the gate of the third photo-sensing transistor is connected to the fourth light-emitting control line, and the drain is connected to the read line.
  • the eleventh switching transistor, the twelfth switching transistor, the thirteenth switching transistor, the fourteenth switching transistor, the fifteenth switching transistor, the sixteenth switching transistor, the seventeenth switching transistor, and the eighteenth are all P-type thin film transistors.
  • the first capacitive transistor, the second capacitive transistor, and the third capacitive transistor are all P-type thin film transistors.
  • the first photo-sensing transistor, the second photo-sensing transistor, and the third photo-sensing transistor are all P-type thin film transistors, and the phototransistor is an N-type thin film transistor.
  • At least one embodiment of the present invention further provides a driving method for the above pixel structure, including:
  • a high level is applied to the third scan line, the fourth scan line, and the fourth light-emitting control line, and a low level is applied to the second light-emitting control line and the third light-emitting control line, and the eleventh switching transistor and the first Ten
  • the three-switching transistor, the fourteenth switching transistor, the sixteenth switching transistor, and the seventeenth switching transistor are all turned on, the third storage capacitor and the fourth storage capacitor are both discharged, and the third storage capacitor is discharged to the second terminal potential of Vdd -Vth1, the fourth storage capacitor is discharged to the second terminal potential of Vdd-Vth2, the first end of the third storage capacitor and the first end of the fourth storage capacitor are grounded, the potential is 0V, and the voltage across the third storage capacitor The difference is Vdd-Vth1, and the voltage difference across the fourth storage capacitor is Vdd-Vth2, where Vdd is the first reference voltage source voltage, Vth1 is the threshold voltage of the first driving transistor, and Vth2 is the threshold voltage of the
  • a low level is applied to the third scan line, and a high level is applied to the fourth scan line, the fourth illuminating control line, the second illuminating control line, and the third illuminating control line, the twelfth
  • the switching transistor is turned on, the data line charges the first end of the third storage capacitor to the third voltage V3, and the second terminal of the third storage capacitor has a potential of Vdd ⁇ Vth1+V3;
  • a low level is applied to the fourth scan line, and the third scan line, the second illuminating control line, the third illuminating control line, and the fourth illuminating control line are applied with a high level, and the fifteenth switch
  • the transistor is turned on, the data line charges the first end of the fourth storage capacitor to the fourth voltage V4, and the potential of the second end of the fourth storage capacitor is Vdd ⁇ Vth2+V4, where V4>V3;
  • a high level is applied to the third scan line, the fourth scan line, and the third light emission control line, and a low level is applied to the second light emission control line and the fourth light emission control line, and the eleventh switching transistor and the tenth
  • the eight-switching transistor and the nineteenth switching transistor are turned on, and the first driving transistor and the second driving transistor respectively drive the first display device and the second display device to emit light.
  • the driving method further includes:
  • the first capacitive transistor is turned on, and the data line resets the finger touch point potential to the third voltage V3;
  • the first photo-sensing transistor is turned on to reset the sixth storage capacitor and the phototransistor to ground;
  • the second capacitive transistor and the third capacitive transistor are turned on, the common electrode is coupled to the pulse signal, and the potential of one end of the fifth storage capacitor is provided, and the source voltage of the second capacitive transistor is used;
  • All transistors in the light touch unit are turned off and are in a stagnant state
  • the first capacitive transistor, the second capacitive transistor, and the third capacitive transistor of the capacitive touch unit are all turned off, and are in a stagnant state;
  • the second photo-sensing transistor in the light-sensing touch unit is turned on, and outputs the fourth voltage V4 to the sixth Storage capacitor, sixth storage capacitor charging;
  • the first capacitive transistor, the second capacitive transistor, and the third capacitive transistor of the capacitive touch unit are continuously turned off and are in a stagnant state;
  • the light sensing touch unit collects the touch signal through the reading line.
  • At least one embodiment of the present invention also provides a display device including the above pixel structure.
  • 1 is a circuit configuration diagram of a general voltage-driven type pixel unit
  • FIG. 2 is a schematic view of a general pixel structure
  • FIG. 3 is a schematic diagram of a pixel structure of a first embodiment of the present invention.
  • FIG. 4 is a circuit schematic diagram of a pixel structure in accordance with a second embodiment of the present invention.
  • Figure 5 is a timing diagram of the pixel structure shown in Figure 4.
  • FIG. 6 is another circuit schematic diagram of a pixel structure in accordance with a third embodiment of the present invention.
  • FIG. 7 is a timing chart of the pixel structure shown in FIG. 6.
  • FIG. 3 is a schematic diagram of a pixel structure according to a first embodiment of the present invention.
  • the embodiment provides a pixel structure including a plurality of pixel units (one pixel unit is circled in a dotted line frame), and a compensation unit corresponding to the pixel unit.
  • Each pixel unit includes two adjacent first pixel circuits and a second pixel circuit, the first pixel circuit includes: a first driving transistor and a first display device; and the second pixel circuit includes: a second driving transistor and a second display device Wherein the first pixel circuit and the second pixel circuit share the compensation unit and are controlled by the same data line Data.
  • the compensation unit is configured to adjust a gate voltage of the first driving transistor in the first pixel circuit to eliminate the influence of the threshold voltage of the first driving transistor on the driving current of the first display device, and to be used in the second pixel circuit
  • the gate voltage of the second driving transistor is adjusted to eliminate the influence of the threshold voltage of the second driving transistor on the driving current of the second display device.
  • each of the pixel units includes two pixel circuits, and the two pixel circuits adjust the threshold voltage of the driving transistor in each pixel circuit through a compensation unit, that is, A data line Data is used to control two pixel circuits, that is, two adjacent sub-pixels are controlled by the same data line Data, which can be equivalent to halving the data line Data in the existing pixel structure, and
  • the compensation unit is shared, and the number of thin film transistors in the compensation unit can be reduced, thereby greatly reducing the size of the pixel and reducing the cost of the driver chip (IC), thereby achieving higher image quality and higher resolution (PPI). ).
  • the embodiment further provides a driving method for the above pixel circuit structure, which specifically includes:
  • the gate voltage of the first driving transistor in the first pixel circuit is adjusted by the compensation unit to eliminate the influence of the threshold voltage of the first driving transistor on the driving current of the first display device, and the second The gate voltage of the second driving transistor in the pixel circuit is adjusted to eliminate the influence of the threshold voltage of the second driving transistor on the driving current of the second display device.
  • the threshold voltage of the driving transistors in the two adjacent pixel circuits is simultaneously compensated by one compensation unit, so that the driving process of the structure is simpler.
  • the pixel structure provided in this embodiment includes a plurality of pixel units, and a compensation unit corresponding to the pixel unit.
  • Each of the pixel units includes two adjacent first pixel circuits and a second pixel circuit, the first pixel circuit includes: a first driving transistor DTFT1 and a first display device OLED1; and the second pixel circuit includes: a second driving transistor DTFT2 And a second display device OLED2; wherein the first pixel circuit and the second pixel circuit share a compensation unit and are controlled by the same data line Data.
  • the compensation unit is configured to adjust a gate voltage of the first driving transistor DTFT1 in the first pixel circuit to eliminate the influence of the threshold voltage of the first driving transistor DTFT1 on the driving current of the first display device OLED1, and
  • the gate voltage of the second driving transistor DTFT2 in the two-pixel circuit is adjusted to eliminate the influence of the threshold voltage of the second driving transistor DTFT2 on the driving current of the second display device OLED2.
  • the compensation unit specifically includes a first switching transistor T1, a second switching transistor T2, a third switching transistor T3, a fourth switching transistor T4, a fifth switching transistor T5, a sixth switching transistor T6, and a seventh switching transistor T7, Eight switching transistor T8, ninth switching transistor T9, tenth switching transistor T10, first storage capacitor C1, second storage capacitor C2; wherein the gate of the first switching transistor T1 is connected to the gate of the second switching transistor T2, the gate of the seventh switching transistor T7, the first lighting control line Em1, and the source and the source of the second switching transistor T2.
  • a first reference voltage source VDD is connected, a drain is connected to a source of the fourth switching transistor T4, a source of the first driving transistor DTFT1, and a gate of the second switching transistor T2 is connected to a gate of the eighth switching transistor T8.
  • the drain is connected to the source of the fifth switching transistor T5 and the source of the second driving transistor DTFT2; the gate of the third switching transistor T3 is connected to the gate of the fourth switching transistor T4, the first scanning line Scan1, and the source is The data line Data is connected, and the drain is connected to the second terminal b1 of the first storage capacitor C1 and the source of the seventh switching transistor T7; the drain of the fourth switching transistor T4 and the first end a1 of the first storage capacitor C1 a gate of the driving transistor DTFT1 is connected; a gate of the fifth switching transistor T5 is connected to a gate of the sixth switching transistor T6, a second scanning line Scan2, and a first end a2 and a second of the drain and the second storage capacitor C2 Gate connection of drive transistor DTFT2
  • the source of the sixth switching transistor T6 is connected to the data line Data, the drain is connected to the second terminal b2 of the second storage capacitor C2, the drain of the eighth switching transistor T8, and the drain of the seventh switching transistor T7 is ninth.
  • a source of the switching transistor T9, a drain of the first driving transistor DTFT1, a first end of the first display device OLED1, a second end of the first display device OLED1 is grounded, and a source and a tenth switch of the eighth switching transistor T8
  • the first switching transistor T1, the second switching transistor T2, the third switching transistor T3, the fourth switching transistor T4, and the fifth switching transistor T5, sixth switching transistor T6, seventh switching transistor T7, eighth switching transistor T8, ninth switching transistor T9, tenth switching transistor T10, first driving transistor DTFT1, and second driving transistor DTFT2 are all N-type thin film transistors.
  • FIG. 5 is a timing chart of the pixel structure shown in FIG.
  • a method of driving the pixel structure shown in FIG. 4 according to an embodiment of the present invention will be specifically described below with reference to FIGS. 4 and 5. The method comprises the following steps:
  • the reset phase (first period)
  • a high level is applied to the first scan line Scan1, the second scan line Scan2, and the first light emission control line Em1.
  • the first switching transistor T1 and the second switching transistor T2 Third switching transistor T3, fourth switching transistor T4, fifth switching transistor T5,
  • the sixth switching transistor T6, the seventh switching transistor T7, the eighth switching transistor T8, the ninth switching transistor T9, and the tenth switching transistor T10 are both turned on, and the first reference voltage source VDD is to be the first end a1 of the first storage capacitor C1.
  • the discharge phase (second time period), a high level is applied to the first scan line Scan1 and the second scan line Scan2, and a low level is applied to the first light emission control line Em1.
  • the third switching transistor T3, the fourth switching transistor T4, the fifth switching transistor T5, the sixth switching transistor T6, the ninth switching transistor T9, and the tenth switching transistor T10 are both turned on, the first storage capacitor C1 and the second
  • the storage capacitor C2 is discharged, wherein the potential of the first end a1 of the first storage capacitor C1 and the potential of the first end a2 of the second storage capacitor C2 are respectively discharged to the threshold voltage Vth1 of the first driving transistor DTFT1 and the second driving transistor
  • a low level is applied to the first scan line Scan1 and the first light emission control line Em1
  • a high level is applied to the second scan line Scan2
  • a second voltage V2 is applied to the data line Data.
  • the potential of the second terminal b2 of the second storage capacitor C2 also becomes V2
  • the potential of the first terminal a2 of the second storage capacitor C2 is maintained at Vth2, so that the voltage across the first storage capacitor C1
  • the difference is Vth1-V1
  • the voltage difference across the second storage capacitor C2 is Vth2-V2, where V1>V2.
  • a low level is applied to the first scan line Scan1, the second scan line Scan2, and the first light emission control line Em1.
  • the switching transistor T9 and the tenth switching transistor T10 are both turned off, and the voltage difference across the first storage capacitor C1 and the second storage capacitor C2 is stabilized, and at the same time, the light-emitting phase is prepared.
  • the first scan line Scan1 and the second scan line Scan2 are A low level is applied, and a high level is applied to the first light emission control line Em1.
  • the first switching transistor T1, the second switching transistor T2, the seventh switching transistor T7, and the eighth switching transistor T8 are turned on, and the potential of the second terminal b1 of the first storage capacitor C1 is changed from V1 to the anode potential of the first display device OLED1.
  • the potential of the first end a1 of the first storage capacitor C1 becomes Vth1-V1+Voled1
  • the potential of the second end b2 of the second storage capacitor C2 is changed from V2 to the anode potential Voled2 of the second display device OLED2,
  • the potential of the first end a2 of the storage capacitor C2 becomes Vth2-V2+Voled2
  • the first driving transistor DTFT1 and the second driving transistor DTFT2 drive the first display device OLED1 and the second display device OLED2 to emit light, respectively.
  • the current flowing through the first display device OLED1 can be obtained:
  • the pixel structure can not only achieve high-resolution display, but also avoid the influence of the threshold voltage of the driving transistor on the pixel structure. Thereby, the pixel structure of the embodiment of the present invention is displayed more uniformly.
  • FIG. 6 is a circuit schematic diagram of a pixel structure in accordance with a third embodiment of the present invention.
  • the pixel structure also has a capacitive touch unit and a light sensing touch unit.
  • the pixel structure includes a plurality of pixel units, and a compensation unit, a capacitive touch unit, and a light touch unit corresponding to the pixel unit.
  • Each pixel unit includes two adjacent first pixel circuits and a second pixel circuit
  • the first pixel circuit includes: a first driving transistor DTFT1 and a first display device OLED1
  • the second pixel circuit includes: a second driving transistor DTFT2 and The second display device OLED2; wherein the first pixel circuit and the second pixel circuit share a compensation unit and are controlled by the same data line Data.
  • the compensation unit is configured to adjust a gate voltage of the first driving transistor DTFT1 in the first pixel circuit to eliminate the influence of the threshold voltage of the first driving transistor DTFT1 on the driving current of the first display device OLED1, and the second The gate voltage of the second driving transistor DTFT2 in the pixel circuit is adjusted to eliminate the threshold voltage of the second driving transistor DTFT2 to the second display device The effect of OLED2 drive current.
  • the capacitive touch unit is configured to generate a corresponding electrical signal according to the touch signal and implement finger touch; the light touch control unit is configured to generate a corresponding electrical signal according to the light intensity signal, and implement the laser pen touch.
  • the compensation unit includes: an eleventh switching transistor T11, a twelfth switching transistor T12, a thirteenth switching transistor T13, a fourteenth switching transistor T14, a fifteenth switching transistor T15, a sixteenth switching transistor T16, and a tenth a seventh switching transistor T17, an eighteenth switching transistor T18, a nineteenth switching transistor T19, a third storage capacitor C3, and a fourth storage capacitor C4; wherein the gate of the eleventh switching transistor T11 is connected to the second lighting control line Em2
  • the source is connected to the first reference voltage source VDD, the drain is connected to the source of the first driving transistor DTFT1, and the source of the second driving transistor DTFT2; the gate line of the twelfth switching transistor T12 is connected to the third scanning line Scan3.
  • the source is connected to the data line Data, and the drain is connected to the source of the thirteenth switching transistor T13 and the first terminal a3 of the third storage capacitor C3; the gate of the thirteenth switching transistor T13 and the fourteenth switching transistor T14 The gate is connected to the third light-emitting control line Em3, and the drain is grounded; the source of the fourteenth switching transistor T14 is connected to the drain of the first end a4 of the fourth storage capacitor C4 and the fifteenth switching transistor T15, and the drain
  • the gate of the fifteenth switching transistor T15 is connected to the fourth scan line Scan4, the source is connected to the data line Data, the gate of the sixteenth switching transistor T16 and the gate of the seventeenth switching transistor T17 and the third
  • the light emission control line Em3 is connected, and the source is connected to the gate of the first driving transistor DTFT1 and the second terminal b3 of the third storage capacitor C3, and the drain and the drain of the first driving transistor DTFT1 and the source of the eighteenth switching transistor T18.
  • a source of the seventeenth switching transistor T17 is connected to a gate of the second driving transistor DTFT2 and a second terminal b4 of the fourth storage capacitor C4, and a drain and a drain of the second driving transistor DTFT2 and a nineteenth switch
  • the source of the transistor T19 is connected;
  • the gate of the eighteenth switching transistor T18 is connected to the gate of the nineteenth switching transistor T19 and the fourth light-emitting control line Em4, and the drain is connected to the first end of the first display device OLED1, A second end of the display device OLED1 is grounded;
  • a drain of the nineteenth switching transistor T19 is connected to a first end of the second display device OLED2, and a second end of the second display device OLED2 is grounded.
  • the transistor T17, the eighteenth switching transistor T18, the nineteenth switching transistor T19, the first driving transistor DTFT1, and the second driving transistor DTFT2 are all P-type thin film transistors.
  • the capacitive touch unit includes: a first capacitive transistor M1, a second capacitive transistor M2, a third capacitive transistor M3, a fifth storage capacitor C5, and a touch electrode d, wherein the gate of the first capacitive transistor M1 Connected to the optical touch control unit and the third light-emitting control line Em3, the source is connected to the data line Data, and the drain is connected to the first end of the fifth storage capacitor C5 and the gate of the second capacitive transistor M2; The source of the capacitive transistor M2 is connected to the drain of the third capacitive transistor M3, the drain is connected to the second end of the fifth storage capacitor C5 and the common electrode Vcom; the gate of the third capacitive transistor M3 and the third scan The line Scan3 is connected, and the source is connected to the read line Readline.
  • the touch electrode d is connected to the gate of the M2, and since the gate of the M2 is also connected to one end of the C5, the touch electrode d is also connected to the capacitor C5, and the capacitor
  • a finger or other touch device of the user when a user performs a touch operation, forms an induced capacitance value with a touch electrode connected to the sensing capacitor, and the sensing capacitor is measured.
  • the position can accurately detect the touch position.
  • the light sensing type touch unit includes: a first photo sensor transistor N1, a second photo sensor transistor N2, a third photo sensor transistor N3, a photo transistor N4, and a sixth storage capacitor C6, wherein the gate of the photo transistor N4 Connected to the source of the first photo-sensing transistor N1, the source of the second photo-sensing transistor N2, and the first end of the sixth storage capacitor C6, the second end of the drain and the sixth storage capacitor C6, and the third light
  • the source of the sense transistor N3 is connected, the source is connected to the source of the second photo-sensing transistor N2; the gate of the first photo-sensing transistor N1 is connected to the capacitive touch unit, the drain is grounded; and the second light sensation
  • the gate of the transistor N2 is connected to the fourth scan line Scan4, the drain is connected to the data line Data, the gate of the third photo-sensing transistor N3 is connected to the fourth light-emission control line Em4, and the drain is connected to the read line.
  • the phototransistor N4 is an N-type thin film transistor.
  • FIG. 7 is a timing chart of the pixel structure shown in FIG. 6.
  • a method of driving the pixel structure shown in FIG. 6 according to an embodiment of the present invention will be specifically described below with reference to FIGS. 6 and 7. The method comprises the following steps:
  • a high level is applied to the third scan line Scan3, the fourth scan line Scan4, and the fourth light emission control line Em4, and the second light emission control line Em2 and the third light emission control line Em3 are applied.
  • Low level is applied to the third scan line Scan3, the fourth scan line Scan4, and the fourth light emission control line Em4, and the second light emission control line Em2 and the third light emission control line Em3 are applied.
  • the eleventh switching transistor T11, the thirteenth switching transistor T13, the fourteenth switching transistor T14, the sixteenth switching transistor T16, and the seventeenth switching transistor T17 are both turned on, and the third storage capacitor C3 And the fourth storage capacitor C4 is discharged, the third storage capacitor C3 is discharged to the potential of the second end b3 is Vdd-Vth1, and the fourth storage capacitor C4 is discharged to the potential of the second end b4 is Vdd-Vth2, the discharge process The current still does not pass through the OLED.
  • the first end a3 of the third storage capacitor C3 and the first end b3 of the fourth storage capacitor C4 both have a ground potential of 0V, the voltage difference across the third storage capacitor C3 is Vdd-Vth1, and the voltage difference across the fourth storage capacitor C4 Vdd-Vth2, where Vdd is the first reference voltage source VDD voltage, Vth1 is the threshold voltage of the first driving transistor DTFT1, and Vth2 is the threshold voltage of the second driving transistor DTFT2;
  • the first capacitive transistor M1 is turned on, and the voltage Vdata input by the data line Data provides a reset signal. At this time, Vdata is V3, and the process performs touch unit reset, and the potential at d is V3.
  • the two capacitive transistors M2 and the third capacitive transistor M3 are connected to a high potential and are turned off at this time. This process prepares for finger touch.
  • the first photo-sensing transistor N1 is turned on, and the sixth storage capacitor C6 and the photo-sensing transistor N4 are grounded and reset, and the potential is 0V, which prepares for the next stage of the light-sensing touch operation.
  • the two photo-sensing transistors N2, the third photo-sensing transistor N3, and the photo-sensing transistor N4 are turned off.
  • a low level is applied to the third scan line Scan3, and the fourth scan line Scan4, the fourth light emission control line Em4, the second light emission control line Em2, and the third light emission are applied.
  • the control line Em3 applies a high level;
  • the twelfth switching transistor T12 is turned on, the other switching transistors are turned off, and the data line Data charges the potential of the first end a3 of the third storage capacitor C3 from 0V to the third voltage V3, and
  • the second end b3 of the three storage capacitors C3 is floating, so the original voltage difference (Vdd-Vth1) between the two points a3 and b3 is maintained, and the second end of the third storage capacitor C3 (the gate of the first driving transistor DTFT1)
  • the b3 point potential will undergo an isobaric jump, at which time the potential of the second storage capacitor C3 at the second end b3 jumps to Vdd - Vth1 + V3;
  • the first capacitive transistor M1 is turned off, the second capacitive transistor M2 and the third capacitive transistor M3 are turned on; at this stage, the coupled pulse signal (common electrode Vcom) provides a fifth storage capacitor C5 end.
  • the potential of the coupling capacitor is formed, and the other important role is to act as the potential of the source of the second capacitive transistor M2.
  • the touch of the finger directly causes the gate potential of the second capacitive transistor M2 to decrease, only when the second capacitive transistor M2 gate source voltage is full The transistor is turned on, so that the signal passes through the second capacitive transistor M2.
  • the buffer phase of the capacitive touch unit that is, "waiting" for the gate potential of the second capacitive transistor M2 to decrease and decrease.
  • the main cause is the touch of the finger.
  • the finger intervention directly causes the potential of the d point to decrease, the condition that the second capacitive transistor M2 is turned on is reached, and the I&V characteristic curve is in the amplification region, and the second capacitive transistor M2 acts as the amplification transistor to couple the signal of the pulse. Turn on and zoom in.
  • the reason why the signal is amplified is also to facilitate the acquisition of the terminal signal.
  • the horizontal (X-direction) scan signal of the third scan signal input by the third scan line Scan3 has an acquisition function.
  • the signal in the Y direction is acquired by the read line Read Line. This determines the X, Y coordinates of the finger touch position. In this process, as long as the finger participates in the touch, the coordinate position can be collected at any time. At this time, the touch line is collected for the first time using the read line Read Line.
  • the first photo-sensing transistor N1, the second photo-sensing transistor N2, the third photo-sensing transistor N3, and the photo-sensing transistor N4 are all turned off, and are in a stagnant state.
  • a low level is applied to the fourth scan line Scan4, and the third scan line Scan3, the second light emission control line Em2, the third light emission control line Em3, and the fourth light emission control are performed.
  • Line Em4 applies a high level.
  • the fifteenth switching transistor T15 is turned on, and the data line Data charges the first end a4 of the fourth storage capacitor C4 from 0V to the fourth voltage V4 on the data line Data at this time, and the fourth storage
  • the second end b4 of the capacitor C4 is floating, so that the original voltage difference (Vdd-Vth2) between the two points a4 and b4 is maintained, and the second end of the fourth storage capacitor C4 (the gate of the second driving transistor DTFT2) b4 points.
  • the potential of the fourth storage capacitor C4 at the second end b4 is Vdd - Vth2 + V4;
  • the first capacitive transistor M1, the second capacitive transistor M2, and the third capacitive transistor M3 are all turned off, and are in a stagnant state.
  • the gate and source of the phototransistor N4 are connected, the first photo-sensing transistor N1 is turned off, the second photo-sensing transistor N2 is turned on, and the coupling voltage V4 is output, and the sixth storage capacitor C6 is stored.
  • the potential difference is a fixed value.
  • a high level is applied to the third scan line Scan3, the fourth scan line Scan4, and the third light emission control line Em3, and the second light emission control line Em2 and the fourth light emission control are controlled.
  • Line Em4 applies a low level.
  • the eleventh switching transistor T11, the eighteenth switching transistor T18, and the nineteenth switching transistor T19 are turned on, and the first driving transistor DTFT1 and the second driving transistor DTFT2 drive the first display device OLED1 and the second display, respectively.
  • the device OLED2 emits light.
  • the current flowing through the first display device OLED1 can be obtained:
  • the first capacitive transistor N1, the second capacitive transistor N2, and the third capacitive transistor N3 are both turned off and are in a stagnant state.
  • the amplified storage signal is transmitted to the terminal receiving amplifier at this time, and the amplified signal is sent to the processor for data calculation and analysis; during this period, the touch action occurs, and the photoelectric signal intensity before and after the touch is performed.
  • the change difference is compared with the no-touch threshold, and it is determined whether there is a touch (change of the light illumination intensity).
  • the X-direction coordinate is determined by the output position of the fourth illumination control line Em4, and the Y-direction coordinate is still determined by the Read Line. determine.
  • the touch line is collected for the second time using the read line Read Line.
  • the operating current flowing through the two display devices at this time is not affected by the threshold voltage of the respective driving transistors, and is only related to the voltage Vdata input by the data line Data at this time.
  • the problem that the threshold voltage (Vth) of the driving transistor is drifted due to process fabrication and long-time operation is completely avoided, the influence of the driving current on the display device is eliminated, and the normal operation of the display device is ensured.
  • Embodiments of the present invention also provide a display device including any of the above pixel structures.
  • the display device may be any product or component having a display function, such as a liquid crystal display panel, an electronic paper, an OLED panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • the display device of the embodiment of the present invention includes the above-described pixel structure, it has a high resolution.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Computer Hardware Design (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of El Displays (AREA)

Abstract

一种像素结构及其驱动方法、显示装置。像素结构包括多个像素单元，以及与像素单元对应的补偿单元，每个像素单元包括两相邻的第一像素电路和第二像素电路。第一像素电路包括：第一驱动晶体管(DTFT1)和第一显示器件(OLED1)。第二像素电路包括：第二驱动晶体管(DTFT2)和第二显示器件(OLED2)。其中，第一像素电路和第二像素电路共用补偿单元，且通过同一数据线(Data)控制。补偿单元用于对第一像素电路中的第一驱动晶体管(DTFT1)的栅极电压进行调整，以消除第一驱动晶体管(DTFT1)的阈值电压对第一显示器件(OLED1)驱动电流的影响，以及用于对第二像素电路中的第二驱动晶体管(DTFT2)的栅极电压进行调整，以消除第二驱动晶体管(DTFT2)的阈值电压对第二显示器件(OLED2)驱动电流的影响。电路结构可以缩减像素尺寸，获得更高的分辨率。

Description

像素结构及其驱动方法、显示装置 技术领域
本公开涉及一种像素结构及其驱动方法、显示装置。
背景技术
有机发光显示二极管(OLED)作为一种电流型发光器件已越来越多地被应用于高性能显示中。传统的无源矩阵有机发光二极管(Passive Matrix OLED)随着显示尺寸的增大，需要更短的单个像素的驱动时间，因而需要增大瞬态电流，增加功耗。同时大电流的应用会造成ITO线上压降过大，并使OLED工作电压过高，进而降低其效率。而有源矩阵有机发光二极管(Active Matrix OLED)通过开关晶体管逐行扫描输入OLED电流，可以很好地解决这些问题。
在AMOLED背板设计中，主要需要解决的问题是像素和像素之间的亮度非均匀性。
首先，AMOLED采用薄膜晶体管(TFT)构建像素电路为OLED器件提供相应的电流，其中多采用低温多晶硅薄膜晶体管(LTPS TFT)或氧化物薄膜晶体管(Oxide TFT)。与一般的非晶硅薄膜晶体管(amorphous-Si TFT)相比，LTPS TFT和Oxide TFT具有更高的迁移率和更稳定的特性，更适合应用于AMOLED显示中。但是由于晶化工艺的局限性，在大面积玻璃基板上制作的LTPS TFT，常常在诸如阈值电压、迁移率等电学参数上具有非均匀性，这种非均匀性会转化为OLED显示器件的电流差异和亮度差异，并被人眼所感知，即不良(mura)现象。Oxide TFT虽然工艺的均匀性较好，但是与a-Si TFT类似，在长时间加压和高温下，其阈值电压会出现漂移，由于显示画面不同，面板各部分TFT的阈值漂移量不同，会造成显示亮度差异，由于这种差异与之前显示的图像有关，因此常呈现为残影现象。
第二，在大尺寸显示应用中，由于背板电源线存在一定电阻，且所有像素的驱动电流都由第一参考电压源VDD提供，因此在背板中靠近第一参考电压源VDD供电位置区域的电源电压相比较离供电位置较远区域的电源电 压要高，这种现象被称为电阻压降(IR Drop)。由于第一参考电压源VDD的电压与电流相关，IR Drop也会造成不同区域的电流差异，进而在显示时产生mura。采用P型TFT构建像素单元的LTPS工艺对这一问题尤其敏感，因为其存储电容连接在第一参考电压源VDD与驱动晶体管DTFT的栅极之间，第一参考电压源VDD的电压改变，会直接影响驱动晶体管DTFT的栅源电压Vgs。
第三，OLED器件在蒸镀时由于膜厚不均也会造成电学性能的非均匀性。对于采用N型TFT构建像素单元的a-Si或Oxide TFT工艺，其存储电容连接在驱动TFT栅极与OLED阳极之间，在数据电压传输到栅极时，如果各像素OLED阳极电压不同，则实际加载在驱动晶体管DTFT上的栅源电压Vgs不同，从而驱动电流不同造成显示亮度差异。
通常，提供一种AMOLED电压式像素单元驱动电路。这种电压式驱动方法与传统AMLCD驱动方法类似，由驱动单元提供一个表示灰阶的电压信号，该电压信号会在像素电路内部被转化为驱动晶体管的电流信号，从而驱动OLED实现亮度灰阶。这种方法具有驱动速度快，实现简单的优点，适合驱动大尺寸面板，被业界广泛采用，但是需要设计额外的开关晶体管和电容器件来补偿驱动晶体管DTFT非均匀性、IR Drop和OLED非均匀性。
图1为通常的采用2个TFT，1个电容组成的电压驱动型像素单元的电路结构(2T1C)。其中开关晶体管T将数据线上的电压传输到驱动晶体管DTFT的栅极，驱动晶体管将这个数据电压转化为相应的电流供给OLED器件。在正常工作时，驱动晶体管DTFT应处于饱和区，在一行的扫描时间内提供恒定电流。其电流可表示为：
Figure PCTCN2014088396-appb-000001
其中μn为载流子迁移率，COX为栅氧化层电容，W/L为晶体管宽长比，Vdata为数据电压，Voled为OLED工作电压，为所有像素单元共享，Vthn为晶体管的阈值电压，对于增强型的驱动晶体管DTFT，Vthn为正值，对于耗尽型TFT，Vthn为负值。
尽管通常的像素单元驱动电路被广泛使用，但是其仍然必不可免的存在以下问题：如果不同像素单元之间的Vthn不同，则电流存在差异。如果像素 的Vthn随时间发生漂移，则可能造成先后电流不同，导致残影，且由于OLED器件非均匀性引起OLED工作电压不同，也会导致电流差异。为了避免不同像素单元之间的Vthn不同给像素电路造成的影响，通常在像素电路中增加阈值补偿单元，以消除像素的Vthn对像素单元的影响，但是同时也带来下述问题。图2为通常的像素结构的示意图。如图2所示，像素结构中的每个像素结构成行成列设置，若每个像素中设置一个补偿单元，此时由于补偿单元的个数较多，也就说薄膜晶体管以及存储电容的数量的增多，像素尺寸的减小将会受到极大的限制。
发明内容
本发明的至少一个实施例提供一种可以提高分辨率的像素结构及其驱动方法。
本发明的至少一个实施例提供一种像素结构，包括多个像素单元，以及与像素单元对应的补偿单元，每个像素单元包括两相邻的第一像素电路和第二像素电路，第一像素电路包括：第一驱动晶体管和第一显示器件；第二像素电路包括：第一驱动晶体管和第二显示器件；其中，第一像素电路和第二像素电路共用补偿单元，且通过同一数据线控制；
补偿单元用于对第一像素电路中的第一驱动晶体管的栅极电压进行调整，以消除第一驱动晶体管的阈值电压的对第一显示器件驱动电流的影响，以及用于对第二像素电路中的第二驱动晶体管的栅极电压进行调整，以消除第二驱动晶体管的阈值电压对第二显示器件驱动电流的影响。本发明的像素结构包括多个像素单元，每个像素单元包含两个像素电路，且该两个像素电路通过一个补偿单元对每个像素电路中的驱动晶体管的阈值电压进行调整，即通过一条数据线Data来控制两个像素电路，其中每个像素电路相当于通常的子像素单元中的一部分，也就是相当于两相邻的子像素通过同一个数据线Data来控制，此时可以相当于将通常的像素结构中的数据线Data减半，以及补偿单元共用，同时可以减少补偿单元中薄膜晶体管的个数，从而可以大幅缩减像素的尺寸大小并降低驱动芯片(IC)的成本，进而获得更高的画质品质和更高的分辨率(PPI)。
针对上述像素结构，本发明的至少一个实施例还提供了一种针对上述像 素结构的驱动方法，包括：
在阈值补偿阶段，通过补偿单元对第一像素电路中的第一驱动晶体管的栅极电压进行调整，以消除第一驱动晶体管的阈值电压的对第一显示器件驱动电流的影响，以及对第二像素电路中的第二驱动晶体管的栅极电压进行调整，以消除第二驱动晶体管的阈值电压对第二显示器件驱动电流的影响。
可替换的，补偿单元包括：第一开关晶体管、第二开关晶体管、第三开关晶体管、第四开关晶体管、第五开关晶体管、第六开关晶体管、第七开关晶体管、第八开关晶体管、第九开关晶体管、第十开关晶体管、第一存储电容、第二存储电容；其中，
第一开关晶体管的栅极与第二开关晶体管的栅极、第七开关晶体管的栅极、第一发光控制线连接，源极与第二开关晶体管的源极和第一参考电压源连接，漏极与第四开关晶体管的源极和第一驱动晶体管的源极连接；
第二开关晶体管的栅极与第八开关管晶体管的栅极连接，漏极与第五开关晶体管的源极和第二驱动晶体管的源极连接；
第三开关晶体管的栅极与第四开关晶体管的栅极和第一扫描线连接，源极与数据线连接，漏极与第一存储电容的第二端和第七开关晶体管的源极连接；
第四开关晶体管的漏极与第一存储电容的第一端和第一驱动晶体管的栅极连接；
第五开关晶体管的栅极与第六开关晶体管的栅极和第二扫描线连接，源漏极与第二存储电容的第一端和第二驱动晶体管的栅极连接；
第六开关晶体管的源极与数据线连接，漏极与第二存储电容的第二端和第八开关晶体管的漏极连接；
第七开关晶体管的漏极与第九开关晶体管的源极、第一驱动晶体管的漏极、第一显示器件的第一端连接，第一显示器件的第二端接地；
第八开关晶体管的源极与第十开关晶体管的源极、第二驱动晶体管DTFT2的漏极、第二显示器件的第一端连接，第二显示器件的第二端接地；
第九开关晶体管的栅极与第十开关晶体管的栅极和第二扫描线的连接，漏极接地；
第十开关晶体管的漏极接地。
进一步可替换的是，第一开关晶体管、第二开关晶体管、第三开关晶体管、第四开关晶体管、第五开关晶体管、第六开关晶体管、第七开关晶体管、第八开关晶体管、第九开关晶体管、第十开关晶体管、第一驱动晶体管、第二驱动晶体管均为N型薄膜晶体管。
本发明的至少一个实施例提供了一种针对上述像素结构的驱动方法，包括：
在重置阶段，对第一扫描线、第二扫描线、第一发光控制线施加高电平，第一开关晶体管、第二开关晶体管、第三开关晶体管、第四开关晶体管、第五开关晶体管、第六开关晶体管、第七开关晶体管、第八开关晶体管、第九开关晶体管、第十开关晶体管均导通，第一参考电压源将第一存储电容的第一端的电势和第二存储电容的第一端的电势置为第一参考电压源电压Vdd，数据线将第一存储电容的第二端的电势和第二存储电容的第二端的电势置为第一电压V1；
在放电阶段，对第一扫描线、第二扫描线施加高电平，对第一发光控制线施加低电平，第三开关晶体管、第四开关晶体管、第五开关晶体管、第六开关晶体管、第九开关晶体管、第十开关晶体管均导通，第一存储电容和第二存储电容均放电，其中，第一存储电容的第一端的电势和第二存储电容的第一端的电势分别放电到第一驱动晶体管的阈值电压Vth1和第二驱动晶体管的阈值电压Vth2；
在持续放电阶段，对第一扫描线、第一发光控制线施加低电平，对第二扫描线施加高电平，对数据线施加第二电压V2，使得第一存储电容两端的电压差等于Vth-V1，第二存储电容两端的电压差等于Vth2-V2，其中V1>V2；
在稳压阶段，对第一扫描线、第二扫描线、第一发光控制线施加低电平，第一开关晶体管、第二开关晶体管、第三开关晶体管、第四开关晶体管、第五开关晶体管、第六开关晶体管、第七开关晶体管、第八开关晶体管、第九开关晶体管、第十开关晶体管均关断，稳定第一存储电容和第二存储电容两端的压差；
在发光阶段，对第一扫描线、第二扫描线施加低电平，对第一发光控制线通施加电平，第一开关晶体管、第二开关晶体管、第七开关晶体管、第八开关晶体管导通，第一存储电容的第二端电势变化为第一显示器件的阳极电 势Voled1，第一存储电容的第一端电势变为Vth1-V1+Voled1，第二存储电容的第二端电势变化为第二显示器件的阳极电势Voled2，第二存储电容的第一端电势变为Vth2-V2+Voled2，第一驱动晶体管和第二驱动晶体管分别驱动第一显示器件和第二显示器件发光。
可替换的是，补偿单元包括：第十一开关晶体管、第十二开关晶体管、第十三开关晶体管、第十四开关晶体管、第十五开关晶体管、第十六开关晶体管、第十七开关晶体管、第十八开关晶体管、第十九开关晶体管、第三存储电容、第四存储电容；其中，
第十一开关晶体管的栅极与第二发光控制线连接，源极与第一参考电压源连接，漏极与第一驱动晶体管的源极和第二驱动晶体管的源极连接；
第十二开关晶体管的栅线与第三扫描线连接，源极与数据线连接，漏极与第十三开关晶体管的源极和第三存储电容的第一端连接；
第十三开关晶体管的栅极与第十四开关晶体管的栅极和第三发光控制线连接，漏极接地；
第十四开关晶体管的源极与第四存储电容的第一端和第十五开关晶体管的漏极连接，漏极接地；
第十五开关晶体管的栅极与第四扫描线连接，源极与数据线连接；
第十六开关晶体管的栅极与第十七开关晶体管的栅极和第三发光控制线连接，源极与第一驱动晶体管的栅极和第三存储电容的第二端连接，漏极与第一驱动晶体管的漏极和第十八开关晶体管的源极连接；
第十七开关晶体管的源极与第二驱动晶体管的栅极和第四存储电容的第二端连接，漏极与第二驱动晶体管的漏极和第十九开关晶体管的源极连接；
第十八开关晶体管的栅极与第十九开关晶体管的栅极和第四发光控制线连接，漏极与第一显示器件的第一端连接，第一显示器件的第二端接地；
第十九开关晶体管的漏极与第二显示器件的第一端连接，第二显示器件的第二端接地。
进一步可替换的是，像素结构还包括：与补偿单元连接的电容式触控单元和光感式触控单元，
电容式触控单元用于根据触控信号，生成相应的电信号，并实现手指触控；
光感式触控单元用于根据光照强度信号，生成相应的电信号，并实现激光笔触控。
更进一步可替换的是，电容式触控单元包括：第一电容式晶体管、第二电容式晶体管、第三电容式晶体管、第五存储电容以及触控电极，其中，
第一电容式晶体管的栅极与光感式触控单元和第三发光控制线连接，源极与数据线连接，漏极与第五存储电容的第一端和第二电容式晶体管的栅极连接；
第二电容式晶体管的源极与第三电容式晶体管的漏极连接，漏极与第五存储电容的第二端和公共电极连接；
第三电容式晶体管的栅极与第三扫描线连接，源极与读取线连接；
触控电极与第二电容式晶体管的栅极连接。
更进一步可替换的是，光感式触控单元包括：第一光感式晶体管、第二光感式晶体管、第三光感式晶体管、感光晶体管、第六存储电容，其中，
感光晶体管的栅极与第一光感式晶体管的源极、第二光感式晶体管的源极和第六存储电容的第一端连接，漏极与第六存储电容的第二端和第三光感式晶体管的源极连接，源极与第二光感式晶体管的源极连接；
第一光感式晶体管的栅极与电容式触控单元连接，漏极接地；
第二光感式晶体管的栅极与第四扫描线连接，漏极与数据线连接；
第三光感式晶体管的栅极与第四发光控制线连接，漏极与读取线连接。
进一步可替换地，第十一开关晶体管、第十二开关晶体管、第十三开关晶体管、第十四开关晶体管、第十五开关晶体管、第十六开关晶体管、第十七开关晶体管、第十八开关晶体管、第十九开关晶体管、第一驱动晶体管、第二驱动晶体管均为P型薄膜晶体管。
进一步可替换地，第一电容式晶体管、第二电容式晶体管、第三电容式晶体管均为P型薄膜晶体管。
进一步可替换地，第一光感式晶体管、第二光感式晶体管、第三光感式晶体管均为P型薄膜晶体管，感光晶体管为N型薄膜晶体管。
本发明的至少一个实施例还提供了针对上述像素结构的驱动方法，包括：
在重置阶段，对第三扫描线、第四扫描线、第四发光控制线施加高电平，对第二发光控制线、第三发光控制线施加低电平，第十一开关晶体管、第十 三开关晶体管、第十四开关晶体管、第十六开关晶体管、第十七开关晶体管均导通，第三存储电容和第四存储电容均放电，第三存储电容放电至其第二端电势为Vdd-Vth1，第四存储电容放电至其第二端电势为Vdd-Vth2，第三存储电容的第一端和第四存储电容的第一端均接地，电势为0V，第三存储电容两端的压差为Vdd-Vth1，第四存储电容两端的压差为Vdd-Vth2,其中，Vdd为第一参考电压源电压，Vth1为第一驱动晶体管的阈值电压，Vth2为第二驱动晶体管的阈值电压；
在第一像素电路跳变阶段，对第三扫描线施加低电平，对第四扫描线、第四发光控制线、第二发光控制线、第三发光控制线施加高电平，第十二开关晶体管导通，数据线将第三存储电容的第一端充电至第三电压V3，此时第三存储电容第二端电势为Vdd–Vth1+V3；
在第二像素电路跳变阶段，对第四扫描线施加低电平，第三扫描线、第二发光控制线、第三发光控制线、第四发光控制线施加高电平，第十五开关晶体管导通，数据线将第四存储电容的第一端充电至第四电压V4，此时第四存储电容第二端电势为Vdd–Vth2+V4，其中V4>V3；
在发光阶段，对第三扫描线、第四扫描线、第三发光控制线施加高电平，对第二发光控制线、第四发光控制线施加低电平，第十一开关晶体管、第十八开关晶体管、第十九开关晶体管导通，第一驱动晶体管和第二驱动晶体管分别驱动第一显示器件和第二显示器件发光。
可替换的是，该驱动方法还包括：
在重置阶段，第一电容式晶体管导通，数据线将手指触控点电势重置为第三电压V3；
第一光感式晶体管导通，将第六存储电容和感光晶体管接地重置；
在第一像素电路跳变阶段，第二电容式晶体管、第三电容式晶体管打开，公共电极接耦合脉冲信号，提供第五存储电容一端的电势，以及充当第二电容式晶体管的源极电压；
光感式触控单元中的所有晶体管均关断，处于停滞状态；
在第二像素跳变阶段，电容式触控单元的内第一电容式晶体管、第二电容式晶体管、第三电容式晶体管均关闭，处于停滞状态；
光感式触控单元内的第二光感式晶体管导通，输出第四电压V4给第六 存储电容，第六存储电容充电；
在发光阶段，电容式触控单元的内第一电容式晶体管、第二电容式晶体管、第三电容式晶体管均持续关闭，处于停滞状态；
光感式触控单元通过读取线采集触控信号。
本发明的至少一个实施例还提供一种包括上述像素结构的显示装置。
附图说明
图1为通常的电压驱动型像素单元的电路结构图；
图2为通常的像素结构的示意图；
图3为本发明的第一实施例的像素结构的示意图；
图4为根据本发明第二实施例的像素结构的电路原理图；
图5为图4所示的像素结构的时序图；
图6为根据本发明第三实施例的像素结构的另一种电路原理图；
图7为图6所示的像素结构的时序图。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对本发明作进一步详细描述。附图中，采用相同的附图标记来表示相同的元件。
第一实施例
图3为本发明第一实施例的像素结构的示意图。如图3所示，本实施例提供一种像素结构，其包括多个像素单元(虚线框中圈定的为一个像素单元)，以及与像素单元对应的补偿单元。每个像素单元包括两相邻的第一像素电路和第二像素电路，第一像素电路包括：第一驱动晶体管和第一显示器件；第二像素电路包括：第二驱动晶体管和第二显示器件；其中，第一像素电路和第二像素电路共用补偿单元，且通过同一数据线Data控制。补偿单元用于对第一像素电路中的第一驱动晶体管的栅极电压进行调整，以消除第一驱动晶体管的阈值电压对第一显示器件驱动电流的影响，以及用于对第二像素电路中的第二驱动晶体管的栅极电压进行调整，以消除第二驱动晶体管的阈值电压对第二显示器件驱动电流的影响。
由于本实施例的像素结构包括多个像素单元，每个像素单元包括两个像素电路，且该两个像素电路通过一个补偿单元对每个像素电路中的驱动晶体管的阈值电压进行调整，即通过一条数据线Data来控制两个像素电路，也就是相当于两相邻的子像素通过同一个数据线Data来控制，此时可以相当于将现有的像素结构中的数据线Data减半，以及补偿单元共用，同时可以减少补偿单元中薄膜晶体管的个数，从而可以大幅缩减像素的尺寸大小并降低驱动芯片(IC)的成本，进而获得更高的画质品质和更高的分辨率(PPI)。
本实施例还提供了一种上述像素电路结构的驱动方法，具体包括：
在阈值补偿阶段，通过补偿单元对第一像素电路中的第一驱动晶体管的栅极电压进行调整，以消除第一驱动晶体管的阈值电压对第一显示器件的驱动电流的影响，以及对第二像素电路中的第二驱动晶体管的栅极电压进行调整，以消除第二驱动晶体管的阈值电压对第二显示器件的驱动电流的影响。
在本实施例的像素结构的驱动方法中通过一个补偿单元同时对两相邻的像素电路中的驱动晶体管的阈值电压进行补偿，使得该种结构的驱动过程更加简便。
第二实施例
图4为根据本发明第二实施例的像素结构的电路原理图。如图4所示，本实施例提供的像素结构包括多个像素单元，以及与像素单元对应的补偿单元。每个所述像素单元包括两相邻的第一像素电路和第二像素电路，第一像素电路包括：第一驱动晶体管DTFT1和第一显示器件OLED1；第二像素电路包括：第二驱动晶体管DTFT2和第二显示器件OLED2；其中，第一像素电路和第二像素电路共用补偿单元，且通过同一数据线Data控制。补偿单元用于对第一像素电路中的第一驱动晶体管DTFT1的栅极电压进行调整，以消除第一驱动晶体管DTFT1的阈值电压对第一显示器件OLED1的驱动电流的影响，以及用于对第二像素电路中的第二驱动晶体管DTFT2的栅极电压进行调整，以消除第二驱动晶体管DTFT2的阈值电压对第二显示器件OLED2驱动电流的影响。其中，补偿单元，具体包括第一开关晶体管T1、第二开关晶体管T2、第三开关晶体管T3、第四开关晶体管T4、第五开关晶体管T5、第六开关晶体管T6、第七开关晶体管T7、第八开关晶体管T8、第九开关晶体管T9、第十开关晶体管T10、第一存储电容C1、第二存储电容 C2；其中，第一开关晶体管T1的栅极与第二开关晶体管T2的栅极、第七开关晶体管T7的栅极、第一发光控制线Em1连接，源极与第二开关晶体管T2的源极、第一参考电压源VDD连接，漏极与第四开关晶体管T4的源极、第一驱动晶体管DTFT1的源极连接；第二开关晶体管T2的栅极与第八开关晶体管T8的栅极连接，漏极与第五开关晶体管T5的源极、第二驱动晶体管DTFT2的源极连接；第三开关晶体管T3的栅极与第四开关晶体管T4的栅极、第一扫描线Scan1连接，源极与数据线Data连接，漏极与第一存储电容C1的第二端b1、第七开关晶体管T7的源极连接；第四开关晶体管T4的漏极与第一存储电容C1的第一端a1、第一驱动晶体管DTFT1的栅极连接；第五开关晶体管T5的栅极与第六开关晶体管T6的栅极、第二扫描线Scan2连接，漏极与第二存储电容C2的第一端a2、第二驱动晶体管DTFT2的栅极连接；第六开关晶体管T6的源极与数据线Data连接，漏极与第二存储电容C2的第二端b2、第八开关晶体管T8的漏极连接；第七开关晶体管T7的漏极与第九开关晶体管T9的源极、第一驱动晶体管DTFT1的漏极、第一显示器件OLED1的第一端连接，第一显示器件OLED1的第二端接地；第八开关晶体管T8的源极与第十开关晶体管T10的源极、第二驱动晶体管DTFT2的漏极、第二显示器件OLED2的第一端连接，第二显示器件的第二端接地；第九开关晶体管T9的栅极与第十开关晶体管T10的栅极、第二扫描线Scan2的连接，漏极接地；第十开关晶体管T10的漏极接地。
为了更好地制备该种像素结构，以及对各个像素单元更好地控制，例如，第一开关晶体管T1、第二开关晶体管T2、第三开关晶体管T3、第四开关晶体管T4、第五开关晶体管T5、第六开关晶体管T6、第七开关晶体管T7、第八开关晶体管T8、第九开关晶体管T9、第十开关晶体管T10、第一驱动晶体管DTFT1、第二驱动晶体管DTFT2均为N型薄膜晶体管。
图5为图4所示的像素结构的时序图。下面结合图4和图5，具体说明根据本发明实施例的对图4所示的像素结构的驱动方法。该方法包括如下步骤：
在重置阶段(第1时间段)，对第一扫描线Scan1、第二扫描线Scan2、第一发光控制线Em1施加高电平，此时，第一开关晶体管T1、第二开关晶体管T2、第三开关晶体管T3、第四开关晶体管T4、第五开关晶体管T5、第 六开关晶体管T6、第七开关晶体管T7、第八开关晶体管T8、第九开关晶体管T9、第十开关晶体管T10均导通，第一参考电压源VDD将第一存储电容C1的第一端a1的电势和第二存储电容C2的第一端a2的电势置为第一参考电压源电压Vdd；对数据线Data施加第一电压V1，此时由于第三开关晶体管T3、第四开关晶体管T4、第五开关晶体管T5、第六开关晶体管T6、均导通，故第一存储电容C1的第二端b1的电势和第二存储电容C2的第二端b2的电势均被置为第一电压V1，即a1＝Vdd，b1＝V1；a2＝Vdd，b2＝V1。
在放电阶段(第2时间段)，对第一扫描线Scan1、第二扫描线Scan2施加高电平，对第一发光控制线Em1施加低电平。此时，第三开关晶体管T3、第四开关晶体管T4、第五开关晶体管T5、第六开关晶体管T6、第九开关晶体管T9、第十开关晶体管T10均导通，第一存储电容C1和第二存储电容C2均放电，其中，第一存储电容C1的第一端a1的电势和第二存储电容C2的第一端a2的电势分别放电到第一驱动晶体管DTFT1的阈值电压Vth1和第二驱动晶体管DTFT2的阈值电压Vth2，即a1＝Vth1，a2＝Vth2；另外由于第九开关晶体管T9和第十开关晶体管T10导通，从而使得电路中的电流不会通过第一显示器件OLED1和第二显示器件OLED2，间接地降低了第一显示器件OLED1和第二显示器件OLED2的损耗。
在持续放电阶段(第3时间段)，对第一扫描线Scan1、第一发光控制线Em1施加低电平，对第二扫描线Scan2施加高电平，对数据线Data施加第二电压V2。此时第二存储电容C2的第二端b2点的电位也会随之变为V2，而第二存储电容C2的第一端a2点的电位一直维持Vth2，使得第一存储电容C1两端的电压差为Vth1-V1,第二存储电容C2两端的电压差为Vth2-V2，其中V1>V2。
在稳压阶段(第4时间段)，对第一扫描线Scan1、第二扫描线Scan2、第一发光控制线Em1施加低电平。第一开关晶体管T1、第二开关晶体管T2、第三开关晶体管T3、第四开关晶体管T4、第五开关晶体管T5、第六开关晶体管T6、第七开关晶体管T7、第八开关晶体管T8、第九开关晶体管T9、第十开关晶体管T10均关断，稳定第一存储电容C1和第二存储电容C2两端的压差，同时为发光阶段做准备。
在发光阶段(第5时间段)，对第一扫描线Scan1、第二扫描线Scan2 施加低电平，对第一发光控制线Em1施加高电平。第一开关晶体管T1、第二开关晶体管T2、第七开关晶体管T7、第八开关晶体管T8导通，第一存储电容C1的第二端b1的电势由V1变化为第一显示器件OLED1的阳极电势Voled1，第一存储电容C1的第一端a1的电势变为Vth1-V1+Voled1，第二存储电容C2的第二端b2的电势由V2变化为第二显示器件OLED2的阳极电势Voled2，第二存储电容C2的第一端a2的电势变为Vth2-V2+Voled2，第一驱动晶体管DTFT1和第二驱动晶体管DTFT2分别驱动第一显示器件OLED1和第二显示器件OLED2发光。
此时根据薄膜晶体管饱和电流公式可以得出流经第一显示器件OLED1的电流:
Ioled1＝K(VGS-Vth1)2
              ＝K[(Vth1-V1+Voled1)-Voled1–Vth1]2
          ＝K·(V1)2
同理，流经第二显示器件OLED2的电流为Ioled2＝K·(V2)2
根据所得的流经第一显示器件OLED1和第二显示器件OLED2的电流值可以看出，该像素结构不仅可以实现高分率的显示，同时也可以避免驱动晶体管的阈值电压对像素结构的影响，从而使得本发明实施例的像素结构显示更加均匀。
第三实施例
图6为根据本发明第三实施例的像素结构的电路原理图。该像素结构还同时具有电容式触控单元以及光感式触控单元。如图6所示，该像素结构包括多个像素单元，以及与像素单元对应的补偿单元、电容式触控单元、光感式触控单元。每个像素单元包括两相邻的第一像素电路和第二像素电路，第一像素电路包括：第一驱动晶体管DTFT1和第一显示器件OLED1；第二像素电路包括：第二驱动晶体管DTFT2和第二显示器件OLED2；其中，第一像素电路和第二像素电路共用补偿单元，且通过同一数据线Data控制。补偿单元用于对第一像素电路中的第一驱动晶体管DTFT1的栅极电压进行调整，以消除第一驱动晶体管DTFT1的阈值电压对第一显示器件OLED1驱动电流的影响，以及用于对第二像素电路中的第二驱动晶体管DTFT2的栅极电压进行调整，以消除第二驱动晶体管DTFT2的阈值电压对第二显示器件 OLED2驱动电流的影响。电容式触控单元用于根据触控信号，生成相应的电信号，并实现手指触控；光感式触控单元用于根据光照强度信号，生成相应的电信号，并实现激光笔触控。
其中，补偿单元包括：第十一开关晶体管T11、第十二开关晶体管T12、第十三开关晶体管T13、第十四开关晶体管T14、第十五开关晶体管T15、第十六开关晶体管T16、第十七开关晶体管T17、第十八开关晶体管T18、第十九开关晶体管T19、第三存储电容C3、第四存储电容C4；其中，第十一开关晶体管T11的栅极与第二发光控制线Em2连接，源极与第一参考电压源VDD连接，漏极与第一驱动晶体管DTFT1的源极、第二驱动晶体管DTFT2的源极连接；第十二开关晶体管T12的栅线与第三扫描线Scan3连接，源极与数据线Data连接，漏极与第十三开关晶体管T13的源极和第三存储电容C3的第一端a3连接；第十三开关晶体管T13的栅极与第十四开关晶体管T14的栅极和第三发光控制线Em3连接，漏极接地；第十四开关晶体管T14的源极与第四存储电容C4的第一端a4和第十五开关晶体管T15的漏极连接，漏极接地；第十五开关晶体管T15的栅极与第四扫描线Scan4连接，源极与数据线Data连接；第十六开关晶体管T16的栅极与第十七开关晶体管T17的栅极和第三发光控制线Em3连接，源极与第一驱动晶体管DTFT1的栅极和第三存储电容C3的第二端b3连接，漏极与第一驱动晶体管DTFT1的漏极和第十八开关晶体管T18的源极连接；第十七开关晶体管T17的源极与第二驱动晶体管DTFT2的栅极和第四存储电容C4的第二端b4连接，漏极与第二驱动晶体管DTFT2的漏极和第十九开关晶体管T19的源极连接；第十八开关晶体管T18的栅极与第十九开关晶体管T19的栅极和第四发光控制线Em4连接，漏极与第一显示器件OLED1的第一端连接，第一显示器件OLED1的第二端接地；第十九开关晶体管T19的漏极与第二显示器件OLED2的第一端连接，第二显示器件OLED2的第二端接地。
可替换地，第十一开关晶体管T11、第十二开关晶体管T12、第十三开关晶体管T13、第十四开关晶体管T14、第十五开关晶体管T15、第十六开关晶体管T16、第十七开关晶体管T17、第十八开关晶体管T18、第十九开关晶体管T19、第一驱动晶体管DTFT1、第二驱动晶体管DTFT2均为P型薄膜晶体管。
电容式触控单元包括：第一电容式晶体管M1、第二电容式晶体管M2、第三电容式晶体管M3、第五存储电容C5以及触控电极d，其中，第一电容式晶体管M1的栅极与光感式触控单元和第三发光控制线Em3连接，源极与数据线Data连接，漏极与第五存储电容C5的第一端和第二电容式晶体管M2的栅极连接；第二电容式晶体管M2的源极与第三电容式晶体管M3的漏极连接，漏极与第五存储电容C5的第二端和公共电极Vcom连接；第三电容式晶体管M3的栅极与第三扫描线Scan3连接，源极与读取线Readline连接。触控电极d与M2的栅极相连，同时由于M2的栅极还与C5的其中一端相连，则触控电极d也与电容C5相连，电容C5起到维持触控电极d的电压的作用。
采用这样一种结构的电容式触控单元，当用户进行触控操作时，用户的手指或其他触控装置会与连接感测电容的触控电极之间形成感应电容值，通过测量该感应电容的位置可以精确的实现触控位置的检测。
光感式触控单元包括：第一光感式晶体管N1、第二光感式晶体管N2、第三光感式晶体管N3、感光晶体管N4、第六存储电容C6，其中，感光晶体管N4的栅极与第一光感式晶体管N1的源极、第二光感式晶体管N2的源极和第六存储电容C6的第一端连接，漏极与第六存储电容C6的第二端和第三光感式晶体管N3的源极连接，源极与第二光感式晶体管N2的源极连接；第一光感式晶体管N1的栅极与电容式触控单元连接，漏极接地；第二光感式晶体管N2的栅极与第四扫描线Scan4连接，漏极与数据线Data连接；第三光感式晶体管N3的栅极与第四发光控制线Em4连接，漏极与读取线连接。
可替换地，第一电容式晶体管M1、第二电容式晶体管M2、第三电容式晶体管M3、第一光感式晶体管N1、第二光感式晶体管N2、第三光感式晶体管N3、均为P型薄膜晶体管，感光晶体管N4为N型薄膜晶体管。
图7为图6所示的像素结构的时序图。下面结合图6和图7，具体说明根据本发明实施例的对图6所示的像素结构的驱动方法。该方法包括下述步骤：
在重置阶段(第1时间段)，对第三扫描线Scan3、第四扫描线Scan4、第四发光控制线Em4施加高电平，对第二发光控制线Em2、第三发光控制线Em3施加低电平；
此时的补偿单元中，第十一开关晶体管T11、第十三开关晶体管T13、第十四开关晶体管T14、第十六开关晶体管T16、第十七开关晶体管T17均导通，第三存储电容C3和第四存储电容C4均放电，第三存储电容C3放电至其第二端b3的电势为Vdd-Vth1，第四存储电容C4放电至其第二端b4的电势为Vdd-Vth2，此放电过程，电流仍然不会通过OLED。第三存储电容C3的第一端a3和第四存储电容C4的第一端b3均接地电势为0V，第三存储电容C3两端的压差为Vdd-Vth1，第四存储电容C4两端的压差为Vdd-Vth2,其中，Vdd为第一参考电压源VDD电压，Vth1为第一驱动晶体管DTFT1的阈值电压，Vth2为第二驱动晶体管DTFT2的阈值电压；
电容式触控单元中，第一电容式晶体管M1导通，数据线Data输入的电压Vdata提供重置信号，此时Vdata为V3，该过程进行触控单元重置，d处电势为V3，第二电容式晶体管M2、第三电容式晶体管M3接高电位此时关闭。此过程为手指触控做准备。
光感式触控单元中，第一光感式晶体管N1导通，将第六存储电容C6与感光晶体管N4接地重置，电位为0V，为下一阶段光感触控工作做准备，此时第二光感式晶体管N2、第三光感式晶体管N3以及感光晶体管N4关闭。
在第一像素电路跳变阶段(第2时间段)，对第三扫描线Scan3施加低电平，对第四扫描线Scan4、第四发光控制线Em4、第二发光控制线Em2、第三发光控制线Em3施加高电平；
此时的补偿单元中，第十二开关晶体管T12导通，其他开关晶体管均断开，数据线Data将第三存储电容C3的第一端a3的电势由0V充电至第三电压V3，而第三存储电容C3的第二端b3点浮接，因此要维持a3、b3两点原来的压差(Vdd-Vth1)，第三存储电容C3的第二端(第一驱动晶体管DTFT1的栅极)b3点电势会发生等压跳变，此时第三存储电容C3第二端b3的电势跳变为Vdd–Vth1+V3；
在电容式触控单元中，第一电容式晶体管M1关闭，第二电容式晶体管M2和第三电容式晶体管M3打开；此阶段耦合脉冲信号(公共电极Vcom)一方面提供第五存储电容C5一端的电势，形成耦合电容，另一个重要作用是充当第二电容式晶体管M2的源极的电势，手指的触控直接导致第二电容式晶体管M2的栅极电势降低，只有当第二电容式晶体管M2的栅源电压满 足晶体管导通条件，这样才会有信号通过第二电容式晶体管M2，此时称之为电容式触控单元缓冲阶段，即“等待”着第二电容式晶体管M2栅极电势降低，而降低的主要诱因就是手指的触控。此时当手指介入直接导致d点的电势降低，达到了第二电容式晶体管M2导通的条件，此时I&V特性曲线在放大区，第二电容式晶体管M2作为放大晶体管会将耦合脉冲的信号导通并放大。之所以放大信号，也是有助于终端信号的采集。第三扫描线Scan3输入的第三扫描信号横向(X方向)扫描信号就有采集功能。同时并由读取线Read Line采集Y方向的信号。这样就确定了手指触摸位置的X、Y坐标。此过程只要手指参与触控，坐标位置随时都可以采集到。此时第一次使用读取线Read Line进行触控信号采集。
在光感式触控单元中，第一光感式晶体管N1、第二光感式晶体管N2、第三光感式晶体管N3，以及感光晶体管N4均关闭，处于停滞状态。
在第二像素跳变阶段(第3时间段)，对第四扫描线Scan4施加低电平，对第三扫描线Scan3、第二发光控制线Em2、第三发光控制线Em3、第四发光控制线Em4施加高电平。
此时的补偿单元中，第十五开关晶体管T15导通，数据线Data将第四存储电容C4的第一端a4点从0V充电至此时数据线Data上的第四电压V4，而第四存储电容C4的第二端b4点浮接，因此要维持a4、b4两点原来的压差(Vdd-Vth2)，第四存储电容C4的第二端(第二驱动晶体管DTFT2的栅极)b4点电势会发生等压跳变，此时第四存储电容C4第二端b4的电势为Vdd–Vth2+V4；
在电容式触控单元中，第一电容式晶体管M1、第二电容式晶体管M2、第三电容式晶体管M3均关闭，处于停滞状态。
在光感式触控单元中，感光晶体管N4的栅、源连接，第一光感式晶体管N1截止，第二光感式晶体管N2导通，输出耦合电压V4，此时第六存储电容C6储存的电位差为定值，当有光照射至此处单元，感光晶体管接收到的光照强度增加，充电电流增加，会将电压暂时储存在第六存储电容C6两端，等待下一阶段的读取过程。
在发光阶段(第4时间段)，对第三扫描线Scan3、第四扫描线Scan4、第三发光控制线Em3施加高电平，对第二发光控制线Em2、第四发光控制 线Em4施加低电平。
在补偿单元中，第十一开关晶体管T11、第十八开关晶体管T18、第十九开关晶体管T19导通，第一驱动晶体管DTFT1和第二驱动晶体管DTFT2分别驱动第一显示器件OLED1和第二显示器件OLED2发光。
此时根据薄膜晶体管饱和电流公式可以得出流经第一显示器件OLED1的电流:
Ioled1＝K(VGS-Vth1)2
              ＝K[Vdd-(Vdd–Vth1+V3)–Vth1]2
          ＝K·(V3)2
同理，流经第二显示器件OLED2的电流为Ioled2＝K·(V4)2
在电容式触控单元中，第一电容式晶体管N1、第二电容式晶体管N2、第三电容式晶体管N3均关闭，处于停滞状态。
在光感式触控单元中，此时将放大过的存储信号传送到末端接收的放大器，放大后的信号给处理器进行数据计算分析；如此期间发生触控动作，将触控前后光电信号强度变化差值与无触控阈值进行比较，依此判断是否有触摸(光照射强度变化)，至此，X方向坐标是由此时第四发光控制线Em4输出点确定，Y方向坐标还是由Read Line确定。此时第二次使用读取线Read Line进行触控信号采集。
由上式中可以看到此时流经两个显示器件的工作电流已经不受各自的驱动晶体管的阈值电压的影响，只与此时的数据线Data所输入的电压Vdata有关。彻底避免了驱动晶体管由于工艺制作及长时间的操作造成阈值电压(Vth)漂移的问题，消除其对显示器件驱动电流的影响，保证显示器件的正常工作。同时也保证了使用1个补偿单元来完成2个像素电路的驱动，通过这种方式来压缩补偿单元的晶体管器件个数，这样可大幅缩减像素尺寸大小并降低IC成本，从而获得更高的画质品质和更高的PPI。
第四实施例
本发明的实施例还提供一种包括上述任意一种像素结构的显示装置。该显示装置可以为：液晶显示面板、电子纸、OLED面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
由于本发明实施例的显示装置包括上述像素结构，故其具有高分辨率。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为在本发明的保护范围内。
本申请要求于2014年7月7日递交的中国专利申请第201410321351.2号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。

Claims (15)

  1. 一种像素结构，包括多个像素单元，其中，所述像素结构还包括与像素单元对应的补偿单元，每个所述像素单元包括两相邻的第一像素电路和第二像素电路，所述第一像素电路包括：第一驱动晶体管和第一显示器件；所述第二像素电路包括：第二驱动晶体管和第二显示器件；其中，所述第一像素电路和所述第二像素电路共用所述补偿单元，且通过同一数据线控制；
    所述补偿单元用于对所述第一像素电路中的第一驱动晶体管的栅极电压进行调整，以消除所述第一驱动晶体管的阈值电压对所述第一显示器件驱动电流的影响，以及用于对所述第二像素电路中的第二驱动晶体管的栅极电压进行调整，以消除所述第二驱动晶体管的阈值电压对所述第二显示器件驱动电流的影响。
  2. 根据权利要求1所述的像素结构，其中，所述补偿单元包括：第一开关晶体管、第二开关晶体管、第三开关晶体管、第四开关晶体管、第五开关晶体管、第六开关晶体管、第七开关晶体管、第八开关晶体管、第九开关晶体管、第十开关晶体管、第一存储电容、第二存储电容；其中，
    所述第一开关晶体管的栅极与所述第二开关晶体管的栅极、所述第七开关晶体管的栅极、第一发光控制线连接，源极与第二开关晶体管的源极和第一参考电压源连接，漏极与所述第四开关晶体管的源极和所述第一驱动晶体管的源极连接；
    所述第二开关晶体管的栅极与第八开关管晶体管的栅极连接，漏极与所述第五开关晶体管的源极和所述第二驱动晶体管的源极连接；
    所述第三开关晶体管的栅极与所述第四开关晶体管的栅极和第一扫描线连接，源极与数据线连接，漏极与第一存储电容的第二端和所述第七开关晶体管的源极连接；
    所述第四开关晶体管的漏极与第一存储电容的第一端和第一驱动晶体管的栅极连接；
    所述第五开关晶体管的栅极与所述第六开关晶体管的栅极和所述第二扫描线连接，源漏极与所述第二存储电容的第一端和所述第二驱动晶体管的栅极连接；
    所述第六开关晶体管的源极与数据线连接，漏极与所述第二存储电容的第二端和所述第八开关晶体管的漏极连接；
    所述第七开关晶体管的漏极与所述第九开关晶体管的源极、所述第一驱动晶体管的漏极、所述第一显示器件的第一端连接，所述第一显示器件的第二端接地；
    所述第八开关晶体管的源极与所述第十开关晶体管的源极、所述第二驱动晶体管的漏极、所述第二显示器件的第一端连接，所述第二显示器件的第二端接地；
    所述第九开关晶体管的栅极与所述第十开关晶体管的栅极和第二扫描线的连接，漏极接地；
    所述第十开关晶体管的漏极接地。
  3. 根据权利要求2所述的像素结构，其中，所述第一开关晶体管、所述第二开关晶体管、所述第三开关晶体管、所述第四开关晶体管、所述第五开关晶体管、所述第六开关晶体管、所述第七开关晶体管、所述第八开关晶体管、所述第九开关晶体管、所述第十开关晶体管、所述第一驱动晶体管、第二驱动晶体管均为N型薄膜晶体管。
  4. 根据权利要求1所述的像素结构，其中，所述补偿单元包括：第十一开关晶体管、第十二开关晶体管、第十三开关晶体管、第十四开关晶体管、第十五开关晶体管、第十六开关晶体管、第十七开关晶体管、第十八开关晶体管、第十九开关晶体管、第三存储电容、第四存储电容；其中，
    所述第十一开关晶体管的栅极与第二发光控制线连接，源极与第一参考电压源连接，漏极与所述第一驱动晶体管的源极和所述第二驱动晶体管的源极连接；
    所述第十二开关晶体管的栅线与第三扫描线连接，源极与数据线连接，漏极与所述第十三开关晶体管的源极和所述第三存储电容的第一端连接；
    所述第十三开关晶体管的栅极与所述第十四开关晶体管的栅极和第三发光控制线连接，漏极接地；
    所述第十四开关晶体管的源极与所述第四存储电容的第一端和所述第十五开关晶体管的漏极连接，漏极接地；
    所述第十五开关晶体管的栅极与第四扫描线连接，源极与数据线连接；
    所述第十六开关晶体管的栅极与第十七开关晶体管的栅极和第三发光控制线连接，源极与所述第一驱动晶体管的栅极和所述第三存储电容的第二端连接，漏极与所述第一驱动晶体管的漏极和第十八开关晶体管的源极连接；
    所述第十七开关晶体管的源极与所述第二驱动晶体管的栅极和所述第四存储电容的第二端连接，漏极与所述第二驱动晶体管的漏极和所述第十九开关晶体管的源极连接；
    所述第十八开关晶体管的栅极与所述第十九开关晶体管的栅极和第四发光控制线连接，漏极与所述第一显示器件的第一端连接，所述第一显示器件的第二端接地；
    所述第十九开关晶体管的漏极与所述第二显示器件的第一端连接，所述第二显示器件的第二端接地。
  5. 根据权利要求4所述的像素结构，其中，所述像素结构还包括：与补偿单元连接的电容式触控单元和光感式触控单元，
    所述电容式触控单元用于根据触控信号，生成相应的电信号，并实现手指触控；
    所述光感式触控单元用于根据光照强度信号，生成相应的电信号，并实现激光笔触控。
  6. 根据权利要求5所述的像素结构，其中，所述电容式触控单元包括：第一电容式晶体管、第二电容式晶体管、第三电容式晶体管、第五存储电容以及触控电极，其中，
    所述第一电容式晶体管的栅极与所述光感式触控单元和第三发光控制线连接，源极与数据线连接，漏极与所述第五存储电容的第一端和第二电容式晶体管的栅极连接；
    所述第二电容式晶体管的源极与所述第三电容式晶体管的漏极连接，漏极与所述第五存储电容的第二端和公共电极连接；
    所述第三电容式晶体管的栅极与第三扫描线连接，源极与读取线连接；
    触控电极与第二电容式晶体管的栅极连接。
  7. 根据权利要求6所述的像素结构，其中，所述光感式触控单元包括：第一光感式晶体管、第二光感式晶体管、第三光感式晶体管、感光晶体管、第六存储电容，其中，
    所述感光晶体管的栅极与所述第一光感式晶体管的源极、第二光感式晶体管的源极和所述第六存储电容的第一端连接，漏极与所述第六存储电容的第二端和第三光感式晶体管的源极连接，源极与第二光感式晶体管的源极连接；
    所述第一光感式晶体管的栅极与所述电容式触控单元连接，漏极接地；
    所述第二光感式晶体管的栅极与第四扫描线连接，漏极与数据线连接；
    所述第三光感式晶体管的栅极与第四发光控制线连接，漏极与读取线连接。
  8. 根据权利要求4至5中任一项所述的像素结构，其中，所述第十一开关晶体管、所述第十二开关晶体管、所述第十三开关晶体管、所述第十四开关晶体管、所述第十五开关晶体管、所述第十六开关晶体管、所述第十七开关晶体管、所述第十八开关晶体管、所述第十九开关晶体管、所述第一驱动晶体管、所述第二驱动晶体管均为P型薄膜晶体管。
  9. 根据权利要求6所述的像素结构，其中，所有晶体管均为P型薄膜晶体管。
  10. 根据权利要求7所述的像素结构，其中，感光晶体管为N型薄膜晶体管，其它晶体管均为P型薄膜晶体管。
  11. 一种像素结构的驱动方法，其中，所述像素结构为权利要求1-10中任意一项所述的像素结构，所述驱动方法包括下述步骤：
    在阈值补偿阶段，通过补偿单元对所述第一像素电路中的第一驱动晶体管的栅极电压进行调整，以消除所述第一驱动晶体管的阈值电压的对所述第一显示器件驱动电流的影响，以及对所述第二像素电路中的第二驱动晶体管的栅极电压进行调整，以消除所述第二驱动晶体管的阈值电压对所述第二显示器件驱动电流的影响。
  12. 一种像素结构的驱动方法，其中，所述像素结构为权利要求3所述的像素结构，所述驱动方法包括：
    在重置阶段，对第一扫描线、第二扫描线、第一发光控制线施加高电平，第一开关晶体管、第二开关晶体管、第三开关晶体管、第四开关晶体管、第五开关晶体管、第六开关晶体管、第七开关晶体管、第八开关晶体管、第九开关晶体管、第十开关晶体管均导通，第一参考电压源将第一存储电容的第 一端的电势和第二存储电容的第一端的电势置为第一参考电压源电压(Vdd)，对数据线施加第一电压，第一存储电容的第二端的电势和第二存储电容的第二端的电势均置为第一电压(V1)；
    在放电阶段，对第一扫描线、第二扫描线施加高电平，对第一发光控制线施加低电平，第三开关晶体管、第四开关晶体管、第五开关晶体管、第六开关晶体管、第九开关晶体管、第十开关晶体管均导通，第一存储电容和第二存储电容均放电，其中，第一存储电容的第一端的电势和第二存储电容的第一端的电势分别放电到第一驱动晶体管的阈值电压(Vth1)和第二驱动晶体管的阈值电压(Vth2)；
    在持续放电阶段，对第一扫描线、第一发光控制线施加低电平，对第二扫描线施加高电平，对数据线施加第二电压(V2)，使得第一存储电容两端的电压差等于第一驱动晶体管的阈值电压减去第一电压(Vth-V1),第二存储电容两端的电压差等于第二驱动晶体管的阈值电压减去第二电压(Vth2-V2)，其中第一电压大于第二电压(V1>V2)；
    在稳压阶段，对第一扫描线、第二扫描线、第一发光控制线施加低电平，第一开关晶体管、第二开关晶体管、第三开关晶体管、第四开关晶体管、第五开关晶体管、第六开关晶体管、第七开关晶体管、第八开关晶体管、第九开关晶体管、第十开关晶体管均关断，稳定第一存储电容和第二存储电容两端的压差；
    在发光阶段，对第一扫描线、第二扫描线施加低电平，对第一发光控制线施加高电平，第一开关晶体管、第二开关晶体管、第七开关晶体管、第八开关晶体管导通，第一存储电容的第二端电势变化为第一显示器件的阳极电势(Voled1)，第一存储电容的第一端电势变为第一驱动晶体管的阈值电压减去第一电压再加上第一显示器件的阳极电势(Vth1-V1+Voled1)，第二存储电容的第二端电势变化为第二显示器件的阳极电势(Voled2)，第二存储电容的第一端电势变为第二驱动晶体管的阈值电压减去第二电压再加上第二显示器件的阳极电势(Vth2-V2+Voled2)，第一驱动晶体管和第二驱动晶体管分别驱动第一显示器件和第二显示器件发光。
  13. 一种像素结构的驱动方法，其中，所述像素结构为权利要求8至10中任意一项所述的像素结构，所述驱动方法包括：
    在重置阶段，对第三扫描线、第四扫描线、第四发光控制线施加高电平，对第二发光控制线、第三发光控制线施加低电平，第十一开关晶体管、第十三开关晶体管、第十四开关晶体管、第十六开关晶体管、第十七开关晶体管均导通，第三存储电容和第四存储电容均放电，第三存储电容放电至其第二端电势为第一参考电压源电压减去第一驱动晶体管的阈值电压(Vdd-Vth1)，第四存储电容放电至其第二端电势为第一参考电压源电压减去第二驱动晶体管的阈值电压(Vdd-Vth2)，第三存储电容的第一端和第四存储电容的第一端均接地，电势为0V，第三存储电容两端的压差为第一参考电压源电压减去第一驱动晶体管的阈值电压(Vdd-Vth1)，第四存储电容两端的压差为第一参考电压源电压减去第二驱动晶体管的阈值电压(Vdd-Vth2)；
    在第一像素电路跳变阶段，对第三扫描线施加低电平，对第四扫描线、第四发光控制线、第二发光控制线、第三发光控制线施加高电平，第十二开关晶体管导通，数据线将第三存储电容的第一端充电至第三电压(V3)，此时第三存储电容第二端电势为第一参考电压源电压减去第一驱动晶体管的阈值电压再加上第三电压(Vdd–Vth1+V3)；
    在第二像素电路跳变阶段，对第四扫描线施加低电平，对第三扫描线、第二发光控制线、第三发光控制线、第四发光控制线施加高电平，第十五开关晶体管导通，数据线将第四存储电容的第一端充电至第四电压(V4)，此时第四存储电容第二端电势为第一参考电压源电压减去第二驱动晶体管的阈值电压再加上第四电压(Vdd–Vth2+V4)，其中第四电压大于第三电压(V4>V3)；
    在发光阶段，对第三扫描线、第四扫描线、第三发光控制线施加高电平，对第二发光控制线、第四发光控制线施加低电平，第十一开关晶体管、第十八开关晶体管、第十九开关晶体管导通，第一驱动晶体管和第二驱动晶体管分别驱动第一显示器件和第二显示器件发光。
  14. 根据权利要求13所述的像素结构的驱动方法，其中对应如权利要求10所述的像素结构，该驱动方法还包括：
    在重置阶段，第一电容式晶体管导通，数据线将手指触控点电势重置为第三电压(V3)；
    第一光感式晶体管导通，将第六存储电容和感光晶体管接地重置；
    在第一像素电路跳变阶段，第二电容式晶体管、第三电容式晶体管打开，公共电极接耦合脉冲信号，提供第五存储电容一端的电势，以及充当第二电容式晶体管的源极电压；
    光感式触控单元中的所有晶体管均关断，处于停滞状态；
    在第二像素跳变阶段，电容式触控单元内的第一电容式晶体管、第二电容式晶体管、第三电容式晶体管均关闭，处于停滞状态；
    光感式触控单元内的第二光感式晶体管导通，输出第四电压(V4)给第六存储电容，第六存储电容充电；
    在发光阶段，电容式触控单元内的第一电容式晶体管、第二电容式晶体管、第三电容式晶体管均持续关闭，处于停滞状态；
    光感式触控单元通过读取线采集触控信号。
  15. 一种包括权利要求1至10中任意一项所述的像素结构的显示装置。
PCT/CN2014/088396 2014-07-07 2014-10-11 像素结构及其驱动方法、显示装置 WO2016004690A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP14882770.2A EP3168832A4 (en) 2014-07-07 2014-10-11 Pixel structure, driving method therefor, and display device
US14/778,848 US9972248B2 (en) 2014-07-07 2014-10-11 Pixel structure and driving method thereof, and display apparatus

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410321351.2 2014-07-07
CN201410321351.2A CN104134426B (zh) 2014-07-07 2014-07-07 像素结构及其驱动方法、显示装置

Publications (1)

Publication Number Publication Date
WO2016004690A1 true WO2016004690A1 (zh) 2016-01-14

Family

ID=51807078

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2014/088396 WO2016004690A1 (zh) 2014-07-07 2014-10-11 像素结构及其驱动方法、显示装置

Country Status (4)

Country Link
US (1) US9972248B2 (zh)
EP (1) EP3168832A4 (zh)
CN (1) CN104134426B (zh)
WO (1) WO2016004690A1 (zh)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103531106B (zh) * 2013-10-28 2015-06-03 京东方科技集团股份有限公司 一种有源有机发光二极管显示背板、显示设备
CN104064143B (zh) * 2014-06-13 2017-02-08 上海天马有机发光显示技术有限公司 一种有机发光二极管像素驱动电路及显示装置
CN104252845B (zh) 2014-09-25 2017-02-15 京东方科技集团股份有限公司 像素驱动电路、方法、显示面板和显示装置
CN104318898B (zh) 2014-11-11 2017-12-08 京东方科技集团股份有限公司 像素电路、驱动方法和显示装置
CN104361862A (zh) 2014-11-28 2015-02-18 京东方科技集团股份有限公司 阵列基板及其驱动方法、显示面板、显示装置
CN104464644A (zh) * 2015-01-05 2015-03-25 京东方科技集团股份有限公司 一种像素结构、显示面板和显示装置
US9600705B2 (en) * 2015-02-11 2017-03-21 Fingerprint Cards Ab Capacitive fingerprint sensing device with current readout from sensing elements
CN105679249B (zh) * 2016-03-31 2019-05-10 上海天马有机发光显示技术有限公司 驱动电路、有机电致发光二极管显示器及驱动方法
CN106104440B (zh) 2016-06-17 2019-03-19 京东方科技集团股份有限公司 触控显示基板及其制造方法、触控显示装置及像素排列
CN106023891B (zh) * 2016-07-22 2018-05-04 京东方科技集团股份有限公司 一种像素电路、其驱动方法及显示面板
CN107731156B (zh) * 2016-08-12 2020-02-21 京东方科技集团股份有限公司 补偿像素电路、显示面板、显示设备、补偿及驱动方法
KR102526355B1 (ko) * 2016-09-22 2023-05-02 엘지디스플레이 주식회사 유기 발광 표시 장치
CN106297672B (zh) 2016-10-28 2017-08-29 京东方科技集团股份有限公司 像素驱动电路、驱动方法和显示设备
CN106409231B (zh) * 2016-10-31 2018-10-12 昆山国显光电有限公司 一种亮度补偿方法、装置及显示设备
CN106782309A (zh) * 2017-02-23 2017-05-31 京东方科技集团股份有限公司 像素驱动电路、像素驱动电路的驱动方法及显示装置
CN108877664A (zh) * 2017-05-12 2018-11-23 京东方科技集团股份有限公司 像素电路及其驱动方法、显示面板
CN106997747B (zh) * 2017-05-27 2019-01-01 京东方科技集团股份有限公司 一种有机发光显示面板及显示装置
CN106971691A (zh) * 2017-05-31 2017-07-21 京东方科技集团股份有限公司 一种像素电路、驱动方法及显示装置
US10210799B2 (en) * 2017-06-28 2019-02-19 Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Pixel compensation circuit and display device
CN107230455A (zh) * 2017-07-21 2017-10-03 京东方科技集团股份有限公司 一种像素驱动电路、像素驱动方法和显示基板
CN107393505B (zh) * 2017-08-07 2019-11-08 京东方科技集团股份有限公司 感光电路及感光电路驱动方法、显示装置
KR102163643B1 (ko) 2017-08-14 2020-10-12 선전 구딕스 테크놀로지 컴퍼니, 리미티드 3차원(3ｄ) 이미지 시스템 및 전자 장치
CN107389203B (zh) * 2017-08-23 2019-08-02 京东方科技集团股份有限公司 一种像素读取电路、阵列读取电路和像素读取方法
CN109559679B (zh) * 2017-09-26 2024-07-09 京东方科技集团股份有限公司 触控显示面板及其驱动方法、像素电路、电子装置
CN107945741A (zh) * 2017-11-07 2018-04-20 深圳市华星光电半导体显示技术有限公司 Oled像素驱动电路、阵列基板及显示装置
CN110462837B (zh) * 2017-12-15 2021-08-27 京东方科技集团股份有限公司 具有图像扫描功能的amoled显示面板
CN108364607B (zh) 2018-05-25 2020-01-17 京东方科技集团股份有限公司 像素电路及其驱动方法、显示装置
TWI716120B (zh) * 2019-09-25 2021-01-11 友達光電股份有限公司 畫素電路與顯示面板
CN110599963A (zh) * 2019-09-25 2019-12-20 京东方科技集团股份有限公司 像素驱动电路、阵列基板、显示装置及像素驱动方法
CN110992884B (zh) * 2019-12-24 2021-07-09 武汉天马微电子有限公司 一种显示面板、显示装置和显示面板的侦测补偿方法
CN111540303A (zh) * 2020-01-17 2020-08-14 重庆康佳光电技术研究院有限公司 一种驱动电路及显示装置
CN113439299A (zh) * 2020-01-23 2021-09-24 京东方科技集团股份有限公司 显示基板及其驱动方法、显示装置
CN111584577A (zh) 2020-05-14 2020-08-25 深圳市华星光电半导体显示技术有限公司 显示面板及其制作方法
CN114550630A (zh) * 2020-11-24 2022-05-27 京东方科技集团股份有限公司 显示面板及其驱动方法、显示装置
CN115881039B (zh) * 2021-09-27 2024-09-17 乐金显示有限公司 像素电路和包括该像素电路的显示装置
CN114267297B (zh) 2021-12-16 2023-05-02 Tcl华星光电技术有限公司 像素补偿电路、方法及显示面板
CN114299876B (zh) * 2021-12-24 2023-08-11 京东方科技集团股份有限公司 显示面板及其驱动方法、显示装置
CN115862540B (zh) * 2023-03-02 2023-05-26 惠科股份有限公司 像素驱动电路、像素驱动方法和显示面板
CN117854434B (zh) * 2024-02-08 2024-05-24 惠科股份有限公司 像素补偿电路、像素电路、显示装置及像素补偿方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101751887A (zh) * 2008-11-27 2010-06-23 乐金显示有限公司 液晶显示器
CN101826300A (zh) * 2010-03-30 2010-09-08 汕头超声显示器（二厂）有限公司 一种有源显示器件及其驱动方法
US20120026146A1 (en) * 2010-08-02 2012-02-02 Samsung Mobile Display Co., Ltd. Pixel and organic light emitting display device using the same
CN103150991A (zh) * 2013-03-14 2013-06-12 友达光电股份有限公司 一种用于amoled显示器的像素补偿电路
CN104091559A (zh) * 2014-06-19 2014-10-08 京东方科技集团股份有限公司 像素电路及其驱动方法、显示装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100365690C (zh) * 2003-06-30 2008-01-30 胜华科技股份有限公司 主动式有机发光二极管的电流驱动装置
KR20060054603A (ko) 2004-11-15 2006-05-23 삼성전자주식회사 표시 장치 및 그 구동 방법
JP5589452B2 (ja) * 2010-03-11 2014-09-17 セイコーエプソン株式会社 発光装置および電子機器、発光装置の駆動方法
TWI471841B (zh) 2011-11-11 2015-02-01 Wintek Corp 有機發光二極體畫素電路及其驅動電路與應用
KR101950846B1 (ko) 2012-12-20 2019-02-22 엘지디스플레이 주식회사 발광다이오드 표시장치
CN103268753A (zh) * 2013-05-28 2013-08-28 上海中科高等研究院 扫描线共用的amoled驱动电路及其驱动方法
CN203480810U (zh) * 2013-09-06 2014-03-12 京东方科技集团股份有限公司 一种像素电路及显示器
CN104078004B (zh) * 2014-06-18 2016-08-31 京东方科技集团股份有限公司 像素电路和显示装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101751887A (zh) * 2008-11-27 2010-06-23 乐金显示有限公司 液晶显示器
CN101826300A (zh) * 2010-03-30 2010-09-08 汕头超声显示器（二厂）有限公司 一种有源显示器件及其驱动方法
US20120026146A1 (en) * 2010-08-02 2012-02-02 Samsung Mobile Display Co., Ltd. Pixel and organic light emitting display device using the same
CN103150991A (zh) * 2013-03-14 2013-06-12 友达光电股份有限公司 一种用于amoled显示器的像素补偿电路
CN104091559A (zh) * 2014-06-19 2014-10-08 京东方科技集团股份有限公司 像素电路及其驱动方法、显示装置

Also Published As

Publication number Publication date
CN104134426A (zh) 2014-11-05
EP3168832A4 (en) 2018-03-14
US9972248B2 (en) 2018-05-15
EP3168832A1 (en) 2017-05-17
CN104134426B (zh) 2017-02-15
US20160155385A1 (en) 2016-06-02

Similar Documents

Publication Publication Date Title
WO2016004690A1 (zh) 像素结构及其驱动方法、显示装置
KR101821519B1 (ko) 픽셀 회로, 그 구동 방법 및 디스플레이 디바이스
US11881164B2 (en) Pixel circuit and driving method thereof, and display panel
US9880654B2 (en) Touch display drive circuit, touch display drive method and display device
US9727186B2 (en) Pixel circuit, driving methods thereof, organic light emitting diode display panel, and display device
US10068950B2 (en) Pixel circuit, driving method thereof, and display apparatus
WO2016045301A1 (zh) 像素电路及其驱动方法、有机发光显示面板及显示装置
WO2018095031A1 (zh) 像素电路及其驱动方法、以及显示面板
CN103218970B (zh) Amoled像素单元及其驱动方法、显示装置
KR101581147B1 (ko) 외부 보상용 감지 회로, 이의 감지 방법 및 표시 장치
WO2016015392A1 (zh) 触控显示电路及显示装置
US10642389B2 (en) Touch display driving circuit, touch display apparatus
US20160274692A1 (en) Pixel circuit, method for driving the same, organic light-emitting diode display panel, and display device
WO2015188468A1 (zh) 像素电路及其驱动方法、有机发光显示面板及显示装置
KR101576405B1 (ko) 외부 보상 감지 회로와 그 감지 방법 및 디스플레이 디바이스
WO2015196597A1 (zh) 像素电路、显示面板和显示装置
WO2015188533A1 (zh) 像素驱动电路、驱动方法、阵列基板及显示装置
US20210225277A1 (en) Compensation Method and Compensation Apparatus for Organic Light-Emitting Display and Display Device
CN203179475U (zh) Amoled像素单元及显示装置

Legal Events

Date Code Title Description
REEP Request for entry into the european phase

Ref document number: 2014882770

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 2014882770

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 14778848

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 14882770

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE