WO2015029363A1 - ゲート駆動回路 - Google Patents
ゲート駆動回路 Download PDFInfo
- Publication number
- WO2015029363A1 WO2015029363A1 PCT/JP2014/004201 JP2014004201W WO2015029363A1 WO 2015029363 A1 WO2015029363 A1 WO 2015029363A1 JP 2014004201 W JP2014004201 W JP 2014004201W WO 2015029363 A1 WO2015029363 A1 WO 2015029363A1
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- WIPO (PCT)
- Prior art keywords
- circuit
- signal
- high frequency
- gate drive
- drive circuit
- Prior art date
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F5/00—Systems for regulating electric variables by detecting deviations in the electric input to the system and thereby controlling a device within the system to obtain a regulated output
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J50/00—Circuit arrangements or systems for wireless supply or distribution of electric power
- H02J50/10—Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling
- H02J50/12—Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling of the resonant type
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J50/00—Circuit arrangements or systems for wireless supply or distribution of electric power
- H02J50/40—Circuit arrangements or systems for wireless supply or distribution of electric power using two or more transmitting or receiving devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
- H03K17/0412—Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the control circuit
- H03K17/04123—Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the control circuit in field-effect transistor switches
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/689—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors with galvanic isolation between the control circuit and the output circuit
- H03K17/691—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors with galvanic isolation between the control circuit and the output circuit using transformer coupling
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0081—Power supply means, e.g. to the switch driver
Definitions
- the present disclosure relates to an insulated gate driving circuit that drives a semiconductor switching element.
- inverter system that switches electric power is attracting attention as a major point for saving electric power in electrical equipment.
- Inverters are widely used in familiar electrical devices such as air conditioners, washing machines and refrigerators, industrial electrical devices such as power conditioners installed in solar cells, and in-vehicle electrical devices such as electric vehicles.
- Such an inverter includes a semiconductor switching element for switching electric power and a gate drive circuit for driving the semiconductor switching element.
- a semiconductor switching element as a power device typically operates at a high voltage of several tens to several thousand volts.
- a control signal for turning on / off the semiconductor switching element is supplied from a control circuit (control IC) operating at several volts or less. Therefore, in such a case, the gate drive circuit supplies a drive signal to the semiconductor switching element while ensuring electrical insulation between the output side where the semiconductor switching element is provided and the input side where the control circuit is provided.
- a gate drive circuit using an electromagnetic resonance coupler has been proposed (see, for example, Non-Patent Document 1).
- the present disclosure provides a gate drive circuit capable of supplying a large current to the semiconductor switching element.
- a gate drive circuit is an insulated gate drive circuit that drives a semiconductor switching element, and includes a first modulated signal that modulates a first high frequency according to a first input signal, A modulation circuit for generating a second modulated signal obtained by modulating the first high frequency according to a second input signal different from the first input signal; and a first electromagnetic for insulatingly transmitting the first modulated signal.
- An insulating transmission unit including a field resonance coupler and a plurality of electromagnetic resonance couplers including a second electromagnetic resonance coupler for insulatingly transmitting the second modulated signal; and the first electromagnetic wave
- a first rectifier circuit that generates a first signal by rectifying the first modulated signal insulated and transmitted by the field resonance coupler, and the insulation signal transmitted by the second electromagnetic resonance coupler and the second electromagnetic resonance coupler.
- a second rectifier circuit for generating a second signal and a third rectifier for generating a charging voltage by rectifying the second high frequency signal that is insulated and transmitted by one of the plurality of electromagnetic resonance couplers.
- a rectifier circuit, a capacitor charged in accordance with the charging voltage, and a charge charged in the capacitor in response to at least one of the first signal and the second signal is supplied to the gate terminal of the semiconductor switching element And an output circuit for selecting whether or not to perform.
- the gate drive circuit according to the present disclosure can supply a large current to the semiconductor switching element.
- FIG. 1 is a system block diagram illustrating an example of a gate drive circuit according to the first embodiment.
- FIG. 2 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the first embodiment.
- FIG. 3 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the first embodiment.
- FIG. 4 is a diagram illustrating an example of an input signal in the gate drive circuit according to the first embodiment.
- FIG. 5 is a diagram illustrating a configuration example of an electromagnetic resonance coupler in the gate drive circuit according to the first embodiment.
- FIG. 6 is a diagram for explaining an operation example of the half-bridge circuit in the gate drive circuit according to the first embodiment.
- FIG. 1 is a system block diagram illustrating an example of a gate drive circuit according to the first embodiment.
- FIG. 2 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the first embodiment.
- FIG. 3 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the first embodiment.
- FIG. 7 is a diagram showing an example of the relationship between the gate-source voltage of the transistors constituting the half-bridge circuit and the charge charged in the capacitor in the gate drive circuit according to the first embodiment.
- FIG. 8 is a diagram illustrating a simulation result of the output waveform output from the output terminal in the gate drive circuit according to the first embodiment.
- FIG. 9 is a diagram illustrating an actual measurement result of the output waveform output from the output terminal in the gate drive circuit according to the first embodiment.
- FIG. 10 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the first embodiment.
- FIG. 11 is a diagram illustrating a specific configuration example of the gate drive circuit according to the first embodiment.
- FIG. 12 is a system block diagram illustrating an example of the gate drive circuit according to the second embodiment.
- FIG. 13 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the second embodiment.
- FIG. 14 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the second embodiment.
- FIG. 15 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the third embodiment.
- FIG. 16 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the third embodiment.
- FIG. 17 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the fourth embodiment.
- FIG. 18 is a diagram illustrating an operation example of the gate drive circuit according to the fourth embodiment.
- FIG. 19 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the fourth embodiment.
- FIG. 19 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the fourth embodiment.
- FIG. 20 is a system block diagram illustrating an example of a gate drive circuit according to the fifth embodiment.
- FIG. 21 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the fifth embodiment.
- FIG. 22 is a diagram illustrating an example of a relationship between a gate-source voltage of a transistor constituting a half-bridge circuit and a charge charged in a capacitor in the gate drive circuit according to the fifth embodiment.
- FIG. 23 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the fifth embodiment.
- FIG. 24 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the fifth embodiment.
- an insulated gate drive circuit in which the input side and the output side are insulated is used.
- the insulated gate drive circuit In the insulated gate drive circuit, the high voltage circuit connected to the output side is insulated from the low voltage circuit connected to the input side. As a result, the insulated gate drive circuit can prevent malfunction and failure of the low voltage circuit.
- the isolated gate drive circuit separates the ground loop of the high-voltage circuit from the ground loop of the low-voltage circuit, so that if one circuit malfunctions, the other circuit is overloaded. It is possible to prevent voltage from being applied.
- a gate drive circuit including a photocoupler is known as an example of an insulated gate drive circuit.
- the control signal is insulated and transmitted by the photocoupler.
- drive power supplied from a voltage source is insulated and transmitted using electromagnetic induction of a transformer.
- the gate drive circuit generates a drive signal by combining the control signal and the drive power, and supplies the drive signal to the semiconductor switching element.
- Non-Patent Document 1 proposes an insulated gate drive circuit using microwaves.
- a gate drive circuit supplies a drive signal and drive power to the semiconductor switching element using microwaves.
- the gate drive circuit modulates the microwave, which is the drive power, in accordance with the control signal, and insulates and transmits the modulated microwave using an insulating element called an electromagnetic resonance coupler. Thereafter, the gate drive circuit generates a drive signal by rectifying the modulated microwave.
- Such a gate drive circuit using a microwave includes an electromagnetic resonance coupler which is a small single element instead of a plurality of components such as a photocoupler and a transformer. Therefore, the gate driving circuit using microwaves can be miniaturized.
- the gate drive circuit can charge the gate capacitance (Ciss) of the semiconductor switching element with sufficient charge in a short time in order to turn on the semiconductor switching element at high speed.
- a semiconductor switching element of a power device that handles large power and large current has a large gate width (Wg), and therefore has a large gate capacity.
- the gate drive circuit using microwaves uses microwaves to supply drive power to the gate terminal of the semiconductor switching element, so compared with a gate drive circuit using a conventional photocoupler and transformer, It is difficult to supply large driving power to the gate terminal of the semiconductor switching element. That is, the gate drive circuit using microwaves has a problem that it is difficult to supply a large current to the gate terminal of the semiconductor switching element.
- a method in which a buffer circuit is added to the output section of the gate drive circuit to increase the output current output from the gate drive circuit.
- a large current is supplied to the gate terminal of the semiconductor switching element by switching the current from the power source using a switch circuit composed of a transistor.
- Patent Document 1 discloses a circuit including a bridge circuit as a switch circuit and a capacitor as a power source. Specifically, the circuit of Patent Document 1 supplies power to a load by switching the charge state of a capacitor with a floating bridge circuit.
- the problem is that the circuit becomes large due to the configuration for insulating the power supply (capacitor).
- the present inventors have studied an insulated gate drive circuit that has a small circuit scale and can supply a large current to the semiconductor switching element, and has reached the present disclosure.
- a gate drive circuit is an insulated gate drive circuit that drives a semiconductor switching element, and is a first modulated signal that modulates a first high frequency according to a first input signal. And a modulation circuit for generating a second modulated signal obtained by modulating the first high frequency according to a second input signal different from the first input signal, and a first circuit for insulatingly transmitting the first modulated signal.
- An insulating transmission unit including a plurality of electromagnetic resonance couplers including one electromagnetic resonance coupler and a second electromagnetic resonance coupler for insulatingly transmitting the second modulated signal;
- a first rectifier circuit that generates a first signal by rectifying the first modulated signal insulated and transmitted by one electromagnetic resonance coupler, and an insulated transmission by the second electromagnetic resonance coupler Rectifying the modulated second modulated signal Accordingly, the second rectifier circuit that generates the second signal and the third high frequency that is insulated and transmitted by one of the plurality of electromagnetic resonance couplers rectifies the third high frequency that generates the charging voltage.
- Rectifier circuit a capacitor charged in accordance with the charging voltage, and a charge charged in the capacitor in response to at least one of the first signal and the second signal to the gate terminal of the semiconductor switching element And an output circuit for selecting whether to supply.
- the gate drive circuit can supply a large current to the semiconductor switching element.
- the charging voltage is obtained by rectifying the second high frequency, the capacitor can be charged without separately providing an insulating power source for charging the capacitor.
- the insulation transmission unit may further include a third electromagnetic resonance coupler that performs insulation transmission of the second high frequency.
- the electromagnetic resonance coupler for insulatingly transmitting the modulated signal and the electromagnetic resonance coupler for insulatingly transmitting the second high frequency are separated. Therefore, it is possible to separate the electromagnetic resonance coupler for insulatingly transmitting the modulated signal and the electromagnetic resonance coupler for insulatingly transmitting the second high frequency. Therefore, the second high frequency wave can be input to the third rectifier circuit without being distributed after being transmitted by the third electromagnetic resonance coupler. Therefore, a larger current can be supplied to the gate terminal of the semiconductor switching element.
- the maximum value of the amplitude of the second high frequency may be larger than the maximum value of the amplitude of the first modulated signal and the second modulated signal. Good. Thereby, the electric power of the 2nd high frequency for charging a capacitor can be enlarged.
- the gate drive circuit according to an aspect of the present disclosure may further include, for example, a high frequency generator that generates the first high frequency and the second high frequency.
- the high frequency generator separates a high frequency into a fundamental wave component and a harmonic component, and outputs the fundamental wave component as the second high frequency
- the harmonic A frequency distribution filter that outputs a wave component as the first high frequency
- the high-frequency generator may include an amplifier circuit that changes the amplitude of the second high-frequency.
- the amplifier circuit changes the amplitude of the second high frequency according to a signal input to a control terminal
- the third rectifier circuit includes the output
- the charging voltage is output when the circuit does not supply the charge to the gate terminal of the semiconductor switching element, and the charging voltage is output when the output circuit supplies the charge to the gate terminal of the semiconductor switching element. May not be output.
- a high frequency can be output from the high frequency oscillation circuit only during a period when the capacitor is charged, and the gate drive circuit can be saved in power.
- the second modulated signal includes the second high frequency
- the third rectifier circuit is insulated and transmitted by the second electromagnetic resonance coupler.
- the charging voltage may be generated by rectifying the second modulated signal.
- the second high frequency that is the basis of the charging voltage is insulated and transmitted by the second electromagnetic resonance coupler that insulates and transmits the second modulated signal, so that the gate drive circuit can be simplified. it can.
- the maximum value of the amplitude of the second modulated signal may be larger than the maximum value of the first modulated signal amplitude. Thereby, the electric power of the 2nd high frequency for charging a capacitor can be enlarged.
- the gate drive circuit further includes, for example, an amplifier circuit that is provided between the modulation circuit and the second electromagnetic resonance coupler and amplifies the second modulated signal. May be.
- the gate drive circuit according to an aspect of the present disclosure may further include a high-frequency oscillation circuit that generates the first high frequency, for example.
- the third rectifier circuit outputs the charging voltage when the output circuit does not supply the charge to the gate terminal of the semiconductor switching element, When the output circuit supplies the electric charge to the gate terminal of the semiconductor switching element, the charging voltage may not be output.
- a high frequency can be output from the high frequency oscillation circuit only during a period when the capacitor is charged, and the gate drive circuit can be saved in power.
- the output circuit supplies a charge charged in the capacitor to a gate terminal of the semiconductor switching element in accordance with the first signal.
- a second switching element that extracts charges from the gate terminal of the semiconductor switching element according to the second signal.
- the gate drive circuit can supply a large current to the semiconductor switching element.
- the output circuit supplies a charge charged in the capacitor to a gate terminal of the semiconductor switching element in accordance with the first signal.
- a fourth switching element, and a second switching element and a third switching element for extracting charge from the gate terminal in accordance with the second signal and charging the capacitor with the charge.
- the gate drive circuit can recover the charge once supplied to the gate of the semiconductor switching element and charge the capacitor again.
- the modulation circuit generates the first modulated signal by mixing the first input signal and the first high frequency
- the second input A mixing circuit that generates the second modulated signal by mixing a signal and the first high frequency may be used.
- the second input signal may be an inverted signal of the first input signal.
- the modulation circuit outputs the first high frequency to the first electromagnetic resonance coupler in accordance with the first input signal and the second input signal. It may be a switch circuit that generates the first modulated signal and the second modulated signal by switching whether to output to the second electromagnetic resonance coupler.
- a gate drive circuit is, for example, an insulated gate drive circuit that drives a semiconductor switching element, and generates a modulated signal in which a first high frequency is modulated in accordance with an input signal
- An insulating transmission unit including an electromagnetic resonance coupler for insulatingly transmitting the modulated signal; and a rectifying circuit for generating a signal by rectifying the modulated signal insulated and transmitted by the electromagnetic resonance coupler; , By rectifying the second high frequency that is insulated and transmitted by the insulated transmission unit, another rectifier circuit that generates a charging voltage, a capacitor that is charged according to the charging voltage, and according to the signal, And an output circuit that selects whether or not the charge charged in the capacitor is supplied to the gate terminal of the semiconductor switching element.
- the gate drive circuit can supply a large current to the semiconductor switching element.
- the capacitor can be charged without separately providing an insulating power source for charging the capacitor.
- the modulated signal includes the second high frequency
- the other rectifier circuit includes the second high frequency that is insulated and transmitted by the electromagnetic resonance coupler.
- the charging voltage may be generated by rectification.
- the insulation transmission unit may further include another electromagnetic resonance coupler that performs insulation transmission of the second high frequency.
- FIG. 1 is a system block diagram showing an example of a gate drive circuit according to the first embodiment.
- FIG. 2 is a circuit diagram showing a specific configuration example of the gate drive circuit shown in FIG.
- the gate drive circuit 1000 includes a DC power supply 100 and a signal generator 3.
- the gate drive circuit 1000 includes a high-frequency oscillation circuit 10, a modulation circuit 30, a first electromagnetic resonance coupler 20a, a second electromagnetic resonance coupler 20b, and a third electromagnetic resonance coupler 20c.
- the gate drive circuit 1000 includes a first rectifier circuit 40a, a second rectifier circuit 40b, a third rectifier circuit 40c, a capacitor 50, a half bridge circuit 60, an output terminal 71, and an output reference terminal. 72.
- the capacitor 50 is, for example, a capacitive element, not a parasitic capacitance.
- the capacitor 50 is an element having a capacitance of 10 pF or more, for example.
- the half bridge circuit 60 includes, for example, a first switching element 61 and a transistor 62.
- the first switching element 61 may be, for example, a transistor 61.
- the second switching element 62 may be a transistor 62, for example.
- the half bridge circuit 60 is an example of the output circuit 60.
- the output circuit 60 is a half bridge circuit 60 including a transistor 61 and a transistor 62 will be described.
- the gate drive circuit 1000 is an insulated gate drive circuit that drives the semiconductor switching element 1.
- the semiconductor switching element 1 has a terminal that controls a current flowing through the semiconductor switching element, for example, a gate terminal.
- the semiconductor switching element 1 is, for example, a semiconductor switching element that includes a gate terminal, a first terminal, and a second terminal. In this case, the conduction state between the first terminal and the second terminal is controlled in accordance with a signal input to the gate terminal.
- One of the first terminal and the second terminal may be a source terminal, and the other may be a drain terminal.
- One of the first terminal and the second terminal may be an emitter terminal, and the other may be a collector terminal.
- the semiconductor switching element 1 is a kind of power device, for example, and handles a voltage of 100 V or more and a current of 1 A or more.
- the semiconductor switching element 1 includes, for example, a gate terminal, a source terminal, and a drain terminal.
- the gate terminal of the semiconductor switching element 1 is connected to the output terminal 71 of the gate drive circuit 1000, and the source terminal of the semiconductor switching element 1 is connected to the output reference terminal 72 of the gate drive circuit 1000.
- the semiconductor switching element 1 may be, for example, an IGBT (Insulated Gate Bipolar Transistors), a SiC FET (Field Effect Transistor), or a gallium nitride (GaN) transistor.
- a load 2 is connected in series with the semiconductor switching element 1. Specifically, one end of the load 2 is connected to the source terminal of the semiconductor switching element 1. Further, the positive terminal of the DC power supply 101 is connected to the drain terminal of the semiconductor switching element 1, and the negative terminal of the DC power supply 101 is connected to the other end of the load 2.
- DC power supply 100 is a power supply that supplies power for operating each of high-frequency oscillation circuit 10 and modulation circuit 30, for example.
- the DC power supply 100 is provided inside the gate drive circuit 1000, but may be provided outside the gate drive circuit 1000. That is, the gate drive circuit 1000 may not include the DC power supply 100.
- the signal generator 3 generates an input signal and outputs it to the modulation circuit 30.
- the input signal corresponds to a control signal, and a drive signal for driving the semiconductor switching element 1 is generated based on the control signal.
- the signal generator 3 is composed of a logic IC, for example.
- the input signal is a binary signal composed of a high level and a low level, as in the waveform 501 and the waveform 502 shown in FIG.
- the input signal may be composed of a first input signal and a second input signal.
- the waveform 501 is a first input signal
- the waveform 502 is a second input signal.
- the first input signal includes, for example, a first low level voltage and a first high level voltage larger than the first low level voltage.
- the second input signal includes, for example, a second low level voltage and a second high level voltage that is larger than the second low level voltage.
- the first input signal may indicate the first low level voltage.
- the second input signal may be a signal obtained by inverting the first input signal.
- the second input signal may be a signal obtained by inverting the first input signal based on an intermediate value between the first high level voltage and the second high level voltage.
- the first input signal and the second input signal can have a complementary relationship (complementary).
- the first low level voltage and / or the second low level voltage may be, for example, 0V.
- the signal generator 3 is provided inside the gate drive circuit 1000, but may be provided outside the gate drive circuit 1000.
- the gate driving circuit 1000 includes a first input terminal to which an input signal is input. That is, the gate drive circuit 1000 does not have to include the signal generator 3.
- the high frequency oscillation circuit 10 generates a high frequency.
- the high frequency may be a microwave.
- the high frequency plays a role of transmitting power.
- the high frequency oscillation circuit 10 includes at least two outputs.
- the high frequency oscillation circuit 10 outputs the high frequency generated to each of the modulation circuit 30 and the third electromagnetic resonance coupler 20c.
- the high frequency is a waveform such as a waveform 503 and a waveform 504 shown in FIG.
- the high-frequency frequency may be, for example, 2.4 GHz or 5.8 GHz, which is an ISM band that can be used without a license if the output is low, or may be another frequency.
- the high-frequency oscillation circuit 10 may be a Colpitts oscillator, a Hartley oscillator, or another oscillator that generates a microwave.
- the high-frequency oscillation circuit 10 may include a frequency adjustment mechanism in the case where the high-frequency frequency fluctuates.
- the high frequency generated by the high frequency oscillation circuit 10 has, for example, a constant amplitude and a constant frequency.
- the high frequency modulated by the first input signal and / or the second input signal that is, the high frequency that is the carrier wave of the first input signal and / or the second input signal is referred to as the first high frequency
- a high frequency for supplying power may be called a second high frequency.
- the waveform 503 is the first high frequency
- the waveform 504 is the second high frequency.
- the second high frequency is a high frequency input to the third electromagnetic resonance coupler.
- the second high frequency may have a constant amplitude or a plurality of amplitudes. That is, the second high frequency may have signal components based on a plurality of different amplitudes.
- the first high frequency and the second high frequency may have the same amplitude or different amplitudes. However, when the second high frequency has a larger amplitude than the first high frequency, the amount of charge charged in the capacitor can be increased as will be described later.
- the first high frequency and the second high frequency may have the same frequency or different frequencies.
- the high-frequency oscillation circuit 10 is provided inside the gate drive circuit 1000, but may be provided outside the gate drive circuit 1000.
- the gate drive circuit 1000 includes a second input terminal to which a high frequency is input. That is, the gate drive circuit 1000 may include the high-frequency oscillation circuit 10.
- the high-frequency oscillation circuit 10 can be included in a high-frequency generator.
- the modulation circuit 30 generates a first modulated signal by modulating a high frequency according to the first input signal output from the signal generator 3, and outputs the first modulated signal to the first electromagnetic resonance coupler 20a. As shown in FIG. 2, when the modulation circuit 30 is a mixing circuit, the modulation circuit 30 generates the first modulated signal by mixing the first input signal and the high frequency.
- the first modulated signal has a waveform such as a waveform 505 shown in FIG.
- the modulation circuit 30 generates the second modulated signal by modulating the high frequency according to the second input signal output from the signal generator 3 and different from the first input signal, and generates the second modulated signal. It outputs to the electromagnetic resonance coupler 20b.
- the modulation circuit 30 is a mixing circuit, specifically, the second modulated signal is generated by mixing the second input signal and the high frequency.
- the second modulated signal has a waveform such as a waveform 506 shown in FIG.
- the first modulated signal includes, for example, a first amplitude and a second amplitude that is larger than the first amplitude.
- the first amplitude of the first modulated signal corresponds to, for example, the first low level voltage of the first input signal
- the second amplitude of the first modulated signal is, for example, the first high level of the first input signal.
- the second modulated signal includes, for example, a third amplitude and a fourth amplitude that is larger than the third amplitude.
- the third amplitude of the second modulated signal corresponds to, for example, the second low level voltage of the second input signal
- the fourth amplitude of the second modulated signal is, for example, the second high level of the second input signal.
- the level voltage corresponds to the level voltage.
- the second modulated signal may exhibit the third amplitude.
- the first modulated signal may exhibit the first amplitude during the period in which the second modulated signal exhibits the fourth amplitude.
- the first amplitude and the third amplitude, and / or the second amplitude and the fourth amplitude may be the same value.
- the first amplitude and / or the third amplitude may be zero.
- the first modulated signal and the second modulated signal are in a complementary relationship, but the input signal may be another waveform that is more optimal.
- the modulation circuit 30 is a mixing circuit, specifically, a so-called differential mixer.
- the differential mixer can modulate a high frequency with low loss and can include a plurality of input / output terminals.
- FIG. 3 is a circuit diagram illustrating a specific configuration example of a gate drive circuit including a switch circuit as a modulation circuit.
- the input signal is, for example, a complementary signal as shown in (a) and (b) of FIG.
- a signal is generated by a signal generator 3 constituted by a logic IC including, for example, Si-CMOS or a compound semiconductor.
- the input signal may be a PWM signal whose duty is not constant, for example.
- the signal shown in (a) of FIG. 4 may be the first input signal
- the signal shown in (b) of FIG. 4 may be the second input signal.
- the isolation between the output terminals of the modulation circuit 30a is improved. Further, since the modulation circuit 30a does not require a matching circuit such as an inductor, the size of the gate drive circuit 1000 can be reduced.
- the first electromagnetic resonance coupler 20a insulates and transmits the first modulated signal generated by the modulation circuit 30.
- the second electromagnetic resonance coupler 20b insulates and transmits the second modulated signal generated by the modulation circuit 30.
- the third electromagnetic resonance coupler 20c insulates and transmits the high frequency generated by the high frequency oscillation circuit 10.
- a group including at least one of the first electromagnetic resonance coupler 20a, the second electromagnetic resonance coupler 20b, and the third electromagnetic resonance coupler 20c is referred to as an insulated transmission unit.
- the insulated transmission unit is a general term for one or more electromagnetic resonance couplers, and does not limit the arrangement or structure of each electromagnetic resonance coupler.
- the electromagnetic resonance couplers may not be arranged as one unit in terms of the structure.
- the insulating transmission unit includes a first electromagnetic resonance coupler 20a, a second electromagnetic resonance coupler 20b, and a third electromagnetic resonance coupler 20c.
- the electromagnetic resonance coupler 20 can be used as the first electromagnetic resonance coupler 20a, the second electromagnetic resonance coupler 20b, and the third electromagnetic resonance coupler 20c.
- FIG. 5 is a diagram showing a configuration example of an electromagnetic resonance coupler.
- the electromagnetic resonance coupler 20 includes a first resonator 2000 and a second resonator 2003.
- the electromagnetic resonance coupler 20 is a so-called open ring type electromagnetic resonance coupler that performs insulation transmission (non-contact transmission) of a signal to be transmitted.
- the first resonator 2000 is a circular transmission line formed of metal wiring, and has an open part 2002 at an arbitrary position in the transmission line.
- the second resonator 2003 is a circular transmission line formed of metal wiring, and has an open portion 2005 at an arbitrary position in the transmission line.
- the metal wiring used for the first resonator 2000 and the second resonator 2003 may be made of, for example, copper or other metal such as gold.
- the first resonator 2000 and the second resonator 2003 are provided facing each other with a certain distance.
- the first resonator 2000 and the second resonator 2003 are obtained by turning a high-frequency antenna into a circular shape.
- the line lengths of the first resonator 2000 and the second resonator 2003 are, for example, about one-half wavelength of the signal to be transmitted.
- the first input / output terminal 2001 is a metal wiring that inputs and outputs a signal to be transmitted to the first resonator 2000, and is arranged at an arbitrary position of the first resonator 2000.
- the second input / output terminal 2004 inputs / outputs a signal to be transmitted to / from the second resonator 2003 and is disposed at an arbitrary position of the second resonator 2003.
- the transmission target signal input to the first input / output terminal 2001 is output to the second input / output terminal 2004 and the transmission target signal input to the second input / output terminal 2004.
- the signal is output to the first input / output terminal 2001.
- the metal wiring used for the first input / output terminal 2001 and the second input / output terminal 2004 may be made of, for example, copper or other metal such as gold.
- the electromagnetic resonance coupler 20 can perform low-loss insulation transmission and can greatly increase the distance between the resonators. Further, as described above, the length of the resonator (the length of the transmission line) depends on the frequency of the signal to be transmitted, and the higher the frequency of the signal, the smaller the resonator.
- the electromagnetic resonance coupler 20 may have a rectangular outline, for example.
- the electromagnetic resonance coupler 20 may be anything as long as it can transmit a signal in a non-contact manner using electromagnetic resonance coupling.
- the first electromagnetic resonance coupler 20a, the second electromagnetic resonance coupler 20b, and the third electromagnetic resonance coupler 20c may not be separate elements.
- a single insulating element may include the first electromagnetic resonance coupler 20a and the second electromagnetic resonance coupler 20b as functions. In other words, it is sufficient that a single insulating element can transmit the first modulated signal and the second modulated signal separately.
- the first rectifier circuit 40a generates the first signal by rectifying the first modulated signal that is insulated and transmitted by the first electromagnetic resonance coupler 20a.
- the first rectifier circuit 40a includes, for example, a diode 41a, an inductor 42a, and a capacitor 43a.
- the first signal is, for example, a signal having a waveform like the waveform 508 in FIG.
- the first signal is output from the first rectifier circuit 40 a and input to, for example, the gate terminal of the transistor 61.
- the second rectifier circuit 40b generates a second signal by rectifying the second modulated signal insulated and transmitted by the second electromagnetic resonance coupler 20b.
- the second rectifier circuit 40b includes, for example, a diode 41b, an inductor 42b, and a capacitor 43b.
- the second signal is, for example, a signal having a waveform like the waveform 509 in FIG.
- the second signal is output from the second rectifier circuit 40 b and input to, for example, the gate terminal of the transistor 62.
- the first signal includes, for example, a first off voltage and a first on voltage different from the first off voltage. When the transistor 61 is an N-type transistor, the first on voltage is higher than the first off voltage.
- the first on-voltage is smaller than the first off-voltage.
- the first off voltage of the first signal corresponds to, for example, the first amplitude of the first modulated signal
- the first on voltage of the first signal is, for example, the first signal Corresponds to the second amplitude of the modulated signal.
- the first off voltage of the first signal corresponds to, for example, the first low level voltage of the first input signal
- the first on voltage of the first signal is, for example, the first high level of the first input signal. Corresponds to voltage.
- the first off-voltage of the first signal corresponds to, for example, the second amplitude of the first modulated signal
- the first on-voltage of the first signal is, for example, This corresponds to the first amplitude of one modulated signal.
- the first off voltage of the first signal corresponds to, for example, the first high level voltage of the first input signal
- the first on voltage of the first signal is, for example, the first low level of the first input signal.
- the second signal includes, for example, a second off voltage and a second on voltage different from the second off voltage.
- the transistor 62 is an N-type transistor, the second on voltage is higher than the second off voltage.
- the second on-voltage is smaller than the second off-voltage.
- the second off-voltage of the second signal corresponds to, for example, the third amplitude of the second modulated signal
- the second on-voltage of the second signal is, for example, the second Corresponds to the fourth amplitude of the modulated signal.
- the second off voltage of the second signal corresponds to, for example, the second low level voltage of the second input signal
- the second on voltage of the second signal is, for example, the second high level of the second input signal. Corresponds to voltage.
- the second off-voltage of the second signal corresponds to, for example, the fourth amplitude of the second modulated signal
- the second on-voltage of the second signal is, for example, the first This corresponds to the third amplitude of the second modulated signal.
- the second off voltage of the second signal corresponds to, for example, the second high level voltage of the second input signal
- the second on voltage of the second signal is, for example, the second low level of the second input signal.
- the second signal may indicate the second off-voltage.
- the first signal may indicate the first off-voltage.
- the first signal and the second signal may have a complementary relationship (complementary) or other relationship.
- the first off voltage and the second off voltage, and / or the first on voltage and the second on voltage may be the same value.
- the transistor 61 and the transistor 62 are normally-on and N-type will be described unless otherwise specified. Specifically, for example, as illustrated in FIG. 2, an example in which the first on-voltage and the second on-voltage are 0, and the first off-voltage and the second off-voltage have negative values will be described.
- the third rectifier circuit 40c generates a third signal by rectifying the second high frequency signal that is insulated and transmitted by the third electromagnetic resonance coupler 20c.
- the third signal is a signal having a waveform like the waveform 507 in FIG.
- the third rectifier circuit 40c charges the capacitor 50 with the generated third signal.
- the third signal has a DC voltage component.
- the third signal may be a constant voltage value.
- the third signal may not be composed of a plurality of voltage values. That is, the third signal may not have a signal component.
- the third signal only needs to have at least electric power for charging the capacitor.
- a voltage for charging the capacitor may be referred to as a charging voltage.
- the third signal may be composed of only the charging voltage as shown in FIG.
- the charging voltage may be greater than the first on-voltage of the first signal and the second on-voltage of the second signal. In this case, the amount of charge charged in the capacitor increases.
- the third signal may indicate a charging voltage during a period in which the second signal indicates the second on-voltage, and as shown in FIG. 2, the third signal is also charged during a period in which the first signal indicates the first on-voltage. A working voltage may be indicated.
- the rectifier circuit 40 can be used as a first rectifier circuit 40a, a second rectifier circuit 40b, and a third rectifier circuit 40c.
- a specific example of the third rectifier circuit 40 c will be described as an example of the rectifier circuit 40.
- the specific examples described below can be similarly applied to the first rectifier circuit 40a and the second rectifier circuit 40b.
- the third rectifier circuit 40c includes a diode 41c, an inductor 42c, and a capacitor 43c.
- the third rectifier circuit 40c has a configuration similar to a so-called rectenna (rectifying antenna) circuit.
- one end of the inductor 42c is connected to one end of the diode 41c
- the other end of the inductor 42c is connected to one end of the capacitor 43c
- the other end of the diode 41c and the other end of the capacitor 43c are first. It is connected to the output reference terminal of the third rectifier circuit 40c.
- a connection point between one end of the inductor 42c and one end of the diode 41c functions as an input terminal of the third rectifier circuit 40c
- a connection point between the other end of the inductor 42c and one end of the capacitor 43c is the third rectifier circuit 40c. Functions as an output terminal.
- the cathode of a diode 41c is connected to the input terminal of the third rectifier circuit 40c.
- the third rectifier circuit 40c rectifies the positive voltage component of the second high frequency.
- the anode of the diode 41a is connected to the input terminal of the first rectifier circuit 40a, and the anode of the diode 41b is connected to the input terminal of the second rectifier circuit 40b.
- the first rectifier circuit 40a and the second rectifier circuit 40b rectify the negative voltage component of the modulated signal.
- the voltage component rectified by each rectifier circuit is positive or negative is not particularly limited.
- Their polarities can be appropriately set according to the characteristics of the output circuit 60. Their polarities can be appropriately set depending on, for example, whether the transistor 61 and the transistor 62 constituting the output circuit 60 are normally off type or normally on type, and whether the N type is P type.
- the output terminal of the third rectifier circuit 40c is adjusted by the inductor 42c and the capacitor 43c so as to be a short point of the high frequency. Therefore, the high frequency input from the input terminal of the third rectifier circuit 40c is reflected near the output terminal of the third rectifier circuit 40c. Therefore, the amplitude (voltage value) of the high frequency at the input terminal of the third rectifier circuit 40c is about twice the amplitude (voltage value) of the original high frequency input from the third electromagnetic resonance coupler 20c. With such a configuration, it is possible to rectify a high frequency with high efficiency by one diode 41c. Note that the third rectifier circuit 40c can perform highly efficient rectification if it acts as a low-pass filter having a predetermined frequency even if its output terminal is not exactly a short-circuit point of a high frequency.
- the third rectifier circuit 40c has, for example, rectification characteristics in the microwave band.
- a Schottky barrier diode is used as the diode 41c.
- the diode 41c is a Schottky barrier diode using GaN (gallium nitride), high frequency characteristics, low Vf, and low on-resistance can be realized.
- the diode 41c may be Si or another device.
- the frequency of the high frequency was 2.4 GHz.
- the diode 41c was a GaN Schottky barrier diode having an anode width of 100 ⁇ m.
- the inductance of the inductor 42c was 5 nH, and the capacitance of the capacitor 43c was 10 pF.
- the half bridge circuit 60 includes a transistor 61 and a transistor 62.
- the transistor 61 supplies the charge charged in the capacitor 50 to the gate terminal of the semiconductor switching element 1 according to the first signal.
- the transistor 62 extracts the charge at the gate terminal of the semiconductor switching element 1 according to the second signal.
- the transistor 61 supplies the charge charged in the capacitor 50 to the gate terminal of the semiconductor switching element 1 according to the first signal.
- the drain terminal of the transistor 61 is connected to one end of the capacitor 50, and the source terminal of the transistor 61 is connected to the output terminal 71, the drain terminal of the transistor 62, and the output reference terminal of the first rectifier circuit 40a.
- the gate terminal of the transistor 61 is connected to the output terminal of the first rectifier circuit 40a.
- the transistor 61 conducts between the drain terminal and the source terminal, thereby connecting the one end of the capacitor 50 and the output terminal 71. Is made conductive.
- the transistor 61 insulates between the drain terminal and the source terminal, thereby connecting the one end of the capacitor 50 and the output terminal 71. Insulate.
- the transistor 62 extracts the charge at the gate terminal of the semiconductor switching element 1 according to the second signal.
- the drain terminal of the transistor 62 is connected to the output terminal 71 and the source terminal of the transistor 61.
- the source terminal of the transistor 62 is connected to the output reference terminal 72, the other end of the capacitor 50, and the output reference terminal of the second rectifier circuit 40b. Connected.
- the gate terminal of the transistor 62 is connected to the output terminal of the second rectifier circuit 40b.
- the transistor 62 conducts between the drain terminal and the source terminal, thereby connecting the output terminal 71 and the output reference terminal 72.
- Conduct For example, when the second off voltage of the second signal is input to the gate terminal, the transistor 62 insulates between the drain terminal and the source terminal, so that the output terminal 71 and the output reference terminal 72 are separated. Insulate.
- FIG. 6 is a diagram for explaining an operation example of the half-bridge circuit 60.
- FIG. 7 is a diagram showing the relationship between the gate-source voltage of the transistor 61 and the transistor 62 and the charge charged in the capacitor 50.
- the gate-source voltage is a voltage at the gate terminal when the source terminal of each transistor is used as a reference. 7 also shows the output of the high-frequency oscillation circuit 10 to the third electromagnetic resonance coupler 20c, that is, the amplitude of the second high-frequency.
- the half-bridge circuit 60 includes a state in which the transistor 61 is turned on and the transistor 62 is turned off according to the first signal and the second signal.
- the state in which 61 is off and the transistor 62 is on is repeated alternately.
- the half-bridge circuit 60 switches the semiconductor switching element 1. That is, the half bridge circuit 60 supplies the charge (that is, driving power) charged in the capacitor 50 to the semiconductor switching element 1 according to the input signal.
- FIG. 6A shows a case where the transistor 61 is off and the transistor 62 is on. That is, FIG. 6A is a diagram illustrating a case where an off voltage is applied between the gate and the source of the transistor 61 and an on voltage is applied between the gate and the source of the transistor 62.
- FIG. 6B shows a case where the transistor 61 is on and the transistor 62 is off. That is, FIG. 6B is a diagram illustrating a case where an on-voltage is applied between the gate and source of the transistor 61 and an off-voltage is applied between the gate and source of the transistor 62.
- the gate drive circuit 1000 can supply a large current to the semiconductor switching element 1 instantaneously.
- FIG. 8 is a diagram showing a simulation result of the output waveform output from the output terminal 71. As shown in FIG. In other words, this is an example of the waveform of the drive signal output from the gate drive circuit 1000 to the semiconductor switching element 1.
- the simulation conditions were as follows.
- the transistors 61 and 62 were GaN HFETs (Hetero Field Effect Transistors) having a gate width of 4.8 mm and a gate length of 0.7 ⁇ m.
- the capacitor 50 was a capacitor having a capacity of 200 nF.
- the input signal was a 2 MHz rectangular wave.
- a capacitive element having a capacity of 1000 pF and a resistive element having a resistance of 1 k ⁇ were connected in parallel.
- the voltage of the output signal (that is, the voltage input to the gate terminal of the semiconductor switching element 1) was 0 to 10V.
- the peak value of the current supplied to the gate terminal of the semiconductor switching element 1 by the output signal was 0.8A.
- a conventional gate driving circuit using a microwave can only supply a current of 0.1 A or less to the gate terminal of the semiconductor switching element 1. That is, this simulation result shows that the gate drive circuit 1000 can output a current that is eight times or more that of the conventional circuit.
- FIG. 9 is a diagram showing an actual measurement result of the output waveform output from the output terminal 71 when the gate drive circuit 1000 is actually driven.
- the semiconductor switching element 1 is a GaN power transistor.
- the gate drive circuit 1000 can output a large gate current was also obtained for the actual measurement result.
- the gate drive circuit may include an amplifier circuit.
- FIG. 10 is a circuit diagram showing a specific configuration example of a gate drive circuit to which an amplifier circuit is added.
- the gate drive circuit 1001 is obtained by adding an amplifier circuit 70 to the gate drive circuit 1000.
- the amplification circuit 70 amplifies the high frequency generated by the high frequency oscillation circuit 10 and outputs the amplified high frequency to the third electromagnetic resonance coupler 20c.
- the third electromagnetic resonance coupler 20c insulates and transmits the high frequency output from the amplifier circuit 70.
- the amplifier circuit 70 is, for example, a high frequency power amplifier.
- the capacitor 50 can be charged with a larger amount of charge. According to the amplifier circuit 70, the capacitor 50 can be charged at a higher speed. That is, the gate drive circuit 1001 can supply a large current to the semiconductor switching element 1 instantaneously, and the high-speed operation of the semiconductor switching element 1 is realized.
- the maximum value of the amplitude of the second high frequency may be larger than the maximum value of the amplitude of the first modulated signal and the second modulated signal. .
- the amplitude of the second high frequency may be larger than the second amplitude of the first modulated signal and the fourth amplitude of the second modulated signal.
- the amplifier circuit 70 can be regarded as a part of the high-frequency generator. That is, in the example shown in FIG. 10, the high frequency generator includes the high frequency oscillation circuit 10 and the amplification circuit 70. As described above, the gate drive circuit 1001 may not include the high-frequency oscillation circuit 10.
- the gate drive circuit 1000 may be realized as an integrated circuit.
- FIG. 11 is a diagram showing a specific configuration example of the gate drive circuit 1000 realized as an integrated circuit.
- the gate drive circuit 1000 may be integrated as a semiconductor chip 201.
- the semiconductor chip 201 may be a group III-V semiconductor substrate in which a GaN semiconductor or the like is provided on a Si substrate or a sapphire substrate.
- the gate drive circuit 1000 can charge the capacitor 50 with a charge and supply a large current to the semiconductor switching element 1 by switching the switching element.
- the gate drive circuit 1000 according to the first embodiment includes three electromagnetic resonance couplers.
- the gate drive circuit according to the second embodiment can supply a large current to the semiconductor switching element with a more simplified configuration by reducing the number of electromagnetic resonance couplers.
- the gate drive circuit according to the second embodiment will be described with reference to the drawings.
- differences from the first embodiment will be mainly described, and description of components that are substantially the same as those in the first embodiment may be omitted.
- FIG. 12 is a system block diagram showing an example of the gate drive circuit according to the second embodiment.
- FIG. 13 is a circuit diagram showing a specific configuration example of the gate drive circuit shown in FIG.
- the gate drive circuit 1002 includes a DC power supply 100 and a signal generator 3.
- the gate drive circuit 1002 includes a high-frequency oscillation circuit 10, a modulation circuit 30, a first electromagnetic resonance coupler 20a, and a second electromagnetic resonance coupler 20b.
- the gate drive circuit 1002 includes a first rectifier circuit 40a, a second rectifier circuit 40b, a third rectifier circuit 40c, a capacitor 50, a half bridge circuit 60, an output terminal 71, and an output reference terminal. 72.
- the half bridge circuit 60 includes a first switching element 61 and a second switching element 62.
- the first switching element 61 is the transistor 61
- the second switching element 62 is the transistor 62 will be described.
- the signal generator 3 generates an input signal and outputs it to the modulation circuit 30.
- the input signal corresponds to a control signal, and a drive signal for driving the semiconductor switching element 1 is generated based on the control signal.
- the signal generator 3 is composed of a logic IC, for example.
- the input signal is a binary signal composed of a high level and a low level, for example, as in a waveform 601 and a waveform 602 shown in FIG.
- the high-frequency oscillation circuit 10 generates a high frequency and outputs the generated high frequency to the modulation circuit 30.
- the high frequency may be 2.4 GHz or 5.8 GHz, or may be other values.
- the high frequency is, for example, a waveform like a waveform 603 shown in FIG.
- the high-frequency oscillation circuit 10 may be, for example, a Colpitts oscillator, a Hartley oscillator, or other oscillators that generate microwaves.
- the high-frequency oscillation circuit 10 may include a frequency adjustment mechanism in the case where the high-frequency frequency fluctuates.
- the modulation circuit 30 generates a first modulated signal and a second modulated signal.
- the first modulated signal has a waveform such as a waveform 605 shown in FIG.
- the second modulated signal has a waveform such as a waveform 604 shown in FIG.
- the modulation circuit 30 may be, for example, a differential mixer circuit or a switch circuit.
- the second modulated signal includes the second high frequency.
- the second high frequency is, for example, a portion having an amplitude for generating a charging voltage in the second modulated signal.
- the second high frequency has a frequency equivalent to the first high frequency.
- the modulation circuit 30 outputs the first modulated signal to the first electromagnetic resonance coupler 20a, and outputs the second modulated signal to the second electromagnetic resonance coupler 20b.
- the description of the specific configurations of the first electromagnetic resonance coupler 20a and the second electromagnetic resonance coupler 20b is omitted.
- the insulated transmission unit includes a first electromagnetic resonance coupler 20a and a second electromagnetic resonance coupler 20b.
- the second modulated signal is further transmitted after being insulated and transmitted by the second electromagnetic resonance coupler 20b.
- one of the second modulated signals insulated and transmitted by the second electromagnetic resonance coupler 20b is rectified by the third rectifier circuit 40c.
- the third rectifier circuit 40c generates the third signal by rectifying the second modulated signal insulated and transmitted by the second electromagnetic resonance coupler 20b.
- the capacitor 50 is charged by the generated third signal.
- the third signal has a waveform such as a waveform 606 in FIG.
- the third signal includes a third on voltage and a third off voltage, and the third on voltage corresponds to the charging voltage. As shown in FIG.
- the third on-voltage of the third signal is equal to the second modulated signal.
- the third off-voltage of the third signal corresponds to the third amplitude of the second modulated signal.
- the period of the fourth amplitude of the second modulated signal corresponds to the second high frequency, and the second high frequency is rectified to become the third on-voltage, that is, the charging voltage.
- the third signal may include, for example, other voltage that can be a charging voltage in addition to the third on-voltage.
- the second high frequency has signal components based on a plurality of different amplitudes.
- the other of the second modulated signals insulated and transmitted by the second electromagnetic resonance coupler 20b is rectified by the second rectifier circuit 40b.
- the second rectifier circuit 40b generates a second signal by rectifying the second modulated signal insulatedly transmitted by the second electromagnetic resonance coupler 20b.
- the second signal has a waveform such as a waveform 608 shown in FIG.
- the second signal is input to the transistor 62 constituting the half bridge circuit 60 and drives the transistor 62. That is, in the second embodiment, the second modulated signal is output from the second electromagnetic resonance coupler 20b and input to the second rectifier circuit 40b and the third rectifier circuit 40c. Therefore, the second signal for operating the output circuit 60 and the third signal for charging the capacitor 50 are both generated based on the second modulated signal.
- the first modulated signal is insulated and transmitted by the first electromagnetic resonance coupler 20a and input to the first rectifier circuit 40a.
- the first rectifier circuit 40a may have a structure that is generally equal to the second rectifier circuit 40b.
- the first rectifier circuit 40a generates the first signal by rectifying the first modulated signal.
- the first signal has a waveform such as a waveform 607 shown in FIG.
- the first signal is input to the transistor 61 constituting the half bridge circuit 60 and drives the transistor 61.
- the half-bridge circuit 60 is configured such that the transistor 61 is on and the transistor 62 is off and the transistor 61 is off according to the first signal and the second signal. The state in which the transistor 62 is on is repeated alternately. Thereby, the half bridge circuit 60 supplies the charge charged in the capacitor 50 to the semiconductor switching element 1.
- the gate drive circuit 1002 can reduce the number of electromagnetic resonance couplers having a large occupied area in the gate drive circuit 1002. Therefore, the gate driving circuit 1002 can greatly reduce the circuit area and the circuit configuration is simplified. For this reason, in the gate driving circuit 1002, mounting of circuit components is simplified.
- the transistor 61 is on and the transistor 62 is off, or the transistor 61 is off and the transistor 62 is off. Regardless of the period during which the signal is on, the high frequency oscillation circuit 10 steadily outputs the second high frequency to the third electromagnetic resonance coupler 20c. However, the capacitor 50 is not charged in a period in which the transistor 62 is off, that is, in a period in which the charge charged in the capacitor 50 is output from the output terminal 71. Therefore, during this period, the high frequency oscillation circuit 10 may not output the second high frequency that is the basis of the charging voltage of the capacitor 50 to the third electromagnetic resonance coupler 20c.
- the capacitor 50 is charged with a third signal based on the second modulated signal. For this reason, in the gate drive circuit 1002, the capacitor 50 is not charged in a period in which the transistor 62 is off, that is, in a period in which the charge charged in the capacitor 50 is output from the output terminal 71. Therefore, the gate drive circuit 1002 according to Embodiment 2 can be charged efficiently. That is, the third signal is generated based on the second modulated signal, like the second signal. Therefore, for example, the period during which the transistor 62 is turned on according to the second on-voltage of the second signal can be synchronized with the period during which the capacitor 50 is charged according to the third on-voltage of the third signal.
- the period during which the transistor 62 is turned off according to the second off voltage of the second signal can be synchronized with the period during which the capacitor 50 is discharged according to the third off voltage of the third signal.
- the charging voltage is not supplied to the capacitor 50, and during the period when the charge charged in the capacitor 50 is not output from the output terminal 71.
- 50 can be supplied with a charging voltage.
- the third rectifier circuit 40c outputs a charging voltage when the output circuit 60 does not supply charges to the gate terminal of the semiconductor switching element 1, and the output circuit 60 supplies charges to the gate terminal of the semiconductor switching element 1. It can be controlled not to output the charging voltage when supplying to the battery.
- the gate drive circuit may include an amplifier circuit.
- FIG. 14 is a circuit diagram showing a specific configuration example of a gate drive circuit to which an amplifier circuit is added.
- the gate drive circuit 1003 is obtained by adding an amplifier circuit 70 to the gate drive circuit 1002.
- the amplification circuit 70 amplifies the second modulated signal and outputs it to the second electromagnetic resonance coupler 20b. Then, the second electromagnetic resonance coupler 20b insulates and transmits the second modulated signal output from the amplifier circuit 70.
- the amplifier circuit 70 is, for example, a high frequency power amplifier.
- the amplifier circuit 70 By adding the amplifier circuit 70 in this manner, it is possible to charge the capacitor 50 with a larger amount of charge. According to the amplifier circuit 70, the capacitor 50 can be charged at a higher speed.
- the gate drive circuit 1003 can supply a large current to the semiconductor switching element 1, and high-speed operation of the semiconductor switching element 1 is realized.
- the maximum value of the amplitude of the second modulated signal may be larger than the maximum value of the amplitude of the first modulated signal.
- the fourth amplitude of the second modulated signal may be larger than the second amplitude of the first modulated signal.
- the output circuit is a half-bridge circuit.
- the output circuit is an H-bridge circuit (full-bridge circuit).
- FIG. 15 is a circuit diagram showing a specific configuration example of the gate drive circuit 1006 according to the third embodiment.
- the gate drive circuit 1006 is different from the gate drive circuit 1000 shown in FIG. 2 in that the output circuit 60a is an H bridge circuit.
- FIG. 16 is a circuit diagram showing a specific configuration example of the gate drive circuit 1007 according to the third embodiment.
- the gate drive circuit 1007 is different from the gate drive circuit 1002 shown in FIG. 13 in that the output circuit 60a is an H bridge circuit.
- the configuration other than the H bridge circuit is the same as that of the first and second embodiments, and thus a part of the description is omitted.
- the semiconductor switching element 1 is an IGBT or a power MOSFET
- the power supplied from the capacitor 50 to the semiconductor switching element 1 is hardly consumed as a gate current. That is, when the semiconductor switching element 1 is an IGBT or a power MOSFET, the gate capacitance of the semiconductor switching element 1 repeats charge and discharge.
- the charge charged in the gate capacitance when the capacitor 50 is discharged (the state shown in FIG. 6B) is charged when the capacitor 50 is subsequently charged (see FIG. 6). 6 (a)), the load 2 is discharged to the ground.
- the gate drive circuits 1006 and 1007 include the H bridge circuit 60a, the charge charged in the gate capacitance is charged in the capacitor 50 again.
- the 15 and 16 includes a first switching element 61, a second switching element 62, a third switching element 63, and a fourth switching element 64.
- the first switching element 61, the second switching element 62, the third switching element 63, and the fourth switching element 64 are a transistor 61, a transistor 62, a transistor 63, and a transistor 64, respectively. It may be. This case will be described below.
- the transistor 62 extracts the charge at the gate terminal of the semiconductor switching element 1 according to the second signal.
- the drain terminal of the transistor 62 is connected to the output terminal 71 and the source terminal of the transistor 61.
- the source terminal of the transistor 62 is the source terminal of the transistor 64, the other end of the capacitor 50, the output reference terminal of the first rectifier circuit 40a, and It is connected to the output reference terminal of the second rectifier circuit 40b.
- the gate terminal of the transistor 62 is connected to the output terminal of the first rectifier circuit 40a.
- the transistor 63 operates in response to the second signal, and in conjunction with the transistor 62, the charge is extracted from the gate terminal of the semiconductor switching element 1, and the extracted charge is charged in the capacitor 50.
- the drain terminal of the transistor 63 is connected to one end of the capacitor 50 and the drain terminal of the transistor 61, and the source terminal of the transistor 63 is connected to the output reference terminal 72 and the drain terminal of the transistor 64.
- the gate terminal of the transistor 63 is connected to the output terminal of the first rectifier circuit 40 a and the gate terminal of the transistor 62.
- the transistor 61 supplies the charge charged in the capacitor 50 to the gate terminal of the semiconductor switching element 1 according to the first signal.
- the drain terminal of the transistor 61 is connected to one end of the capacitor 50 and the drain terminal of the transistor 63, and the source terminal of the transistor 61 is connected to the output terminal 71 and the drain terminal of the transistor 62.
- the gate terminal of the transistor 61 is connected to the output terminal of the second rectifier circuit 40 b and the gate terminal of the transistor 64.
- the transistor 64 operates in response to the first signal and supplies the charge charged in the capacitor 50 to the gate terminal of the semiconductor switching element 1 in conjunction with the transistor 61.
- the drain terminal of the transistor 64 is connected to the output terminal 71 and the source terminal of the transistor 63.
- the source terminal of the transistor 64 is the source terminal of the transistor 62, the other end of the capacitor 50, the output reference terminal of the first rectifier circuit 40a, and It is connected to the output reference terminal of the second rectifier circuit 40b.
- the gate terminal of the transistor 64 is connected to the output terminal of the second rectifier circuit 40 b and the gate terminal of the transistor 61.
- the transistor 61 and the transistor 64 are simultaneously turned on or off, and the transistor 62 and the transistor 63 are simultaneously turned on or off.
- the first ON voltage of the first signal is input to the gate terminal of the transistor 61 and the gate terminal of the transistor 64, whereby the transistor 61 and the transistor 64 are turned on.
- a path including the capacitor 50, the transistor 61, the output terminal 71, the gate capacitance of the semiconductor switching element 1, the output reference terminal 72, and the transistor 64 is formed.
- the second ON voltage of the second signal is input to the gate terminal of the transistor 62 and the gate terminal of the transistor 63, whereby the transistor 62 and the transistor 63 are turned on.
- a path including the capacitor 50, the transistor 63, the output reference terminal 72, the gate capacitance of the semiconductor switching element 1, the output terminal 71, and the transistor 62 is formed.
- the transistor 61 and the transistor 64 When the transistor 61 and the transistor 64 are on, the electric charge discharged from the capacitor 50 is charged to the gate capacitance of the semiconductor switching element 1. Note that at this time, the transistor 62 and the transistor 63 are off.
- the transistor 62 and the transistor 63 when the transistor 62 and the transistor 63 are on, charges are drawn from the gate capacitance of the semiconductor switching element 1.
- the transistor 50 and the gate capacitor are connected by turning on the transistor 62 and the transistor 63.
- the charge rapidly moves from the gate capacitance to the capacitor 50. That is, the charge that has been charged in the gate capacitance is again collected by the capacitor 50 and charged into the capacitor 50.
- the gate drive circuits 1006 and 1007 using the H bridge circuit 60a can continue to use the power once charged in the capacitor 50. Therefore, the gate drive circuits 1006 and 1007 can supply a large current to the semiconductor switching element 1 without using wasted power. That is, the gate drive circuits 1006 and 1007 can further reduce power consumption.
- the transistors 61 to 64 may be gallium nitride HFETs having a gate width of 4.8 mm and a gate length of 0.7 ⁇ m, for example.
- the capacitor 50 may be a capacitor having a capacity of 200 nF.
- the input signal may be a 2 MHz rectangular wave.
- the second high frequency for supplying the charging voltage to the capacitor 50 and the first high frequency which is a carrier wave for sending the first signal and the second signal to the output circuit The frequencies may be the same or different.
- the gate drive circuit of the fourth embodiment uses the fundamental wave component of the high frequency to supply the charging voltage to the capacitor 50 and controls the harmonic component to control the output circuit. use.
- a gate drive circuit that improves the charging efficiency of the capacitor 50 and can be miniaturized is realized. That is, in the gate drive circuit according to the fourth embodiment, the high frequency fundamental wave component is the second high frequency, and the high frequency harmonic component is the first high frequency.
- the gate drive circuit according to the fourth embodiment will be described with reference to the drawings.
- FIG. 17 is a circuit diagram showing a specific configuration example of the gate drive circuit according to the fourth embodiment.
- the gate drive circuit 1008 includes a high-frequency oscillation circuit 10, a frequency distribution filter 90, a modulation circuit 30, a first electromagnetic resonance coupler 20a, a second electromagnetic resonance coupler 20b, and a third electromagnetic field. And a resonance coupler 20c.
- the gate drive circuit 1008 includes a first rectifier circuit 40a, a second rectifier circuit 40b, a third rectifier circuit 40c, a capacitor 50, a half bridge circuit 60, an output terminal 71, and an output reference terminal. 72.
- the high frequency oscillation circuit 10 generates a high frequency.
- the high-frequency oscillation circuit 10 may be, for example, a Colpitts oscillator, a Hartley oscillator, or other oscillators that generate microwaves.
- the high frequency output from the high frequency oscillation circuit 10 is distorted including harmonics such as second harmonic (second harmonic), third harmonic (third harmonic), etc., unless it is a single sine wave having a desired frequency. It has a waveform.
- the frequency distribution filter 90 separates the high frequency generated by the high frequency oscillation circuit 10 into a fundamental wave component and a harmonic component.
- the frequency distribution filter 90 is configured using, for example, an inductor and a capacitor.
- the frequency distribution filter 90 separates the input high frequency into a fundamental wave component and a double wave component.
- the harmonic component is typically low power compared to the fundamental component. Therefore, when the frequency distribution filter 90 outputs the fundamental wave component as the second high frequency and outputs the harmonic component as the first high frequency, the amplitude of the second high frequency is, for example, larger than the amplitude of the first high frequency.
- the harmonic component is a second harmonic component will be described.
- the frequency distribution filter 90 can be regarded as a part of the high frequency generator. That is, in the example shown in FIG. 17, the high frequency generator includes the high frequency oscillation circuit 10 and the frequency distribution filter 90. As described above, the gate drive circuit 1008 may not include the high-frequency oscillation circuit 10.
- the transistor 61 and the transistor 62 have a smaller gate width and smaller gate capacitance than the semiconductor switching element 1. For this reason, the electric charge necessary for turning on the transistor 61 and the transistor 62 is less than the electric charge necessary for turning on the semiconductor switching element 1. Therefore, the transistor 61 and the transistor 62 can be driven by using a second harmonic component whose power is smaller than that of the fundamental component.
- the gate drive circuit 1008 uses the fundamental wave component for the second high frequency for charging the capacitor 50 and uses the second harmonic component for the first high frequency for supplying a small current to the transistors 61 and 62. .
- the second harmonic component is power that has not been used in the gate drive circuits exemplified in the first to third embodiments. Because the electromagnetic resonance coupler transmits only a predetermined frequency band, the high frequency double wave component is filtered by the electromagnetic resonance coupler whose frequency band is set so as to transmit the fundamental wave component. This is because that.
- the gate drive circuit 1008 improves the charging efficiency of the capacitor 50 by effectively utilizing power that is not normally used.
- the frequency of the high frequency fundamental wave component may be, for example, 2.4 GHz. Therefore, the frequency of the second harmonic component is 4.8 GHz.
- the high frequency is not limited to such a frequency.
- harmonic components other than the second harmonic component such as a third harmonic component may be used as the harmonic component.
- the fundamental wave component is, for example, a waveform like a waveform 701 in FIG.
- the fundamental wave component separated by the frequency distribution filter 90 is insulated and transmitted by the third electromagnetic resonance coupler 20c.
- the second high frequency that is insulated and transmitted by the third electromagnetic resonance coupler is a fundamental wave component separated by the frequency distribution filter 90.
- the double wave component has a waveform such as a waveform 702 in FIG.
- the harmonic component separated by the frequency distribution filter 90 is modulated by the modulation circuit 30 in accordance with the input signal.
- the high frequency modulated by the modulation circuit 30 is a harmonic component separated by the frequency distribution filter 90. That is, the first modulated signal (waveform 705 in FIG. 17) is generated by modulating the harmonic component according to the first input signal (waveform 704 in FIG. 17).
- the second modulated signal (waveform 706 in FIG. 17) is generated by modulating the harmonic component in accordance with the second input signal (waveform 703 in FIG. 17).
- the first modulated signal generated by the modulation circuit 30 is insulated and transmitted by the first electromagnetic resonance coupler 20a
- the second modulation signal generated by the modulation circuit 30 is the second electromagnetic field.
- the fundamental wave component which is the second high frequency is insulated and transmitted by the third electromagnetic resonance coupler 20c. That is, in the fourth embodiment, the insulating transmission unit includes the first electromagnetic resonance coupler 20a, the second electromagnetic resonance coupler 20b, and the third electromagnetic resonance coupler 20c.
- the line length of the resonator depends on the frequency of the signal to be transmitted, and the line length becomes shorter as the frequency of the signal to be transmitted becomes higher.
- a third electromagnetic resonance coupler 20c for insulatingly transmitting the fundamental wave component a first electromagnetic resonance coupler 20a for insulatingly transmitting the first modulated signal generated from the harmonic component, and
- the size of the resonator is greatly different from that of the second electromagnetic resonance coupler 20b that insulates and transmits the second modulated signal generated from the harmonic component.
- an example of a specific resonator size will be described.
- the electromagnetic resonance coupler 20 may be formed on a substrate having a relative dielectric constant of 10.
- the line length of the resonator of the third electromagnetic resonance coupler that transmits the fundamental wave may be 16 mm.
- the line lengths of the resonators of the first electromagnetic resonance coupler 20a and the second electromagnetic resonance coupler 20b that transmit harmonic components may be 8 mm.
- the insulation distance between the resonators may be 0.3 mm.
- the gate drive circuit 1008 uses the harmonic component, the first electromagnetic resonance coupler 20a and the second electromagnetic resonance coupler 20b can be reduced in size.
- the sizes of the first electromagnetic resonance coupler 20a and the second electromagnetic resonance coupler 20b are further reduced. It becomes possible.
- the third harmonic component has a smaller power than the second harmonic component, transistors that can be driven using the third harmonic component may be limited. In this case, for example, the size of the transistors 61 and 62 of the half bridge circuit 60 may be small so that the half bridge circuit 60 can be switched using a third harmonic component.
- the first rectifier circuit 40a rectifies the first modulated signal (waveform 705 in FIG. 17) to generate a first signal (waveform 708 in FIG. 17), and the second rectifier circuit 40b A second signal (waveform 709 in FIG. 17) is generated by rectifying the second modulated signal (waveform 706 in FIG. 17). Switching of the half bridge circuit 60 is controlled by the first signal and the second signal.
- the third rectifier circuit 40c generates a third signal (waveform 707 in FIG. 17) by rectifying the fundamental wave component (waveform 701 in FIG. 17). The third signal is used for charging the capacitor 50.
- the circuit configuration of the first rectifier circuit 40a, the second rectifier circuit 40b, and the third rectifier circuit 40c may be the same as in the first embodiment. However, since the first rectifier circuit 40a, the second rectifier circuit 40b, and the third rectifier circuit 40c have different high-frequency frequencies to be rectified, the constants relating to the characteristics of the circuit components are different.
- the inductance of the inductors 42a and 42b may be 6 nH, and the inductance of the inductor 42c may be 3 nH.
- the capacitances of the capacitors 43a, 43b, and 43c may all be 10 pF.
- the constants of the inductor and the capacitor may be other values as long as a short point can be created at each output terminal of the first rectifier circuit 40a, the second rectifier circuit 40b, and the third rectifier circuit 40c. .
- FIG. 18 is a diagram showing a simulation result confirming that the gate drive circuit 1008 operates.
- FIG. 18A is a diagram showing the waveform of the first signal input to the transistor 61 of the half-bridge circuit 60 in the gate drive circuit 1008.
- the solid line is the voltage waveform
- the broken line is the current waveform.
- the second signal input to the transistor 62 of the half-bridge circuit 60 also exhibits a similar waveform, although the on / off timing is different.
- the waveform shown in FIG. 18A is obtained when a capacitive element having a capacity of 1000 pF is connected as a load of the gate drive circuit 1008.
- FIG. 18 shows that in the gate drive circuit 1008, the first signal and the second signal based on the harmonic component with weak power can control the switching of the half-bridge circuit 60.
- FIG. 18B is a diagram showing the voltage across the capacitor 50 and the current flowing into the capacitor 50 when the capacitor 50 is charged by the third signal based on the fundamental wave component in the gate drive circuit 1008. .
- a curve that increases so as to approach 7 V indicates a time change of voltage
- a curve that rises in about 0.1 ⁇ sec and thereafter decreases so as to approach 0 mA indicates a time change of current. Show.
- FIG. 18B shows that in the gate drive circuit 1008, a voltage of 7 V is applied to the capacitor 50 by the third signal based on the fundamental wave component, and the capacitor 50 can be charged with a charge of 7 nC.
- the gate drive circuit may include an amplifier circuit.
- FIG. 19 is a circuit diagram showing a specific configuration example of a gate drive circuit to which an amplifier circuit is added.
- the gate drive circuit 1009 is obtained by adding an amplifier circuit 70a to the gate drive circuit 1008.
- the amplification circuit 70 a amplifies the high frequency generated by the high frequency oscillation circuit 10 and outputs the amplified high frequency to the frequency distribution filter 90.
- the amplifier circuit 70a may be an amplifier having nonlinearity, for example. Accordingly, the amplifier circuit 70a can amplify not only the fundamental wave component but also the harmonic component, so that the first signal and the second signal based on the harmonic component can control the switching of the half-bridge circuit 60.
- the amplifier circuit 70a may be an amplifier having a large nonlinearity such as a class C amplifier.
- the amplifier circuit 70 a can amplify not only the fundamental wave component for charging the capacitor 50 but also the harmonic component for controlling the switching of the half-bridge circuit 60.
- the gate widths of the transistor 61 and the transistor 62 constituting the half-bridge circuit 60 can be increased. That is, the on-resistance of the transistor 61 and the transistor 62 can be reduced. Therefore, the gate drive circuit 1009 can supply a larger current to the semiconductor switching element 1 by amplifying the fundamental wave component by the amplifier circuit 70a. Further, when not only the fundamental wave component but also the harmonic component is amplified by the amplifier circuit 70a, the switching loss in the half bridge circuit 60 can be further reduced.
- the amplifier circuit 70a can be regarded as a part of the high-frequency generator. That is, in the example shown in FIG. 19, the high frequency generator includes the high frequency oscillation circuit 10, the amplification circuit 70 a, and the frequency distribution filter 90. As described above, the gate drive circuit 1001 may not include the high-frequency oscillation circuit 10.
- the gate drive circuit 1000 supplies a large current to the semiconductor switching element 1 by charging the capacitor 50 and switching the half bridge circuit 60.
- the transistor 61 is on and the transistor 62 is off, or the transistor 61 is off. Regardless of the period during which the transistor 62 is on, the high frequency oscillation circuit 10 steadily outputs the second high frequency to the third electromagnetic resonance coupler 20c. However, the capacitor 50 is not charged in a period in which the transistor 62 is off, that is, in a period in which the charge charged in the capacitor 50 is output from the output terminal 71. Therefore, during this period, the high frequency oscillation circuit 10 may not output the second high frequency that is the basis of the charging voltage of the capacitor 50 to the third electromagnetic resonance coupler 20c.
- the gate drive circuit according to the fifth embodiment operates the high-frequency oscillation circuit in synchronization with the input signal in order to save the circuit power.
- the gate drive circuit according to the fifth embodiment will be described with reference to the drawings.
- FIG. 20 is a system block diagram showing an example of the gate drive circuit according to the fifth embodiment.
- FIG. 21 is a circuit diagram showing a specific configuration example of the gate drive circuit shown in FIG.
- the gate drive circuit 1010 has the same configuration as the gate drive circuit 1000 according to the first embodiment, the description will focus on the differences.
- the high-frequency oscillation circuit 10 further has a control terminal 73, and adjusts the amplitude of the second high-frequency generated for the third electromagnetic resonance coupler 20c in accordance with a signal input to the control terminal 73. 20 and FIG. 21, the input signal is input from the signal generator 3 to the control terminal 73. Then, the high frequency oscillation circuit 10 adjusts the amplitude of the second high frequency output to the third electromagnetic resonance coupler 20 c in accordance with the input signal input to the control terminal 73.
- the capacitor 50 is not charged during the period when the semiconductor switching element 1 is turned on. Accordingly, the high-frequency oscillation circuit 10 adjusts the amplitude of the second high-frequency output to the third electromagnetic resonance coupler 20c during this period, for example, to 0V. In this case, the high frequency oscillation circuit 10 does not output the second high frequency to the third electromagnetic resonance coupler 20c.
- the period in which the semiconductor switching element 1 is turned on corresponds to, for example, a period in which the first input signal indicates the first high level voltage.
- the high frequency oscillation circuit 10 adjusts the amplitude of the second high frequency output to the third electromagnetic resonance coupler 20c to a predetermined value other than 0 V during this period. In this case, the high frequency oscillation circuit 10 outputs a second high frequency having a predetermined amplitude to the third electromagnetic resonance coupler 20c.
- the period in which the semiconductor switching element 1 is turned on corresponds to, for example, a period in which the first input signal indicates the first low level voltage.
- FIG. 22 is a diagram showing the relationship between the gate-source voltages of the transistors 61 and 62 and the charge charged in the capacitor 50 in the gate drive circuit 1010.
- FIG. 22C shows the power output from the high frequency oscillation circuit 10 to the third electromagnetic resonance coupler 20c.
- the high-frequency oscillation circuit 10 does not supply power to the third electromagnetic resonance coupler 20c during the period in which the transistor 61 is on and the transistor 62 is off. Therefore, the gate driving circuit 1010 saves power in the circuit. As shown in FIG. 22, the high-frequency oscillation circuit 10 outputs power to the third electromagnetic resonance coupler 20c when the transistor 62 is turned on, and when the transistor 62 is turned off, No power is output to the third electromagnetic resonance coupler 20c. Therefore, the high frequency oscillation circuit 10 may adjust the amplitude of the second high frequency in accordance with the second input signal that is the basis of the second signal that controls the on / off of the transistor 62.
- the control terminal 73 is provided in the amplifier circuit 70.
- the gate drive circuit can control the high-frequency oscillation circuit 10 as shown in FIG.
- FIG. 23 is a diagram showing a circuit configuration example when the control terminal 73 is provided in the amplifier circuit of the gate drive circuit 1001 shown in FIG.
- the amplification circuit 70 since the amplification circuit 70 is provided between the high-frequency oscillation circuit 10 and the third electromagnetic resonance coupler 20c, the amplification circuit 70 outputs the first high-frequency signal output from the high-frequency oscillation circuit 10 to the modulation circuit 30. Will not be affected. Therefore, the second high frequency for supplying power to the capacitor 50 can be turned on and off without affecting the first high frequency for carrying the signal for controlling the half bridge circuit 60.
- FIG. 24 is a diagram showing a circuit configuration example when the control terminal 73 is provided in the amplifier circuit of the gate drive circuit 1003 shown in FIG.
- the gate drive circuit 1012 shown in FIG. 23 and the gate drive circuit 1011 shown in FIG. 24 can also suppress unnecessary power.
- the first modulated signal that is the basis of the first signal and the second modulated signal that is the basis of the second signal are insulated and transmitted.
- at least a first electromagnetic resonance coupler and a second electromagnetic resonance coupler are provided.
- the number of electromagnetic resonance couplers that insulate and transmit the modulated signal can be reduced.
- the gate drive circuit generates a modulated signal that modulates the first high frequency according to the input signal, an electromagnetic resonance coupler that insulates and transmits the modulated signal, and another that isolates and transmits the second high frequency.
- An electromagnetic resonance coupler a rectifier circuit that generates a signal by rectifying the modulated signal, another rectifier circuit that generates a charging voltage by rectifying the second high frequency, and a charging voltage
- an output circuit that selects whether or not to supply the charge charged in the capacitor to the gate terminal of the semiconductor switching element in accordance with a signal.
- Such a circuit is realized, for example, by adopting a configuration without the second electromagnetic resonance coupler 20b with respect to the gate drive circuit 1000 shown in FIG.
- the first modulated signal is insulated and transmitted by the first electromagnetic resonance coupler 20a, then further distributed, and input to the first rectifier circuit 40a and the second rectifier circuit 40b.
- the first rectifier circuit 40a rectifies the positive voltage component of the first modulated signal
- the second rectifier circuit 40b rectifies the negative voltage component of the first modulated signal.
- the first rectifier circuit 40a that rectifies the positive voltage component may be, for example, one in which a diode 41a is connected in the opposite direction to the first rectifier circuit 40a shown in FIG.
- the first signal generated by the first rectifier circuit 40a has a positive voltage component
- the second signal generated by the second rectifier circuit 40b has a negative voltage component.
- the first signal is input to, for example, a normally-off transistor 61
- the second signal is input to, for example, a normally-on transistor 62.
- the transistor 61 is turned on and the transistor 62 is turned off.
- the transistor 61 is turned off and the transistor 62 is turned on.
- the half bridge circuit 60 fulfills the same function as the half bridge circuit 60 shown in FIG. Even with such a gate drive circuit, the capacitor 50 can be charged, and a large current can be supplied to the semiconductor switching element 1 by switching the switching element.
- the gate drive circuit generates a modulated signal obtained by modulating the first high frequency according to the input signal, an electromagnetic resonance coupler that insulates and transmits the modulated signal, and rectifies the modulated signal.
- a rectifier circuit that generates a signal
- another rectifier circuit that generates a charging voltage by rectifying the second high frequency included in the modulated signal
- a capacitor that is charged according to the charging voltage
- a signal according to the signal And an output circuit that selects whether or not the charge charged in the capacitor is supplied to the gate terminal of the semiconductor switching element.
- Such a circuit is realized, for example, by adopting a configuration that does not include the second electromagnetic resonance coupler 20b and the second rectifier circuit 40b with respect to the gate drive circuit 1000 shown in FIG. .
- the first modulated signal is insulated and transmitted by the first electromagnetic resonance coupler 20a, then distributed and input to the first rectifier circuit 40a and the third rectifier circuit 40c.
- the transistor 61 and the transistor 62 of the output circuit 60 may be configured to be complementarily turned on / off according to one input signal.
- the transistor 61 may be a normally-off and P-type transistor
- the transistor 62 may be a normally-on and N-type transistor 62.
- the capacitor 50 can be charged, and a large current can be supplied to the semiconductor switching element 1 by switching the switching element. This modification can be combined with the other gate driving circuits described in the first to fifth embodiments as appropriate.
- the gate drive circuits according to the first to fifth embodiments can supply a large current instantaneously to the semiconductor switching element.
- a semiconductor switching element for example, IGBT or SiC FET
- circuit configurations shown in the block diagrams and the circuit diagrams are examples, and the present disclosure is not limited to the circuit configurations. That is, similar to the circuit configuration described above, a circuit that can realize the characteristic function of the present disclosure is also included in the present disclosure.
- the present disclosure also includes an element such as a switching element (transistor), a resistor element, or a capacitor element connected in series or in parallel to a certain element within a range in which the same function as the above circuit configuration can be realized. It is.
- “connected” in the above embodiment is not limited to the case where two terminals (nodes) are directly connected.
- “Connected” in the above embodiment includes a case where the two terminals (nodes) are connected via an element as long as a similar function can be realized.
- expressions related to input / output of a signal include not only the case where the signal is input / output directly but also the case where the signal is input / output indirectly. For example, expressions such as “a signal is output from A to B”, “a signal is input from A to B”, “a signal is output from A and input to B”, and other expressions between A and B The structure containing the element or circuit of this is also included. These expressions also include those that are input to B after the signal output from A has changed through other elements or circuits.
- the input signal that is the basis of the modulated signal has information on the difference in voltage value.
- the input signal may have information as a difference in duty ratio of the pulse wave, for example.
- the input signal may be a PWM (Pulse Width Modulation) signal.
- the PWM signal is a signal obtained by converting the magnitude of a voltage amplitude of a predetermined waveform (for example, a sine wave) as a basis of an input signal into a magnitude of a pulse width.
- the PWM signal has a constant voltage amplitude and a different duty ratio. Note that a known technique can be applied to the PMW operation, such as control of a power source.
- the modulation circuit is a differential mixer or a switch circuit.
- the modulation circuit is not limited to these.
- the modulation circuit may have another configuration as long as it can synthesize a high frequency and an input signal, or can modulate a high frequency with the input signal.
- the gate drive circuit is an insulated gate drive circuit that drives a semiconductor switching element, and the first modulated signal modulated in high frequency according to the input signal and a signal different from the input signal.
- a modulation circuit for generating a second modulated signal modulated by high frequency, a first electromagnetic resonance coupler for insulatingly transmitting the first modulated signal, and an insulating transmission of the second modulated signal A first electromagnetic resonance coupler, a first rectifier circuit for generating a first signal obtained by rectifying the first modulated signal insulated and transmitted by the first electromagnetic resonance coupler, and the first A second rectifier circuit that generates a second signal obtained by rectifying the second modulated signal that is insulated and transmitted by the second electromagnetic resonance coupler, a capacitor, and an electromagnetic resonance coupler included in the gate drive circuit.
- Isolated high frequency transmission A third rectifier circuit that charges the capacitor with the generated third signal, and the charge charged in the capacitor according to the first signal and the second signal, And a drive circuit including at least one switching element to be supplied to the gate terminal of the
- the capacitor can be charged without providing a separate insulated power supply, and a large current can be supplied to the semiconductor switching element by the drive circuit.
- the gate drive circuit further includes a third electromagnetic resonance coupler, the electromagnetic resonance coupler is the third electromagnetic resonance coupler, and the third rectifier circuit is the The third signal may be generated by rectifying the high frequency that is insulated and transmitted by the third electromagnetic resonance coupler.
- a high frequency is further provided with a frequency distribution filter that separates a high frequency into a fundamental wave signal composed of the fundamental component of the high frequency and a harmonic signal composed of the harmonic component of the high frequency
- the high frequency modulated by the modulation circuit is:
- the high frequency signal that is the harmonic signal separated by the frequency distribution filter and is insulated and transmitted by the third electromagnetic resonance coupler may be the fundamental wave signal separated by the frequency distribution filter.
- it further includes an amplification circuit that amplifies a high frequency and outputs the amplified high frequency to the third electromagnetic resonance coupler, wherein the third electromagnetic resonance coupler insulates the high frequency output from the first amplification circuit. It may be transmitted.
- a high-frequency oscillation circuit that generates a high frequency modulated by the modulation circuit and a high frequency insulated and transmitted by the third electromagnetic resonance coupler may be further provided.
- the high-frequency oscillation circuit may further include a control terminal, and adjust the amplitude of the high-frequency generated for the third electromagnetic resonance coupler in accordance with a signal input to the control terminal. .
- the input signal is input to the control terminal, and the high-frequency oscillation circuit generates a high-frequency amplitude generated for the third electromagnetic resonance coupler according to the input signal input to the control terminal. May be adjusted.
- a high frequency can be output from the high frequency oscillation circuit only during the period of charging the capacitor, and the gate drive circuit can be saved in power.
- the electromagnetic resonance coupler is the second electromagnetic resonance coupler
- the third rectifier circuit generates the third signal by rectifying the second modulated signal. Also good.
- it further includes an amplification circuit that amplifies the second modulated signal and outputs the amplified signal to the second electromagnetic resonance coupler, and the second electromagnetic resonance coupler is connected to the first amplification circuit.
- the output second modulated signal may be isolated and transmitted.
- a high-frequency oscillation circuit that generates a high frequency modulated by the modulation circuit may be further provided.
- the drive circuit includes: a first switching element that supplies a charge charged in the capacitor to a gate terminal of the semiconductor switching element in response to the first signal; and a second switching signal that corresponds to the second signal.
- You may include at least the 2nd switching element which draws out an electric charge from a gate terminal.
- a large current can be supplied to the semiconductor switching element by configuring the drive circuit as a so-called half-bridge circuit.
- the driving circuit further operates in response to the second signal, and in conjunction with the second switching element, extracts the charge from the gate terminal and charges the extracted charge to the capacitor.
- An element and a fourth switching element that operates in response to the first signal and supplies the charge stored in the capacitor to the gate terminal in conjunction with the first switching element.
- the drive circuit As described above, by configuring the drive circuit as a so-called H-bridge circuit, it is possible to recover the charge once supplied to the gate of the semiconductor switching element and charge the capacitor again.
- the modulation circuit generates the first modulated signal that modulates the high frequency by mixing the input signal and the high frequency, and mixes the signal obtained by inverting the input signal with the high frequency. It may be a mixing circuit that generates the second modulated signal obtained by modulating the high frequency.
- the modulation circuit modulates the high frequency by switching whether to output a high frequency to the first electromagnetic resonance coupler or to the second electromagnetic resonance coupler according to the input signal. It may be a switch circuit that generates the first modulated signal and the second modulated signal obtained by modulating the high frequency.
- the gate driving circuit may be realized as an integrated circuit.
- the present disclosure is useful as a gate drive circuit that drives a semiconductor switching element such as an IGBT or SiC FET that handles high power.
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Abstract
Description
半導体スイッチング素子のスイッチングには、典型的に、入力側と出力側とが絶縁された絶縁型のゲート駆動回路が用いられる。
本開示の一態様(aspect)に係るゲート駆動回路は、半導体スイッチング素子を駆動する絶縁型のゲート駆動回路であって、第一入力信号に応じて第一高周波を変調した第一の被変調信号と、前記第一入力信号とは異なる第二入力信号に応じて前記第一高周波を変調した第二の被変調信号とを生成する変調回路と、前記第一の被変調信号を絶縁伝送する第一の電磁界共鳴結合器、および、前記第二の被変調信号を絶縁伝送する第二の電磁界共鳴結合器を含む複数の電磁界共鳴結合器から構成される、絶縁伝送部と、前記第一の電磁界共鳴結合器により絶縁伝送された前記第一の被変調信号を整流することによって、第一信号を生成する第一の整流回路と、前記第二の電磁界共鳴結合器により絶縁伝送された前記第二の被変調信号を整流することによって、第二信号を生成する第二の整流回路と、前記複数の電磁界共鳴結合器のうちの1つにより絶縁伝送された第二高周波を整流することによって、充電用電圧を生成する第三の整流回路と、前記充電用電圧に応じて充電されるキャパシタと、前記第一信号及び前記第二信号の少なくとも一方に応じて、前記キャパシタに充電された電荷を前記半導体スイッチング素子のゲート端子に供給するか否かを選択する出力回路と、を備える。
これにより、被変調信号を絶縁伝送する電磁界共鳴結合器と、第二高周波を絶縁伝送する電磁界共鳴結合器とを分けることができる。そのため、第二高周波は、第三の電磁界共鳴結合器で伝送された後に、分配されることなく第三の整流回路に入力されうる。したがって、半導体スイッチング素子のゲート端子に、より大きな電流を供給することが可能となる。
本開示の一態様に係るゲート駆動回路において、例えば、前記第二高周波の振幅の最大値は、前記第一の被変調信号及び前記第二の被変調信号の振幅の最大値よりも大きくてもよい。
これにより、キャパシタを充電するための第二高周波の電力を大きくすることができる。
本開示の一態様に係るゲート駆動回路において、例えば、前記第二の被変調信号の振幅の最大値は、前記第一の被変調信号振幅の最大値よりも大きくてもよい。
これにより、キャパシタを充電するための第二高周波の電力を大きくすることができる。
これにより、例えば、キャパシタを充電する期間のみ高周波発振回路から高周波を出力することができ、ゲート駆動回路を省電力化することが可能となる。
本開示の一態様に係るゲート駆動回路において、例えば、前記第二入力信号は、前記第一入力信号の反転信号であってもよい。
これにより、ゲート駆動回路は、半導体スイッチング素子に大電流を供給することができる。また、第二高周波を整流することによって充電用電圧が得られるため、キャパシタを充電するための絶縁電源を別途設けることなく、キャパシタを充電することができる。
本開示の他の態様に係るゲート駆動回路において、例えば、前記絶縁伝送部は、さらに、前記第二高周波を絶縁伝送する別の電磁界共鳴結合器を含んでもよい。
以下、実施の形態1について、図面を参照しながら説明する。
なお、キャパシタ50は、例えば、容量素子であり、寄生容量ではない。キャパシタ50は、例えば、容量が10pF以上の素子である。
なお、ハーフブリッジ回路60は、出力回路60の一例である。以下では、出力回路60が、トランジスタ61とトランジスタ62とから構成されるハーフブリッジ回路60である例について説明する。
本開示において、半導体スイッチング素子1は、半導体スイッチング素子に流れる電流を制御する端子、例えば、ゲート端子を有する。半導体スイッチング素子1は、例えば、ゲート端子と、第一端子と、第二端子とを備える、半導体スイッチング素子である。この場合、ゲート端子に入力される信号に応じて、第一端子と第二端子との間の導通状態が制御される。第一端子及び第二端子の一方はソース端子であり、他方はドレイン端子であってもよい。第一端子及び第二端子の一方はエミッタ端子であり、他方はコレクタ端子であってもよい。半導体スイッチング素子1は、例えば、パワーデバイスの一種であり、100V以上の電圧、1A以上の電流を扱う。
入力信号は、第一入力信号と第二入力信号とから構成されてもよい。図2に示される例では、波形501が第一入力信号であり、波形502が第二入力信号である。第一入力信号は、例えば、第一ローレベル電圧と、第一ローレベル電圧よりも大きい第一ハイレベル電圧とを含む。第二入力信号は、例えば、第二ローレベル電圧と、第二ローレベル電圧よりも大きい第二ハイレベル電圧とを含む。第一入力信号が第一ハイレベル電圧を示す期間において、第二入力信号が第二ローレベル電圧を示してもよい。第二入力信号が第二ハイレベル電圧を示す期間において、第一入力信号が第一ローレベル電圧を示してもよい。第二入力信号は、第一の入力信号を反転させた信号であってもよい。例えば、第二入力信号は、第一の入力信号を、第一ハイレベル電圧と第二ハイレベル電圧の中間値を基準に反転させた信号であってもよい。この場合、図2に示されるように、第一入力信号と第二入力信号とは相補的(コンプリメンタリ)な関係となりうる。第一ローレベル電圧および/または第二ローレベル電圧は、例えば、0Vであってもよい。
本開示において、第一入力信号および/または第二入力信号によって変調される高周波、すなわち第一入力信号および/または第二入力信号の搬送波である高周波が、第一高周波と呼ばれ、充電用の電力を供給するための高周波が第二高周波と呼ばれる場合がある。図2に示される例では、波形503が第一高周波であり、波形504が第二高周波である。なお、実施の形態1において、第二高周波は、第三の電磁界共鳴結合器に入力される高周波である。この場合、第二高周波は、一定の振幅を有していてもよいし、複数の振幅を有していてもよい。すなわち、第二高周波は、異なる複数の振幅に基づく信号成分を有していてもよい。第一高周波と第二高周波とは、同じ振幅を有してもいいし、異なる振幅を有してもよい。ただし、第二高周波が第一高周波よりも大きな振幅を有する場合、後述するように、キャパシタに充電される電荷量を大きくすることができる。第一高周波と第二高周波とは、同じ周波数を有してもいいし、異なる周波数を有してもよい。
後述するように、高周波発振回路10は高周波生成器に含まれうる。
第一の被変調信号は、例えば、第一振幅と、第一振幅よりも大きい第二振幅とを含む。第一の被変調信号の第一振幅は、例えば、第一入力信号の第一ローレベル電圧に対応し、第一の被変調信号の第二振幅は、例えば、第一入力信号の第一ハイレベル電圧に対応する。第二の被変調信号は、例えば、第三振幅と、第三振幅よりも大きい第四振幅とを含む。第二の被変調信号の第三振幅は、例えば、第二入力信号の第二ローレベル電圧に対応し、第二の被変調信号の第四振幅は、例えば、第二入力信号の第二ハイレベル電圧に対応する。第一被変調信号が第二振幅を示す期間において、第二被変調信号が第三振幅を示してもよい。第二被変調信号が第四振幅を示す期間において、第一被変調信号が第一振幅を示してもよい。第一振幅と第三振幅、および/または、第二振幅と第四振幅は、同じ値であってもよい。第一振幅および/または第三振幅は、0であってもよい。
図4に示される例において、例えば、図4の(a)に示される信号が第一入力信号であり、図4の(b)に示される信号が第二入力信号であってもよい。
ここで、電磁界共鳴結合器20の構成例について詳細に説明する。電磁界共鳴結合器20は、第一の電磁界共鳴結合器20a、第二の電磁界共鳴結合器20b、および第三の電磁界共鳴結合器20cとして用いられうる。
なお、第一の電磁界共鳴結合器20a、第二の電磁界共鳴結合器20b、および第三の電磁界共鳴結合器20cは、それぞれ別個の素子でなくてもよい。例えば、単一の絶縁素子が、第一の電磁界共鳴結合器20aと第二の電磁界共鳴結合器20bとを機能として含んでいてもよい。言い換えると、単一の絶縁素子が、第一の被変調信号と第二の被変調信号とを分離して伝送できればよい。
第一信号は、例えば、第一オフ電圧と、第一オフ電圧と異なる第一オン電圧とを含む。トランジスタ61がN型トランジスタである場合、第一オン電圧は第一オフ電圧よりも大きい。トランジスタ61がP型トランジスタである場合、第一オン電圧は第一オフ電圧よりも小さい。トランジスタ61がノーマリオフ型トランジスタである場合、第一信号の第一オフ電圧は、例えば、第一の被変調信号の第一振幅に対応し、第一信号の第一オン電圧は、例えば、第一の被変調信号の第二振幅に対応する。この場合、第一信号の第一オフ電圧は、例えば、第一入力信号の第一ローレベル電圧に対応し、第一信号の第一オン電圧は、例えば、第一入力信号の第一ハイレベル電圧に対応する。トランジスタ61がノーマリオン型トランジスタである場合、第一信号の第一オフ電圧は、例えば、第一の被変調信号の第二振幅に対応し、第一信号の第一オン電圧は、例えば、第一の被変調信号の第一振幅に対応する。この場合、第一信号の第一オフ電圧は、例えば、第一入力信号の第一ハイレベル電圧に対応し、第一信号の第一オン電圧は、例えば、第一入力信号の第一ローレベル電圧に対応する。
第二信号は、例えば、第二オフ電圧と、第二オフ電圧と異なる第二オン電圧とを含む。トランジスタ62がN型トランジスタである場合、第二オン電圧は第二オフ電圧よりも大きい。トランジスタ61がP型トランジスタである場合、第二オン電圧は第二オフ電圧よりも小さい。トランジスタ61がノーマリオフ型トランジスタである場合、第二信号の第二オフ電圧は、例えば、第二の被変調信号の第三振幅に対応し、第二信号の第二オン電圧は、例えば、第二の被変調信号の第四振幅に対応する。この場合、第二信号の第二オフ電圧は、例えば、第二入力信号の第二ローレベル電圧に対応し、第二信号の第二オン電圧は、例えば、第二入力信号の第二ハイレベル電圧に対応する。トランジスタ62がノーマリオン型トランジスタである場合、第二信号の第二オフ電圧は、例えば、第二の被変調信号の第四振幅に対応し、第二信号の第二オン電圧は、例えば、第二の被変調信号の第三振幅に対応する。この場合、第二信号の第二オフ電圧は、例えば、第二入力信号の第二ハイレベル電圧に対応し、第二信号の第二オン電圧は、例えば、第二入力信号の第二ローレベル電圧に対応する。
第一信号が第一オン電圧を示す期間において、第二信号が第二オフ電圧を示してもよい。第二信号が第二オン電圧を示す期間において、第一信号が第一オフ電圧を示してもよい。第一信号と、第二信号とは、相補的(コンプリメンタリ)な関係であってもよいし、それ以外の関係であってもよい。第一オフ電圧と第二オフ電圧、および/または、第一オン電圧と第二オン電圧は、同じ値であってもよい。
以下では、特に断りの無い限り、トランジスタ61およびトランジスタ62がノーマリオン型かつN型である例について説明する。具体的には、例えば図2に示されるように、第一オン電圧および第二オン電圧は0であり、第一オフ電圧および第二オフ電圧は負の値を有する例について説明する。
図2に示されるように、第三信号は、一定の電圧値であってもよい。言い換えると、第三信号は、複数の電圧値から構成されていなくてもよい。すなわち、第三信号は、信号成分を有していなくてもよい。第三信号は、少なくともキャパシタを充電するための電力を有していればよい。本開示では、キャパシタを充電するための電圧を、充電用電圧と呼ぶ場合がある。第三信号は、図2に示されるように充電用電圧のみから構成されてもよいし、充電用電圧と充電用電圧よりも小さい別の電圧とを含んでもよい。充電用電圧は、第一信号の第一オン電圧および第二信号の第二オン電圧よりも大きくてもよい。この場合、キャパシタに充電される電荷量が大きくなる。第三信号は、第二信号が第二オン電圧を示す期間に充電用電圧を示してもよく、図2に示されるように、さらに、第一信号が第一オン電圧を示す期間にも充電用電圧を示してもよい。
第三の整流回路40cにおいて、例えば、インダクタ42cの一端がダイオード41cの一端に接続され、インダクタ42cの他端がキャパシタ43cの一端に接続され、ダイオード41cの他端およびキャパシタ43cの他端が第三の整流回路40cの出力基準端子に接続されている。インダクタ42cの一端とダイオード41cの一端との接続点は、第三の整流回路40cの入力端子として機能し、インダクタ42cの他端とキャパシタ43cの一端との接続点は、第三の整流回路40cの出力端子として機能する。
図2に示される例において、第三の整流回路40cの入力端子には、ダイオード41cのカソードが接続されている。これにより、第三の整流回路40cは、第二高周波のうち正の電圧成分を整流する。一方、第一の整流回路40aの入力端子には、ダイオード41aのアノードが接続されており、第二の整流回路40bの入力端子には、ダイオード41bのアノードが接続されている。これにより、第一の整流回路40a及び第二の整流回路40bは、被変調信号のうち負の電圧成分を整流する。なお、各整流回路が整流する電圧成分が正であるか負であるかは、特に限定されない。それらの極性は、出力回路60の特性に応じて適宜設定されうる。それらの極性は、例えば、出力回路60を構成するトランジスタ61およびトランジスタ62が、ノーマリオフ型かノーマリオン型か、および、N型がP型かに応じて、適宜設定されうる。
なお、第三の整流回路40cは、その出力端子が正確に高周波の周波数のショート点となっていなくとも、所定の周波数のローパスフィルターとして作用すれば、高効率な整流を行うことができる。
トランジスタ61は、例えば、ゲート端子に第一信号の第一オン電圧が入力されたときに、ドレイン端子とソース端子との間を導通することによって、キャパシタ50の一端と、出力端子71との間を導通させる。トランジスタ61は、例えば、ゲート端子に第一信号の第一オフ電圧が入力されたときに、ドレイン端子とソース端子との間を絶縁することによって、キャパシタ50の一端と、出力端子71との間を絶縁させる。
トランジスタ62は、例えば、ゲート端子に第二信号の第二オン電圧が入力されたときに、ドレイン端子とソース端子との間を導通することによって、出力端子71と出力基準端子72との間を導通させる。トランジスタ62は、例えば、ゲート端子に第二信号の第二オフ電圧が入力されたときに、ドレイン端子とソース端子との間を絶縁することによって、出力端子71と出力基準端子72との間を絶縁させる。
このような増幅回路70は追加されることにより、例えば、第二高周波の振幅の最大値は、第一の被変調信号及び第二の被変調信号の振幅の最大値よりも大きくなってもよい。具体的には、第二高周波の振幅が、第一の被変調信号の第二振幅及び第二の被変調信号の第四振幅よりも大きくなってもよい。
なお、本開示において、増幅回路70は、高周波生成器の一部と見なすことができる。すなわち、図10に示される例では、高周波生成器は、高周波発振回路10と、増幅回路70とを含む。なお、前述の通り、ゲート駆動回路1001は、高周波発振回路10を備えなくてもよい。
実施の形態1に係るゲート駆動回路1000は、キャパシタ50に電荷を充電し、スイッチング素子の切り替えによって半導体スイッチング素子1に大電流を供給することができる。
実施の形態2において、第二の被変調信号は、第二高周波を含む。第二高周波は、例えば、第二の被変調信号のうち、充電用電圧を生成するための振幅を有する部分である。第二の被変調信号が、第一高周波を振幅変調することによって生成される場合、第二の高周波は第一の高周波と同等の周波数を有する。
実施の形態2において、絶縁伝送部は、第一の電磁界共鳴結合器20aと第二の電磁界共鳴結合器20bとを含む。
図13に示される例では、第三信号は、第三オン電圧と第三オフ電圧とを含み、第三オン電圧が充電用電圧に相当する。図13に示されるように、第二の被変調信号が第三振幅と、第三振幅よりも大きい第四振幅とを含む場合、第三信号の第三オン電圧は第二の被変調信号の第四振幅に対応し、第三信号の第三オフ電圧は第二の被変調信号の第三振幅に対応する。この場合、第二の被変調信号のうち第四振幅の期間が第二高周波に相当し、この第二高周波が整流されて第三オン電圧、すなわち充電用電圧となる。なお、第三信号は、例えば、第三オン電圧以外に、充電用電圧となりうる他の電圧を含んでいてもよい。その場合、第二高周波は、異なる複数の振幅に基づく信号成分を有する。
すなわち、実施の形態2において、第二の被変調信号は、第二の電磁界共鳴結合器20bから出力され、第二の整流回路40bと第三の整流回路40cとに入力される。そのため、出力回路60を動作させるための第二信号、および、キャパシタ50を充電させるための第三信号は、いずれも第二の被変調信号に基づいて生成される。
すなわち、第三の信号が、第二信号と同じく、第二の被変調信号に基づいて生成される。そのため、例えば、第二信号の第二オン電圧に応じてトランジスタ62がオンになる期間と、第三信号の第三オン電圧に応じてキャパシタ50が充電される期間とが同期しうる。同様に、第二信号の第二オフ電圧に応じてトランジスタ62がオフになる期間と、第三信号の第三オフ電圧に応じてキャパシタ50が放電する期間とが同期しうる。これにより、キャパシタ50に充電された電荷が出力端子71から出力される期間に、キャパシタ50に充電用電圧を供給せず、キャパシタ50に充電された電荷が出力端子71から出力されない期間に、キャパシタ50に充電用電圧を供給することができる。言い換えると、第三の整流回路40cは、出力回路60が電荷を半導体スイッチング素子1のゲート端子に供給しないときに、充電用電圧を出力し、出力回路60が電荷を半導体スイッチング素子1のゲート端子に供給するときに、充電用電圧を出力しないように制御されうる。
このような増幅回路70は追加されることにより、例えば、第二の被変調信号の振幅の最大値は、第一の被変調信号の振幅の最大値よりも大きくなってもよい。具体的には、第二の被変調信号の第四振幅が、第一の被変調信号の第二振幅よりも大きくなってもよい。
実施の形態1および2に係るゲート駆動回路は、出力回路がハーフブリッジ回路であったが、実施の形態3に係るゲート駆動回路は、出力回路がHブリッジ回路(フルブリッジ回路)である。以下、実施の形態3に係るゲート駆動回路について、図面を参照しながら説明する。
トランジスタ62のドレイン端子は、出力端子71およびトランジスタ61のソース端子に接続され、トランジスタ62のソース端子は、トランジスタ64のソース端子、キャパシタ50の他端、第一の整流回路40aの出力基準端子および第二の整流回路40bの出力基準端子に接続される。トランジスタ62のゲート端子は、第一の整流回路40aの出力端子に接続される。
トランジスタ63のドレイン端子は、キャパシタ50の一端およびトランジスタ61のドレイン端子に接続され、トランジスタ63のソース端子は、出力基準端子72、トランジスタ64のドレイン端子に接続される。トランジスタ63のゲート端子は、第一の整流回路40aの出力端子およびトランジスタ62のゲート端子に接続される。
トランジスタ61のドレイン端子は、キャパシタ50の一端およびトランジスタ63のドレイン端子に接続され、トランジスタ61のソース端子は、出力端子71、トランジスタ62のドレイン端子に接続される。トランジスタ61のゲート端子は、第二の整流回路40bの出力端子およびトランジスタ64のゲート端子に接続される。
トランジスタ64のドレイン端子は、出力端子71およびトランジスタ63のソース端子に接続され、トランジスタ64のソース端子は、トランジスタ62のソース端子、キャパシタ50の他端、第一の整流回路40aの出力基準端子および第二の整流回路40bの出力基準端子に接続される。トランジスタ64のゲート端子は、第二の整流回路40bの出力端子およびトランジスタ61のゲート端子に接続される。
例えば、第一信号の第一オン電圧が、トランジスタ61のゲート端子と、トランジスタ64のゲート端子とに入力されることによって、トランジスタ61とトランジスタ64とがオンになる。これにより、キャパシタ50、トランジスタ61、出力端子71、半導体スイッチング素子1のゲート容量、出力基準端子72、トランジスタ64を含む経路が形成される。例えば、第二信号の第二オン電圧が、トランジスタ62のゲート端子と、トランジスタ63のゲート端子とに入力されることによって、トランジスタ62とトランジスタ63とがオンになる。これにより、キャパシタ50、トランジスタ63、出力基準端子72、半導体スイッチング素子1のゲート容量、出力端子71、トランジスタ62を含む経路が形成される。
実施の形態1~3のゲート駆動回路において、キャパシタ50に充電用電圧を供給するための第二高周波の周波数と、出力回路に第一信号および第二信号を送るための搬送波である第一高周波の周波数は、同じであってもよいし、異なっていてもよい。
すなわち、実施の形態4のゲート駆動回路において、高周波の基本波成分が第二高周波であり、高周波の高調波成分が第一高周波である。
以下、実施の形態4に係るゲート駆動回路について、図面を参照しながら説明する。
そのため、周波数分配フィルタ90が、基本波成分を第二高周波として出力し、高調波成分を第一高周波として出力する場合、第二高周波の振幅は、例えば、第一高周波の振幅よりも大きい。以下では、高調波成分が、二倍波成分である例について説明する。
なお、本開示において、周波数分配フィルタ90は、高周波生成器の一部と見なすことができる。すなわち、図17に示される例では、高周波生成器は、高周波発振回路10と、周波数分配フィルタ90とを含む。なお、前述の通り、ゲート駆動回路1008は、高周波発振回路10を備えなくてもよい。
すなわち、第一入力信号(図17の波形704)に応じて高調波成分が変調されることにより、第一の被変調信号(図17の波形705)が生成される。第二入力信号(図17の波形703)に応じて高調波成分が変調されることにより、第二の被変調信号(図17の波形706)が生成される。
他方、第二高周波である基本波成分は、第三の電磁界共鳴結合器20cによって絶縁伝送される。
すなわち、実施の形態4において、絶縁伝送部は、第一の電磁界共鳴結合器20aと、第二の電磁界共鳴結合器20bと、第三の電磁界共鳴結合器20cとを備える。
なお、本開示において、増幅回路70aは、高周波生成器の一部と見なすことができる。すなわち、図19に示される例では、高周波生成器は、高周波発振回路10と、増幅回路70aと、周波数分配フィルタ90とを含む。なお、前述の通り、ゲート駆動回路1001は、高周波発振回路10を備えなくてもよい。
実施の形態1に係るゲート駆動回路1000は、キャパシタ50を充電し、ハーフブリッジ回路60をスイッチングすることで半導体スイッチング素子1に大電流を供給する。
図22に示されるように、高周波発振回路10は、トランジスタ62がオンとなるときに、第三の電磁界共鳴結合器20cに対して電力を出力し、トランジスタ62がオフとなるときに、第三の電磁界共鳴結合器20cに対して電力を出力しない。そのため、高周波発振回路10は、トランジスタ62のオンオフを制御する第二信号の基である第二入力信号に応じて、第二高周波の振幅を調整してもよい。
この場合、増幅回路70が、高周波発振回路10と第三の電磁界共鳴結合器20cとの間に設けられるため、増幅回路70は、高周波発振回路10から変調回路30に出力される第一高周波に影響を及ぼさない。そのため、ハーフブリッジ回路60を制御するための信号を搬送する第一高周波に影響を及ぼすことなく、キャパシタ50に電力を供給するための第二高周波をオンオフすることができる。
上記実施の形態1~5において例示される絶縁伝送部は、第一信号の基となる第一の被変調信号と、第二信号の基となる第二の被変調信号とが絶縁伝送されるために、少なくとも第一の電磁界共鳴結合器と、第二の電磁界共鳴結合器とを備える。
しかし、ゲート駆動回路において、被変調信号を絶縁伝送する電磁界共鳴結合器の数は減らすことができる。
このような回路は、例えば、図2に示されるゲート駆動回路1000に対して、第二の電磁界共鳴結合器20bを有さない構成とすることによって実現される。以下、このような構成を備えるゲート駆動回路の一例について、説明する。第一の被変調信号は、第一の電磁界共鳴結合器20aによって絶縁伝送された後、さらに分配されて、第一の整流回路40aと第二の整流回路40bとに入力される。第一の整流回路40aは、第一の被変調信号のうち正の電圧成分を整流し、第二の整流回路40bは第一の被変調信号のうち負の電圧成分を整流する。正の電圧成分を整流する第一の整流回路40aは、例えば、図2に示される第一の整流回路40aに対して、ダイオード41aが反対向きに接続されたものであってもよい。第一の整流回路40aによって生成された第一信号は、正の電圧成分を有し、第二の整流回路40bによって生成された第二信号は、負の電圧成分を有する。第一信号と第二信号とは、互いに極性が異なるものの、絶対値の大きさが同期している。第一信号は、例えばノーマリオフ型のトランジスタ61に入力され、第二信号は、例えば、ノーマリオン型のトランジスタ62に入力される。これにより、トランジスタ61およびトランジスタ62に所定の電圧が入力される期間は、トランジスタ61がオンに、トランジスタ62がオフになる。反対に、トランジスタ61およびトランジスタ62に所定の電圧が入力されない期間は、トランジスタ61がオフに、トランジスタ62がオンになる。これにより、ハーフブリッジ回路60は、図1に示されるハーフブリッジ回路60と同様の機能を果たす。
このようなゲート駆動回路であっても、キャパシタ50に電荷を充電し、スイッチング素子の切り替えによって半導体スイッチング素子1に大電流を供給することができる。
このような回路は、例えば、図13に示されるゲート駆動回路1000に対して、第二の電磁界共鳴結合器20b、および第二の整流回路40bを有さない構成とすることによって実現される。その場合、例えば、第一の被変調信号は、第一の電磁界共鳴結合器20aによって絶縁伝送された後、分配されて、第一の整流回路40aと第三の整流回路40cとに入力されてもよい。また、例えば、出力回路60のトランジスタ61とトランジスタ62とは、入力される1つの信号に応じて相補的にオンオフする構成であってもよい。例えば、トランジスタ61がノーマリオフ型かつP型のトランジスタであって、トランジスタ62がノーマリオン型かつN型のトランジスタ62であってもよい。
このようなゲート駆動回路であっても、キャパシタ50に電荷を充電し、スイッチング素子の切り替えによって半導体スイッチング素子1に大電流を供給することができる。
なお、本変形例は、上記実施の形態1~5において説明された他のゲート駆動回路にも適宜組み合わせることができる。
以上、各実施の形態に係るゲート駆動回路について説明した。
また、本開示において、信号の入出力に関する表現は、その信号が直接的に入出力される場合に限らず、間接的に入出力される場合をも含む。例えば「信号がAからBに出力される」、「信号がAからBに入力される」、「信号がAから出力されBに入力される」などの表現は、AとBの間にその他の素子または回路を含む構成をも含む。また、それらの表現は、Aから出力された信号が、その他の素子または回路を通って変化した後に、Bに入力されるものを含む。
2 負荷
3 信号発生器
10 高周波発振回路
20 電磁界共鳴結合器
20a 第一の電磁界共鳴結合器
20b 第二の電磁界共鳴結合器
20c 第三の電磁界共鳴結合器
30 変調回路(混合回路)
30a 変調回路(スイッチ回路)
40 整流回路
40a 第一の整流回路
40b 第二の整流回路
40c 第三の整流回路
41a,41b,41c ダイオード
42a,42b,42c インダクタ
43a,43b,43c キャパシタ
50 キャパシタ
60 ハーフブリッジ回路(出力回路)
60a Hブリッジ回路(出力回路)
61 トランジスタ(第一のスイッチング素子)
62 トランジスタ(第二のスイッチング素子)
63 トランジスタ(第三のスイッチング素子)
64 トランジスタ(第四のスイッチング素子)
70,70a 増幅回路
71 出力端子
72 出力基準端子
73 制御端子
90 周波数分配フィルタ
100,101 直流電源
501~509,601~608,701~709 波形
1000~1003,1006~1012,1000a ゲート駆動回路
2000 第一の共振器
2001 第一の入出力端子
2002,2005 開放部
2003 第二の共振器
2004 第二の入出力端子
Claims (20)
- 半導体スイッチング素子を駆動する絶縁型のゲート駆動回路であって、
第一入力信号に応じて第一高周波を変調した第一の被変調信号と、前記第一入力信号とは異なる第二入力信号に応じて前記第一高周波を変調した第二の被変調信号とを生成する変調回路と、
前記第一の被変調信号を絶縁伝送する第一の電磁界共鳴結合器、および、前記第二の被変調信号を絶縁伝送する第二の電磁界共鳴結合器を含む複数の電磁界共鳴結合器から構成される、絶縁伝送部と、
前記第一の電磁界共鳴結合器により絶縁伝送された前記第一の被変調信号を整流することによって、第一信号を生成する第一の整流回路と、
前記第二の電磁界共鳴結合器により絶縁伝送された前記第二の被変調信号を整流することによって、第二信号を生成する第二の整流回路と、
前記複数の電磁界共鳴結合器のうちの1つにより絶縁伝送された第二高周波を整流することによって、充電用電圧を生成する第三の整流回路と、
前記充電用電圧に応じて充電されるキャパシタと、
前記第一信号及び前記第二信号の少なくとも一方に応じて、前記キャパシタに充電された電荷を前記半導体スイッチング素子のゲート端子に供給するか否かを選択する出力回路と、を備える、
ゲート駆動回路。 - 前記絶縁伝送部は、
前記第二高周波を絶縁伝送する第三の電磁界共鳴結合器をさらに含む、
請求項1に記載のゲート駆動回路。 - 前記第二高周波の振幅の最大値は、前記第一の被変調信号及び前記第二の被変調信号の振幅の最大値よりも大きい、
請求項2に記載のゲート駆動回路。 - 前記第一高周波と前記第二高周波とを生成する高周波生成器を、さらに備える、
請求項2または3に記載のゲート駆動回路。 - 前記高周波生成器は、高周波を基本波成分と高調波成分とに分離して、前記基本波成分を前記第二高周波として出力し、前記高調波成分を前記第一高周波として出力する、周波数分配フィルタを含む、
請求項4に記載のゲート駆動回路。 - 前記高周波生成器は、前記第二高周波の振幅を変化させる増幅回路を含む、
請求項4または5に記載のゲート駆動回路。 - 前記増幅回路は、制御端子に入力される信号に応じて、前記第二高周波の振幅を変化させ、
前記第三の整流回路は、前記出力回路が前記電荷を前記半導体スイッチング素子のゲート端子に供給しないときに、前記充電用電圧を出力し、前記出力回路が前記電荷を前記半導体スイッチング素子のゲート端子に供給するときに、前記充電用電圧を出力しない、
請求項6に記載のゲート駆動回路。 - 前記第二の被変調信号は、前記第二高周波を含み、
前記第三の整流回路は、前記第二の電磁界共鳴結合器により絶縁伝送された前記第二の被変調信号を整流することによって、前記充電用電圧を生成する、
請求項1に記載のゲート駆動回路。 - 前記第二の被変調信号の振幅の最大値は、前記第一の被変調信号振幅の最大値よりも大きい、
請求項8に記載のゲート駆動回路。 - さらに、前記変調回路と前記第二の電磁界共鳴結合器との間に設けられ、前記第二の被変調信号を増幅させる増幅回路を備える、
請求項8に記載のゲート駆動回路。 - さらに、前記第一高周波を生成する高周波発振回路を備える、
請求項8から10のいずれか一項に記載のゲート駆動回路。 - 前記第三の整流回路は、前記出力回路が前記電荷を前記半導体スイッチング素子のゲート端子に供給しないときに、前記充電用電圧を出力し、前記出力回路が前記電荷を前記半導体スイッチング素子のゲート端子に供給するときに、前記充電用電圧を出力しない、
請求項8から11のいずれか一項に記載のゲート駆動回路。 - 前記出力回路は、
前記第一信号に応じて、前記キャパシタに充電された電荷を前記半導体スイッチング素子のゲート端子に供給させる第一のスイッチング素子と、
前記第二信号に応じて、前記半導体スイッチング素子の前記ゲート端子から電荷を引き抜く第二のスイッチング素子とを含む、
請求項1から12のいずれか一項に記載のゲート駆動回路。 - 前記出力回路は、
前記第一信号に応じて、前記キャパシタに充電された電荷を前記半導体スイッチング素子のゲート端子に供給させる第一のスイッチング素子及び第四のスイッチング素子と、
前記第二信号に応じて、前記ゲート端子から電荷を引き抜いて、当該電荷を前記キャパシタに充電する第二のスイッチング素子及び第三のスイッチング素子とを含む、
請求項1から12のいずれか一項に記載のゲート駆動回路。 - 前記変調回路は、前記第一入力信号と前記第一高周波とを混合することによって前記第一の被変調信号を生成し、前記第二入力信号と前記第一高周波とを混合することによって前記第二の被変調信号を生成する混合回路である
請求項1から14のいずれか一項に記載のゲート駆動回路。 - 前記第二入力信号は、前記第一入力信号の反転信号である、
請求項1から15のいずれか一項に記載のゲート駆動回路。 - 前記変調回路は、前記第一入力信号および前記第二入力信号に応じて、前記第一高周波を前記第一の電磁界共鳴結合器に出力するか前記第二の電磁界共鳴結合器に出力するかを切り替えることによって、前記第一の被変調信号および前記第二の被変調信号を生成するスイッチ回路である
請求項1から14のいずれか一項に記載のゲート駆動回路。 - 半導体スイッチング素子を駆動する絶縁型のゲート駆動回路であって、
入力信号に応じて第一高周波を変調した被変調信号を生成する変調回路と、
前記被変調信号を絶縁伝送する電磁界共鳴結合器を含む絶縁伝送部と、
前記電磁界共鳴結合器により絶縁伝送された前記被変調信号を整流することによって、信号を生成する整流回路と、
前記絶縁伝送部により絶縁伝送された第二高周波を整流することによって、充電用電圧を生成する別の整流回路と、
前記充電用電圧に応じて充電されるキャパシタと、
前記信号に応じて、前記キャパシタに充電された電荷を前記半導体スイッチング素子のゲート端子に供給するか否かを選択する出力回路と、を備える、
ゲート駆動回路。 - 前記被変調信号は前記第二高周波を含み、
前記別の整流回路は、前記電磁界共鳴結合器により絶縁伝送された前記第二高周波を整流することによって、前記充電用電圧を生成する、
請求項18に記載のゲート駆動回路。 - 前記絶縁伝送部は、さらに、前記第二高周波を絶縁伝送する別の電磁界共鳴結合器を含む、
請求項18に記載のゲート駆動回路。
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EP (1) | EP3041139B1 (ja) |
JP (1) | JP5866506B2 (ja) |
CN (1) | CN104584433B (ja) |
WO (1) | WO2015029363A1 (ja) |
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Also Published As
Publication number | Publication date |
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CN104584433B (zh) | 2018-09-25 |
EP3041139A1 (en) | 2016-07-06 |
CN104584433A (zh) | 2015-04-29 |
EP3041139A4 (en) | 2016-08-24 |
JPWO2015029363A1 (ja) | 2017-03-02 |
EP3041139B1 (en) | 2018-10-10 |
US9494964B2 (en) | 2016-11-15 |
JP5866506B2 (ja) | 2016-02-17 |
US20150234417A1 (en) | 2015-08-20 |
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