WO2014190525A1 - 一种超大尺寸pcb背板压合制作方法 - Google Patents

一种超大尺寸pcb背板压合制作方法 Download PDF

Info

Publication number
WO2014190525A1
WO2014190525A1 PCT/CN2013/076496 CN2013076496W WO2014190525A1 WO 2014190525 A1 WO2014190525 A1 WO 2014190525A1 CN 2013076496 W CN2013076496 W CN 2013076496W WO 2014190525 A1 WO2014190525 A1 WO 2014190525A1
Authority
WO
WIPO (PCT)
Prior art keywords
manufacturing
core
riveting
super
pcb
Prior art date
Application number
PCT/CN2013/076496
Other languages
English (en)
French (fr)
Inventor
张军杰
李学明
季辉
张国城
Original Assignee
深圳崇达多层线路板有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳崇达多层线路板有限公司 filed Critical 深圳崇达多层线路板有限公司
Priority to PCT/CN2013/076496 priority Critical patent/WO2014190525A1/zh
Priority to CN201380000384.0A priority patent/CN104380847B/zh
Publication of WO2014190525A1 publication Critical patent/WO2014190525A1/zh

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4638Aligning and fixing the circuit boards before lamination; Detecting or measuring the misalignment after lamination; Aligning external circuit patterns or via connections relative to internal circuits
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/18Handling of layers or the laminate
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/0007Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding involving treatment or provisions in order to avoid deformation or air inclusion, e.g. to improve surface quality
    • B32B37/003Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding involving treatment or provisions in order to avoid deformation or air inclusion, e.g. to improve surface quality to avoid air inclusion
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B2038/0052Other operations not otherwise provided for
    • B32B2038/0096Riveting
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00Electrical equipment
    • B32B2457/08PCBs, i.e. printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates

Definitions

  • the invention belongs to the field of PCB backboard manufacturing, and in particular relates to a working method of a press-bonding process of a PCB backboard.
  • PCB backplane has the characteristics of large board size, high number of layers, large thickness, and high aspect ratio of the aperture.
  • the size of the PCB backplane is 660*810mm, and the size of the ordinary PCB is 550*610mm.
  • the process of pressing the PCB in the prior art includes a browning step, a riveting step, a arranging step, a pressing step and a detaching step, wherein the temperature at the browning is 80° C. Baking plate together; when riveting, the rivet machine table is flattened and pressed with steel plate, and the riveting method is riveting on the side of the riveting machine, and the punching machine lower die punching pin is 10mm, because the riveting machine lower die punching needle is too Short, it may not cause the punching needle to be exposed, so that the core plates of the backboard cannot be riveted securely; when the board is arranged, the number of layers of the typesetting is 4-5 layers, and the layout is as shown in Fig. 1.
  • the purpose of the embodiments of the present invention is to provide a method for manufacturing a super-sized PCB backplane, which is intended to solve the problem that in the prior art PCB manufacturing, voids and air bubbles are easily formed after pressing, thereby causing subsequent drilling and sinking. Copper, after the plate is charged, the syrup penetrates, causing a problem of short circuit in the inner layer.
  • the embodiment of the present invention is implemented by the method for manufacturing a super-sized PCB backplane, the PCB backplane includes a plurality of core boards, and the manufacturing method comprises: a browning step: browning each of the core boards Post-baking; riveting step: adding a PP sheet between each two core sheets, and riveting a plurality of the core sheets added to the PP sheet on the riveting machine to form a multi-layer core board;
  • the riveted multi-layer core plate is arranged on the steel plate and overlapped with other materials required for pressing; the pressing step: pushing the laminated multi-layer core plate into the hot press, after high temperature, The high pressure causes the PP sheets to melt, so that the core sheets are bonded together.
  • the method further comprises the step of drilling the exhaust gas to drill the vent hole at a position where the air bubble is easily generated after the core plate is riveted or before the riveting.
  • the browning step comprises a drying sub-step, and the drying temperature in the drying sub-step is 90 °C.
  • the browning step comprises a baking board step, and the baking sheet in the baking board step is a plug type, the baking sheet temperature is 120 ° C, and the baking sheet time is 1 hour.
  • the manner of riveting in the riveting step is as follows: firstly, the core plate to be riveted is supported by the steel plate, and then the four corners or four sides are covered with Pin nails, and then riveted to the riveting machine.
  • the embodiment of the invention improves the parameters in each step of the steps of browning, riveting and pressing by increasing the steps of drilling the venting holes, thereby effectively reducing the voids and bubbles generated in the pressing process of the PCB backing plate. Therefore, the problem of the inner layer short circuit after the subsequent drilling, copper sinking, and plate electrical process is effectively reduced.
  • FIG. 1 is a schematic view of a stacked mode in a PCB manufacturing method in the prior art
  • FIG. 2 and FIG. 3 are photographs showing the voids generated by the core sheets after pressing and the bare copper regions generated by the bubbles in the prior art PCB manufacturing method
  • FIG. 4 is a flow chart of a splicing process in a PCB manufacturing method according to an embodiment of the present invention
  • Figure 5 is a schematic illustration of the lamination mode in the step of arranging the plates in the method of Figure 4.
  • FIG. 4 it is a process flow diagram of a method for fabricating a PCB backplane according to an embodiment of the present invention.
  • the PCB backplane includes a plurality of core boards (not shown), and the plurality of chips form a PCB backplane after the pressing process.
  • the PCB backplane is a backplane, and the specific pressing process is illustrated in FIG. 4 is shown.
  • Step S40 is a browning step: the core board is subjected to browning treatment and then dried, and the step further comprises a drying sub-step and a baking board step, wherein the drying temperature of the core board in the drying sub-step is from a normal 80 ° C Increase to 90 °C, in the baking board step, the way of baking the core board is changed from the original stacking method to the inserting mode, and the temperature is maintained at 120 ° C for one hour to ensure that the water vapor in the board is fully evaporated.
  • the inserting method is specifically to place the core plates on a shelf, and the core plates are separated from each other on the shelf, thereby shortening the baking time and facilitating evaporation of water vapor.
  • Step S41 is a riveting step: adding a PP sheet (film) between each two core sheets, and riveting a plurality of core sheets added to the PP sheet on the riveting machine to form a multi-layer core board, when riveting,
  • the rivet machine is tiled and pressed for the steel plate.
  • the riveting method is changed from the original rivet on the rivet machine to the steel plate.
  • the PIN nail is used to cover the four corners or the four sides and then riveted on the rivet machine.
  • the layer is prevented.
  • the upper and lower molds are aligned in the same straight line, and the punching needle of the rivet machine is replaced by the original 10mm into a 15mm punching needle, so that the core plate can be exposed and the punching needle can be exposed.
  • Step S42 is a drilling and exhausting step.
  • the plate is thick, and the inner layer of copper is thick, when the pressure is pressed, the gas cannot be completely discharged and the bubbles are left in the PCB back plate, after riveting.
  • the hole on the multi-layer core board is poorly filled or the air vent is easy to be generated.
  • the position of the selected vent hole should be the position where drilling is required in the subsequent drilling, that is, in the position of the hole.
  • the local drilling vent hole has a diameter of 0.3 mm smaller than the hole diameter of the hole to be drilled, so as to ensure that gas is released from the vent hole during pressing, and the vent holes are pressed at the same time. After refilling, it is sealed, and then drilled with the original aperture when drilling, and subsequent normal production can be done.
  • this step may also drill a venting opening to a single core panel prior to the riveting step.
  • Step S43 is a step of arranging the plates: the spliced multi-layer core plates are arranged on the steel plate, and are laminated with other materials required for pressing, and other materials required for pressing include aluminum sheets, steel sheets, kraft paper, etc.
  • the release film and the silica gel pad are further included.
  • the number of layers of the row plate is two, and the stack of each layer is as shown in FIG. 4, that is, the stacked mode shown in FIG.
  • a release film 25 and a silica gel pad 26 are added between the steel plate 22 and the aluminum sheet 21, wherein the silicone film 25 is after the aluminum sheet 21, and the release film 26 is after the silicone pad 25, and the silicone pad 25 is added.
  • the release film 26 After the release film 26, it helps to buffer heat during pressing, so that the ripped PCB 21 is evenly heated, so that the bubbles are slowly discharged.
  • other materials required for pressing are not limited to the above materials, and the order of the stacked sheets is not limited to the manner described in the embodiment, and may be changed according to actual conditions.
  • Step S44 is a pressing step: pushing the stacked PCB back plate into a hot press, and melting the PP sheet through high temperature and high pressure, so that the core plates are tightly combined, and the high pressure time during pressing cannot be too early. It should not be too late, in the present embodiment, it is 35 minutes, so as to ensure that the PP is fully flowed to fill the high pressure, and the uniformity of the filling is ensured.
  • the high pressure is increased from the ordinary 350-380 PSI to 450 PSI, and the temperature of the high pressure is increased from about 90 ° C to 106 ° C, and the heating rate is adjusted according to the material characteristics. In the present embodiment, the temperature is 80-140 ° C.
  • the heating rate between the two is 2.0-2.5 ° C / min, so that when the pressing, the flow can be made uniform, thereby effectively reducing voids and bubbles.
  • the invention improves the various steps in the press forming process, thereby effectively reducing the voids and bubbles generated by the PCB back plate after the pressing, thereby reducing the problem of subsequent copper infiltration short circuit of the PCB back plate.

Landscapes

  • Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Insertion Pins And Rivets (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)

Abstract

本发明适用PCB背板制作技术领域,提供了一种超大尺寸PCB背板压合制作方法,该PCB背板包括多个芯板,制作方法包括:棕化步骤:将各所述芯板进行棕化处理后烘干;铆合步骤:在每两个芯板之间加入PP片,并将加入PP片的多个所述芯板在铆钉机上铆合在一起形成多层芯板;排板步骤:对铆合好的多层芯板在钢板上进行排板,并与其他压合需要的材料进行叠合;压合步骤:将叠合后的的多层芯板推入热压机,经过高温、高压使PP片融化,使各所述芯板结合在一起。本发明通过对PCB背板压合制作过程中的各个步骤的改进,有效的减少了PCB背板压合后的空洞和气泡的产生,从而有效减少PCB背板压合后渗铜短路的问题。

Description

一种超大尺寸PCB背板压合制作方法
本发明属于PCB背板制作领域,尤其涉及PCB背板的压合制程的作业方法。
 随着集成电路等元件的集成度提高及其I/O数的增加、电子组装技术的进步和信号传输的高频化和高速数字化的发展,以及电子设备高速发展的升级与换代需求,PCB背板能够承载功能子板、信号传输及电源传输等功能,而其信号处理功能逐渐弱化。该PCB背板具有板子尺寸大、层数高、厚度大、孔径纵横比高等特点,该PCB背板的尺寸为660*810mm,而普通PCB的尺寸为550*610mm。
   现有技术中压合PCB的过程包括棕化步骤、铆合步骤、排板步骤、压合步骤及拆板步骤,其中,棕化时的温度为80℃,棕化后烤板的方式为叠在一起烤板;铆合时,铆钉机台面平铺压合用的钢板,且铆合方式为在铆钉机上边排边铆,且铆钉机下模冲针为10mm,由于铆钉机下模冲针太短,可能使冲针不会露出来,从而不能牢固的将背板各芯板进行铆合;在排板的时候,排版的层数为4-5层,排版的方式如图1所示,为铆合好的PCB21的两侧加铝片22,铝片22之后加钢板23,钢板23之后加20张牛皮纸24,即牛皮纸24+铜板23+铝片22+铆合好PCB背板21的方式;在压合的时候,压合的压力为350-380PSI,温度为90℃。通过上述制程压合后的板子,芯板与芯板之间存在图2所示的空洞10,且由于气泡没有排出,形成在图3所示裸铜区11,所以在钻孔,沉铜,板电之后,药水容易渗入空洞10及裸铜区11中,导致内层短路。   
本发明实施例的目的在于提供一种超大尺寸PCB背板压合制作方法,旨在解决由于现有技术中的PCB制作中,压合之后容易出现空洞,气泡,从而使在后续钻孔,沉铜,板电之后,药水渗入,导致内层短路的问题。
本发明实施例是这样实现的,一种超大尺寸PCB背板压合制作方法,该PCB背板包括多个芯板,该制作方法包括:棕化步骤:将各所述芯板进行棕化处理后烘干;铆合步骤:在每两个芯板之间加入PP片,并将加入PP片的多个所述芯板在铆钉机上铆合在一起形成多层芯板;排板步骤:对铆合好的多层芯板在钢板上进行排板,并与其他压合需要的材料进行叠合;压合步骤:将叠合后的的多层芯板推入热压机,经过高温、高压使PP片融化,使各所述芯板结合在一起。
   优选地,该方法还包括钻孔排气的步骤,在芯板铆合后或铆合前容易产生气泡的位置钻排气孔。
   优选地,所述棕化步骤中包括烘干子步骤,烘干子步骤中的烘干温度为90℃。
   优选地,所述棕化步骤包括烤板子步骤,烤板子步骤中的烤板方式为插架式,烤板温度为120℃,烤板时间为1小时。
   优选地,所述铆合步骤中铆合的方式为:先将需要铆合的芯板用钢板支承,然后用Pin钉套好四角或四边,再放到铆钉机上铆合。
本发明实施例通过增加钻排气孔的步骤,且对棕化,铆合,压合各个步骤中的参数进行改进,有效的减少了PCB背板制作中,压合制程中产生的空洞及气泡,从而有效的减少了后续经过钻孔,沉铜,板电制程之后的内层短路问题。   
图1是现有技术中的PCB制作方法中叠板方式的示意图;
   图2及图3为现有技术中的PCB制作方法中芯板经压合后产生的空洞及有气泡产生的裸铜区的照片;
   图4是本发明一实施例中的PCB制作方法中压合制程的流程图;
   图5是图4所示方法中排板步骤中的叠板方式的示意图。   
为了使本发明的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
   以下结合具体实施例对本发明的具体实现进行详细描述:
   如图4所示,为本发明一实施方式中制作PCB背板的的方法的工艺流程图。该PCB背板包括多个芯板(图未示),该多个芯片经过压合工艺之后形成PCB背板,本实施方式中,该PCB背板为背板,具体的压合工艺流程如图4所示。
   步骤S40为棕化步骤:将所述芯板进行棕化处理后烘干,该步骤又包括烘干子步骤及烤板子步骤,其中烘干子步骤中芯板的烘干温度从正常的80℃提高到90 ℃,在烤板子步骤中,烘烤芯板的方式为由原来叠在一起的方式改为插架方式,而且保持120℃的温度烤一个小时,以保证板内水汽充分蒸发。插架方式具体为将芯板放在一个架子上,且芯板在该架子上被互相隔开,从而缩短烤板时间,且有利于水蒸气的蒸发。
   步骤S41为铆合步骤:在每两个芯板之间加入PP片(胶片),并将加入PP片的多个芯板在铆钉机上铆合在一起形成多层芯板,在铆合时,铆钉机台面平铺压合用钢板,铆合方式由原来的在铆钉机上边排边铆的方式改成用钢板支承先用PIN钉套好四角或四边再放在铆钉机上铆合,如此,防止层与层之间产生偏位,滑板;同时,调整上、下模具在同一直线,并将铆钉机下模冲针由原来的10mm更换成15mm的冲针,使芯板套上去后冲针能够露出来,从而保证铆钉开花均匀,如此使芯板之间的空隙减少,从而减小后续空度及气泡的产生。
   步骤S42为钻孔排气步骤,在PCB背板尺寸大,板较厚,内层铜厚较厚时,压合时因气体不能完全排出释放形成气泡残留在PCB背板内,在铆合后的多层芯板上填胶不良或者容易产生气泡的地方钻排气孔,具体所选择的排气孔的位置应当为后续钻孔制作中有需要钻孔的位置,即在有钻孔位的地方钻排气孔,所钻排气孔大小比所实际要钻的孔的孔径小0.3mm,这样可以保证压合时气体从这些排气孔中释放出来,同时这些排气孔孔在压合后重新填胶被封住,后续钻孔时再用原孔径钻掉,后续正常制作即可。
   在其他实施方式中,该步骤也可在铆合步骤之前对单个芯板钻排气孔。
   步骤S43为排板步骤:对铆合好的多层芯板在钢板上进行排板,并与其他压合需要的材料进行叠合,其他压合需要的材料包括铝片、钢板、及牛皮纸等,本实施方式中,还包括离型膜和硅胶垫,本实施方式中,排板的层数为2层,每层板的叠板如图4所示,即在图1所示叠板方式的基础上,在钢板22与铝片21之间加离型膜25及硅胶垫26,其中,硅胶垫25在铝片21之后,离型膜26在硅胶垫25之后,加了硅胶垫25及离型膜26之后,有助于在压合时缓冲热量,使铆合好的PCB21受热均匀,从而使气泡缓慢排出。在其他实施方式中,其他压合需要的材料不限于上述材料,叠板的次序也不限于本实施方所描述的方式,具体可以根据实际情况进行变化。
   步骤S44为压合步骤:将叠好的PCB背板推入热压机,经过高温,高压使PP片融化,从而使芯板紧密的结合在一起,压合时的转高压时间不能太早也不能太迟,本实施方式中为35分钟,如此可保证PP在充分流动使填高压,保证填胶的均匀性。转高压压力由普通的350-380PSI提高到450PSI,转高压的温度为由原来的90℃左右提高到106℃,且根据材料特性来调整升温速率,本实施方式中,温度为80-140℃之间的升温速率为2.0-2.5℃/分钟,如此在压合的时候,可使流胶均匀,从而有效的减少了空洞及气泡。
   本发明通过对压合制成中的各个步骤进行改进,从而有效减少了PCB背板在压合后产生的空洞和气泡,从而减少了PCB背板后续渗铜短路的问题。
   以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本发明的保护范围之内。

Claims (10)

  1.  一种超大尺寸PCB背板压合制作方法,该PCB背板包括多个芯板,其特征在于,该制作方法包括:
       棕化步骤:将各所述芯板进行棕化处理后烘干;
       铆合步骤:在每两个芯板之间加入PP片,并将加入PP片的多个所述芯板在铆钉机上铆合在一起形成多层芯板;
       排板步骤:对铆合后的多层芯板在钢板上进行排板,并与其他压合需要的材料进行叠合;
       压合步骤:将叠合后的的多层芯板推入热压机,经过高温、高压使PP片融化,使各所述芯板结合在一起。
  2.    如权利要求1所述的超大尺寸PCB背板压合制作方法,其特征在于,还包括钻孔排气步骤:在各所述芯板铆合后或铆合前容易产生气泡的设计有孔的位置钻排气孔。
  3.    如权利要求2所述的超大尺寸PCB背板压合制作方法,其特征在于,所钻排气孔比所设计孔的孔径小0.3mm。
  4.    如权利要求1所述的超大尺寸PCB背板压合制作方法,其特征在于,所述棕化步骤包括烘干子步骤,所述烘干子步骤中的烘干温度为90℃。
  5.    如权利要求1所述的超大尺寸PCB背板压合制作方法,其特征在于,所述棕化步骤包括烤板子步骤,所述烤板子步骤中的烤板方式为插架式,烤板温度为120℃,烤板时间为1小时。
  6.    如权利要求1所述的超大尺寸PCB背板压合制作方法,其特征在于,所述铆合步骤中铆合的方式为:先将需要铆合的芯板用钢板支承,然后用Pin钉套好四角或四边,再放到铆钉机上铆合。
  7.    如权利要求5所述的超大尺寸PCB背板压合制作方法,其特征在于,所述排板步骤中,排版的层数为2层。
  8.    如权利要求1所述的超大尺寸PCB背板压合制作方法,其特征在于,所述排板步骤中的的排板方式为:在铆合好的PCB背板两边加铝片,在两个铝片之后再加硅胶垫,硅胶垫之后加离型膜,在离型膜之后再加钢板,钢板之后加牛皮纸。
  9.    如权利要求1所述的超大尺寸PCB背板压合制作方法,其特征在于,所述压合步骤中的转高压时间为35-40分钟,压合的高压压力为350-380PSI。
  10.    如权利要求1所述的超大尺寸PCB背板压合制作方法,其特征在于,所述压合步骤中转高压的温度为106℃,温度为80-140℃之间的升温速率为2.0-2.5℃/分钟。
PCT/CN2013/076496 2013-05-30 2013-05-30 一种超大尺寸pcb背板压合制作方法 WO2014190525A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/CN2013/076496 WO2014190525A1 (zh) 2013-05-30 2013-05-30 一种超大尺寸pcb背板压合制作方法
CN201380000384.0A CN104380847B (zh) 2013-05-30 2013-05-30 一种超大尺寸pcb背板压合制作方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2013/076496 WO2014190525A1 (zh) 2013-05-30 2013-05-30 一种超大尺寸pcb背板压合制作方法

Publications (1)

Publication Number Publication Date
WO2014190525A1 true WO2014190525A1 (zh) 2014-12-04

Family

ID=51987882

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2013/076496 WO2014190525A1 (zh) 2013-05-30 2013-05-30 一种超大尺寸pcb背板压合制作方法

Country Status (2)

Country Link
CN (1) CN104380847B (zh)
WO (1) WO2014190525A1 (zh)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105142363A (zh) * 2015-09-07 2015-12-09 浪潮电子信息产业股份有限公司 一种高速pcb压合方法
CN105530766A (zh) * 2016-02-22 2016-04-27 深圳崇达多层线路板有限公司 一种防止线路板铜皮起泡的工艺
CN109862701A (zh) * 2019-02-01 2019-06-07 奥士康精密电路(惠州)有限公司 一种减少pcb板内短报废的方法
CN111315142A (zh) * 2020-03-24 2020-06-19 四川英创力电子科技股份有限公司 一种mpi泡沫棉混压板的加工工艺
CN111556670A (zh) * 2020-05-29 2020-08-18 惠州市特创电子科技有限公司 一种高厚铜线路板的制作方法
CN113056120A (zh) * 2021-02-06 2021-06-29 深圳市昶东鑫线路板有限公司 一种防止高多层板防层偏的层压方法

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105392304B (zh) * 2015-10-21 2017-12-05 胜宏科技(惠州)股份有限公司 一种线路板压合方法
CN108684161A (zh) * 2018-04-25 2018-10-19 江门崇达电路技术有限公司 一种改善pcb压合内短的铆合方法
CN110121236A (zh) * 2019-05-07 2019-08-13 苏州浪潮智能科技有限公司 一种双面插接线路板及制造方法
CN112312684A (zh) * 2020-09-28 2021-02-02 惠州市金百泽电路科技有限公司 一种多层fpc板的压合层偏控制方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4702785A (en) * 1985-06-24 1987-10-27 President Engineering Corporation Process for manufacturing multilayer PC boards
CN201491376U (zh) * 2009-09-01 2010-05-26 深圳和而泰智能控制股份有限公司 一种用于灌胶的电路板
CN101720167A (zh) * 2009-11-20 2010-06-02 深圳崇达多层线路板有限公司 内层芯板树脂塞孔的线路板制作方法
CN101965105A (zh) * 2010-08-30 2011-02-02 昆山元茂电子科技有限公司 一种印刷电路板压合制程工艺

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102573337A (zh) * 2010-12-30 2012-07-11 北大方正集团有限公司 多层电路板的制造方法、压合装置及多层电路板
CN102170755B (zh) * 2011-04-25 2012-11-28 衢州威盛精密电子科技有限公司 一种陶瓷手机线路板的生产工艺
CN202262101U (zh) * 2012-01-16 2012-05-30 茂成电子科技(东莞)有限公司 用于多层印刷电路板的活动分离式铆钉台面

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4702785A (en) * 1985-06-24 1987-10-27 President Engineering Corporation Process for manufacturing multilayer PC boards
CN201491376U (zh) * 2009-09-01 2010-05-26 深圳和而泰智能控制股份有限公司 一种用于灌胶的电路板
CN101720167A (zh) * 2009-11-20 2010-06-02 深圳崇达多层线路板有限公司 内层芯板树脂塞孔的线路板制作方法
CN101965105A (zh) * 2010-08-30 2011-02-02 昆山元茂电子科技有限公司 一种印刷电路板压合制程工艺

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105142363A (zh) * 2015-09-07 2015-12-09 浪潮电子信息产业股份有限公司 一种高速pcb压合方法
CN105530766A (zh) * 2016-02-22 2016-04-27 深圳崇达多层线路板有限公司 一种防止线路板铜皮起泡的工艺
CN109862701A (zh) * 2019-02-01 2019-06-07 奥士康精密电路(惠州)有限公司 一种减少pcb板内短报废的方法
CN111315142A (zh) * 2020-03-24 2020-06-19 四川英创力电子科技股份有限公司 一种mpi泡沫棉混压板的加工工艺
CN111556670A (zh) * 2020-05-29 2020-08-18 惠州市特创电子科技有限公司 一种高厚铜线路板的制作方法
CN113056120A (zh) * 2021-02-06 2021-06-29 深圳市昶东鑫线路板有限公司 一种防止高多层板防层偏的层压方法

Also Published As

Publication number Publication date
CN104380847A (zh) 2015-02-25
CN104380847B (zh) 2017-06-27

Similar Documents

Publication Publication Date Title
WO2014190525A1 (zh) 一种超大尺寸pcb背板压合制作方法
WO2021052060A1 (zh) 一种内嵌导热体的pcb制作方法及pcb
CN109219273B (zh) 一种基于缓冲材料的pcb压合的叠板结构及压合方法
CN102917554B (zh) 双铜芯多层板制作方法
WO2013000207A1 (zh) 金属基电路板及其制造方法
TW201406224A (zh) 多層線路板及其製作方法
KR101058695B1 (ko) 구리 다이렉트 레이저 가공에 의하여 제조되는 인쇄회로기판에 사용되는 동박 코팅 적층판 및 이를 이용한인쇄회로기판의 제조방법
JP2008277738A (ja) 放熱プリント基板及びその製造方法
CN108377618B (zh) 一种防止假层板层偏的压合方法
TW201422071A (zh) 透明電路板及其製作方法
CN103025061B (zh) 一种印刷电路板制备方法及印刷电路板
JP2012178601A (ja) 金属積層板及びこれを用いたコア基板の製造方法
KR101655928B1 (ko) 인쇄회로기판 제조방법
US10629511B2 (en) Heat dissipation substrate, manufacturing method thereof and chip package structure
JP2014135344A (ja) 配線基板の製造方法
JP2022142042A (ja) プリント配線板の製造方法およびその方法の実施に用いられるラミネートシステム
KR101679565B1 (ko) 본딩 타겟 가이드
TWI386135B (zh) 多層電路板製作方法及用於製作多層電路板之基板
CN105636332B (zh) 金属基电路板及其加工方法
JP2005216859A (ja) プラズマディスプレイパネルのグリーンシート焼成装置及び焼成方法
KR20140011202A (ko) 메탈 코어가 삽입된 인쇄회로기판의 제조방법
CN213602901U (zh) 一种电路板制造保护膜
JP2001177241A (ja) 多層プリント基板の製造方法
CN107801325A (zh) 覆树脂铜箔的制作方法和压合具有大空旷区芯板的方法
KR20190065219A (ko) 인쇄회로기판

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 13885487

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 13885487

Country of ref document: EP

Kind code of ref document: A1